Move i965 video vertex data to BOs.
This eliminates extra syncing when clipping is involved.
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8482597259
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1b3c3c9d79
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@ -663,12 +663,9 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
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int urb_cs_start, urb_cs_size;
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float src_scale_x, src_scale_y;
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uint32_t *binding_table;
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Bool first_output = TRUE;
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int dest_surf_offset, src_surf_offset[6];
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int vb_offset;
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int binding_table_offset;
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int next_offset, total_state_size;
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int vb_size = (4 * 4) * 4; /* 4 DWORDS per vertex */
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char *state_base;
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int state_base_offset;
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int src_surf;
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@ -744,10 +741,6 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
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next_offset = 0;
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/* Set up our layout of state in framebuffer: */
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/* Align VB to native size of elements, for safety */
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vb_offset = ALIGN(next_offset, 8);
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next_offset = vb_offset + vb_size;
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/* And then the general state: */
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dest_surf_offset = ALIGN(next_offset, 32);
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next_offset = dest_surf_offset + sizeof(struct brw_surface_state);
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@ -775,7 +768,6 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
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binding_table = (void *)(state_base + binding_table_offset);
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#if 0
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ErrorF("vb: 0x%08x\n", state_base_offset + vb_offset);
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ErrorF("dst surf: 0x%08x\n", state_base_offset + dest_surf_offset);
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ErrorF("src surf: 0x%08x\n", state_base_offset + src_surf_offset);
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ErrorF("binding table: 0x%08x\n", state_base_offset + binding_table_offset);
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@ -888,7 +880,7 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
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/* brw_debug (pScrn, "after base address modify"); */
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{
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BEGIN_BATCH(42);
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BEGIN_BATCH(38);
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/* Enable VF statistics */
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OUT_BATCH(BRW_3DSTATE_VF_STATISTICS | 1);
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@ -966,15 +958,6 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
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OUT_BATCH(((URB_CS_ENTRY_SIZE - 1) << 4) |
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(URB_CS_ENTRIES << 0));
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/* Set up the pointer to our vertex buffer */
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OUT_BATCH(BRW_3DSTATE_VERTEX_BUFFERS | 2);
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/* four 32-bit floats per vertex */
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OUT_BATCH((0 << VB0_BUFFER_INDEX_SHIFT) |
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VB0_VERTEXDATA |
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((4 * 4) << VB0_BUFFER_PITCH_SHIFT));
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OUT_BATCH(state_base_offset + vb_offset);
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OUT_BATCH(3); /* four corners to our rectangle */
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/* Set up our vertex elements, sourced from the single vertex buffer. */
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OUT_BATCH(BRW_3DSTATE_VERTEX_ELEMENTS | 3);
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/* offset 0: X,Y -> {X, Y, 1.0, 1.0} */
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@ -1028,18 +1011,16 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
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int box_x2 = pbox->x2;
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int box_y2 = pbox->y2;
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int i;
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drm_intel_bo *vb_bo;
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float *vb;
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if (!first_output) {
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/* Since we use the same little vertex buffer over and over, sync
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* for subsequent rectangles.
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*/
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i830WaitSync(pScrn);
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}
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pbox++;
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vb = (void *)(state_base + vb_offset);
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vb_bo = drm_intel_bo_alloc(pI830->bufmgr, "textured video vb",
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4096, 4096);
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drm_intel_bo_map(vb_bo, TRUE);
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vb = vb_bo->virtual;
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i = 0;
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vb[i++] = (box_x2 - dxo) * src_scale_x;
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vb[i++] = (box_y2 - dyo) * src_scale_y;
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@ -1056,9 +1037,20 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
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vb[i++] = (float) box_x1 + pix_xoff;
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vb[i++] = (float) box_y1 + pix_yoff;
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drm_intel_bo_unmap(vb_bo);
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i965_pre_draw_debug(pScrn);
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BEGIN_BATCH(6);
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BEGIN_BATCH(10);
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/* Set up the pointer to our vertex buffer */
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OUT_BATCH(BRW_3DSTATE_VERTEX_BUFFERS | 2);
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/* four 32-bit floats per vertex */
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OUT_BATCH((0 << VB0_BUFFER_INDEX_SHIFT) |
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VB0_VERTEXDATA |
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((4 * 4) << VB0_BUFFER_PITCH_SHIFT));
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OUT_RELOC(vb_bo, I915_GEM_DOMAIN_VERTEX, 0, 0);
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OUT_BATCH(3); /* four corners to our rectangle */
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OUT_BATCH(BRW_3DPRIMITIVE |
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BRW_3DPRIMITIVE_VERTEX_SEQUENTIAL |
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(_3DPRIM_RECTLIST << BRW_3DPRIMITIVE_TOPOLOGY_SHIFT) |
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@ -1071,12 +1063,12 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
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OUT_BATCH(0); /* index buffer offset, ignored */
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ADVANCE_BATCH();
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i965_post_draw_debug(pScrn);
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drm_intel_bo_unreference(vb_bo);
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first_output = FALSE;
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i830MarkSync(pScrn);
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i965_post_draw_debug(pScrn);
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}
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i830MarkSync(pScrn);
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#if WATCH_STATS
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i830_dump_error_state(pScrn);
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#endif
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