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Add new have_gem flag 

Prior to this patch, code that wanted to check whether GEM was present
would look at pI830->memory_manager.  This turned out to be occasionally
problematic in the KMS case, since memory_manager didn't always get set
correctly.  So add a new pI830->have_gem flag to make things clear in
the various code paths, and set it after GEM initializes or when KMS is
detected.

Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Magnus Kessler <Magnus.Kessler@gmx.net>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
This commit is contained in:
Jesse Barnes 2009-05-13 13:19:53 -07:00
parent 5236784708
commit 1c68bc376a
6 changed files with 21 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/i830.h
View File

@ -405,6 +405,7 @@ typedef struct _I830Rec {
i830_memory *memory_manager; /**< DRI memory manager aperture */
Bool have_gem;
Bool need_mi_flush;
Bool tiling;

4
src/i830_batchbuffer.c
View File

@ -179,7 +179,7 @@ intel_batch_flush(ScrnInfoPtr pScrn, Bool flushed)
return;
/* If we're not using GEM, then emit a flush after each batch buffer */
if (pI830->memory_manager == NULL && !flushed) {
if (!pI830->have_gem && !flushed) {
int flags = MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE;
if (IS_I965G(pI830))
@ -219,7 +219,7 @@ intel_batch_flush(ScrnInfoPtr pScrn, Bool flushed)
* blockhandler. We could set this less often, but it's probably not worth
* the work.
*/
if (pI830->memory_manager != NULL)
if (pI830->have_gem)
pI830->need_mi_flush = TRUE;
if (pI830->batch_flush_notify)

2
src/i830_debug.c
View File

@ -1882,7 +1882,7 @@ i830_check_error_state(ScrnInfoPtr pScrn)
errors++;
}
temp = INREG(LP_RING + RING_LEN);
if (!pI830->memory_manager && (temp & 1)) {
if (!pI830->have_gem && (temp & 1)) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"PRB0_CTL (0x%08lx) indicates ring buffer enabled\n", temp);
errors++;

26
src/i830_driver.c
View File

@ -611,7 +611,7 @@ i830_update_front_offset(ScrnInfoPtr pScrn)
/* If we are still in ScreenInit, there is no screen pixmap to be updated
* yet. We'll fix it up at CreateScreenResources.
*/
if (!pI830->memory_manager) {
if (!pI830->have_gem) {
data = pI830->FbBase + pScrn->fbOffset; /* default to legacy */
} else {
dri_bo *bo = pI830->front_buffer->bo;
@ -1444,6 +1444,7 @@ I830DrmModeInit(ScrnInfoPtr pScrn)
}
pI830->directRenderingType = DRI_NONE;
pI830->have_gem = TRUE;
i830_init_bufmgr(pScrn);
@ -2227,7 +2228,7 @@ I830BlockHandler(int i,
* fashion.
*/
intel_batch_flush(pScrn, flushed);
if (pI830->memory_manager)
if (pI830->have_gem)
drmCommandNone(pI830->drmSubFD, DRM_I915_GEM_THROTTLE);
pI830->need_mi_flush = FALSE;
@ -2370,7 +2371,7 @@ i830_init_bufmgr(ScrnInfoPtr pScrn)
if (pI830->bufmgr)
return;
if (pI830->memory_manager || pI830->use_drm_mode) {
if (pI830->have_gem) {
int batch_size;
batch_size = 4096 * 4;
@ -2557,8 +2558,10 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
}
if (pI830->use_drm_mode) {
pI830->stolen_size = 0;
pScrn->videoRam = ~0UL / KB(1);
struct pci_device *const device = pI830->PciInfo;
int fb_bar = IS_I9XX(pI830) ? 2 : 0;
pScrn->videoRam = device->regions[fb_bar].size / 1024;
} else {
I830AdjustMemory(pScreen);
}
@ -2651,7 +2654,7 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
}
if (pI830->accel != ACCEL_NONE && !pI830->use_drm_mode) {
if (pI830->memory_manager == NULL && pI830->ring.mem->size == 0) {
if (!pI830->have_gem && pI830->ring.mem->size == 0) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Disabling acceleration because the ring buffer "
"allocation failed.\n");
@ -2875,11 +2878,10 @@ I830LeaveVT(int scrnIndex, int flags)
/* Evict everything from the bufmgr, as we're about to lose ownership of
* the graphics memory.
*/
if (!pI830->memory_manager)
if (!pI830->have_gem) {
intel_bufmgr_fake_evict_all(pI830->bufmgr);
if (!pI830->memory_manager)
i830_stop_ring(pScrn, TRUE);
}
if (pI830->debug_modes) {
i830CompareRegsToSnapshot(pScrn, "After LeaveVT");
@ -2891,7 +2893,7 @@ I830LeaveVT(int scrnIndex, int flags)
i830_unbind_all_memory(pScrn);
if (pI830->memory_manager && !pI830->use_drm_mode) {
if (pI830->have_gem && !pI830->use_drm_mode) {
int ret;
/* Tell the kernel to evict all buffer objects and block GTT usage while
@ -2968,7 +2970,7 @@ I830EnterVT(int scrnIndex, int flags)
if (!pI830->use_drm_mode)
i830_disable_render_standby(pScrn);
if (pI830->memory_manager && !pI830->use_drm_mode) {
if (pI830->have_gem && !pI830->use_drm_mode) {
int ret;
/* Tell the kernel that we're back in control and ready for GTT
@ -2999,7 +3001,7 @@ I830EnterVT(int scrnIndex, int flags)
}
/* Re-set up the ring. */
if (!pI830->memory_manager) {
if (!pI830->have_gem) {
i830_stop_ring(pScrn, FALSE);
i830_start_ring(pScrn);
}

4
src/i830_exa.c
View File

@ -497,7 +497,7 @@ i830_uxa_prepare_access (PixmapPtr pixmap, uxa_access_t access)
intel_batch_flush(scrn, FALSE);
/* No VT sema or GEM? No GTT mapping. */
if (!scrn->vtSema || !i830->memory_manager) {
if (!scrn->vtSema || !i830->have_gem) {
if (dri_bo_map(bo, access == UXA_ACCESS_RW) != 0)
return FALSE;
pixmap->devPrivate.ptr = bo->virtual;
@ -535,7 +535,7 @@ i830_uxa_finish_access (PixmapPtr pixmap)
if (bo == i830->front_buffer->bo)
i830->need_flush = TRUE;
if (!scrn->vtSema || !i830->memory_manager) {
if (!scrn->vtSema || !i830->have_gem) {
dri_bo_unmap(bo);
pixmap->devPrivate.ptr = NULL;
return;

1
src/i830_memory.c
View File

@ -480,6 +480,7 @@ i830_allocator_init(ScrnInfoPtr pScrn, unsigned long size)
i830_free_memory(pScrn, pI830->memory_manager);
pI830->memory_manager = NULL;
}
pI830->have_gem = TRUE;
i830_init_bufmgr(pScrn);
}
} else {