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Make the 965 use Y-major tiling for the depth buffer, as required by the spec. 

An example of the failure can be seen with the reflect demo when set to
depth buffer mode.

Reported by:	Haihao Xiang <haihao.xiang@intel.com>
This commit is contained in:
Eric Anholt 2007-03-12 17:47:32 -07:00
parent 7aa2571546
commit 1ed3843f73
1 changed files with 8 additions and 1 deletions
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9
src/i830_memory.c
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@ -1122,12 +1122,19 @@ i830_allocate_depthbuffer(ScrnInfoPtr pScrn)
/* First try allocating it tiled */
if (!pI830->disableTiling && IsTileable(pScrn, pitch))
{
enum tile_format tile_format;
size = ROUND_TO_PAGE(pitch * ALIGN(height, 16));
/* The 965 requires that the depth buffer be in Y Major format, while
* the rest appear to fail when handed that format.
*/
tile_format = IS_I965G(pI830) ? TILING_YMAJOR: TILING_XMAJOR;
pI830->depth_buffer =
i830_allocate_memory_tiled(pScrn, "depth buffer", size, pitch,
GTT_PAGE_SIZE, ALIGN_BOTH_ENDS,
TILING_XMAJOR);
tile_format);
pI830->depth_tiled = FENCE_XMAJOR;
}