sna: Relax must-be-blittable rules for gen4+
The render pipeline is actually more flexible than the blitter for dealing with large surfaces and so the BLT is no longer the limiting factor on gen4+. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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@ -799,6 +799,9 @@ static uint32_t kgem_surface_size(struct kgem *kgem,
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uint32_t tile_width, tile_height;
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uint32_t size;
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assert(width <= MAXSHORT);
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assert(height <= MAXSHORT);
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if (kgem->gen < 30) {
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if (tiling) {
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tile_width = 512;
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@ -823,32 +826,26 @@ static uint32_t kgem_surface_size(struct kgem *kgem,
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break;
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}
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/* If it is too wide for the blitter, don't even bother. */
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*pitch = ALIGN(width * bpp / 8, tile_width);
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if (kgem->gen < 40) {
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if (tiling != I915_TILING_NONE) {
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if (*pitch > 8192)
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return 0;
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for (size = tile_width; size < *pitch; size <<= 1)
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;
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*pitch = size;
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} else {
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if (*pitch >= 32768)
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return 0;
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}
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height = ALIGN(height, tile_height);
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if (kgem->gen >= 40)
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return PAGE_ALIGN(*pitch * height);
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/* If it is too wide for the blitter, don't even bother. */
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if (tiling != I915_TILING_NONE) {
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if (*pitch > 8192)
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return 0;
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for (size = tile_width; size < *pitch; size <<= 1)
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;
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*pitch = size;
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} else {
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int limit = 32768;
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if (tiling)
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limit *= 4;
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if (*pitch >= limit)
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if (*pitch >= 32768)
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return 0;
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}
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height = ALIGN(height, tile_height);
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if (height >= 65536)
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return 0;
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size = *pitch * height;
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if (relaxed_fencing || tiling == I915_TILING_NONE || kgem->gen >= 40)
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if (relaxed_fencing || tiling == I915_TILING_NONE)
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return PAGE_ALIGN(size);
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/* We need to allocate a pot fence region for a tiled buffer. */
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@ -2233,6 +2230,9 @@ unsigned kgem_can_create_2d(struct kgem *kgem,
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if (depth < 8 || kgem->wedged)
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return 0;
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if (width > MAXSHORT || height > MAXSHORT)
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return 0;
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size = kgem_surface_size(kgem, false, false,
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width, height, bpp,
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I915_TILING_NONE, &pitch);
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