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gen6: Invalidate texture cache 

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Chris Wilson 2011-04-07 15:09:30 +01:00
parent ad22003033
commit 25521900df
2 changed files with 2 additions and 0 deletions
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1
src/i965_reg.h
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@ -169,6 +169,7 @@
#define BRW_PIPE_CONTROL_DEPTH_STALL (1 << 13)
#define BRW_PIPE_CONTROL_WC_FLUSH (1 << 12)
#define BRW_PIPE_CONTROL_IS_FLUSH (1 << 11)
#define BRW_PIPE_CONTROL_TC_FLUSH (1 << 10)
#define BRW_PIPE_CONTROL_NOTIFY_ENABLE (1 << 8)
#define BRW_PIPE_CONTROL_GLOBAL_GTT (1 << 2)
#define BRW_PIPE_CONTROL_LOCAL_PGTT (0 << 2)

1
src/intel_batchbuffer.c
View File

@ -157,6 +157,7 @@ void intel_batch_emit_flush(ScrnInfoPtr scrn)
BEGIN_BATCH(4);
OUT_BATCH(BRW_PIPE_CONTROL | (4 - 2));
OUT_BATCH(BRW_PIPE_CONTROL_WC_FLUSH |
BRW_PIPE_CONTROL_TC_FLUSH |
BRW_PIPE_CONTROL_NOWRITE);
OUT_BATCH(0); /* write address */
OUT_BATCH(0); /* write data */