diff --git a/src/sna/gen3_render.c b/src/sna/gen3_render.c
index 270bca5d..3a06fed5 100644
--- a/src/sna/gen3_render.c
+++ b/src/sna/gen3_render.c
@@ -1569,11 +1569,11 @@ static void gen3_emit_composite_state(struct sna *sna,
 	gen3_composite_emit_shader(sna, op, op->op);
 }
 
-static void gen3_magic_ca_pass(struct sna *sna,
+static bool gen3_magic_ca_pass(struct sna *sna,
 			       const struct sna_composite_op *op)
 {
 	if (!op->need_magic_ca_pass)
-		return;
+		return false;
 
 	DBG(("%s(%d)\n", __FUNCTION__,
 	     sna->render.vertex_index - sna->render.vertex_start));
@@ -1587,6 +1587,7 @@ static void gen3_magic_ca_pass(struct sna *sna,
 	OUT_BATCH(sna->render.vertex_start);
 
 	sna->render_state.gen3.last_blend = 0;
+	return true;
 }
 
 static void gen3_vertex_flush(struct sna *sna)
@@ -1785,7 +1786,13 @@ static int gen3_get_rectangles__flush(struct sna *sna,
 
 	if (sna->render.vertex_offset) {
 		gen3_vertex_flush(sna);
-		gen3_magic_ca_pass(sna, op);
+		if (gen3_magic_ca_pass(sna, op)) {
+			OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(6) | 0);
+			OUT_BATCH(gen3_get_blend_cntl(op->op,
+						      op->has_component_alpha,
+						      op->dst.format));
+			gen3_composite_emit_shader(sna, op, op->op);
+		}
 	}
 
 	return gen3_vertex_finish(sna);
diff --git a/src/sna/gen4_render.c b/src/sna/gen4_render.c
index e1f45281..d2f3fff1 100644
--- a/src/sna/gen4_render.c
+++ b/src/sna/gen4_render.c
@@ -207,13 +207,13 @@ gen4_choose_composite_kernel(int op, bool has_mask, bool is_ca, bool is_affine)
 	return base + !is_affine;
 }
 
-static void gen4_magic_ca_pass(struct sna *sna,
+static bool gen4_magic_ca_pass(struct sna *sna,
 			       const struct sna_composite_op *op)
 {
 	struct gen4_render_state *state = &sna->render_state.gen4;
 
 	if (!op->need_magic_ca_pass)
-		return;
+		return false;
 
 	assert(sna->render.vertex_index > sna->render.vertex_start);
 
@@ -237,6 +237,7 @@ static void gen4_magic_ca_pass(struct sna *sna,
 	OUT_BATCH(0);	/* index buffer offset, ignored */
 
 	state->last_primitive = sna->kgem.nbatch;
+	return true;
 }
 
 static uint32_t gen4_get_blend(int op,
@@ -615,7 +616,9 @@ static int gen4_get_rectangles__flush(struct sna *sna,
 
 	if (sna->render.vertex_offset) {
 		gen4_vertex_flush(sna);
-		gen4_magic_ca_pass(sna, op);
+		if (gen4_magic_ca_pass(sna, op))
+			gen4_emit_pipelined_pointers(sna, op, op->op,
+						     op->u.gen4.wm_kernel);
 	}
 
 	return gen4_vertex_finish(sna);
diff --git a/src/sna/gen5_render.c b/src/sna/gen5_render.c
index 695ec331..5995d1d9 100644
--- a/src/sna/gen5_render.c
+++ b/src/sna/gen5_render.c
@@ -199,13 +199,13 @@ gen5_choose_composite_kernel(int op, bool has_mask, bool is_ca, bool is_affine)
 	return base + !is_affine;
 }
 
-static void gen5_magic_ca_pass(struct sna *sna,
+static bool gen5_magic_ca_pass(struct sna *sna,
 			       const struct sna_composite_op *op)
 {
 	struct gen5_render_state *state = &sna->render_state.gen5;
 
 	if (!op->need_magic_ca_pass)
-		return;
+		return false;
 
 	assert(sna->render.vertex_index > sna->render.vertex_start);
 
@@ -230,6 +230,7 @@ static void gen5_magic_ca_pass(struct sna *sna,
 	OUT_BATCH(0);	/* index buffer offset, ignored */
 
 	state->last_primitive = sna->kgem.nbatch;
+	return true;
 }
 
 static uint32_t gen5_get_blend(int op,
@@ -601,7 +602,9 @@ static int gen5_get_rectangles__flush(struct sna *sna,
 
 	if (sna->render.vertex_offset) {
 		gen4_vertex_flush(sna);
-		gen5_magic_ca_pass(sna, op);
+		if (gen5_magic_ca_pass(sna, op))
+			gen5_emit_pipelined_pointers(sna, op, op->op,
+						     op->u.gen5.wm_kernel);
 	}
 
 	return gen4_vertex_finish(sna);
diff --git a/src/sna/gen6_render.c b/src/sna/gen6_render.c
index 82e9d42f..35ff862b 100644
--- a/src/sna/gen6_render.c
+++ b/src/sna/gen6_render.c
@@ -886,13 +886,13 @@ gen6_emit_state(struct sna *sna,
 	sna->render_state.gen6.first_state_packet = false;
 }
 
-static void gen6_magic_ca_pass(struct sna *sna,
+static bool gen6_magic_ca_pass(struct sna *sna,
 			       const struct sna_composite_op *op)
 {
 	struct gen6_render_state *state = &sna->render_state.gen6;
 
 	if (!op->need_magic_ca_pass)
-		return;
+		return false;
 
 	DBG(("%s: CA fixup (%d -> %d)\n", __FUNCTION__,
 	     sna->render.vertex_start, sna->render.vertex_index));
@@ -918,6 +918,7 @@ static void gen6_magic_ca_pass(struct sna *sna,
 	OUT_BATCH(0);	/* index buffer offset, ignored */
 
 	state->last_primitive = sna->kgem.nbatch;
+	return true;
 }
 
 typedef struct gen6_surface_state_padded {
@@ -1147,7 +1148,13 @@ static int gen6_get_rectangles__flush(struct sna *sna,
 
 	if (sna->render.vertex_offset) {
 		gen4_vertex_flush(sna);
-		gen6_magic_ca_pass(sna, op);
+		if (gen6_magic_ca_pass(sna, op)) {
+			gen6_emit_flush(sna);
+			gen6_emit_cc(sna, GEN6_BLEND(op->u.gen6.flags));
+			gen6_emit_wm(sna,
+				     GEN6_KERNEL(op->u.gen6.flags),
+				     GEN6_VERTEX(op->u.gen6.flags) >> 2);
+		}
 	}
 
 	return gen4_vertex_finish(sna);
diff --git a/src/sna/gen7_render.c b/src/sna/gen7_render.c
index d8ad648b..158c92ed 100644
--- a/src/sna/gen7_render.c
+++ b/src/sna/gen7_render.c
@@ -1034,13 +1034,13 @@ gen7_emit_state(struct sna *sna,
 	sna->render_state.gen7.emit_flush = GEN7_READS_DST(op->u.gen7.flags);
 }
 
-static void gen7_magic_ca_pass(struct sna *sna,
+static bool gen7_magic_ca_pass(struct sna *sna,
 			       const struct sna_composite_op *op)
 {
 	struct gen7_render_state *state = &sna->render_state.gen7;
 
 	if (!op->need_magic_ca_pass)
-		return;
+		return true;
 
 	DBG(("%s: CA fixup (%d -> %d)\n", __FUNCTION__,
 	     sna->render.vertex_start, sna->render.vertex_index));
@@ -1064,6 +1064,7 @@ static void gen7_magic_ca_pass(struct sna *sna,
 	OUT_BATCH(0);	/* index buffer offset, ignored */
 
 	state->last_primitive = sna->kgem.nbatch;
+	return false;
 }
 
 static void null_create(struct sna_static_stream *stream)
@@ -1274,7 +1275,11 @@ static int gen7_get_rectangles__flush(struct sna *sna,
 
 	if (sna->render.vertex_offset) {
 		gen4_vertex_flush(sna);
-		gen7_magic_ca_pass(sna, op);
+		if (gen7_magic_ca_pass(sna, op)) {
+			gen7_emit_pipe_invalidate(sna);
+			gen7_emit_cc(sna, GEN7_BLEND(op->u.gen7.flags));
+			gen7_emit_wm(sna, GEN7_KERNEL(op->u.gen7.flags));
+		}
 	}
 
 	return gen4_vertex_finish(sna);