Add in sf/wm program for mask picture without CA
This commit is contained in:
Wang Zhenyu
parent
a704120b15
commit
3d4edd325f
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@ -0,0 +1,53 @@
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/* FIXME how to setup second coeffient for mask tex coord */
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/*
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g3 (v0) { u0, v0, 1.0, 1.0 } ==> {u0, v0, 1.0, 1.0, mu0, mv0, 1.0, 1.0} Co[0](u0) Co[1](v0) Co[2](mu0) Co[3](mv0)
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g4 (v1) { u1, v1, 1.0, 1.0 } ==> {u1, v1, 1.0, 1.0, mu1, mv1, 1.0, 1.0}
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g5 (v2) { u2, v2 } ==> (u2, v2, mu2, mv2}
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g6 { 1/(x1-x0), 1/(y1-y0) }
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g7 { u1-u0, v1-v0, 0, 0} ==>{u1-u0, v1-v0,0, 0, mu1-mu0, mv1-mv0, 0, 0}
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-> { (u1-u0)/(x1-x0), (v1-v0)/(y1-y0) } ==>{(u1-u0)/(x1-x0), (v1-v0)/(y1-y0),(mu1-mu0)/(x1-x0), (mv1-mv0)/(y1-y0)
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Cx, Cy Cx[0], Cy[0], Cx[1], Cy[1]
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*/
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/* assign Cx[0], Cx[1] to src, same to Cy, Co
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Cx[2], Cx[3] to mask, same to Cy, Co */
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send (1) 0 g6<1>F g1.12<0,1,0>F math inv scalar mlen 1 rlen 1 { align1 };
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send (1) 0 g6.4<1>F g1.20<0,1,0>F math inv scalar mlen 1 rlen 1 { align1 };
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add (8) g7<1>F g4<8,8,1>F -g3<8,8,1>F { align1 };
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/* Cx[0] */
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mul (1) g7<1>F g7<0,1,0>F g6<0,1,0>F { align1 };
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/* Cy[0] */
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mul (1) g7.4<1>F g7.4<0,1,0>F g6.4<0,1,0>F { align1 };
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/* Cx[2] */
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mul (1) g7.16<1>F g7.16<0,1,0>F g6<0,1,0>F { align1 };
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/* Cy[2] */
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mul (1) g7.20<1>F g7.20<0,1,0>F g6.4<0,1,0>F { align1 };
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/* src Cx[0], Cx[1] */
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mov (8) m1<1>F g7<0,1,0>F { align1 };
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/* mask Cx[2], Cx[3] */
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mov (1) m1.8<1>F g7.16<0,1,0>F { align1 };
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mov (1) m1.12<1>F g7.16<0,1,0>F { align1 };
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/* src Cy[0], Cy[1] */
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mov (8) m2<1>F g7.4<0,1,0>F { align1 };
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/* mask Cy[2], Cy[3] */
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mov (1) m2.8<1>F g7.20<0,1,0>F { align1 };
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mov (1) m2.12<1>F g7.20<0,1,0>F { align1 };
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/* src Co[0], Co[1] */
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mov (8) m3<1>F g3<8,8,1>F { align1 };
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/* mask Co[2], Co[3] */
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mov (1) m3.8<1>F g3.16<0,1,0>F { align1 };
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mov (1) m3.12<1>F g3.20<0,1,0>F { align1 };
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send (8) 0 null g0<8,8,1>F urb 0 transpose used complete mlen 4 rlen 0 { align1 EOT };
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nop;
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nop;
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nop;
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nop;
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nop;
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nop;
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nop;
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nop;
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@ -0,0 +1,25 @@
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{ 0x00000031, 0x20c01fbd, 0x0000002c, 0x01110081 },
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{ 0x00000031, 0x20c41fbd, 0x00000034, 0x01110081 },
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{ 0x00600040, 0x20e077bd, 0x008d0080, 0x008d4060 },
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{ 0x00000041, 0x20e077bd, 0x000000e0, 0x000000c0 },
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{ 0x00000041, 0x20e477bd, 0x000000e4, 0x000000c4 },
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{ 0x00000041, 0x20f077bd, 0x000000f0, 0x000000c0 },
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{ 0x00000041, 0x20f477bd, 0x000000f4, 0x000000c4 },
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{ 0x00600001, 0x202003be, 0x000000e0, 0x00000000 },
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{ 0x00000001, 0x202803be, 0x000000f0, 0x00000000 },
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{ 0x00000001, 0x202c03be, 0x000000f0, 0x00000000 },
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{ 0x00600001, 0x204003be, 0x000000e4, 0x00000000 },
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{ 0x00000001, 0x204803be, 0x000000f4, 0x00000000 },
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{ 0x00000001, 0x204c03be, 0x000000f4, 0x00000000 },
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{ 0x00600001, 0x206003be, 0x008d0060, 0x00000000 },
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{ 0x00000001, 0x206803be, 0x00000070, 0x00000000 },
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{ 0x00000001, 0x206c03be, 0x00000074, 0x00000000 },
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{ 0x00600031, 0x20001fbc, 0x008d0000, 0x8640c800 },
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{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
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{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
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{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
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{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
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{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
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{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
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{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
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{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
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@ -0,0 +1,202 @@
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/*
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* This's for exa composite operation in no mask picture case.
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* The simplest case is just sending what src picture has to dst picture.
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* XXX: This is still experimental, and should be fixed to support multiple texture
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* map, and conditional mul actions.
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*/
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/* I think this should be same as in g4a program for texture video,
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as we also use 16-pixel dispatch. and SF scale in g3 is useful for us. */
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/* The initial payload of the thread is always g0.
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* WM_URB (incoming URB entries) is g3
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As mask texture coeffient needs extra setup urb starting from g4, we should
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shift this location.
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* X0_R is g4->g6
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* X1_R is g5->g7
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* Y0_R is g6->g8
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* Y1_R is g7->g9
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* X0: {ss0.x, ss0.x+1, ss0.x, ss0.x+1, ss1.x, ss1.x+1, ss1.x, ss1.x+y}
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* Y0: {ss0.y, ss0.y, ss0.y+1, ss0.y+1, ss1.y, ss1.y, ss1.y+1, ss1.y+1}
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* X1: {ss2.x, ss2.x+1, ss2.x, ss2.x+1, ss3.x, ss3.x+1, ss3.x, ss3.x+y}
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* Y1: {ss2.y, ss2.y, ss2.y+1, ss2.y+1, ss3.y, ss3.y, ss3.y+1, ss3.y+1}
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*/
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/* multitexture program with src and mask texture */
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/* - load src texture */
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/* - load mask texture */
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/* - mul src.X with mask's alpha */
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/* - write out src.X */
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/* Set up ss0.x coordinates*/
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mov (1) g6<1>F g1.8<0,1,0>UW { align1 };
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add (1) g6.4<1>F g1.8<0,1,0>UW 1UB { align1 };
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mov (1) g6.8<1>F g1.8<0,1,0>UW { align1 };
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add (1) g6.12<1>F g1.8<0,1,0>UW 1UB { align1 };
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/* Set up ss0.y coordinates */
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mov (1) g8<1>F g1.10<0,1,0>UW { align1 };
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mov (1) g8.4<1>F g1.10<0,1,0>UW { align1 };
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add (1) g8.8<1>F g1.10<0,1,0>UW 1UB { align1 };
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add (1) g8.12<1>F g1.10<0,1,0>UW 1UB { align1 };
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/* set up ss1.x coordinates */
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mov (1) g6.16<1>F g1.12<0,1,0>UW { align1 };
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add (1) g6.20<1>F g1.12<0,1,0>UW 1UB { align1 };
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mov (1) g6.24<1>F g1.12<0,1,0>UW { align1 };
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add (1) g6.28<1>F g1.12<0,1,0>UW 1UB { align1 };
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/* set up ss1.y coordinates */
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mov (1) g8.16<1>F g1.14<0,1,0>UW { align1 };
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mov (1) g8.20<1>F g1.14<0,1,0>UW { align1 };
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add (1) g8.24<1>F g1.14<0,1,0>UW 1UB { align1 };
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add (1) g8.28<1>F g1.14<0,1,0>UW 1UB { align1 };
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/* Set up ss2.x coordinates */
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mov (1) g9<1>F g1.16<0,1,0>UW { align1 };
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add (1) g9.4<1>F g1.16<0,1,0>UW 1UB { align1 };
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mov (1) g9.8<1>F g1.16<0,1,0>UW { align1 };
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add (1) g9.12<1>F g1.16<0,1,0>UW 1UB { align1 };
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/* Set up ss2.y coordinates */
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mov (1) g9<1>F g1.18<0,1,0>UW { align1 };
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mov (1) g9.4<1>F g1.18<0,1,0>UW { align1 };
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add (1) g9.8<1>F g1.18<0,1,0>UW 1UB { align1 };
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add (1) g9.12<1>F g1.18<0,1,0>UW 1UB { align1 };
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/* Set up ss3.x coordinates */
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mov (1) g7.16<1>F g1.20<0,1,0>UW { align1 };
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add (1) g7.20<1>F g1.20<0,1,0>UW 1UB { align1 };
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mov (1) g7.24<1>F g1.20<0,1,0>UW { align1 };
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add (1) g7.28<1>F g1.20<0,1,0>UW 1UB { align1 };
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/* Set up ss3.y coordinates */
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mov (1) g9.16<1>F g1.22<0,1,0>UW { align1 };
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mov (1) g9.20<1>F g1.22<0,1,0>UW { align1 };
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add (1) g9.24<1>F g1.22<0,1,0>UW 1UB { align1 };
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add (1) g9.28<1>F g1.22<0,1,0>UW 1UB { align1 };
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/* Now, map these screen space coordinates into texture coordinates. */
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/* This is for src texture */
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/* I don't want to change origin ssX coords, as it will be used later in mask */
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/* so store tex coords in g10, g11, g12, g13 */
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/* subtract screen-space X origin of vertex 0. */
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add (8) g10<1>F g6<8,8,1>F -g1<0,1,0>F { align1 };
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add (8) g11<1>F g7<8,8,1>F -g1<0,1,0>F { align1 };
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/* scale by texture X increment */
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/* Cx[0] */
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mul (8) g10<1>F g10<8,8,1>F g3<0,1,0>F { align1 };
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mul (8) g11<1>F g11<8,8,1>F g3<0,1,0>F { align1 };
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/* add in texture X offset */
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/* Co[0] */
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add (8) g10<1>F g10<8,8,1>F g3.12<0,1,0>F { align1 };
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add (8) g11<1>F g11<8,8,1>F g3.12<0,1,0>F { align1 };
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/* subtract screen-space Y origin of vertex 0. */
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add (8) g12<1>F g8<8,8,1>F -g1.4<0,1,0>F { align1 };
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add (8) g13<1>F g9<8,8,1>F -g1.4<0,1,0>F { align1 };
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/* scale by texture Y increment */
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/* Cy[0] */
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mul (8) g12<1>F g12<8,8,1>F g3.4<0,1,0>F { align1 };
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mul (8) g13<1>F g13<8,8,1>F g3.4<0,1,0>F { align1 };
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/* add in texture Y offset */
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/* Co[1] */
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add (8) g12<1>F g12<8,8,1>F g3.28<0,1,0>F { align1 };
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add (8) g13<1>F g13<8,8,1>F g3.28<0,1,0>F { align1 };
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/* prepare sampler read back gX register, which would be written back to output */
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/* use simd16 sampler, param 0 is u, param 1 is v. */
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/* 'payload' loading, assuming tex coord start from g4 */
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mov (8) m1<1>F g10<8,8,1>F { align1 };
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mov (8) m2<1>F g11<8,8,1>F { align1 }; /* param 0 u in m1, m2 */
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mov (8) m3<1>F g12<8,8,1>F { align1 };
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mov (8) m4<1>F g13<8,8,1>F { align1 }; /* param 1 v in m3, m4 */
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/* m0 will be copied with g0, as it contains send desc */
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/* emit sampler 'send' cmd */
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/* src texture readback: g14-g21 */
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send (16) 0 /* msg reg index */
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g14<1>UW /* readback */
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g0<8,8,1>UW /* copy to msg start reg*/
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sampler (1,0,F) /* sampler message description,
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(binding_table,sampler_index,datatype).
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here(src->dst) we should use src_sampler and
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src_surface */
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mlen 5 rlen 8 { align1 }; /* required message len 5, readback len 8 */
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mov (8) g21<1>UD g21<8,8,1>UD { align1 }; /* wait sampler return */
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/* sampler mask texture, use g10, g11, g12, g13 */
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/* subtract screen-space X origin of vertex 0. */
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add (8) g10<1>F g6<8,8,1>F -g1<0,1,0>F { align1 };
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add (8) g11<1>F g7<8,8,1>F -g1<0,1,0>F { align1 };
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/* scale by texture X increment */
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/* Cx[2] */
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mul (8) g10<1>F g10<8,8,1>F g4<0,1,0>F { align1 };
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mul (8) g11<1>F g11<8,8,1>F g4<0,1,0>F { align1 };
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/* add in texture X offset */
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/* Co[2] */
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add (8) g10<1>F g10<8,8,1>F g4.12<0,1,0>F { align1 };
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add (8) g11<1>F g11<8,8,1>F g4.12<0,1,0>F { align1 };
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/* subtract screen-space Y origin of vertex 0. */
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add (8) g12<1>F g8<8,8,1>F -g1.4<0,1,0>F { align1 };
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add (8) g13<1>F g9<8,8,1>F -g1.4<0,1,0>F { align1 };
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/* scale by texture Y increment */
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/* Cy[2] */
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mul (8) g12<1>F g12<8,8,1>F g4.4<0,1,0>F { align1 };
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mul (8) g13<1>F g13<8,8,1>F g4.4<0,1,0>F { align1 };
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/* add in texture Y offset */
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/* Co[3] */
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add (8) g12<1>F g12<8,8,1>F g4.28<0,1,0>F { align1 };
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add (8) g13<1>F g13<8,8,1>F g4.28<0,1,0>F { align1 };
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mov (8) m1<1>F g10<8,8,1>F { align1 };
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mov (8) m2<1>F g11<8,8,1>F { align1 };
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mov (8) m3<1>F g12<8,8,1>F { align1 };
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mov (8) m4<1>F g13<8,8,1>F { align1 };
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/* mask sampler g22-g29 */
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/* binding_table (2), sampler (1) */
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send (16) 0 g22<1>UW g0<8,8,1>UW sampler (2,1,F) mlen 5 rlen 8 { align1 };
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mov (8) g29<1>UD g29<8,8,1>UD { align1 }; /* wait sampler return */
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/* mul mask's alpha channel g28,g29 to src (g14-g21), then write out src */
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mul (8) g14<1>F g14<8,8,1>F g28<8,8,1>F { align1 };
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mul (8) g15<1>F g15<8,8,1>F g29<8,8,1>F { align1 };
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mul (8) g16<1>F g16<8,8,1>F g28<8,8,1>F { align1 };
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mul (8) g17<1>F g17<8,8,1>F g29<8,8,1>F { align1 };
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mul (8) g18<1>F g18<8,8,1>F g28<8,8,1>F { align1 };
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mul (8) g19<1>F g19<8,8,1>F g29<8,8,1>F { align1 };
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mul (8) g20<1>F g20<8,8,1>F g28<8,8,1>F { align1 };
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mul (8) g21<1>F g21<8,8,1>F g29<8,8,1>F { align1 };
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/* prepare data in m2-m5 for subspan(1,0), m6-m9 for subspan(3,2), then it's ready to write */
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mov (8) m2<1>F g14<8,8,1>F { align1 };
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mov (8) m3<1>F g16<8,8,1>F { align1 };
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mov (8) m4<1>F g18<8,8,1>F { align1 };
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mov (8) m5<1>F g20<8,8,1>F { align1 };
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mov (8) m6<1>F g15<8,8,1>F { align1 };
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mov (8) m7<1>F g17<8,8,1>F { align1 };
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mov (8) m8<1>F g19<8,8,1>F { align1 };
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mov (8) m9<1>F g21<8,8,1>F { align1 };
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/* m0, m1 are all direct passed by PS thread payload */
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mov (8) m1<1>UD g1<8,8,1>UD { align1 mask_disable };
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/* write */
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send (16) 0 acc0<1>UW g0<8,8,1>UW write (
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0, /* binding_table */
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8, /* pixel scordboard clear, msg type simd16 single source */
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4, /* render target write */
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0 /* no write commit message */
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)
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mlen 10
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rlen 0
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{ align1 EOT };
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nop;
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nop;
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nop;
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nop;
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nop;
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nop;
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nop;
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nop;
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nop;
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@ -0,0 +1,95 @@
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{ 0x00000001, 0x20c0013d, 0x00000028, 0x00000000 },
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{ 0x00000040, 0x20c40d3d, 0x00000028, 0x00000001 },
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{ 0x00000001, 0x20c8013d, 0x00000028, 0x00000000 },
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{ 0x00000040, 0x20cc0d3d, 0x00000028, 0x00000001 },
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{ 0x00000001, 0x2100013d, 0x0000002a, 0x00000000 },
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{ 0x00000001, 0x2104013d, 0x0000002a, 0x00000000 },
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{ 0x00000040, 0x21080d3d, 0x0000002a, 0x00000001 },
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{ 0x00000040, 0x210c0d3d, 0x0000002a, 0x00000001 },
|
||||
{ 0x00000001, 0x20d0013d, 0x0000002c, 0x00000000 },
|
||||
{ 0x00000040, 0x20d40d3d, 0x0000002c, 0x00000001 },
|
||||
{ 0x00000001, 0x20d8013d, 0x0000002c, 0x00000000 },
|
||||
{ 0x00000040, 0x20dc0d3d, 0x0000002c, 0x00000001 },
|
||||
{ 0x00000001, 0x2110013d, 0x0000002e, 0x00000000 },
|
||||
{ 0x00000001, 0x2114013d, 0x0000002e, 0x00000000 },
|
||||
{ 0x00000040, 0x21180d3d, 0x0000002e, 0x00000001 },
|
||||
{ 0x00000040, 0x211c0d3d, 0x0000002e, 0x00000001 },
|
||||
{ 0x00000001, 0x2120013d, 0x00000030, 0x00000000 },
|
||||
{ 0x00000040, 0x21240d3d, 0x00000030, 0x00000001 },
|
||||
{ 0x00000001, 0x2128013d, 0x00000030, 0x00000000 },
|
||||
{ 0x00000040, 0x212c0d3d, 0x00000030, 0x00000001 },
|
||||
{ 0x00000001, 0x2120013d, 0x00000032, 0x00000000 },
|
||||
{ 0x00000001, 0x2124013d, 0x00000032, 0x00000000 },
|
||||
{ 0x00000040, 0x21280d3d, 0x00000032, 0x00000001 },
|
||||
{ 0x00000040, 0x212c0d3d, 0x00000032, 0x00000001 },
|
||||
{ 0x00000001, 0x20f0013d, 0x00000034, 0x00000000 },
|
||||
{ 0x00000040, 0x20f40d3d, 0x00000034, 0x00000001 },
|
||||
{ 0x00000001, 0x20f8013d, 0x00000034, 0x00000000 },
|
||||
{ 0x00000040, 0x20fc0d3d, 0x00000034, 0x00000001 },
|
||||
{ 0x00000001, 0x2130013d, 0x00000036, 0x00000000 },
|
||||
{ 0x00000001, 0x2134013d, 0x00000036, 0x00000000 },
|
||||
{ 0x00000040, 0x21380d3d, 0x00000036, 0x00000001 },
|
||||
{ 0x00000040, 0x213c0d3d, 0x00000036, 0x00000001 },
|
||||
{ 0x00600040, 0x214077bd, 0x008d00c0, 0x00004020 },
|
||||
{ 0x00600040, 0x216077bd, 0x008d00e0, 0x00004020 },
|
||||
{ 0x00600041, 0x214077bd, 0x008d0140, 0x00000060 },
|
||||
{ 0x00600041, 0x216077bd, 0x008d0160, 0x00000060 },
|
||||
{ 0x00600040, 0x214077bd, 0x008d0140, 0x0000006c },
|
||||
{ 0x00600040, 0x216077bd, 0x008d0160, 0x0000006c },
|
||||
{ 0x00600040, 0x218077bd, 0x008d0100, 0x00004024 },
|
||||
{ 0x00600040, 0x21a077bd, 0x008d0120, 0x00004024 },
|
||||
{ 0x00600041, 0x218077bd, 0x008d0180, 0x00000064 },
|
||||
{ 0x00600041, 0x21a077bd, 0x008d01a0, 0x00000064 },
|
||||
{ 0x00600040, 0x218077bd, 0x008d0180, 0x0000007c },
|
||||
{ 0x00600040, 0x21a077bd, 0x008d01a0, 0x0000007c },
|
||||
{ 0x00600001, 0x202003be, 0x008d0140, 0x00000000 },
|
||||
{ 0x00600001, 0x204003be, 0x008d0160, 0x00000000 },
|
||||
{ 0x00600001, 0x206003be, 0x008d0180, 0x00000000 },
|
||||
{ 0x00600001, 0x208003be, 0x008d01a0, 0x00000000 },
|
||||
{ 0x00800031, 0x21c01d29, 0x008d0000, 0x02580001 },
|
||||
{ 0x00600001, 0x22a00021, 0x008d02a0, 0x00000000 },
|
||||
{ 0x00600040, 0x214077bd, 0x008d00c0, 0x00004020 },
|
||||
{ 0x00600040, 0x216077bd, 0x008d00e0, 0x00004020 },
|
||||
{ 0x00600041, 0x214077bd, 0x008d0140, 0x00000080 },
|
||||
{ 0x00600041, 0x216077bd, 0x008d0160, 0x00000080 },
|
||||
{ 0x00600040, 0x214077bd, 0x008d0140, 0x0000008c },
|
||||
{ 0x00600040, 0x216077bd, 0x008d0160, 0x0000008c },
|
||||
{ 0x00600040, 0x218077bd, 0x008d0100, 0x00004024 },
|
||||
{ 0x00600040, 0x21a077bd, 0x008d0120, 0x00004024 },
|
||||
{ 0x00600041, 0x218077bd, 0x008d0180, 0x00000084 },
|
||||
{ 0x00600041, 0x21a077bd, 0x008d01a0, 0x00000084 },
|
||||
{ 0x00600040, 0x218077bd, 0x008d0180, 0x0000009c },
|
||||
{ 0x00600040, 0x21a077bd, 0x008d01a0, 0x0000009c },
|
||||
{ 0x00600001, 0x202003be, 0x008d0140, 0x00000000 },
|
||||
{ 0x00600001, 0x204003be, 0x008d0160, 0x00000000 },
|
||||
{ 0x00600001, 0x206003be, 0x008d0180, 0x00000000 },
|
||||
{ 0x00600001, 0x208003be, 0x008d01a0, 0x00000000 },
|
||||
{ 0x00800031, 0x22c01d29, 0x008d0000, 0x02580102 },
|
||||
{ 0x00600001, 0x23a00021, 0x008d03a0, 0x00000000 },
|
||||
{ 0x00600041, 0x21c077bd, 0x008d01c0, 0x008d0380 },
|
||||
{ 0x00600041, 0x21e077bd, 0x008d01e0, 0x008d03a0 },
|
||||
{ 0x00600041, 0x220077bd, 0x008d0200, 0x008d0380 },
|
||||
{ 0x00600041, 0x222077bd, 0x008d0220, 0x008d03a0 },
|
||||
{ 0x00600041, 0x224077bd, 0x008d0240, 0x008d0380 },
|
||||
{ 0x00600041, 0x226077bd, 0x008d0260, 0x008d03a0 },
|
||||
{ 0x00600041, 0x228077bd, 0x008d0280, 0x008d0380 },
|
||||
{ 0x00600041, 0x22a077bd, 0x008d02a0, 0x008d03a0 },
|
||||
{ 0x00600001, 0x204003be, 0x008d01c0, 0x00000000 },
|
||||
{ 0x00600001, 0x206003be, 0x008d0200, 0x00000000 },
|
||||
{ 0x00600001, 0x208003be, 0x008d0240, 0x00000000 },
|
||||
{ 0x00600001, 0x20a003be, 0x008d0280, 0x00000000 },
|
||||
{ 0x00600001, 0x20c003be, 0x008d01e0, 0x00000000 },
|
||||
{ 0x00600001, 0x20e003be, 0x008d0220, 0x00000000 },
|
||||
{ 0x00600001, 0x210003be, 0x008d0260, 0x00000000 },
|
||||
{ 0x00600001, 0x212003be, 0x008d02a0, 0x00000000 },
|
||||
{ 0x00600201, 0x20200022, 0x008d0020, 0x00000000 },
|
||||
{ 0x00800031, 0x24001d28, 0x008d0000, 0x85a04800 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
|
|
@ -344,12 +344,16 @@ static const CARD32 sf_kernel_static[][4] = {
|
|||
#include "exa_sf_prog.h"
|
||||
};
|
||||
|
||||
static const CARD32 sf_kernel_static_mask[][4] = {
|
||||
#include "exa_sf_mask_prog.h"
|
||||
};
|
||||
|
||||
/* ps kernels */
|
||||
#define PS_KERNEL_NUM_GRF 32
|
||||
#define PS_MAX_THREADS 32
|
||||
/* 1: no mask */
|
||||
static const CARD32 ps_kernel_static_nomask [][4] = {
|
||||
#include "exa_wm_nomask_prog.h"
|
||||
#include "exa_wm_nomask_prog.h"
|
||||
};
|
||||
|
||||
/* 2: mask with componentAlpha, src * mask color, XXX: later */
|
||||
|
|
@ -359,7 +363,7 @@ static const CARD32 ps_kernel_static_maskca [][4] = {
|
|||
|
||||
/* 3: mask without componentAlpha, src * mask alpha */
|
||||
static const CARD32 ps_kernel_static_masknoca [][4] = {
|
||||
/*#include "i965_composite_wm_masknoca.h" */
|
||||
#include "exa_wm_masknoca_prog.h"
|
||||
};
|
||||
|
||||
Bool
|
||||
|
|
@ -375,11 +379,6 @@ I965EXAPrepareComposite(int op, PicturePtr pSrcPicture,
|
|||
|
||||
ErrorF("i965 prepareComposite\n");
|
||||
|
||||
/* FIXME: fallback in pMask for now, would be enable after finish
|
||||
wm kernel program */
|
||||
if (pMask)
|
||||
I830FALLBACK("No mask support yet.\n");
|
||||
|
||||
I965GetDestFormat(pDstPicture, &dst_format);
|
||||
src_offset = exaGetPixmapOffset(pSrc);
|
||||
src_pitch = exaGetPixmapPitch(pSrc);
|
||||
|
|
@ -436,7 +435,10 @@ ErrorF("i965 prepareComposite\n");
|
|||
/* keep current sf_kernel, which will send one setup urb entry to
|
||||
PS kernel */
|
||||
sf_kernel_offset = ALIGN(next_offset, 64);
|
||||
next_offset = sf_kernel_offset + sizeof (sf_kernel_static);
|
||||
if (pMask)
|
||||
next_offset = sf_kernel_offset + sizeof (sf_kernel_static_mask);
|
||||
else
|
||||
next_offset = sf_kernel_offset + sizeof (sf_kernel_static);
|
||||
|
||||
//XXX: ps_kernel may be seperated, fix with offset
|
||||
ps_kernel_offset = ALIGN(next_offset, 64);
|
||||
|
|
@ -746,7 +748,10 @@ ErrorF("i965 prepareComposite\n");
|
|||
* calculate dA/dx and dA/dy. Hand these interpolation coefficients
|
||||
* back to SF which then hands pixels off to WM.
|
||||
*/
|
||||
memcpy (sf_kernel, sf_kernel_static, sizeof (sf_kernel_static));
|
||||
if (pMask)
|
||||
memcpy (sf_kernel, sf_kernel_static_mask, sizeof (sf_kernel_static));
|
||||
else
|
||||
memcpy (sf_kernel, sf_kernel_static, sizeof (sf_kernel_static));
|
||||
|
||||
memset(sf_state, 0, sizeof(*sf_state));
|
||||
sf_state->thread0.kernel_start_pointer =
|
||||
|
|
@ -780,7 +785,6 @@ ErrorF("i965 prepareComposite\n");
|
|||
/* Set up the PS kernel (dispatched by WM)
|
||||
*/
|
||||
|
||||
// XXX: replace to texture blend shader, and different cases
|
||||
if (pMask) {
|
||||
if (pMaskPicture->componentAlpha)
|
||||
memcpy (ps_kernel, ps_kernel_static_maskca, sizeof (ps_kernel_static_maskca));
|
||||
|
|
|
|||
Loading…
Reference in New Issue