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intel: Refactor the common chipset detection/override 

Reduce the duplicate messages for which type of chip we by
amalgamating the common code.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Chris Wilson 2012-07-23 21:55:46 +01:00
parent e3f6c48d18
commit 40d90dfd86
9 changed files with 44 additions and 123 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/intel.h
View File

@ -212,7 +212,7 @@ typedef struct intel_screen_private {
int Chipset;
EntityInfoPtr pEnt;
struct pci_device *PciInfo;
struct intel_chipset chipset;
const struct intel_device_info *info;
unsigned int BR[20];

33
src/intel_driver.c
View File

@ -186,37 +186,8 @@ static void PreInitCleanup(ScrnInfoPtr scrn)
static void intel_check_chipset_option(ScrnInfoPtr scrn)
{
intel_screen_private *intel = intel_get_screen_private(scrn);
MessageType from = X_PROBED;
intel_detect_chipset(scrn,
intel->PciInfo,
&intel->chipset);
/* Set the Chipset and ChipRev, allowing config file entries to override. */
if (intel->pEnt->device->chipset && *intel->pEnt->device->chipset) {
scrn->chipset = intel->pEnt->device->chipset;
from = X_CONFIG;
} else if (intel->pEnt->device->chipID >= 0) {
scrn->chipset = (char *)xf86TokenToString(intel_chipsets,
intel->pEnt->device->chipID);
from = X_CONFIG;
xf86DrvMsg(scrn->scrnIndex, X_CONFIG,
"ChipID override: 0x%04X\n",
intel->pEnt->device->chipID);
DEVICE_ID(intel->PciInfo) = intel->pEnt->device->chipID;
} else {
from = X_PROBED;
scrn->chipset = (char *)xf86TokenToString(intel_chipsets,
DEVICE_ID(intel->PciInfo));
}
if (intel->pEnt->device->chipRev >= 0) {
xf86DrvMsg(scrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n",
intel->pEnt->device->chipRev);
}
xf86DrvMsg(scrn->scrnIndex, from, "Chipset: \"%s\"\n",
(scrn->chipset != NULL) ? scrn->chipset : "Unknown i8xx");
intel->info =
intel_detect_chipset(scrn, intel->pEnt->device, intel->PciInfo);
}
static Bool I830GetEarlyOptions(ScrnInfoPtr scrn)

17
src/intel_driver.h
View File

@ -209,7 +209,7 @@
#define SUBSYS_ID(p) (p)->subdevice_id
#define CHIP_REVISION(p) (p)->revision
#define INTEL_INFO(intel) ((intel)->chipset.info)
#define INTEL_INFO(intel) ((intel)->info)
#define IS_GENx(intel, X) (INTEL_INFO(intel)->gen >= 10*(X) && INTEL_INFO(intel)->gen < 10*((X)+1))
#define IS_GEN1(intel) IS_GENx(intel, 1)
#define IS_GEN2(intel) IS_GENx(intel, 2)
@ -234,18 +234,13 @@
#define HAS_BLT(pI810) (INTEL_INFO(intel)->gen >= 60)
extern SymTabRec *intel_chipsets;
struct intel_chipset {
const char *name;
int variant;
const struct intel_device_info {
int gen;
} *info;
struct intel_device_info {
int gen;
};
void intel_detect_chipset(ScrnInfoPtr scrn,
struct pci_device *pci,
struct intel_chipset *chipset);
const struct intel_device_info *
intel_detect_chipset(ScrnInfoPtr scrn,
EntityInfoPtr ent, struct pci_device *pci);
#endif /* INTEL_DRIVER_H */

29
src/intel_module.c
View File

@ -223,29 +223,38 @@ static const struct pci_id_match intel_device_match[] = {
{ 0, 0, 0 },
};
void intel_detect_chipset(ScrnInfoPtr scrn,
struct pci_device *pci,
struct intel_chipset *chipset)
const struct intel_device_info *
intel_detect_chipset(ScrnInfoPtr scrn,
EntityInfoPtr ent, struct pci_device *pci)
{
MessageType from = X_PROBED;
const char *name = NULL;
int i;
chipset->info = chipset_info;
chipset->name = NULL;
if (ent->device->chipID >= 0) {
xf86DrvMsg(scrn->scrnIndex, from = X_CONFIG,
"ChipID override: 0x%04X\n",
ent->device->chipID);
DEVICE_ID(pci) = ent->device->chipID;
}
for (i = 0; intel_chipsets[i].name != NULL; i++) {
if (DEVICE_ID(pci) == intel_chipsets[i].token) {
chipset->name = intel_chipsets[i].name;
name = intel_chipsets[i].name;
break;
}
}
if (chipset->name == NULL) {
if (name == NULL) {
xf86DrvMsg(scrn->scrnIndex, X_WARNING, "unknown chipset\n");
chipset->name = "unknown";
name = "unknown";
} else {
xf86DrvMsg(scrn->scrnIndex, X_INFO,
xf86DrvMsg(scrn->scrnIndex, from,
"Integrated Graphics Chipset: Intel(R) %s\n",
chipset->name);
name);
}
scrn->chipset = name;
return chipset_info;
}
/*

33
src/legacy/i810/i810_driver.c
View File

@ -240,7 +240,6 @@ I810PreInit(ScrnInfoPtr scrn, int flags)
rgb defaultWeight = { 0, 0, 0 };
int mem;
Bool enable;
struct intel_chipset chipset;
if (scrn->numEntities != 1)
return FALSE;
@ -365,40 +364,14 @@ I810PreInit(ScrnInfoPtr scrn, int flags)
*/
I810DoDDC(scrn, pI810->pEnt->index);
intel_detect_chipset(scrn, pI810->PciInfo, &chipset);
/*
* Set the Chipset and ChipRev, allowing config file entries to
* override.
*/
if (pI810->pEnt->device->chipset && *pI810->pEnt->device->chipset) {
scrn->chipset = pI810->pEnt->device->chipset;
from = X_CONFIG;
} else if (pI810->pEnt->device->chipID >= 0) {
scrn->chipset = (char *)xf86TokenToString(intel_chipsets,
pI810->pEnt->device->chipID);
from = X_CONFIG;
xf86DrvMsg(scrn->scrnIndex, X_CONFIG, "ChipID override: 0x%04X\n",
pI810->pEnt->device->chipID);
} else {
from = X_PROBED;
scrn->chipset = (char *)xf86TokenToString(intel_chipsets,
DEVICE_ID(pI810->PciInfo));
}
if (pI810->pEnt->device->chipRev >= 0) {
xf86DrvMsg(scrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n",
pI810->pEnt->device->chipRev);
}
xf86DrvMsg(scrn->scrnIndex, from, "Chipset: \"%s\"\n",
(scrn->chipset != NULL) ? scrn->chipset : "Unknown i810");
intel_detect_chipset(scrn, pI810->pEnt, pI810->PciInfo);
pI810->LinearAddr = pI810->PciInfo->regions[0].base_addr;
xf86DrvMsg(scrn->scrnIndex, from, "Linear framebuffer at 0x%lX\n",
xf86DrvMsg(scrn->scrnIndex, X_PROBED, "Linear framebuffer at 0x%lX\n",
(unsigned long)pI810->LinearAddr);
pI810->MMIOAddr = pI810->PciInfo->regions[1].base_addr;
xf86DrvMsg(scrn->scrnIndex, from, "IO registers at addr 0x%lX\n",
xf86DrvMsg(scrn->scrnIndex, X_PROBED, "IO registers at addr 0x%lX\n",
(unsigned long)pI810->MMIOAddr);
/* AGP GART support is required. Don't proceed any further if it isn't

2
src/sna/sna.h
View File

@ -231,7 +231,7 @@ struct sna {
EntityInfoPtr pEnt;
struct pci_device *PciInfo;
struct intel_chipset chipset;
const struct intel_device_info *info;
ScreenBlockHandlerProcPtr BlockHandler;
ScreenWakeupHandlerProcPtr WakeupHandler;

14
src/sna/sna_accel.c
View File

@ -13706,23 +13706,23 @@ bool sna_accel_init(ScreenPtr screen, struct sna *sna)
no_render_init(sna);
#if !DEBUG_NO_RENDER
if (sna->chipset.info->gen >= 80) {
} else if (sna->chipset.info->gen >= 70) {
if (sna->info->gen >= 80) {
} else if (sna->info->gen >= 70) {
if ((sna->have_render = gen7_render_init(sna)))
backend = "IvyBridge";
} else if (sna->chipset.info->gen >= 60) {
} else if (sna->info->gen >= 60) {
if ((sna->have_render = gen6_render_init(sna)))
backend = "SandyBridge";
} else if (sna->chipset.info->gen >= 50) {
} else if (sna->info->gen >= 50) {
if ((sna->have_render = gen5_render_init(sna)))
backend = "Ironlake";
} else if (sna->chipset.info->gen >= 40) {
} else if (sna->info->gen >= 40) {
if ((sna->have_render = gen4_render_init(sna)))
backend = "Broadwater";
} else if (sna->chipset.info->gen >= 30) {
} else if (sna->info->gen >= 30) {
if ((sna->have_render = gen3_render_init(sna)))
backend = "gen3";
} else if (sna->chipset.info->gen >= 20) {
} else if (sna->info->gen >= 20) {
if ((sna->have_render = gen2_render_init(sna)))
backend = "gen2";
}

33
src/sna/sna_driver.c
View File

@ -229,35 +229,8 @@ static void PreInitCleanup(ScrnInfoPtr scrn)
static void sna_check_chipset_option(ScrnInfoPtr scrn)
{
struct sna *sna = to_sna(scrn);
MessageType from = X_PROBED;
intel_detect_chipset(scrn, sna->PciInfo, &sna->chipset);
/* Set the Chipset and ChipRev, allowing config file entries to override. */
if (sna->pEnt->device->chipset && *sna->pEnt->device->chipset) {
scrn->chipset = sna->pEnt->device->chipset;
from = X_CONFIG;
} else if (sna->pEnt->device->chipID >= 0) {
scrn->chipset = (char *)xf86TokenToString(intel_chipsets,
sna->pEnt->device->chipID);
from = X_CONFIG;
xf86DrvMsg(scrn->scrnIndex, X_CONFIG,
"ChipID override: 0x%04X\n",
sna->pEnt->device->chipID);
DEVICE_ID(sna->PciInfo) = sna->pEnt->device->chipID;
} else {
from = X_PROBED;
scrn->chipset = (char *)xf86TokenToString(intel_chipsets,
DEVICE_ID(sna->PciInfo));
}
if (sna->pEnt->device->chipRev >= 0) {
xf86DrvMsg(scrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n",
sna->pEnt->device->chipRev);
}
xf86DrvMsg(scrn->scrnIndex, from, "Chipset: \"%s\"\n",
(scrn->chipset != NULL) ? scrn->chipset : "Unknown i8xx");
sna->info = intel_detect_chipset(scrn, sna->pEnt, sna->PciInfo);
}
static Bool sna_get_early_options(ScrnInfoPtr scrn)
@ -479,8 +452,8 @@ static Bool sna_pre_init(ScrnInfoPtr scrn, int flags)
if (!sna_get_early_options(scrn))
return FALSE;
sna_check_chipset_option(scrn);
kgem_init(&sna->kgem, fd, sna->PciInfo, sna->chipset.info->gen);
sna->info = intel_detect_chipset(scrn, sna->pEnt, sna->PciInfo);
kgem_init(&sna->kgem, fd, sna->PciInfo, sna->info->gen);
if (!xf86ReturnOptValBool(sna->Options,
OPTION_RELAXED_FENCING,
sna->kgem.has_relaxed_fencing)) {

4
src/sna/sna_video_hwmc.c
View File

@ -78,7 +78,7 @@ static int create_context(ScrnInfoPtr scrn, XvMCContextPtr pContext,
contextRec->type = XVMC_I965_MPEG2_MC;
contextRec->i965.is_g4x = sna->kgem.gen == 45;
contextRec->i965.is_965_q = IS_965_Q(sna);
contextRec->i965.is_igdng = IS_GEN5(sna);
contextRec->i965.is_igdng = sna->kgem.gen == 50;
} else {
contextRec->type = XVMC_I915_MPEG2_MC;
contextRec->i915.use_phys_addr = 0;
@ -192,7 +192,7 @@ Bool sna_video_xvmc_setup(struct sna *sna,
XF86VideoAdaptorPtr target)
{
XF86MCAdaptorRec *pAdapt;
char *name;
const char *name;
char buf[64];
/* Needs KMS support. */