uxa: Clear up the common intel directory
Move all the UXA backend specifc files into their own subdirectory. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
parent
ab28526ea4
commit
45d4e8dcf9
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@ -20,7 +20,7 @@
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ACLOCAL_AMFLAGS = ${ACLOCAL_FLAGS} -I m4
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SUBDIRS = man
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SUBDIRS = man xvmc
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if UXA
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SUBDIRS += uxa
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13
configure.ac
13
configure.ac
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@ -506,20 +506,21 @@ AC_SUBST([moduledir])
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AC_CONFIG_FILES([
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Makefile
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man/Makefile
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uxa/Makefile
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src/Makefile
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src/xvmc/Makefile
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src/xvmc/shader/Makefile
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src/xvmc/shader/mc/Makefile
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src/xvmc/shader/vld/Makefile
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src/legacy/Makefile
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src/legacy/i810/Makefile
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src/legacy/i810/xvmc/Makefile
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src/render_program/Makefile
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src/sna/Makefile
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src/sna/brw/Makefile
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src/sna/fb/Makefile
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man/Makefile
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src/render_program/Makefile
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src/uxa/Makefile
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xvmc/Makefile
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xvmc/shader/Makefile
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xvmc/shader/mc/Makefile
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xvmc/shader/vld/Makefile
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test/Makefile
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])
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AC_OUTPUT
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@ -18,7 +18,7 @@
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# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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SUBDIRS = xvmc render_program legacy
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SUBDIRS = render_program legacy
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# this is obnoxious:
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# -module lets us name the module exactly how we want
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@ -38,6 +38,11 @@ SUBDIRS += sna
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intel_drv_la_LIBADD += sna/libsna.la
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endif
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if UXA
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SUBDIRS += uxa
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intel_drv_la_LIBADD += uxa/libuxa.la
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endif
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NULL:=#
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intel_drv_la_SOURCES = \
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@ -45,70 +50,12 @@ intel_drv_la_SOURCES = \
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intel_list.h \
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intel_options.h \
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intel_device.c \
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intel_driver.h \
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intel_options.c \
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intel_module.c \
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compat-api.h \
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$(NULL)
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if UXA
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AM_CFLAGS += @UDEV_CFLAGS@ @DRM_CFLAGS@ @DRMINTEL_CFLAGS@
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AM_CFLAGS += -I$(top_srcdir)/uxa -I$(top_srcdir)/src/render_program
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intel_drv_la_LIBADD += @UDEV_LIBS@ @DRMINTEL_LIBS@ @DRM_LIBS@ ../uxa/libuxa.la
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intel_drv_la_SOURCES += \
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brw_defines.h \
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brw_structs.h \
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common.h \
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intel.h \
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intel_batchbuffer.c \
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intel_batchbuffer.h \
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intel_display.c \
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intel_driver.c \
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intel_driver.h \
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intel_glamor.h \
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intel_memory.c \
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intel_uxa.c \
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intel_video.c \
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intel_video.h \
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i830_3d.c \
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i830_render.c \
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i830_reg.h \
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i915_3d.h \
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i915_reg.h \
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i915_3d.c \
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i915_render.c \
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i915_video.c \
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i965_reg.h \
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i965_3d.c \
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i965_video.c \
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i965_render.c \
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$(NULL)
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if GLAMOR
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AM_CFLAGS += @LIBGLAMOR_CFLAGS@
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intel_drv_la_LIBADD += @LIBGLAMOR_LIBS@
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intel_drv_la_SOURCES += \
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intel_glamor.c \
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$(NULL)
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endif
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if DRI2
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intel_drv_la_SOURCES += \
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intel_dri.c \
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$(NULL)
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intel_drv_la_LIBADD += \
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$(DRI_LIBS) \
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@CLOCK_GETTIME_LIBS@ \
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$(NULL)
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endif
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if XVMC
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intel_drv_la_SOURCES += \
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intel_hwmc.h \
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intel_hwmc.c \
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$(NULL)
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endif
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endif
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EXTRA_DIST = \
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scripts/clock.5c \
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scripts/clock-graph.5c \
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@ -28,6 +28,7 @@
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#include "config.h"
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#endif
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#include <xf86.h>
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#include <xf86Parser.h>
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#include <xorgVersion.h>
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@ -35,11 +36,11 @@
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#include <xf86Resources.h>
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#endif
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#include "common.h"
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#include "intel_driver.h"
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#include "intel_options.h"
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#include "legacy/legacy.h"
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#include "sna/sna_module.h"
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#include "uxa/uxa_module.h"
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#include "i915_pciids.h" /* copied from (kernel) include/drm/i915_pciids.h */
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@ -0,0 +1,79 @@
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# Copyright 2005 Adam Jackson.
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#
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# Permission is hereby granted, free of charge, to any person obtaining a
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# copy of this software and associated documentation files (the "Software"),
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# to deal in the Software without restriction, including without limitation
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# on the rights to use, copy, modify, merge, publish, distribute, sub
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# license, and/or sell copies of the Software, and to permit persons to whom
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# the Software is furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice (including the next
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# paragraph) shall be included in all copies or substantial portions of the
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# Software.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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# FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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# ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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AM_CFLAGS = @CWARNFLAGS@ @XORG_CFLAGS@ @DRM_CFLAGS@ @PCIACCESS_CFLAGS@
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AM_CFLAGS += @UDEV_CFLAGS@ @DRM_CFLAGS@ @DRMINTEL_CFLAGS@
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AM_CFLAGS += -I$(top_srcdir)/uxa -I$(top_srcdir)/src -I$(top_srcdir)/src/render_program
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noinst_LTLIBRARIES = libuxa.la
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libuxa_la_LIBADD = @UDEV_LIBS@ @DRMINTEL_LIBS@ @DRM_LIBS@ $(top_builddir)/uxa/libuxa.la
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libuxa_la_SOURCES = \
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brw_defines.h \
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brw_structs.h \
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common.h \
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intel.h \
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intel_batchbuffer.c \
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intel_batchbuffer.h \
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intel_display.c \
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intel_driver.c \
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intel_glamor.h \
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intel_memory.c \
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intel_uxa.c \
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intel_video.c \
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intel_video.h \
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i830_3d.c \
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i830_render.c \
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i830_reg.h \
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i915_3d.h \
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i915_reg.h \
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i915_3d.c \
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i915_render.c \
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i915_video.c \
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i965_reg.h \
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i965_3d.c \
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i965_video.c \
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i965_render.c \
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uxa_module.h \
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$(NULL)
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if GLAMOR
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AM_CFLAGS += @LIBGLAMOR_CFLAGS@
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libuxa_la_LIBADD += @LIBGLAMOR_LIBS@
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libuxa_la_SOURCES += \
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intel_glamor.c \
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$(NULL)
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endif
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if DRI2
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libuxa_la_SOURCES += \
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intel_dri.c \
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$(NULL)
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libuxa_la_LIBADD += \
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$(DRI_LIBS) \
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@CLOCK_GETTIME_LIBS@ \
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$(NULL)
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endif
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if XVMC
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AM_CFLAGS += -I$(top_srcdir)/xvmc
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libuxa_la_SOURCES += \
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intel_hwmc.c \
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$(NULL)
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endif
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@ -55,8 +55,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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#define KB(x) ((x) * 1024)
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#define MB(x) ((x) * KB(1024))
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extern Bool intel_init_scrn(ScrnInfoPtr scrn);
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/**
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* Hints to CreatePixmap to tell the driver how the pixmap is going to be
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* used.
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@ -36,7 +36,7 @@
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#include "fourcc.h"
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#include "intel.h"
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#include "intel_hwmc.h"
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#include "intel_xvmc.h"
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#include "intel_video.h"
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#include "i830_reg.h"
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#include "i965_reg.h"
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@ -66,7 +66,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
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#ifdef INTEL_XVMC
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#define _INTEL_XVMC_SERVER_
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#include "intel_hwmc.h"
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#include "intel_xvmc.h"
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#endif
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#include "legacy/legacy.h"
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@ -30,7 +30,7 @@
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#define _INTEL_XVMC_SERVER_
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#include "intel.h"
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#include "intel_hwmc.h"
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#include "intel_xvmc.h"
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#include <X11/extensions/Xv.h>
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#include <X11/extensions/XvMC.h>
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@ -75,7 +75,7 @@
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#ifdef INTEL_XVMC
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#define _INTEL_XVMC_SERVER_
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#include "intel_hwmc.h"
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#include "intel_xvmc.h"
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#endif
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#define OFF_DELAY 250 /* milliseconds */
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@ -0,0 +1,6 @@
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#ifndef INTEL_MODULE_H
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#define INTEL_MODULE_H
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extern Bool intel_init_scrn(ScrnInfoPtr scrn);
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#endif /* INTEL_MODULE_H */
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@ -1,24 +0,0 @@
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if XVMC
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lib_LTLIBRARIES=libIntelXvMC.la
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endif
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SUBDIRS = shader
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libIntelXvMC_la_SOURCES = intel_xvmc.c \
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intel_xvmc.h \
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intel_xvmc_dump.c \
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i915_structs.h \
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i915_program.h \
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i915_xvmc.c \
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i915_xvmc.h \
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i965_xvmc.c \
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xvmc_vld.c \
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intel_batchbuffer.c \
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intel_batchbuffer.h
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AM_CFLAGS = @XORG_CFLAGS@ @DRM_CFLAGS@ @DRI_CFLAGS@ \
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@XVMCLIB_CFLAGS@ @XCB_CFLAGS@ \
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-I$(top_srcdir)/src -DTRUE=1 -DFALSE=0
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libIntelXvMC_la_LDFLAGS = -version-number 1:0:0
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libIntelXvMC_la_LIBADD = @DRI_LIBS@ @DRM_LIBS@ @XVMCLIB_LIBS@ @XCB_LIBS@ @DRMINTEL_LIBS@ -lpthread
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@ -4,7 +4,7 @@ noinst_LTLIBRARIES = libuxa.la
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# built (in hw/xfree86/os-support/solaris) until after UXA is built
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SOLARIS_ASM_CFLAGS=""
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AM_CFLAGS = $(CWARNFLAGS) $(XORG_CFLAGS)
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AM_CFLAGS = $(CWARNFLAGS) $(XORG_CFLAGS) -I$(top_srcdir)/src/uxa
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if GLAMOR
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AM_CFLAGS += @LIBGLAMOR_CFLAGS@
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@ -66,7 +66,7 @@
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#include "uxa-priv.h"
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#include "uxa-glamor.h"
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#include "../src/common.h"
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#include "common.h"
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#include "mipict.h"
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@ -0,0 +1,32 @@
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if XVMC
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lib_LTLIBRARIES=libIntelXvMC.la
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endif
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SUBDIRS = shader
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libIntelXvMC_la_SOURCES = \
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intel_xvmc.c \
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intel_xvmc.h \
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intel_xvmc_private.h \
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intel_xvmc_dump.c \
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i830_reg.h \
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i915_reg.h \
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i915_structs.h \
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i915_program.h \
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i915_xvmc.c \
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i915_xvmc.h \
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brw_defines.h \
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brw_structs.h \
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i965_reg.h \
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i965_xvmc.c \
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xvmc_vld.c \
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intel_batchbuffer.c \
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intel_batchbuffer.h \
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$(NULL)
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AM_CFLAGS = @XORG_CFLAGS@ @DRM_CFLAGS@ @DRI_CFLAGS@ \
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@XVMCLIB_CFLAGS@ @XCB_CFLAGS@ \
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-I$(top_srcdir)/src -DTRUE=1 -DFALSE=0
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libIntelXvMC_la_LDFLAGS = -version-number 1:0:0
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libIntelXvMC_la_LIBADD = @DRI_LIBS@ @DRM_LIBS@ @XVMCLIB_LIBS@ @XCB_LIBS@ @DRMINTEL_LIBS@ -lpthread
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@ -0,0 +1,881 @@
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/**************************************************************************
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*
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* Copyright 2005 Tungsten Graphics, Inc., Cedar Park, Texas.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
|
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* "Software"), to deal in the Software without restriction, including
|
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* without limitation the rights to use, copy, modify, merge, publish,
|
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* distribute, sub license, and/or sell copies of the Software, and to
|
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* permit persons to whom the Software is furnished to do so, subject to
|
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* the following conditions:
|
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*
|
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* The above copyright notice and this permission notice (including the
|
||||
* next paragraph) shall be included in all copies or substantial portions
|
||||
* of the Software.
|
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
|
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* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
|
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* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
||||
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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**************************************************************************/
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#ifndef BRW_DEFINES_H
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#define BRW_DEFINES_H
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/*
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*/
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#if 0
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#define MI_NOOP 0x00
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#define MI_USER_INTERRUPT 0x02
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#define MI_WAIT_FOR_EVENT 0x03
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#define MI_FLUSH 0x04
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#define MI_REPORT_HEAD 0x07
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#define MI_ARB_ON_OFF 0x08
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#define MI_BATCH_BUFFER_END 0x0A
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#define MI_OVERLAY_FLIP 0x11
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#define MI_LOAD_SCAN_LINES_INCL 0x12
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#define MI_LOAD_SCAN_LINES_EXCL 0x13
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#define MI_DISPLAY_BUFFER_INFO 0x14
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#define MI_SET_CONTEXT 0x18
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#define MI_STORE_DATA_IMM 0x20
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#define MI_STORE_DATA_INDEX 0x21
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#define MI_LOAD_REGISTER_IMM 0x22
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#define MI_STORE_REGISTER_MEM 0x24
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#define MI_BATCH_BUFFER_START 0x31
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#define MI_SYNCHRONOUS_FLIP 0x0
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#define MI_ASYNCHRONOUS_FLIP 0x1
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#define MI_BUFFER_SECURE 0x0
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#define MI_BUFFER_NONSECURE 0x1
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#define MI_ARBITRATE_AT_CHAIN_POINTS 0x0
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#define MI_ARBITRATE_BETWEEN_INSTS 0x1
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#define MI_NO_ARBITRATION 0x3
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#define MI_CONDITION_CODE_WAIT_DISABLED 0x0
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#define MI_CONDITION_CODE_WAIT_0 0x1
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#define MI_CONDITION_CODE_WAIT_1 0x2
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#define MI_CONDITION_CODE_WAIT_2 0x3
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#define MI_CONDITION_CODE_WAIT_3 0x4
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#define MI_CONDITION_CODE_WAIT_4 0x5
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#define MI_DISPLAY_PIPE_A 0x0
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#define MI_DISPLAY_PIPE_B 0x1
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#define MI_DISPLAY_PLANE_A 0x0
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#define MI_DISPLAY_PLANE_B 0x1
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#define MI_DISPLAY_PLANE_C 0x2
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#define MI_STANDARD_FLIP 0x0
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#define MI_ENQUEUE_FLIP_PERFORM_BASE_FRAME_NUMBER_LOAD 0x1
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#define MI_ENQUEUE_FLIP_TARGET_FRAME_NUMBER_RELATIVE 0x2
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#define MI_ENQUEUE_FLIP_ABSOLUTE_TARGET_FRAME_NUMBER 0x3
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#define MI_PHYSICAL_ADDRESS 0x0
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#define MI_VIRTUAL_ADDRESS 0x1
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#define MI_BUFFER_MEMORY_MAIN 0x0
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#define MI_BUFFER_MEMORY_GTT 0x2
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||||
#define MI_BUFFER_MEMORY_PER_PROCESS_GTT 0x3
|
||||
|
||||
#define MI_FLIP_CONTINUE 0x0
|
||||
#define MI_FLIP_ON 0x1
|
||||
#define MI_FLIP_OFF 0x2
|
||||
|
||||
#define MI_UNTRUSTED_REGISTER_SPACE 0x0
|
||||
#define MI_TRUSTED_REGISTER_SPACE 0x1
|
||||
#endif
|
||||
|
||||
/* 3D state:
|
||||
*/
|
||||
#define _3DOP_3DSTATE_PIPELINED 0x0
|
||||
#define _3DOP_3DSTATE_NONPIPELINED 0x1
|
||||
#define _3DOP_3DCONTROL 0x2
|
||||
#define _3DOP_3DPRIMITIVE 0x3
|
||||
|
||||
#define _3DSTATE_PIPELINED_POINTERS 0x00
|
||||
#define _3DSTATE_BINDING_TABLE_POINTERS 0x01
|
||||
#define _3DSTATE_VERTEX_BUFFERS 0x08
|
||||
#define _3DSTATE_VERTEX_ELEMENTS 0x09
|
||||
#define _3DSTATE_INDEX_BUFFER 0x0A
|
||||
#define _3DSTATE_VF_STATISTICS 0x0B
|
||||
#define _3DSTATE_DRAWING_RECTANGLE 0x00
|
||||
#define _3DSTATE_CONSTANT_COLOR 0x01
|
||||
#define _3DSTATE_SAMPLER_PALETTE_LOAD 0x02
|
||||
#define _3DSTATE_CHROMA_KEY 0x04
|
||||
#define _3DSTATE_DEPTH_BUFFER 0x05
|
||||
#define _3DSTATE_POLY_STIPPLE_OFFSET 0x06
|
||||
#define _3DSTATE_POLY_STIPPLE_PATTERN 0x07
|
||||
#define _3DSTATE_LINE_STIPPLE 0x08
|
||||
#define _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP 0x09
|
||||
#define _3DCONTROL 0x00
|
||||
#define _3DPRIMITIVE 0x00
|
||||
|
||||
#define PIPE_CONTROL_NOWRITE 0x00
|
||||
#define PIPE_CONTROL_WRITEIMMEDIATE 0x01
|
||||
#define PIPE_CONTROL_WRITEDEPTH 0x02
|
||||
#define PIPE_CONTROL_WRITETIMESTAMP 0x03
|
||||
|
||||
#define PIPE_CONTROL_GTTWRITE_PROCESS_LOCAL 0x00
|
||||
#define PIPE_CONTROL_GTTWRITE_GLOBAL 0x01
|
||||
|
||||
#define _3DPRIM_POINTLIST 0x01
|
||||
#define _3DPRIM_LINELIST 0x02
|
||||
#define _3DPRIM_LINESTRIP 0x03
|
||||
#define _3DPRIM_TRILIST 0x04
|
||||
#define _3DPRIM_TRISTRIP 0x05
|
||||
#define _3DPRIM_TRIFAN 0x06
|
||||
#define _3DPRIM_QUADLIST 0x07
|
||||
#define _3DPRIM_QUADSTRIP 0x08
|
||||
#define _3DPRIM_LINELIST_ADJ 0x09
|
||||
#define _3DPRIM_LINESTRIP_ADJ 0x0A
|
||||
#define _3DPRIM_TRILIST_ADJ 0x0B
|
||||
#define _3DPRIM_TRISTRIP_ADJ 0x0C
|
||||
#define _3DPRIM_TRISTRIP_REVERSE 0x0D
|
||||
#define _3DPRIM_POLYGON 0x0E
|
||||
#define _3DPRIM_RECTLIST 0x0F
|
||||
#define _3DPRIM_LINELOOP 0x10
|
||||
#define _3DPRIM_POINTLIST_BF 0x11
|
||||
#define _3DPRIM_LINESTRIP_CONT 0x12
|
||||
#define _3DPRIM_LINESTRIP_BF 0x13
|
||||
#define _3DPRIM_LINESTRIP_CONT_BF 0x14
|
||||
#define _3DPRIM_TRIFAN_NOSTIPPLE 0x15
|
||||
|
||||
#define _3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL 0
|
||||
#define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1
|
||||
|
||||
#define BRW_ANISORATIO_2 0
|
||||
#define BRW_ANISORATIO_4 1
|
||||
#define BRW_ANISORATIO_6 2
|
||||
#define BRW_ANISORATIO_8 3
|
||||
#define BRW_ANISORATIO_10 4
|
||||
#define BRW_ANISORATIO_12 5
|
||||
#define BRW_ANISORATIO_14 6
|
||||
#define BRW_ANISORATIO_16 7
|
||||
|
||||
#define BRW_BLENDFACTOR_ONE 0x1
|
||||
#define BRW_BLENDFACTOR_SRC_COLOR 0x2
|
||||
#define BRW_BLENDFACTOR_SRC_ALPHA 0x3
|
||||
#define BRW_BLENDFACTOR_DST_ALPHA 0x4
|
||||
#define BRW_BLENDFACTOR_DST_COLOR 0x5
|
||||
#define BRW_BLENDFACTOR_SRC_ALPHA_SATURATE 0x6
|
||||
#define BRW_BLENDFACTOR_CONST_COLOR 0x7
|
||||
#define BRW_BLENDFACTOR_CONST_ALPHA 0x8
|
||||
#define BRW_BLENDFACTOR_SRC1_COLOR 0x9
|
||||
#define BRW_BLENDFACTOR_SRC1_ALPHA 0x0A
|
||||
#define BRW_BLENDFACTOR_ZERO 0x11
|
||||
#define BRW_BLENDFACTOR_INV_SRC_COLOR 0x12
|
||||
#define BRW_BLENDFACTOR_INV_SRC_ALPHA 0x13
|
||||
#define BRW_BLENDFACTOR_INV_DST_ALPHA 0x14
|
||||
#define BRW_BLENDFACTOR_INV_DST_COLOR 0x15
|
||||
#define BRW_BLENDFACTOR_INV_CONST_COLOR 0x17
|
||||
#define BRW_BLENDFACTOR_INV_CONST_ALPHA 0x18
|
||||
#define BRW_BLENDFACTOR_INV_SRC1_COLOR 0x19
|
||||
#define BRW_BLENDFACTOR_INV_SRC1_ALPHA 0x1A
|
||||
|
||||
#define BRW_BLENDFUNCTION_ADD 0
|
||||
#define BRW_BLENDFUNCTION_SUBTRACT 1
|
||||
#define BRW_BLENDFUNCTION_REVERSE_SUBTRACT 2
|
||||
#define BRW_BLENDFUNCTION_MIN 3
|
||||
#define BRW_BLENDFUNCTION_MAX 4
|
||||
|
||||
#define BRW_ALPHATEST_FORMAT_UNORM8 0
|
||||
#define BRW_ALPHATEST_FORMAT_FLOAT32 1
|
||||
|
||||
#define BRW_CHROMAKEY_KILL_ON_ANY_MATCH 0
|
||||
#define BRW_CHROMAKEY_REPLACE_BLACK 1
|
||||
|
||||
#define BRW_CLIP_API_OGL 0
|
||||
#define BRW_CLIP_API_DX 1
|
||||
|
||||
#define BRW_CLIPMODE_NORMAL 0
|
||||
#define BRW_CLIPMODE_CLIP_ALL 1
|
||||
#define BRW_CLIPMODE_CLIP_NON_REJECTED 2
|
||||
#define BRW_CLIPMODE_REJECT_ALL 3
|
||||
#define BRW_CLIPMODE_ACCEPT_ALL 4
|
||||
|
||||
#define BRW_CLIP_NDCSPACE 0
|
||||
#define BRW_CLIP_SCREENSPACE 1
|
||||
|
||||
#define BRW_COMPAREFUNCTION_ALWAYS 0
|
||||
#define BRW_COMPAREFUNCTION_NEVER 1
|
||||
#define BRW_COMPAREFUNCTION_LESS 2
|
||||
#define BRW_COMPAREFUNCTION_EQUAL 3
|
||||
#define BRW_COMPAREFUNCTION_LEQUAL 4
|
||||
#define BRW_COMPAREFUNCTION_GREATER 5
|
||||
#define BRW_COMPAREFUNCTION_NOTEQUAL 6
|
||||
#define BRW_COMPAREFUNCTION_GEQUAL 7
|
||||
|
||||
#define BRW_COVERAGE_PIXELS_HALF 0
|
||||
#define BRW_COVERAGE_PIXELS_1 1
|
||||
#define BRW_COVERAGE_PIXELS_2 2
|
||||
#define BRW_COVERAGE_PIXELS_4 3
|
||||
|
||||
#define BRW_CULLMODE_BOTH 0
|
||||
#define BRW_CULLMODE_NONE 1
|
||||
#define BRW_CULLMODE_FRONT 2
|
||||
#define BRW_CULLMODE_BACK 3
|
||||
|
||||
#define BRW_DEFAULTCOLOR_R8G8B8A8_UNORM 0
|
||||
#define BRW_DEFAULTCOLOR_R32G32B32A32_FLOAT 1
|
||||
|
||||
#define BRW_DEPTHFORMAT_D32_FLOAT_S8X24_UINT 0
|
||||
#define BRW_DEPTHFORMAT_D32_FLOAT 1
|
||||
#define BRW_DEPTHFORMAT_D24_UNORM_S8_UINT 2
|
||||
#define BRW_DEPTHFORMAT_D16_UNORM 5
|
||||
|
||||
#define BRW_FLOATING_POINT_IEEE_754 0
|
||||
#define BRW_FLOATING_POINT_NON_IEEE_754 1
|
||||
|
||||
#define BRW_FRONTWINDING_CW 0
|
||||
#define BRW_FRONTWINDING_CCW 1
|
||||
|
||||
#define BRW_INDEX_BYTE 0
|
||||
#define BRW_INDEX_WORD 1
|
||||
#define BRW_INDEX_DWORD 2
|
||||
|
||||
#define BRW_LOGICOPFUNCTION_CLEAR 0
|
||||
#define BRW_LOGICOPFUNCTION_NOR 1
|
||||
#define BRW_LOGICOPFUNCTION_AND_INVERTED 2
|
||||
#define BRW_LOGICOPFUNCTION_COPY_INVERTED 3
|
||||
#define BRW_LOGICOPFUNCTION_AND_REVERSE 4
|
||||
#define BRW_LOGICOPFUNCTION_INVERT 5
|
||||
#define BRW_LOGICOPFUNCTION_XOR 6
|
||||
#define BRW_LOGICOPFUNCTION_NAND 7
|
||||
#define BRW_LOGICOPFUNCTION_AND 8
|
||||
#define BRW_LOGICOPFUNCTION_EQUIV 9
|
||||
#define BRW_LOGICOPFUNCTION_NOOP 10
|
||||
#define BRW_LOGICOPFUNCTION_OR_INVERTED 11
|
||||
#define BRW_LOGICOPFUNCTION_COPY 12
|
||||
#define BRW_LOGICOPFUNCTION_OR_REVERSE 13
|
||||
#define BRW_LOGICOPFUNCTION_OR 14
|
||||
#define BRW_LOGICOPFUNCTION_SET 15
|
||||
|
||||
#define BRW_MAPFILTER_NEAREST 0x0
|
||||
#define BRW_MAPFILTER_LINEAR 0x1
|
||||
#define BRW_MAPFILTER_ANISOTROPIC 0x2
|
||||
|
||||
#define BRW_MIPFILTER_NONE 0
|
||||
#define BRW_MIPFILTER_NEAREST 1
|
||||
#define BRW_MIPFILTER_LINEAR 3
|
||||
|
||||
#define BRW_POLYGON_FRONT_FACING 0
|
||||
#define BRW_POLYGON_BACK_FACING 1
|
||||
|
||||
#define BRW_PREFILTER_ALWAYS 0x0
|
||||
#define BRW_PREFILTER_NEVER 0x1
|
||||
#define BRW_PREFILTER_LESS 0x2
|
||||
#define BRW_PREFILTER_EQUAL 0x3
|
||||
#define BRW_PREFILTER_LEQUAL 0x4
|
||||
#define BRW_PREFILTER_GREATER 0x5
|
||||
#define BRW_PREFILTER_NOTEQUAL 0x6
|
||||
#define BRW_PREFILTER_GEQUAL 0x7
|
||||
|
||||
#define BRW_PROVOKING_VERTEX_0 0
|
||||
#define BRW_PROVOKING_VERTEX_1 1
|
||||
#define BRW_PROVOKING_VERTEX_2 2
|
||||
|
||||
#define BRW_RASTRULE_UPPER_LEFT 0
|
||||
#define BRW_RASTRULE_UPPER_RIGHT 1
|
||||
|
||||
#define BRW_RENDERTARGET_CLAMPRANGE_UNORM 0
|
||||
#define BRW_RENDERTARGET_CLAMPRANGE_SNORM 1
|
||||
#define BRW_RENDERTARGET_CLAMPRANGE_FORMAT 2
|
||||
|
||||
#define BRW_STENCILOP_KEEP 0
|
||||
#define BRW_STENCILOP_ZERO 1
|
||||
#define BRW_STENCILOP_REPLACE 2
|
||||
#define BRW_STENCILOP_INCRSAT 3
|
||||
#define BRW_STENCILOP_DECRSAT 4
|
||||
#define BRW_STENCILOP_INCR 5
|
||||
#define BRW_STENCILOP_DECR 6
|
||||
#define BRW_STENCILOP_INVERT 7
|
||||
|
||||
#define BRW_SURFACE_MIPMAPLAYOUT_BELOW 0
|
||||
#define BRW_SURFACE_MIPMAPLAYOUT_RIGHT 1
|
||||
|
||||
#define BRW_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000
|
||||
#define BRW_SURFACEFORMAT_R32G32B32A32_SINT 0x001
|
||||
#define BRW_SURFACEFORMAT_R32G32B32A32_UINT 0x002
|
||||
#define BRW_SURFACEFORMAT_R32G32B32A32_UNORM 0x003
|
||||
#define BRW_SURFACEFORMAT_R32G32B32A32_SNORM 0x004
|
||||
#define BRW_SURFACEFORMAT_R64G64_FLOAT 0x005
|
||||
#define BRW_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006
|
||||
#define BRW_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007
|
||||
#define BRW_SURFACEFORMAT_R32G32B32A32_USCALED 0x008
|
||||
#define BRW_SURFACEFORMAT_R32G32B32_FLOAT 0x040
|
||||
#define BRW_SURFACEFORMAT_R32G32B32_SINT 0x041
|
||||
#define BRW_SURFACEFORMAT_R32G32B32_UINT 0x042
|
||||
#define BRW_SURFACEFORMAT_R32G32B32_UNORM 0x043
|
||||
#define BRW_SURFACEFORMAT_R32G32B32_SNORM 0x044
|
||||
#define BRW_SURFACEFORMAT_R32G32B32_SSCALED 0x045
|
||||
#define BRW_SURFACEFORMAT_R32G32B32_USCALED 0x046
|
||||
#define BRW_SURFACEFORMAT_R16G16B16A16_UNORM 0x080
|
||||
#define BRW_SURFACEFORMAT_R16G16B16A16_SNORM 0x081
|
||||
#define BRW_SURFACEFORMAT_R16G16B16A16_SINT 0x082
|
||||
#define BRW_SURFACEFORMAT_R16G16B16A16_UINT 0x083
|
||||
#define BRW_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084
|
||||
#define BRW_SURFACEFORMAT_R32G32_FLOAT 0x085
|
||||
#define BRW_SURFACEFORMAT_R32G32_SINT 0x086
|
||||
#define BRW_SURFACEFORMAT_R32G32_UINT 0x087
|
||||
#define BRW_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088
|
||||
#define BRW_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089
|
||||
#define BRW_SURFACEFORMAT_L32A32_FLOAT 0x08A
|
||||
#define BRW_SURFACEFORMAT_R32G32_UNORM 0x08B
|
||||
#define BRW_SURFACEFORMAT_R32G32_SNORM 0x08C
|
||||
#define BRW_SURFACEFORMAT_R64_FLOAT 0x08D
|
||||
#define BRW_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E
|
||||
#define BRW_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F
|
||||
#define BRW_SURFACEFORMAT_A32X32_FLOAT 0x090
|
||||
#define BRW_SURFACEFORMAT_L32X32_FLOAT 0x091
|
||||
#define BRW_SURFACEFORMAT_I32X32_FLOAT 0x092
|
||||
#define BRW_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093
|
||||
#define BRW_SURFACEFORMAT_R16G16B16A16_USCALED 0x094
|
||||
#define BRW_SURFACEFORMAT_R32G32_SSCALED 0x095
|
||||
#define BRW_SURFACEFORMAT_R32G32_USCALED 0x096
|
||||
#define BRW_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0
|
||||
#define BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1
|
||||
#define BRW_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2
|
||||
#define BRW_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3
|
||||
#define BRW_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4
|
||||
#define BRW_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5
|
||||
#define BRW_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7
|
||||
#define BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8
|
||||
#define BRW_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9
|
||||
#define BRW_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA
|
||||
#define BRW_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB
|
||||
#define BRW_SURFACEFORMAT_R16G16_UNORM 0x0CC
|
||||
#define BRW_SURFACEFORMAT_R16G16_SNORM 0x0CD
|
||||
#define BRW_SURFACEFORMAT_R16G16_SINT 0x0CE
|
||||
#define BRW_SURFACEFORMAT_R16G16_UINT 0x0CF
|
||||
#define BRW_SURFACEFORMAT_R16G16_FLOAT 0x0D0
|
||||
#define BRW_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1
|
||||
#define BRW_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2
|
||||
#define BRW_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3
|
||||
#define BRW_SURFACEFORMAT_R32_SINT 0x0D6
|
||||
#define BRW_SURFACEFORMAT_R32_UINT 0x0D7
|
||||
#define BRW_SURFACEFORMAT_R32_FLOAT 0x0D8
|
||||
#define BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9
|
||||
#define BRW_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA
|
||||
#define BRW_SURFACEFORMAT_L16A16_UNORM 0x0DF
|
||||
#define BRW_SURFACEFORMAT_I24X8_UNORM 0x0E0
|
||||
#define BRW_SURFACEFORMAT_L24X8_UNORM 0x0E1
|
||||
#define BRW_SURFACEFORMAT_A24X8_UNORM 0x0E2
|
||||
#define BRW_SURFACEFORMAT_I32_FLOAT 0x0E3
|
||||
#define BRW_SURFACEFORMAT_L32_FLOAT 0x0E4
|
||||
#define BRW_SURFACEFORMAT_A32_FLOAT 0x0E5
|
||||
#define BRW_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9
|
||||
#define BRW_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA
|
||||
#define BRW_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB
|
||||
#define BRW_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC
|
||||
#define BRW_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED
|
||||
#define BRW_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE
|
||||
#define BRW_SURFACEFORMAT_L16A16_FLOAT 0x0F0
|
||||
#define BRW_SURFACEFORMAT_R32_UNORM 0x0F1
|
||||
#define BRW_SURFACEFORMAT_R32_SNORM 0x0F2
|
||||
#define BRW_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3
|
||||
#define BRW_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4
|
||||
#define BRW_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5
|
||||
#define BRW_SURFACEFORMAT_R16G16_SSCALED 0x0F6
|
||||
#define BRW_SURFACEFORMAT_R16G16_USCALED 0x0F7
|
||||
#define BRW_SURFACEFORMAT_R32_SSCALED 0x0F8
|
||||
#define BRW_SURFACEFORMAT_R32_USCALED 0x0F9
|
||||
#define BRW_SURFACEFORMAT_B5G6R5_UNORM 0x100
|
||||
#define BRW_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101
|
||||
#define BRW_SURFACEFORMAT_B5G5R5A1_UNORM 0x102
|
||||
#define BRW_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103
|
||||
#define BRW_SURFACEFORMAT_B4G4R4A4_UNORM 0x104
|
||||
#define BRW_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105
|
||||
#define BRW_SURFACEFORMAT_R8G8_UNORM 0x106
|
||||
#define BRW_SURFACEFORMAT_R8G8_SNORM 0x107
|
||||
#define BRW_SURFACEFORMAT_R8G8_SINT 0x108
|
||||
#define BRW_SURFACEFORMAT_R8G8_UINT 0x109
|
||||
#define BRW_SURFACEFORMAT_R16_UNORM 0x10A
|
||||
#define BRW_SURFACEFORMAT_R16_SNORM 0x10B
|
||||
#define BRW_SURFACEFORMAT_R16_SINT 0x10C
|
||||
#define BRW_SURFACEFORMAT_R16_UINT 0x10D
|
||||
#define BRW_SURFACEFORMAT_R16_FLOAT 0x10E
|
||||
#define BRW_SURFACEFORMAT_I16_UNORM 0x111
|
||||
#define BRW_SURFACEFORMAT_L16_UNORM 0x112
|
||||
#define BRW_SURFACEFORMAT_A16_UNORM 0x113
|
||||
#define BRW_SURFACEFORMAT_L8A8_UNORM 0x114
|
||||
#define BRW_SURFACEFORMAT_I16_FLOAT 0x115
|
||||
#define BRW_SURFACEFORMAT_L16_FLOAT 0x116
|
||||
#define BRW_SURFACEFORMAT_A16_FLOAT 0x117
|
||||
#define BRW_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119
|
||||
#define BRW_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A
|
||||
#define BRW_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B
|
||||
#define BRW_SURFACEFORMAT_R8G8_SSCALED 0x11C
|
||||
#define BRW_SURFACEFORMAT_R8G8_USCALED 0x11D
|
||||
#define BRW_SURFACEFORMAT_R16_SSCALED 0x11E
|
||||
#define BRW_SURFACEFORMAT_R16_USCALED 0x11F
|
||||
#define BRW_SURFACEFORMAT_R8_UNORM 0x140
|
||||
#define BRW_SURFACEFORMAT_R8_SNORM 0x141
|
||||
#define BRW_SURFACEFORMAT_R8_SINT 0x142
|
||||
#define BRW_SURFACEFORMAT_R8_UINT 0x143
|
||||
#define BRW_SURFACEFORMAT_A8_UNORM 0x144
|
||||
#define BRW_SURFACEFORMAT_I8_UNORM 0x145
|
||||
#define BRW_SURFACEFORMAT_L8_UNORM 0x146
|
||||
#define BRW_SURFACEFORMAT_P4A4_UNORM 0x147
|
||||
#define BRW_SURFACEFORMAT_A4P4_UNORM 0x148
|
||||
#define BRW_SURFACEFORMAT_R8_SSCALED 0x149
|
||||
#define BRW_SURFACEFORMAT_R8_USCALED 0x14A
|
||||
#define BRW_SURFACEFORMAT_R1_UINT 0x181
|
||||
#define BRW_SURFACEFORMAT_YCRCB_NORMAL 0x182
|
||||
#define BRW_SURFACEFORMAT_YCRCB_SWAPUVY 0x183
|
||||
#define BRW_SURFACEFORMAT_BC1_UNORM 0x186
|
||||
#define BRW_SURFACEFORMAT_BC2_UNORM 0x187
|
||||
#define BRW_SURFACEFORMAT_BC3_UNORM 0x188
|
||||
#define BRW_SURFACEFORMAT_BC4_UNORM 0x189
|
||||
#define BRW_SURFACEFORMAT_BC5_UNORM 0x18A
|
||||
#define BRW_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B
|
||||
#define BRW_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C
|
||||
#define BRW_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D
|
||||
#define BRW_SURFACEFORMAT_MONO8 0x18E
|
||||
#define BRW_SURFACEFORMAT_YCRCB_SWAPUV 0x18F
|
||||
#define BRW_SURFACEFORMAT_YCRCB_SWAPY 0x190
|
||||
#define BRW_SURFACEFORMAT_DXT1_RGB 0x191
|
||||
#define BRW_SURFACEFORMAT_FXT1 0x192
|
||||
#define BRW_SURFACEFORMAT_R8G8B8_UNORM 0x193
|
||||
#define BRW_SURFACEFORMAT_R8G8B8_SNORM 0x194
|
||||
#define BRW_SURFACEFORMAT_R8G8B8_SSCALED 0x195
|
||||
#define BRW_SURFACEFORMAT_R8G8B8_USCALED 0x196
|
||||
#define BRW_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197
|
||||
#define BRW_SURFACEFORMAT_R64G64B64_FLOAT 0x198
|
||||
#define BRW_SURFACEFORMAT_BC4_SNORM 0x199
|
||||
#define BRW_SURFACEFORMAT_BC5_SNORM 0x19A
|
||||
#define BRW_SURFACEFORMAT_R16G16B16_UNORM 0x19C
|
||||
#define BRW_SURFACEFORMAT_R16G16B16_SNORM 0x19D
|
||||
#define BRW_SURFACEFORMAT_R16G16B16_SSCALED 0x19E
|
||||
#define BRW_SURFACEFORMAT_R16G16B16_USCALED 0x19F
|
||||
|
||||
#define BRW_SURFACERETURNFORMAT_FLOAT32 0
|
||||
#define BRW_SURFACERETURNFORMAT_S1 1
|
||||
|
||||
#define BRW_SURFACE_1D 0
|
||||
#define BRW_SURFACE_2D 1
|
||||
#define BRW_SURFACE_3D 2
|
||||
#define BRW_SURFACE_CUBE 3
|
||||
#define BRW_SURFACE_BUFFER 4
|
||||
#define BRW_SURFACE_NULL 7
|
||||
|
||||
#define BRW_BORDER_COLOR_MODE_DEFAULT 0
|
||||
#define BRW_BORDER_COLOR_MODE_LEGACY 1
|
||||
|
||||
#define HSW_SCS_ZERO 0
|
||||
#define HSW_SCS_ONE 1
|
||||
#define HSW_SCS_RED 4
|
||||
#define HSW_SCS_GREEN 5
|
||||
#define HSW_SCS_BLUE 6
|
||||
#define HSW_SCS_ALPHA 7
|
||||
|
||||
#define BRW_TEXCOORDMODE_WRAP 0
|
||||
#define BRW_TEXCOORDMODE_MIRROR 1
|
||||
#define BRW_TEXCOORDMODE_CLAMP 2
|
||||
#define BRW_TEXCOORDMODE_CUBE 3
|
||||
#define BRW_TEXCOORDMODE_CLAMP_BORDER 4
|
||||
#define BRW_TEXCOORDMODE_MIRROR_ONCE 5
|
||||
|
||||
#define BRW_THREAD_PRIORITY_NORMAL 0
|
||||
#define BRW_THREAD_PRIORITY_HIGH 1
|
||||
|
||||
#define BRW_TILEWALK_XMAJOR 0
|
||||
#define BRW_TILEWALK_YMAJOR 1
|
||||
|
||||
#define BRW_VERTEX_SUBPIXEL_PRECISION_8BITS 0
|
||||
#define BRW_VERTEX_SUBPIXEL_PRECISION_4BITS 1
|
||||
|
||||
#define BRW_VERTEXBUFFER_ACCESS_VERTEXDATA 0
|
||||
#define BRW_VERTEXBUFFER_ACCESS_INSTANCEDATA 1
|
||||
|
||||
#define BRW_VFCOMPONENT_NOSTORE 0
|
||||
#define BRW_VFCOMPONENT_STORE_SRC 1
|
||||
#define BRW_VFCOMPONENT_STORE_0 2
|
||||
#define BRW_VFCOMPONENT_STORE_1_FLT 3
|
||||
#define BRW_VFCOMPONENT_STORE_1_INT 4
|
||||
#define BRW_VFCOMPONENT_STORE_VID 5
|
||||
#define BRW_VFCOMPONENT_STORE_IID 6
|
||||
#define BRW_VFCOMPONENT_STORE_PID 7
|
||||
|
||||
|
||||
|
||||
/* Execution Unit (EU) defines
|
||||
*/
|
||||
|
||||
#define BRW_ALIGN_1 0
|
||||
#define BRW_ALIGN_16 1
|
||||
|
||||
#define BRW_ADDRESS_DIRECT 0
|
||||
#define BRW_ADDRESS_REGISTER_INDIRECT_REGISTER 1
|
||||
|
||||
#define BRW_CHANNEL_X 0
|
||||
#define BRW_CHANNEL_Y 1
|
||||
#define BRW_CHANNEL_Z 2
|
||||
#define BRW_CHANNEL_W 3
|
||||
|
||||
#define BRW_COMPRESSION_NONE 0
|
||||
#define BRW_COMPRESSION_2NDHALF 1
|
||||
#define BRW_COMPRESSION_COMPRESSED 2
|
||||
|
||||
#define BRW_CONDITIONAL_NONE 0
|
||||
#define BRW_CONDITIONAL_Z 1
|
||||
#define BRW_CONDITIONAL_NZ 2
|
||||
#define BRW_CONDITIONAL_EQ 1 /* Z */
|
||||
#define BRW_CONDITIONAL_NEQ 2 /* NZ */
|
||||
#define BRW_CONDITIONAL_G 3
|
||||
#define BRW_CONDITIONAL_GE 4
|
||||
#define BRW_CONDITIONAL_L 5
|
||||
#define BRW_CONDITIONAL_LE 6
|
||||
#define BRW_CONDITIONAL_C 7
|
||||
#define BRW_CONDITIONAL_O 8
|
||||
|
||||
#define BRW_DEBUG_NONE 0
|
||||
#define BRW_DEBUG_BREAKPOINT 1
|
||||
|
||||
#define BRW_DEPENDENCY_NORMAL 0
|
||||
#define BRW_DEPENDENCY_NOTCLEARED 1
|
||||
#define BRW_DEPENDENCY_NOTCHECKED 2
|
||||
#define BRW_DEPENDENCY_DISABLE 3
|
||||
|
||||
#define BRW_EXECUTE_1 0
|
||||
#define BRW_EXECUTE_2 1
|
||||
#define BRW_EXECUTE_4 2
|
||||
#define BRW_EXECUTE_8 3
|
||||
#define BRW_EXECUTE_16 4
|
||||
#define BRW_EXECUTE_32 5
|
||||
|
||||
#define BRW_HORIZONTAL_STRIDE_0 0
|
||||
#define BRW_HORIZONTAL_STRIDE_1 1
|
||||
#define BRW_HORIZONTAL_STRIDE_2 2
|
||||
#define BRW_HORIZONTAL_STRIDE_4 3
|
||||
|
||||
#define BRW_INSTRUCTION_NORMAL 0
|
||||
#define BRW_INSTRUCTION_SATURATE 1
|
||||
|
||||
#define BRW_MASK_ENABLE 0
|
||||
#define BRW_MASK_DISABLE 1
|
||||
|
||||
#define BRW_OPCODE_MOV 1
|
||||
#define BRW_OPCODE_SEL 2
|
||||
#define BRW_OPCODE_NOT 4
|
||||
#define BRW_OPCODE_AND 5
|
||||
#define BRW_OPCODE_OR 6
|
||||
#define BRW_OPCODE_XOR 7
|
||||
#define BRW_OPCODE_SHR 8
|
||||
#define BRW_OPCODE_SHL 9
|
||||
#define BRW_OPCODE_RSR 10
|
||||
#define BRW_OPCODE_RSL 11
|
||||
#define BRW_OPCODE_ASR 12
|
||||
#define BRW_OPCODE_CMP 16
|
||||
#define BRW_OPCODE_JMPI 32
|
||||
#define BRW_OPCODE_IF 34
|
||||
#define BRW_OPCODE_IFF 35
|
||||
#define BRW_OPCODE_ELSE 36
|
||||
#define BRW_OPCODE_ENDIF 37
|
||||
#define BRW_OPCODE_DO 38
|
||||
#define BRW_OPCODE_WHILE 39
|
||||
#define BRW_OPCODE_BREAK 40
|
||||
#define BRW_OPCODE_CONTINUE 41
|
||||
#define BRW_OPCODE_HALT 42
|
||||
#define BRW_OPCODE_MSAVE 44
|
||||
#define BRW_OPCODE_MRESTORE 45
|
||||
#define BRW_OPCODE_PUSH 46
|
||||
#define BRW_OPCODE_POP 47
|
||||
#define BRW_OPCODE_WAIT 48
|
||||
#define BRW_OPCODE_SEND 49
|
||||
#define BRW_OPCODE_ADD 64
|
||||
#define BRW_OPCODE_MUL 65
|
||||
#define BRW_OPCODE_AVG 66
|
||||
#define BRW_OPCODE_FRC 67
|
||||
#define BRW_OPCODE_RNDU 68
|
||||
#define BRW_OPCODE_RNDD 69
|
||||
#define BRW_OPCODE_RNDE 70
|
||||
#define BRW_OPCODE_RNDZ 71
|
||||
#define BRW_OPCODE_MAC 72
|
||||
#define BRW_OPCODE_MACH 73
|
||||
#define BRW_OPCODE_LZD 74
|
||||
#define BRW_OPCODE_SAD2 80
|
||||
#define BRW_OPCODE_SADA2 81
|
||||
#define BRW_OPCODE_DP4 84
|
||||
#define BRW_OPCODE_DPH 85
|
||||
#define BRW_OPCODE_DP3 86
|
||||
#define BRW_OPCODE_DP2 87
|
||||
#define BRW_OPCODE_DPA2 88
|
||||
#define BRW_OPCODE_LINE 89
|
||||
#define BRW_OPCODE_NOP 126
|
||||
|
||||
#define BRW_PREDICATE_NONE 0
|
||||
#define BRW_PREDICATE_NORMAL 1
|
||||
#define BRW_PREDICATE_ALIGN1_ANYV 2
|
||||
#define BRW_PREDICATE_ALIGN1_ALLV 3
|
||||
#define BRW_PREDICATE_ALIGN1_ANY2H 4
|
||||
#define BRW_PREDICATE_ALIGN1_ALL2H 5
|
||||
#define BRW_PREDICATE_ALIGN1_ANY4H 6
|
||||
#define BRW_PREDICATE_ALIGN1_ALL4H 7
|
||||
#define BRW_PREDICATE_ALIGN1_ANY8H 8
|
||||
#define BRW_PREDICATE_ALIGN1_ALL8H 9
|
||||
#define BRW_PREDICATE_ALIGN1_ANY16H 10
|
||||
#define BRW_PREDICATE_ALIGN1_ALL16H 11
|
||||
#define BRW_PREDICATE_ALIGN16_REPLICATE_X 2
|
||||
#define BRW_PREDICATE_ALIGN16_REPLICATE_Y 3
|
||||
#define BRW_PREDICATE_ALIGN16_REPLICATE_Z 4
|
||||
#define BRW_PREDICATE_ALIGN16_REPLICATE_W 5
|
||||
#define BRW_PREDICATE_ALIGN16_ANY4H 6
|
||||
#define BRW_PREDICATE_ALIGN16_ALL4H 7
|
||||
|
||||
#define BRW_ARCHITECTURE_REGISTER_FILE 0
|
||||
#define BRW_GENERAL_REGISTER_FILE 1
|
||||
#define BRW_MESSAGE_REGISTER_FILE 2
|
||||
#define BRW_IMMEDIATE_VALUE 3
|
||||
|
||||
#define BRW_REGISTER_TYPE_UD 0
|
||||
#define BRW_REGISTER_TYPE_D 1
|
||||
#define BRW_REGISTER_TYPE_UW 2
|
||||
#define BRW_REGISTER_TYPE_W 3
|
||||
#define BRW_REGISTER_TYPE_UB 4
|
||||
#define BRW_REGISTER_TYPE_B 5
|
||||
#define BRW_REGISTER_TYPE_VF 5 /* packed float vector, immediates only? */
|
||||
#define BRW_REGISTER_TYPE_HF 6
|
||||
#define BRW_REGISTER_TYPE_V 6 /* packed int vector, immediates only, uword dest only */
|
||||
#define BRW_REGISTER_TYPE_F 7
|
||||
|
||||
#define BRW_ARF_NULL 0x00
|
||||
#define BRW_ARF_ADDRESS 0x10
|
||||
#define BRW_ARF_ACCUMULATOR 0x20
|
||||
#define BRW_ARF_FLAG 0x30
|
||||
#define BRW_ARF_MASK 0x40
|
||||
#define BRW_ARF_MASK_STACK 0x50
|
||||
#define BRW_ARF_MASK_STACK_DEPTH 0x60
|
||||
#define BRW_ARF_STATE 0x70
|
||||
#define BRW_ARF_CONTROL 0x80
|
||||
#define BRW_ARF_NOTIFICATION_COUNT 0x90
|
||||
#define BRW_ARF_IP 0xA0
|
||||
|
||||
#define BRW_AMASK 0
|
||||
#define BRW_IMASK 1
|
||||
#define BRW_LMASK 2
|
||||
#define BRW_CMASK 3
|
||||
|
||||
|
||||
|
||||
#define BRW_THREAD_NORMAL 0
|
||||
#define BRW_THREAD_ATOMIC 1
|
||||
#define BRW_THREAD_SWITCH 2
|
||||
|
||||
#define BRW_VERTICAL_STRIDE_0 0
|
||||
#define BRW_VERTICAL_STRIDE_1 1
|
||||
#define BRW_VERTICAL_STRIDE_2 2
|
||||
#define BRW_VERTICAL_STRIDE_4 3
|
||||
#define BRW_VERTICAL_STRIDE_8 4
|
||||
#define BRW_VERTICAL_STRIDE_16 5
|
||||
#define BRW_VERTICAL_STRIDE_32 6
|
||||
#define BRW_VERTICAL_STRIDE_64 7
|
||||
#define BRW_VERTICAL_STRIDE_128 8
|
||||
#define BRW_VERTICAL_STRIDE_256 9
|
||||
#define BRW_VERTICAL_STRIDE_ONE_DIMENSIONAL 0xF
|
||||
|
||||
#define BRW_WIDTH_1 0
|
||||
#define BRW_WIDTH_2 1
|
||||
#define BRW_WIDTH_4 2
|
||||
#define BRW_WIDTH_8 3
|
||||
#define BRW_WIDTH_16 4
|
||||
|
||||
#define BRW_STATELESS_BUFFER_BOUNDARY_1K 0
|
||||
#define BRW_STATELESS_BUFFER_BOUNDARY_2K 1
|
||||
#define BRW_STATELESS_BUFFER_BOUNDARY_4K 2
|
||||
#define BRW_STATELESS_BUFFER_BOUNDARY_8K 3
|
||||
#define BRW_STATELESS_BUFFER_BOUNDARY_16K 4
|
||||
#define BRW_STATELESS_BUFFER_BOUNDARY_32K 5
|
||||
#define BRW_STATELESS_BUFFER_BOUNDARY_64K 6
|
||||
#define BRW_STATELESS_BUFFER_BOUNDARY_128K 7
|
||||
#define BRW_STATELESS_BUFFER_BOUNDARY_256K 8
|
||||
#define BRW_STATELESS_BUFFER_BOUNDARY_512K 9
|
||||
#define BRW_STATELESS_BUFFER_BOUNDARY_1M 10
|
||||
#define BRW_STATELESS_BUFFER_BOUNDARY_2M 11
|
||||
|
||||
#define BRW_POLYGON_FACING_FRONT 0
|
||||
#define BRW_POLYGON_FACING_BACK 1
|
||||
|
||||
#define BRW_MESSAGE_TARGET_NULL 0
|
||||
#define BRW_MESSAGE_TARGET_MATH 1
|
||||
#define BRW_MESSAGE_TARGET_SAMPLER 2
|
||||
#define BRW_MESSAGE_TARGET_GATEWAY 3
|
||||
#define BRW_MESSAGE_TARGET_DATAPORT_READ 4
|
||||
#define BRW_MESSAGE_TARGET_DATAPORT_WRITE 5
|
||||
#define BRW_MESSAGE_TARGET_URB 6
|
||||
#define BRW_MESSAGE_TARGET_THREAD_SPAWNER 7
|
||||
|
||||
#define BRW_SAMPLER_RETURN_FORMAT_FLOAT32 0
|
||||
#define BRW_SAMPLER_RETURN_FORMAT_UINT32 2
|
||||
#define BRW_SAMPLER_RETURN_FORMAT_SINT32 3
|
||||
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE 0
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE 0
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS 0
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD8_KILLPIX 1
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD 1
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_LOD 1
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_GRADIENTS 2
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_GRADIENTS 2
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_COMPARE 0
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE 2
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD4X2_RESINFO 2
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD8_RESINFO 2
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD16_RESINFO 2
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD4X2_LD 3
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD8_LD 3
|
||||
#define BRW_SAMPLER_MESSAGE_SIMD16_LD 3
|
||||
|
||||
#define BRW_DATAPORT_OWORD_BLOCK_1_OWORDLOW 0
|
||||
#define BRW_DATAPORT_OWORD_BLOCK_1_OWORDHIGH 1
|
||||
#define BRW_DATAPORT_OWORD_BLOCK_2_OWORDS 2
|
||||
#define BRW_DATAPORT_OWORD_BLOCK_4_OWORDS 3
|
||||
#define BRW_DATAPORT_OWORD_BLOCK_8_OWORDS 4
|
||||
|
||||
#define BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD 0
|
||||
#define BRW_DATAPORT_OWORD_DUAL_BLOCK_4OWORDS 2
|
||||
|
||||
#define BRW_DATAPORT_DWORD_SCATTERED_BLOCK_8DWORDS 2
|
||||
#define BRW_DATAPORT_DWORD_SCATTERED_BLOCK_16DWORDS 3
|
||||
|
||||
#define BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ 0
|
||||
#define BRW_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 1
|
||||
#define BRW_DATAPORT_READ_MESSAGE_DWORD_BLOCK_READ 2
|
||||
#define BRW_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 3
|
||||
|
||||
#define BRW_DATAPORT_READ_TARGET_DATA_CACHE 0
|
||||
#define BRW_DATAPORT_READ_TARGET_RENDER_CACHE 1
|
||||
#define BRW_DATAPORT_READ_TARGET_SAMPLER_CACHE 2
|
||||
|
||||
#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE 0
|
||||
#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE_REPLICATED 1
|
||||
#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN01 2
|
||||
#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN23 3
|
||||
#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01 4
|
||||
|
||||
#define BRW_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 0
|
||||
#define BRW_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 1
|
||||
#define BRW_DATAPORT_WRITE_MESSAGE_DWORD_BLOCK_WRITE 2
|
||||
#define BRW_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE 3
|
||||
#define BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 4
|
||||
#define BRW_DATAPORT_WRITE_MESSAGE_STREAMED_VERTEX_BUFFER_WRITE 5
|
||||
#define BRW_DATAPORT_WRITE_MESSAGE_FLUSH_RENDER_CACHE 7
|
||||
|
||||
#define BRW_MATH_FUNCTION_INV 1
|
||||
#define BRW_MATH_FUNCTION_LOG 2
|
||||
#define BRW_MATH_FUNCTION_EXP 3
|
||||
#define BRW_MATH_FUNCTION_SQRT 4
|
||||
#define BRW_MATH_FUNCTION_RSQ 5
|
||||
#define BRW_MATH_FUNCTION_SIN 6 /* was 7 */
|
||||
#define BRW_MATH_FUNCTION_COS 7 /* was 8 */
|
||||
#define BRW_MATH_FUNCTION_SINCOS 8 /* was 6 */
|
||||
#define BRW_MATH_FUNCTION_TAN 9
|
||||
#define BRW_MATH_FUNCTION_POW 10
|
||||
#define BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER 11
|
||||
#define BRW_MATH_FUNCTION_INT_DIV_QUOTIENT 12
|
||||
#define BRW_MATH_FUNCTION_INT_DIV_REMAINDER 13
|
||||
|
||||
#define BRW_MATH_INTEGER_UNSIGNED 0
|
||||
#define BRW_MATH_INTEGER_SIGNED 1
|
||||
|
||||
#define BRW_MATH_PRECISION_FULL 0
|
||||
#define BRW_MATH_PRECISION_PARTIAL 1
|
||||
|
||||
#define BRW_MATH_SATURATE_NONE 0
|
||||
#define BRW_MATH_SATURATE_SATURATE 1
|
||||
|
||||
#define BRW_MATH_DATA_VECTOR 0
|
||||
#define BRW_MATH_DATA_SCALAR 1
|
||||
|
||||
#define BRW_URB_OPCODE_WRITE 0
|
||||
|
||||
#define BRW_URB_SWIZZLE_NONE 0
|
||||
#define BRW_URB_SWIZZLE_INTERLEAVE 1
|
||||
#define BRW_URB_SWIZZLE_TRANSPOSE 2
|
||||
|
||||
#define BRW_SCRATCH_SPACE_SIZE_1K 0
|
||||
#define BRW_SCRATCH_SPACE_SIZE_2K 1
|
||||
#define BRW_SCRATCH_SPACE_SIZE_4K 2
|
||||
#define BRW_SCRATCH_SPACE_SIZE_8K 3
|
||||
#define BRW_SCRATCH_SPACE_SIZE_16K 4
|
||||
#define BRW_SCRATCH_SPACE_SIZE_32K 5
|
||||
#define BRW_SCRATCH_SPACE_SIZE_64K 6
|
||||
#define BRW_SCRATCH_SPACE_SIZE_128K 7
|
||||
#define BRW_SCRATCH_SPACE_SIZE_256K 8
|
||||
#define BRW_SCRATCH_SPACE_SIZE_512K 9
|
||||
#define BRW_SCRATCH_SPACE_SIZE_1M 10
|
||||
#define BRW_SCRATCH_SPACE_SIZE_2M 11
|
||||
|
||||
|
||||
|
||||
|
||||
#define CMD_URB_FENCE 0x6000
|
||||
#define CMD_CONST_BUFFER_STATE 0x6001
|
||||
#define CMD_CONST_BUFFER 0x6002
|
||||
|
||||
#define CMD_STATE_BASE_ADDRESS 0x6101
|
||||
#define CMD_STATE_INSN_POINTER 0x6102
|
||||
#define CMD_PIPELINE_SELECT 0x6104
|
||||
|
||||
#define CMD_PIPELINED_STATE_POINTERS 0x7800
|
||||
#define CMD_BINDING_TABLE_PTRS 0x7801
|
||||
#define CMD_VERTEX_BUFFER 0x7808
|
||||
#define CMD_VERTEX_ELEMENT 0x7809
|
||||
#define CMD_INDEX_BUFFER 0x780a
|
||||
#define CMD_VF_STATISTICS 0x780b
|
||||
|
||||
#define CMD_DRAW_RECT 0x7900
|
||||
#define CMD_BLEND_CONSTANT_COLOR 0x7901
|
||||
#define CMD_CHROMA_KEY 0x7904
|
||||
#define CMD_DEPTH_BUFFER 0x7905
|
||||
#define CMD_POLY_STIPPLE_OFFSET 0x7906
|
||||
#define CMD_POLY_STIPPLE_PATTERN 0x7907
|
||||
#define CMD_LINE_STIPPLE_PATTERN 0x7908
|
||||
#define CMD_GLOBAL_DEPTH_OFFSET_CLAMP 0x7908
|
||||
|
||||
#define CMD_PIPE_CONTROL 0x7a00
|
||||
|
||||
#define CMD_3D_PRIM 0x7b00
|
||||
|
||||
#define CMD_MI_FLUSH 0x0200
|
||||
|
||||
|
||||
/* Various values from the R0 vertex header:
|
||||
*/
|
||||
#define R02_PRIM_END 0x1
|
||||
#define R02_PRIM_START 0x2
|
||||
|
||||
/* media pipeline */
|
||||
|
||||
#define BRW_VFE_MODE_GENERIC 0x0
|
||||
#define BRW_VFE_MODE_VLD_MPEG2 0x1
|
||||
#define BRW_VFE_MODE_IS 0x2
|
||||
#define BRW_VFE_MODE_AVC_MC 0x4
|
||||
#define BRW_VFE_MODE_AVC_IT 0x7
|
||||
#define BRW_VFE_MODE_VC1_IT 0xB
|
||||
|
||||
#define BRW_VFE_DEBUG_COUNTER_FREE 0
|
||||
#define BRW_VFE_DEBUG_COUNTER_FROZEN 1
|
||||
#define BRW_VFE_DEBUG_COUNTER_ONCE 2
|
||||
#define BRW_VFE_DEBUG_COUNTER_ALWAYS 3
|
||||
|
||||
/* VLD_STATE */
|
||||
#define BRW_MPEG_TOP_FIELD 1
|
||||
#define BRW_MPEG_BOTTOM_FIELD 2
|
||||
#define BRW_MPEG_FRAME 3
|
||||
#define BRW_MPEG_QSCALE_LINEAR 0
|
||||
#define BRW_MPEG_QSCALE_NONLINEAR 1
|
||||
#define BRW_MPEG_ZIGZAG_SCAN 0
|
||||
#define BRW_MPEG_ALTER_VERTICAL_SCAN 1
|
||||
#define BRW_MPEG_I_PICTURE 1
|
||||
#define BRW_MPEG_P_PICTURE 2
|
||||
#define BRW_MPEG_B_PICTURE 3
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,805 @@
|
|||
/**************************************************************************
|
||||
*
|
||||
* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
|
||||
* All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the
|
||||
* "Software"), to deal in the Software without restriction, including
|
||||
* without limitation the rights to use, copy, modify, merge, publish,
|
||||
* distribute, sub license, and/or sell copies of the Software, and to
|
||||
* permit persons to whom the Software is furnished to do so, subject to
|
||||
* the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the
|
||||
* next paragraph) shall be included in all copies or substantial portions
|
||||
* of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
|
||||
* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
|
||||
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
||||
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
||||
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
**************************************************************************/
|
||||
|
||||
#ifndef _I830_REG_H_
|
||||
#define _I830_REG_H_
|
||||
|
||||
#define I830_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value)
|
||||
|
||||
/* Flush */
|
||||
#define MI_FLUSH (0x04<<23)
|
||||
#define MI_FLUSH_DW (0x26<<23)
|
||||
|
||||
#define MI_WRITE_DIRTY_STATE (1<<4)
|
||||
#define MI_END_SCENE (1<<3)
|
||||
#define MI_GLOBAL_SNAPSHOT_COUNT_RESET (1<<3)
|
||||
#define MI_INHIBIT_RENDER_CACHE_FLUSH (1<<2)
|
||||
#define MI_STATE_INSTRUCTION_CACHE_FLUSH (1<<1)
|
||||
#define MI_INVALIDATE_MAP_CACHE (1<<0)
|
||||
/* broadwater flush bits */
|
||||
#define BRW_MI_GLOBAL_SNAPSHOT_RESET (1 << 3)
|
||||
|
||||
#define MI_BATCH_BUFFER_END (0xA << 23)
|
||||
|
||||
/* Noop */
|
||||
#define MI_NOOP 0x00
|
||||
#define MI_NOOP_WRITE_ID (1<<22)
|
||||
#define MI_NOOP_ID_MASK (1<<22 - 1)
|
||||
|
||||
/* Wait for Events */
|
||||
#define MI_WAIT_FOR_EVENT (0x03<<23)
|
||||
#define MI_WAIT_FOR_PIPEB_SVBLANK (1<<18)
|
||||
#define MI_WAIT_FOR_PIPEA_SVBLANK (1<<17)
|
||||
#define MI_WAIT_FOR_OVERLAY_FLIP (1<<16)
|
||||
#define MI_WAIT_FOR_PIPEB_VBLANK (1<<7)
|
||||
#define MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW (1<<5)
|
||||
#define MI_WAIT_FOR_PIPEA_VBLANK (1<<3)
|
||||
#define MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW (1<<1)
|
||||
|
||||
/* Set the scan line for MI_WAIT_FOR_PIPE?_SCAN_LINE_WINDOW */
|
||||
#define MI_LOAD_SCAN_LINES_INCL (0x12<<23)
|
||||
#define MI_LOAD_SCAN_LINES_DISPLAY_PIPEA (0)
|
||||
#define MI_LOAD_SCAN_LINES_DISPLAY_PIPEB (0x1<<20)
|
||||
|
||||
/* BLT commands */
|
||||
#define COLOR_BLT_CMD ((2<<29)|(0x40<<22)|(0x3))
|
||||
#define COLOR_BLT_WRITE_ALPHA (1<<21)
|
||||
#define COLOR_BLT_WRITE_RGB (1<<20)
|
||||
|
||||
#define XY_COLOR_BLT_CMD ((2<<29)|(0x50<<22)|(0x4))
|
||||
#define XY_COLOR_BLT_WRITE_ALPHA (1<<21)
|
||||
#define XY_COLOR_BLT_WRITE_RGB (1<<20)
|
||||
#define XY_COLOR_BLT_TILED (1<<11)
|
||||
|
||||
#define XY_SETUP_CLIP_BLT_CMD ((2<<29)|(3<<22)|1)
|
||||
|
||||
#define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)|6)
|
||||
#define XY_SRC_COPY_BLT_WRITE_ALPHA (1<<21)
|
||||
#define XY_SRC_COPY_BLT_WRITE_RGB (1<<20)
|
||||
#define XY_SRC_COPY_BLT_SRC_TILED (1<<15)
|
||||
#define XY_SRC_COPY_BLT_DST_TILED (1<<11)
|
||||
|
||||
#define SRC_COPY_BLT_CMD ((2<<29)|(0x43<<22)|0x4)
|
||||
#define SRC_COPY_BLT_WRITE_ALPHA (1<<21)
|
||||
#define SRC_COPY_BLT_WRITE_RGB (1<<20)
|
||||
|
||||
#define XY_PAT_BLT_IMMEDIATE ((2<<29)|(0x72<<22))
|
||||
|
||||
#define XY_MONO_PAT_BLT_CMD ((0x2<<29)|(0x52<<22)|0x7)
|
||||
#define XY_MONO_PAT_VERT_SEED ((1<<10)|(1<<9)|(1<<8))
|
||||
#define XY_MONO_PAT_HORT_SEED ((1<<14)|(1<<13)|(1<<12))
|
||||
#define XY_MONO_PAT_BLT_WRITE_ALPHA (1<<21)
|
||||
#define XY_MONO_PAT_BLT_WRITE_RGB (1<<20)
|
||||
|
||||
#define XY_MONO_SRC_BLT_CMD ((0x2<<29)|(0x54<<22)|(0x6))
|
||||
#define XY_MONO_SRC_BLT_WRITE_ALPHA (1<<21)
|
||||
#define XY_MONO_SRC_BLT_WRITE_RGB (1<<20)
|
||||
|
||||
#define CMD_3D (0x3<<29)
|
||||
|
||||
#define PRIM3D_INLINE (CMD_3D | (0x1f<<24))
|
||||
#define PRIM3D_TRILIST (0x0<<18)
|
||||
#define PRIM3D_TRISTRIP (0x1<<18)
|
||||
#define PRIM3D_TRISTRIP_RVRSE (0x2<<18)
|
||||
#define PRIM3D_TRIFAN (0x3<<18)
|
||||
#define PRIM3D_POLY (0x4<<18)
|
||||
#define PRIM3D_LINELIST (0x5<<18)
|
||||
#define PRIM3D_LINESTRIP (0x6<<18)
|
||||
#define PRIM3D_RECTLIST (0x7<<18)
|
||||
#define PRIM3D_POINTLIST (0x8<<18)
|
||||
#define PRIM3D_DIB (0x9<<18)
|
||||
#define PRIM3D_CLEAR_RECT (0xa<<18)
|
||||
#define PRIM3D_ZONE_INIT (0xd<<18)
|
||||
#define PRIM3D_MASK (0x1f<<18)
|
||||
|
||||
#define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
|
||||
#define AA_LINE_ECAAR_WIDTH_ENABLE (1<<16)
|
||||
#define AA_LINE_ECAAR_WIDTH_0_5 0
|
||||
#define AA_LINE_ECAAR_WIDTH_1_0 (1<<14)
|
||||
#define AA_LINE_ECAAR_WIDTH_2_0 (2<<14)
|
||||
#define AA_LINE_ECAAR_WIDTH_4_0 (3<<14)
|
||||
#define AA_LINE_REGION_WIDTH_ENABLE (1<<8)
|
||||
#define AA_LINE_REGION_WIDTH_0_5 0
|
||||
#define AA_LINE_REGION_WIDTH_1_0 (1<<6)
|
||||
#define AA_LINE_REGION_WIDTH_2_0 (2<<6)
|
||||
#define AA_LINE_REGION_WIDTH_4_0 (3<<6)
|
||||
#define AA_LINE_ENABLE ((1<<1) | 1)
|
||||
#define AA_LINE_DISABLE (1<<1)
|
||||
|
||||
#define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
|
||||
/* Dword 1 */
|
||||
#define BUF_3D_ID_COLOR_BACK (0x3<<24)
|
||||
#define BUF_3D_ID_DEPTH (0x7<<24)
|
||||
#define BUF_3D_USE_FENCE (1<<23)
|
||||
#define BUF_3D_TILED_SURFACE (1<<22)
|
||||
#define BUF_3D_TILE_WALK_X 0
|
||||
#define BUF_3D_TILE_WALK_Y (1<<21)
|
||||
#define BUF_3D_PITCH(x) (((x)/4)<<2)
|
||||
/* Dword 2 */
|
||||
#define BUF_3D_ADDR(x) ((x) & ~0x3)
|
||||
|
||||
#define _3DSTATE_COLOR_FACTOR_CMD (CMD_3D | (0x1d<<24) | (0x1<<16))
|
||||
|
||||
#define _3DSTATE_COLOR_FACTOR_N_CMD(stage) (CMD_3D | (0x1d<<24) | \
|
||||
((0x90+(stage))<<16))
|
||||
|
||||
#define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
|
||||
|
||||
#define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16))
|
||||
|
||||
#define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16))
|
||||
|
||||
#define _3DSTATE_DFLT_Z_CMD (CMD_3D | (0x1d<<24) | (0x98<<16))
|
||||
|
||||
#define _3DSTATE_DST_BUF_VARS_CMD (CMD_3D | (0x1d<<24) | (0x85<<16))
|
||||
/* Dword 1 */
|
||||
#define DSTORG_HORT_BIAS(x) ((x)<<20)
|
||||
#define DSTORG_VERT_BIAS(x) ((x)<<16)
|
||||
#define COLOR_4_2_2_CHNL_WRT_ALL 0
|
||||
#define COLOR_4_2_2_CHNL_WRT_Y (1<<12)
|
||||
#define COLOR_4_2_2_CHNL_WRT_CR (2<<12)
|
||||
#define COLOR_4_2_2_CHNL_WRT_CB (3<<12)
|
||||
#define COLOR_4_2_2_CHNL_WRT_CRCB (4<<12)
|
||||
#define COLR_BUF_8BIT 0
|
||||
#define COLR_BUF_RGB555 (1<<8)
|
||||
#define COLR_BUF_RGB565 (2<<8)
|
||||
#define COLR_BUF_ARGB8888 (3<<8)
|
||||
#define COLR_BUF_ARGB4444 (8<<8)
|
||||
#define COLR_BUF_ARGB1555 (9<<8)
|
||||
#define DEPTH_IS_Z 0
|
||||
#define DEPTH_IS_W (1<<6)
|
||||
#define DEPTH_FRMT_16_FIXED 0
|
||||
#define DEPTH_FRMT_16_FLOAT (1<<2)
|
||||
#define DEPTH_FRMT_24_FIXED_8_OTHER (2<<2)
|
||||
#define DEPTH_FRMT_24_FLOAT_8_OTHER (3<<2)
|
||||
#define VERT_LINE_STRIDE_1 (1<<1)
|
||||
#define VERT_LINE_STRIDE_0 0
|
||||
#define VERT_LINE_STRIDE_OFS_1 1
|
||||
#define VERT_LINE_STRIDE_OFS_0 0
|
||||
|
||||
#define _3DSTATE_DRAW_RECT_CMD (CMD_3D|(0x1d<<24)|(0x80<<16)|3)
|
||||
/* Dword 1 */
|
||||
#define DRAW_RECT_DIS_DEPTH_OFS (1<<30)
|
||||
#define DRAW_DITHER_OFS_X(x) ((x)<<26)
|
||||
#define DRAW_DITHER_OFS_Y(x) ((x)<<24)
|
||||
/* Dword 2 */
|
||||
#define DRAW_YMIN(x) ((x)<<16)
|
||||
#define DRAW_XMIN(x) (x)
|
||||
/* Dword 3 */
|
||||
#define DRAW_YMAX(x) ((x)<<16)
|
||||
#define DRAW_XMAX(x) (x)
|
||||
/* Dword 4 */
|
||||
#define DRAW_YORG(x) ((x)<<16)
|
||||
#define DRAW_XORG(x) (x)
|
||||
|
||||
#define _3DSTATE_ENABLES_1_CMD (CMD_3D|(0x3<<24))
|
||||
#define ENABLE_LOGIC_OP_MASK ((1<<23)|(1<<22))
|
||||
#define ENABLE_LOGIC_OP ((1<<23)|(1<<22))
|
||||
#define DISABLE_LOGIC_OP (1<<23)
|
||||
#define ENABLE_STENCIL_TEST ((1<<21)|(1<<20))
|
||||
#define DISABLE_STENCIL_TEST (1<<21)
|
||||
#define ENABLE_DEPTH_BIAS ((1<<11)|(1<<10))
|
||||
#define DISABLE_DEPTH_BIAS (1<<11)
|
||||
#define ENABLE_SPEC_ADD_MASK ((1<<9)|(1<<8))
|
||||
#define ENABLE_SPEC_ADD ((1<<9)|(1<<8))
|
||||
#define DISABLE_SPEC_ADD (1<<9)
|
||||
#define ENABLE_DIS_FOG_MASK ((1<<7)|(1<<6))
|
||||
#define ENABLE_FOG ((1<<7)|(1<<6))
|
||||
#define DISABLE_FOG (1<<7)
|
||||
#define ENABLE_DIS_ALPHA_TEST_MASK ((1<<5)|(1<<4))
|
||||
#define ENABLE_ALPHA_TEST ((1<<5)|(1<<4))
|
||||
#define DISABLE_ALPHA_TEST (1<<5)
|
||||
#define ENABLE_DIS_CBLEND_MASK ((1<<3)|(1<<2))
|
||||
#define ENABLE_COLOR_BLEND ((1<<3)|(1<<2))
|
||||
#define DISABLE_COLOR_BLEND (1<<3)
|
||||
#define ENABLE_DIS_DEPTH_TEST_MASK ((1<<1)|1)
|
||||
#define ENABLE_DEPTH_TEST ((1<<1)|1)
|
||||
#define DISABLE_DEPTH_TEST (1<<1)
|
||||
|
||||
/* _3DSTATE_ENABLES_2, p138 */
|
||||
#define _3DSTATE_ENABLES_2_CMD (CMD_3D|(0x4<<24))
|
||||
#define ENABLE_STENCIL_WRITE ((1<<21)|(1<<20))
|
||||
#define DISABLE_STENCIL_WRITE (1<<21)
|
||||
#define ENABLE_TEX_CACHE ((1<<17)|(1<<16))
|
||||
#define DISABLE_TEX_CACHE (1<<17)
|
||||
#define ENABLE_DITHER ((1<<9)|(1<<8))
|
||||
#define DISABLE_DITHER (1<<9)
|
||||
#define ENABLE_COLOR_MASK (1<<10)
|
||||
#define WRITEMASK_ALPHA (1<<7)
|
||||
#define WRITEMASK_ALPHA_SHIFT 7
|
||||
#define WRITEMASK_RED (1<<6)
|
||||
#define WRITEMASK_RED_SHIFT 6
|
||||
#define WRITEMASK_GREEN (1<<5)
|
||||
#define WRITEMASK_GREEN_SHIFT 5
|
||||
#define WRITEMASK_BLUE (1<<4)
|
||||
#define WRITEMASK_BLUE_SHIFT 4
|
||||
#define WRITEMASK_MASK ((1<<4)|(1<<5)|(1<<6)|(1<<7))
|
||||
#define ENABLE_COLOR_WRITE ((1<<3)|(1<<2))
|
||||
#define DISABLE_COLOR_WRITE (1<<3)
|
||||
#define ENABLE_DIS_DEPTH_WRITE_MASK 0x3
|
||||
#define ENABLE_DEPTH_WRITE ((1<<1)|1)
|
||||
#define DISABLE_DEPTH_WRITE (1<<1)
|
||||
|
||||
/* _3DSTATE_FOG_COLOR, p139 */
|
||||
#define _3DSTATE_FOG_COLOR_CMD (CMD_3D|(0x15<<24))
|
||||
#define FOG_COLOR_RED(x) ((x)<<16)
|
||||
#define FOG_COLOR_GREEN(x) ((x)<<8)
|
||||
#define FOG_COLOR_BLUE(x) (x)
|
||||
|
||||
/* _3DSTATE_FOG_MODE, p140 */
|
||||
#define _3DSTATE_FOG_MODE_CMD (CMD_3D|(0x1d<<24)|(0x89<<16)|2)
|
||||
/* Dword 1 */
|
||||
#define FOGFUNC_ENABLE (1<<31)
|
||||
#define FOGFUNC_VERTEX 0
|
||||
#define FOGFUNC_PIXEL_EXP (1<<28)
|
||||
#define FOGFUNC_PIXEL_EXP2 (2<<28)
|
||||
#define FOGFUNC_PIXEL_LINEAR (3<<28)
|
||||
#define FOGSRC_INDEX_Z (1<<27)
|
||||
#define FOGSRC_INDEX_W ((1<<27)|(1<<25))
|
||||
#define FOG_LINEAR_CONST (1<<24)
|
||||
#define FOG_CONST_1(x) ((x)<<4)
|
||||
#define ENABLE_FOG_DENSITY (1<<23)
|
||||
/* Dword 2 */
|
||||
#define FOG_CONST_2(x) (x)
|
||||
/* Dword 3 */
|
||||
#define FOG_DENSITY(x) (x)
|
||||
|
||||
/* _3DSTATE_INDEPENDENT_ALPHA_BLEND, p142 */
|
||||
#define _3DSTATE_INDPT_ALPHA_BLEND_CMD (CMD_3D|(0x0b<<24))
|
||||
#define ENABLE_INDPT_ALPHA_BLEND ((1<<23)|(1<<22))
|
||||
#define DISABLE_INDPT_ALPHA_BLEND (1<<23)
|
||||
#define ALPHA_BLENDFUNC_MASK 0x3f0000
|
||||
#define ENABLE_ALPHA_BLENDFUNC (1<<21)
|
||||
#define ABLENDFUNC_ADD 0
|
||||
#define ABLENDFUNC_SUB (1<<16)
|
||||
#define ABLENDFUNC_RVSE_SUB (2<<16)
|
||||
#define ABLENDFUNC_MIN (3<<16)
|
||||
#define ABLENDFUNC_MAX (4<<16)
|
||||
#define SRC_DST_ABLEND_MASK 0xfff
|
||||
#define ENABLE_SRC_ABLEND_FACTOR (1<<11)
|
||||
#define SRC_ABLEND_FACT(x) ((x)<<6)
|
||||
#define ENABLE_DST_ABLEND_FACTOR (1<<5)
|
||||
#define DST_ABLEND_FACT(x) (x)
|
||||
|
||||
#define BLENDFACTOR_ZERO 0x01
|
||||
#define BLENDFACTOR_ONE 0x02
|
||||
#define BLENDFACTOR_SRC_COLR 0x03
|
||||
#define BLENDFACTOR_INV_SRC_COLR 0x04
|
||||
#define BLENDFACTOR_SRC_ALPHA 0x05
|
||||
#define BLENDFACTOR_INV_SRC_ALPHA 0x06
|
||||
#define BLENDFACTOR_DST_ALPHA 0x07
|
||||
#define BLENDFACTOR_INV_DST_ALPHA 0x08
|
||||
#define BLENDFACTOR_DST_COLR 0x09
|
||||
#define BLENDFACTOR_INV_DST_COLR 0x0a
|
||||
#define BLENDFACTOR_SRC_ALPHA_SATURATE 0x0b
|
||||
#define BLENDFACTOR_CONST_COLOR 0x0c
|
||||
#define BLENDFACTOR_INV_CONST_COLOR 0x0d
|
||||
#define BLENDFACTOR_CONST_ALPHA 0x0e
|
||||
#define BLENDFACTOR_INV_CONST_ALPHA 0x0f
|
||||
#define BLENDFACTOR_MASK 0x0f
|
||||
|
||||
/* _3DSTATE_MAP_BLEND_ARG, p152 */
|
||||
#define _3DSTATE_MAP_BLEND_ARG_CMD(stage) (CMD_3D|(0x0e<<24)|((stage)<<20))
|
||||
|
||||
#define TEXPIPE_COLOR 0
|
||||
#define TEXPIPE_ALPHA (1<<18)
|
||||
#define TEXPIPE_KILL (2<<18)
|
||||
#define TEXBLEND_ARG0 0
|
||||
#define TEXBLEND_ARG1 (1<<15)
|
||||
#define TEXBLEND_ARG2 (2<<15)
|
||||
#define TEXBLEND_ARG3 (3<<15)
|
||||
#define TEXBLENDARG_MODIFY_PARMS (1<<6)
|
||||
#define TEXBLENDARG_REPLICATE_ALPHA (1<<5)
|
||||
#define TEXBLENDARG_INV_ARG (1<<4)
|
||||
#define TEXBLENDARG_ONE 0
|
||||
#define TEXBLENDARG_FACTOR 0x01
|
||||
#define TEXBLENDARG_ACCUM 0x02
|
||||
#define TEXBLENDARG_DIFFUSE 0x03
|
||||
#define TEXBLENDARG_SPEC 0x04
|
||||
#define TEXBLENDARG_CURRENT 0x05
|
||||
#define TEXBLENDARG_TEXEL0 0x06
|
||||
#define TEXBLENDARG_TEXEL1 0x07
|
||||
#define TEXBLENDARG_TEXEL2 0x08
|
||||
#define TEXBLENDARG_TEXEL3 0x09
|
||||
#define TEXBLENDARG_FACTOR_N 0x0e
|
||||
|
||||
/* _3DSTATE_MAP_BLEND_OP, p155 */
|
||||
#define _3DSTATE_MAP_BLEND_OP_CMD(stage) (CMD_3D|(0x0d<<24)|((stage)<<20))
|
||||
#if 0
|
||||
# define TEXPIPE_COLOR 0
|
||||
# define TEXPIPE_ALPHA (1<<18)
|
||||
# define TEXPIPE_KILL (2<<18)
|
||||
#endif
|
||||
#define ENABLE_TEXOUTPUT_WRT_SEL (1<<17)
|
||||
#define TEXOP_OUTPUT_CURRENT 0
|
||||
#define TEXOP_OUTPUT_ACCUM (1<<15)
|
||||
#define ENABLE_TEX_CNTRL_STAGE ((1<<12)|(1<<11))
|
||||
#define DISABLE_TEX_CNTRL_STAGE (1<<12)
|
||||
#define TEXOP_SCALE_SHIFT 9
|
||||
#define TEXOP_SCALE_1X (0 << TEXOP_SCALE_SHIFT)
|
||||
#define TEXOP_SCALE_2X (1 << TEXOP_SCALE_SHIFT)
|
||||
#define TEXOP_SCALE_4X (2 << TEXOP_SCALE_SHIFT)
|
||||
#define TEXOP_MODIFY_PARMS (1<<8)
|
||||
#define TEXOP_LAST_STAGE (1<<7)
|
||||
#define TEXBLENDOP_KILLPIXEL 0x02
|
||||
#define TEXBLENDOP_ARG1 0x01
|
||||
#define TEXBLENDOP_ARG2 0x02
|
||||
#define TEXBLENDOP_MODULATE 0x03
|
||||
#define TEXBLENDOP_ADD 0x06
|
||||
#define TEXBLENDOP_ADDSIGNED 0x07
|
||||
#define TEXBLENDOP_BLEND 0x08
|
||||
#define TEXBLENDOP_BLEND_AND_ADD 0x09
|
||||
#define TEXBLENDOP_SUBTRACT 0x0a
|
||||
#define TEXBLENDOP_DOT3 0x0b
|
||||
#define TEXBLENDOP_DOT4 0x0c
|
||||
#define TEXBLENDOP_MODULATE_AND_ADD 0x0d
|
||||
#define TEXBLENDOP_MODULATE_2X_AND_ADD 0x0e
|
||||
#define TEXBLENDOP_MODULATE_4X_AND_ADD 0x0f
|
||||
|
||||
/* _3DSTATE_MAP_BUMP_TABLE, p160 TODO */
|
||||
/* _3DSTATE_MAP_COLOR_CHROMA_KEY, p161 TODO */
|
||||
|
||||
#define _3DSTATE_MAP_COORD_TRANSFORM ((3<<29)|(0x1d<<24)|(0x8c<<16))
|
||||
#define DISABLE_TEX_TRANSFORM (1<<28)
|
||||
#define TEXTURE_SET(x) (x<<29)
|
||||
|
||||
#define _3DSTATE_VERTEX_TRANSFORM ((3<<29)|(0x1d<<24)|(0x8b<<16))
|
||||
#define DISABLE_VIEWPORT_TRANSFORM (1<<31)
|
||||
#define DISABLE_PERSPECTIVE_DIVIDE (1<<29)
|
||||
|
||||
/* _3DSTATE_MAP_COORD_SET_BINDINGS, p162 */
|
||||
#define _3DSTATE_MAP_COORD_SETBIND_CMD (CMD_3D|(0x1d<<24)|(0x02<<16))
|
||||
#define TEXBIND_MASK3 ((1<<15)|(1<<14)|(1<<13)|(1<<12))
|
||||
#define TEXBIND_MASK2 ((1<<11)|(1<<10)|(1<<9)|(1<<8))
|
||||
#define TEXBIND_MASK1 ((1<<7)|(1<<6)|(1<<5)|(1<<4))
|
||||
#define TEXBIND_MASK0 ((1<<3)|(1<<2)|(1<<1)|1)
|
||||
|
||||
#define TEXBIND_SET3(x) ((x)<<12)
|
||||
#define TEXBIND_SET2(x) ((x)<<8)
|
||||
#define TEXBIND_SET1(x) ((x)<<4)
|
||||
#define TEXBIND_SET0(x) (x)
|
||||
|
||||
#define TEXCOORDSRC_KEEP 0
|
||||
#define TEXCOORDSRC_DEFAULT 0x01
|
||||
#define TEXCOORDSRC_VTXSET_0 0x08
|
||||
#define TEXCOORDSRC_VTXSET_1 0x09
|
||||
#define TEXCOORDSRC_VTXSET_2 0x0a
|
||||
#define TEXCOORDSRC_VTXSET_3 0x0b
|
||||
#define TEXCOORDSRC_VTXSET_4 0x0c
|
||||
#define TEXCOORDSRC_VTXSET_5 0x0d
|
||||
#define TEXCOORDSRC_VTXSET_6 0x0e
|
||||
#define TEXCOORDSRC_VTXSET_7 0x0f
|
||||
|
||||
#define MAP_UNIT(unit) ((unit)<<16)
|
||||
#define MAP_UNIT_MASK (0x7<<16)
|
||||
|
||||
/* _3DSTATE_MAP_COORD_SETS, p164 */
|
||||
#define _3DSTATE_MAP_COORD_SET_CMD (CMD_3D|(0x1c<<24)|(0x01<<19))
|
||||
#define TEXCOORD_SET(n) ((n)<<16)
|
||||
#define ENABLE_TEXCOORD_PARAMS (1<<15)
|
||||
#define TEXCOORDS_ARE_NORMAL (1<<14)
|
||||
#define TEXCOORDS_ARE_IN_TEXELUNITS 0
|
||||
#define TEXCOORDTYPE_CARTESIAN 0
|
||||
#define TEXCOORDTYPE_HOMOGENEOUS (1<<11)
|
||||
#define TEXCOORDTYPE_VECTOR (2<<11)
|
||||
#define TEXCOORDTYPE_MASK (0x7<<11)
|
||||
#define ENABLE_ADDR_V_CNTL (1<<7)
|
||||
#define ENABLE_ADDR_U_CNTL (1<<3)
|
||||
#define TEXCOORD_ADDR_V_MODE(x) ((x)<<4)
|
||||
#define TEXCOORD_ADDR_U_MODE(x) (x)
|
||||
#define TEXCOORDMODE_WRAP 0
|
||||
#define TEXCOORDMODE_MIRROR 1
|
||||
#define TEXCOORDMODE_CLAMP 2
|
||||
#define TEXCOORDMODE_WRAP_SHORTEST 3
|
||||
#define TEXCOORDMODE_CLAMP_BORDER 4
|
||||
#define TEXCOORD_ADDR_V_MASK 0x70
|
||||
#define TEXCOORD_ADDR_U_MASK 0x7
|
||||
|
||||
/* _3DSTATE_MAP_CUBE, p168 TODO */
|
||||
#define _3DSTATE_MAP_CUBE (CMD_3D|(0x1c<<24)|(0x0a<<19))
|
||||
#define CUBE_NEGX_ENABLE (1<<5)
|
||||
#define CUBE_POSX_ENABLE (1<<4)
|
||||
#define CUBE_NEGY_ENABLE (1<<3)
|
||||
#define CUBE_POSY_ENABLE (1<<2)
|
||||
#define CUBE_NEGZ_ENABLE (1<<1)
|
||||
#define CUBE_POSZ_ENABLE (1<<0)
|
||||
|
||||
#define _3DSTATE_MAP_INFO_CMD (CMD_3D|(0x1d<<24)|(0x0<<16)|3)
|
||||
#define TEXMAP_INDEX(x) ((x)<<28)
|
||||
#define MAP_SURFACE_8BIT (1<<24)
|
||||
#define MAP_SURFACE_16BIT (2<<24)
|
||||
#define MAP_SURFACE_32BIT (3<<24)
|
||||
#define MAP_FORMAT_2D (0)
|
||||
#define MAP_FORMAT_3D_CUBE (1<<11)
|
||||
|
||||
/* _3DSTATE_MODES_1, p190 */
|
||||
#define _3DSTATE_MODES_1_CMD (CMD_3D|(0x08<<24))
|
||||
#define BLENDFUNC_MASK 0x3f0000
|
||||
#define ENABLE_COLR_BLND_FUNC (1<<21)
|
||||
#define BLENDFUNC_ADD 0
|
||||
#define BLENDFUNC_SUB (1<<16)
|
||||
#define BLENDFUNC_RVRSE_SUB (2<<16)
|
||||
#define BLENDFUNC_MIN (3<<16)
|
||||
#define BLENDFUNC_MAX (4<<16)
|
||||
#define SRC_DST_BLND_MASK 0xfff
|
||||
#define ENABLE_SRC_BLND_FACTOR (1<<11)
|
||||
#define ENABLE_DST_BLND_FACTOR (1<<5)
|
||||
#define SRC_BLND_FACT(x) ((x)<<6)
|
||||
#define DST_BLND_FACT(x) (x)
|
||||
|
||||
/* _3DSTATE_MODES_2, p192 */
|
||||
#define _3DSTATE_MODES_2_CMD (CMD_3D|(0x0f<<24))
|
||||
#define ENABLE_GLOBAL_DEPTH_BIAS (1<<22)
|
||||
#define GLOBAL_DEPTH_BIAS(x) ((x)<<14)
|
||||
#define ENABLE_ALPHA_TEST_FUNC (1<<13)
|
||||
#define ENABLE_ALPHA_REF_VALUE (1<<8)
|
||||
#define ALPHA_TEST_FUNC(x) ((x)<<9)
|
||||
#define ALPHA_REF_VALUE(x) (x)
|
||||
|
||||
#define ALPHA_TEST_REF_MASK 0x3fff
|
||||
|
||||
/* _3DSTATE_MODES_3, p193 */
|
||||
#define _3DSTATE_MODES_3_CMD (CMD_3D|(0x02<<24))
|
||||
#define DEPTH_TEST_FUNC_MASK 0x1f0000
|
||||
#define ENABLE_DEPTH_TEST_FUNC (1<<20)
|
||||
/* Uses COMPAREFUNC */
|
||||
#define DEPTH_TEST_FUNC(x) ((x)<<16)
|
||||
#define ENABLE_ALPHA_SHADE_MODE (1<<11)
|
||||
#define ENABLE_FOG_SHADE_MODE (1<<9)
|
||||
#define ENABLE_SPEC_SHADE_MODE (1<<7)
|
||||
#define ENABLE_COLOR_SHADE_MODE (1<<5)
|
||||
#define ALPHA_SHADE_MODE(x) ((x)<<10)
|
||||
#define FOG_SHADE_MODE(x) ((x)<<8)
|
||||
#define SPEC_SHADE_MODE(x) ((x)<<6)
|
||||
#define COLOR_SHADE_MODE(x) ((x)<<4)
|
||||
#define CULLMODE_MASK 0xf
|
||||
#define ENABLE_CULL_MODE (1<<3)
|
||||
#define CULLMODE_BOTH 0
|
||||
#define CULLMODE_NONE 1
|
||||
#define CULLMODE_CW 2
|
||||
#define CULLMODE_CCW 3
|
||||
|
||||
#define SHADE_MODE_LINEAR 0
|
||||
#define SHADE_MODE_FLAT 0x1
|
||||
|
||||
/* _3DSTATE_MODES_4, p195 */
|
||||
#define _3DSTATE_MODES_4_CMD (CMD_3D|(0x16<<24))
|
||||
#define ENABLE_LOGIC_OP_FUNC (1<<23)
|
||||
#define LOGIC_OP_FUNC(x) ((x)<<18)
|
||||
#define LOGICOP_MASK ((1<<18)|(1<<19)|(1<<20)|(1<<21))
|
||||
#define LOGICOP_CLEAR 0
|
||||
#define LOGICOP_NOR 0x1
|
||||
#define LOGICOP_AND_INV 0x2
|
||||
#define LOGICOP_COPY_INV 0x3
|
||||
#define LOGICOP_AND_RVRSE 0x4
|
||||
#define LOGICOP_INV 0x5
|
||||
#define LOGICOP_XOR 0x6
|
||||
#define LOGICOP_NAND 0x7
|
||||
#define LOGICOP_AND 0x8
|
||||
#define LOGICOP_EQUIV 0x9
|
||||
#define LOGICOP_NOOP 0xa
|
||||
#define LOGICOP_OR_INV 0xb
|
||||
#define LOGICOP_COPY 0xc
|
||||
#define LOGICOP_OR_RVRSE 0xd
|
||||
#define LOGICOP_OR 0xe
|
||||
#define LOGICOP_SET 0xf
|
||||
#define MODE4_ENABLE_STENCIL_TEST_MASK ((1<<17)|(0xff00))
|
||||
#define ENABLE_STENCIL_TEST_MASK (1<<17)
|
||||
#define STENCIL_TEST_MASK(x) ((x)<<8)
|
||||
#define MODE4_ENABLE_STENCIL_WRITE_MASK ((1<<16)|(0x00ff))
|
||||
#define ENABLE_STENCIL_WRITE_MASK (1<<16)
|
||||
#define STENCIL_WRITE_MASK(x) ((x)&0xff)
|
||||
|
||||
/* _3DSTATE_MODES_5, p196 */
|
||||
#define _3DSTATE_MODES_5_CMD (CMD_3D|(0x0c<<24))
|
||||
#define ENABLE_SPRITE_POINT_TEX (1<<23)
|
||||
#define SPRITE_POINT_TEX_ON (1<<22)
|
||||
#define SPRITE_POINT_TEX_OFF 0
|
||||
#define FLUSH_RENDER_CACHE (1<<18)
|
||||
#define FLUSH_TEXTURE_CACHE (1<<16)
|
||||
#define FIXED_LINE_WIDTH_MASK 0xfc00
|
||||
#define ENABLE_FIXED_LINE_WIDTH (1<<15)
|
||||
#define FIXED_LINE_WIDTH(x) ((x)<<10)
|
||||
#define FIXED_POINT_WIDTH_MASK 0x3ff
|
||||
#define ENABLE_FIXED_POINT_WIDTH (1<<9)
|
||||
#define FIXED_POINT_WIDTH(x) (x)
|
||||
|
||||
/* _3DSTATE_RASTERIZATION_RULES, p198 */
|
||||
#define _3DSTATE_RASTER_RULES_CMD (CMD_3D|(0x07<<24))
|
||||
#define ENABLE_POINT_RASTER_RULE (1<<15)
|
||||
#define OGL_POINT_RASTER_RULE (1<<13)
|
||||
#define ENABLE_LINE_STRIP_PROVOKE_VRTX (1<<8)
|
||||
#define ENABLE_TRI_FAN_PROVOKE_VRTX (1<<5)
|
||||
#define ENABLE_TRI_STRIP_PROVOKE_VRTX (1<<2)
|
||||
#define LINE_STRIP_PROVOKE_VRTX(x) ((x)<<6)
|
||||
#define TRI_FAN_PROVOKE_VRTX(x) ((x)<<3)
|
||||
#define TRI_STRIP_PROVOKE_VRTX(x) (x)
|
||||
|
||||
/* _3DSTATE_SCISSOR_ENABLE, p200 */
|
||||
#define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D|(0x1c<<24)|(0x10<<19))
|
||||
#define ENABLE_SCISSOR_RECT ((1<<1) | 1)
|
||||
#define DISABLE_SCISSOR_RECT (1<<1)
|
||||
|
||||
/* _3DSTATE_SCISSOR_RECTANGLE_0, p201 */
|
||||
#define _3DSTATE_SCISSOR_RECT_0_CMD (CMD_3D|(0x1d<<24)|(0x81<<16)|1)
|
||||
/* Dword 1 */
|
||||
#define SCISSOR_RECT_0_YMIN(x) ((x)<<16)
|
||||
#define SCISSOR_RECT_0_XMIN(x) (x)
|
||||
/* Dword 2 */
|
||||
#define SCISSOR_RECT_0_YMAX(x) ((x)<<16)
|
||||
#define SCISSOR_RECT_0_XMAX(x) (x)
|
||||
|
||||
/* _3DSTATE_STENCIL_TEST, p202 */
|
||||
#define _3DSTATE_STENCIL_TEST_CMD (CMD_3D|(0x09<<24))
|
||||
#define ENABLE_STENCIL_PARMS (1<<23)
|
||||
#define STENCIL_OPS_MASK (0xffc000)
|
||||
#define STENCIL_FAIL_OP(x) ((x)<<20)
|
||||
#define STENCIL_PASS_DEPTH_FAIL_OP(x) ((x)<<17)
|
||||
#define STENCIL_PASS_DEPTH_PASS_OP(x) ((x)<<14)
|
||||
|
||||
#define ENABLE_STENCIL_TEST_FUNC_MASK ((1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9))
|
||||
#define ENABLE_STENCIL_TEST_FUNC (1<<13)
|
||||
/* Uses COMPAREFUNC */
|
||||
#define STENCIL_TEST_FUNC(x) ((x)<<9)
|
||||
#define STENCIL_REF_VALUE_MASK ((1<<8)|0xff)
|
||||
#define ENABLE_STENCIL_REF_VALUE (1<<8)
|
||||
#define STENCIL_REF_VALUE(x) (x)
|
||||
|
||||
/* _3DSTATE_VERTEX_FORMAT, p204 */
|
||||
#define _3DSTATE_VFT0_CMD (CMD_3D|(0x05<<24))
|
||||
#define VFT0_POINT_WIDTH (1<<12)
|
||||
#define VFT0_TEX_COUNT_MASK (7<<8)
|
||||
#define VFT0_TEX_COUNT_SHIFT 8
|
||||
#define VFT0_TEX_COUNT(x) ((x)<<8)
|
||||
#define VFT0_SPEC (1<<7)
|
||||
#define VFT0_DIFFUSE (1<<6)
|
||||
#define VFT0_DEPTH_OFFSET (1<<5)
|
||||
#define VFT0_XYZ (1<<1)
|
||||
#define VFT0_XYZW (2<<1)
|
||||
#define VFT0_XY (3<<1)
|
||||
#define VFT0_XYW (4<<1)
|
||||
#define VFT0_XYZW_MASK (7<<1)
|
||||
|
||||
/* _3DSTATE_VERTEX_FORMAT_2, p206 */
|
||||
#define _3DSTATE_VERTEX_FORMAT_2_CMD (CMD_3D|(0x0a<<24))
|
||||
#define VFT1_TEX7_FMT(x) ((x)<<14)
|
||||
#define VFT1_TEX6_FMT(x) ((x)<<12)
|
||||
#define VFT1_TEX5_FMT(x) ((x)<<10)
|
||||
#define VFT1_TEX4_FMT(x) ((x)<<8)
|
||||
#define VFT1_TEX3_FMT(x) ((x)<<6)
|
||||
#define VFT1_TEX2_FMT(x) ((x)<<4)
|
||||
#define VFT1_TEX1_FMT(x) ((x)<<2)
|
||||
#define VFT1_TEX0_FMT(x) (x)
|
||||
#define VFT1_TEX0_MASK 3
|
||||
#define VFT1_TEX1_SHIFT 2
|
||||
#define TEXCOORDFMT_2D 0
|
||||
#define TEXCOORDFMT_3D 1
|
||||
#define TEXCOORDFMT_4D 2
|
||||
#define TEXCOORDFMT_1D 3
|
||||
|
||||
/*New stuff picked up along the way */
|
||||
|
||||
#define MLC_LOD_BIAS_MASK ((1<<7)-1)
|
||||
|
||||
/* _3DSTATE_VERTEX_TRANSFORM, p207 */
|
||||
#define _3DSTATE_VERTEX_TRANS_CMD (CMD_3D|(0x1d<<24)|(0x8b<<16)|0)
|
||||
#define _3DSTATE_VERTEX_TRANS_MTX_CMD (CMD_3D|(0x1d<<24)|(0x8b<<16)|6)
|
||||
/* Dword 1 */
|
||||
#define ENABLE_VIEWPORT_TRANSFORM ((1<<31)|(1<<30))
|
||||
#define DISABLE_VIEWPORT_TRANSFORM (1<<31)
|
||||
#define ENABLE_PERSP_DIVIDE ((1<<29)|(1<<28))
|
||||
#define DISABLE_PERSP_DIVIDE (1<<29)
|
||||
#define VRTX_TRANS_LOAD_MATRICES 0x7421
|
||||
#define VRTX_TRANS_NO_LOAD_MATRICES 0x0000
|
||||
/* Dword 2 -> 7 are matrix elements */
|
||||
|
||||
/* _3DSTATE_W_STATE, p209 */
|
||||
#define _3DSTATE_W_STATE_CMD (CMD_3D|(0x1d<<24)|(0x8d<<16)|1)
|
||||
/* Dword 1 */
|
||||
#define MAGIC_W_STATE_DWORD1 0x00000008
|
||||
/* Dword 2 */
|
||||
#define WFAR_VALUE(x) (x)
|
||||
|
||||
/* Stipple command, carried over from the i810, apparently:
|
||||
*/
|
||||
#define _3DSTATE_STIPPLE (CMD_3D|(0x1d<<24)|(0x83<<16))
|
||||
#define ST1_ENABLE (1<<16)
|
||||
#define ST1_MASK (0xffff)
|
||||
|
||||
#define _3DSTATE_LOAD_STATE_IMMEDIATE_1 (CMD_3D|(0x1d<<24)|(0x04<<16))
|
||||
#define I1_LOAD_S(n) (1<<((n)+4))
|
||||
#define S3_POINT_WIDTH_SHIFT 23
|
||||
#define S3_LINE_WIDTH_SHIFT 19
|
||||
#define S3_ALPHA_SHADE_MODE_SHIFT 18
|
||||
#define S3_FOG_SHADE_MODE_SHIFT 17
|
||||
#define S3_SPEC_SHADE_MODE_SHIFT 16
|
||||
#define S3_COLOR_SHADE_MODE_SHIFT 15
|
||||
#define S3_CULL_MODE_SHIFT 13
|
||||
#define S3_CULLMODE_BOTH (0)
|
||||
#define S3_CULLMODE_NONE (1<<13)
|
||||
#define S3_CULLMODE_CW (2<<13)
|
||||
#define S3_CULLMODE_CCW (3<<13)
|
||||
#define S3_POINT_WIDTH_PRESENT (1<<12)
|
||||
#define S3_SPEC_FOG_PRESENT (1<<11)
|
||||
#define S3_DIFFUSE_PRESENT (1<<10)
|
||||
#define S3_DEPTH_OFFSET_PRESENT (1<<9)
|
||||
#define S3_POSITION_SHIFT 6
|
||||
#define S3_VERTEXHAS_XYZ (1<<6)
|
||||
#define S3_VERTEXHAS_XYZW (2<<6)
|
||||
#define S3_VERTEXHAS_XY (3<<6)
|
||||
#define S3_VERTEXHAS_XYW (4<<6)
|
||||
#define S3_ENABLE_SPEC_ADD (1<<5)
|
||||
#define S3_ENABLE_FOG (1<<4)
|
||||
#define S3_ENABLE_LOCAL_DEPTH_BIAS (1<<3)
|
||||
#define S3_ENABLE_SPRITE_POINT (1<<1)
|
||||
#define S3_ENABLE_ANTIALIASING 1
|
||||
#define S8_ENABLE_ALPHA_TEST (1<<31)
|
||||
#define S8_ALPHA_TEST_FUNC_SHIFT 28
|
||||
#define S8_ALPHA_REFVALUE_SHIFT 20
|
||||
#define S8_ENABLE_DEPTH_TEST (1<<19)
|
||||
#define S8_DEPTH_TEST_FUNC_SHIFT 16
|
||||
#define S8_ENABLE_COLOR_BLEND (1<<15)
|
||||
#define S8_COLOR_BLEND_FUNC_SHIFT 12
|
||||
#define S8_BLENDFUNC_ADD (0)
|
||||
#define S8_BLENDFUNC_SUB (1<<12)
|
||||
#define S8_BLENDFUNC_RVRSE_SUB (2<<12)
|
||||
#define S8_BLENDFUNC_MIN (3<<12)
|
||||
#define S8_BLENDFUNC_MAX (4<<12)
|
||||
#define S8_SRC_BLEND_FACTOR_SHIFT 8
|
||||
#define S8_DST_BLEND_FACTOR_SHIFT 4
|
||||
#define S8_ENABLE_DEPTH_BUFFER_WRITE (1<<3)
|
||||
#define S8_ENABLE_COLOR_BUFFER_WRITE (1<<2)
|
||||
|
||||
#define _3DSTATE_LOAD_STATE_IMMEDIATE_2 (CMD_3D|(0x1d<<24)|(0x03<<16))
|
||||
#define LOAD_TEXTURE_MAP(x) (1<<((x)+11))
|
||||
#define LOAD_TEXTURE_BLEND_STAGE(x) (1<<((x)+7))
|
||||
#define LOAD_GLOBAL_COLOR_FACTOR (1<<6)
|
||||
|
||||
#define TM0S0_ADDRESS_MASK 0xfffffffc
|
||||
#define TM0S0_USE_FENCE (1<<1)
|
||||
|
||||
#define TM0S1_HEIGHT_SHIFT 21
|
||||
#define TM0S1_WIDTH_SHIFT 10
|
||||
#define TM0S1_PALETTE_SELECT (1<<9)
|
||||
#define TM0S1_MAPSURF_FORMAT_MASK (0x7 << 6)
|
||||
#define TM0S1_MAPSURF_FORMAT_SHIFT 6
|
||||
#define MAPSURF_8BIT_INDEXED (0<<6)
|
||||
#define MAPSURF_8BIT (1<<6)
|
||||
#define MAPSURF_16BIT (2<<6)
|
||||
#define MAPSURF_32BIT (3<<6)
|
||||
#define MAPSURF_411 (4<<6)
|
||||
#define MAPSURF_422 (5<<6)
|
||||
#define MAPSURF_COMPRESSED (6<<6)
|
||||
#define MAPSURF_4BIT_INDEXED (7<<6)
|
||||
#define TM0S1_MT_FORMAT_MASK (0x7 << 3)
|
||||
#define TM0S1_MT_FORMAT_SHIFT 3
|
||||
#define MT_4BIT_IDX_ARGB8888 (7<<3) /* SURFACE_4BIT_INDEXED */
|
||||
#define MT_8BIT_IDX_RGB565 (0<<3) /* SURFACE_8BIT_INDEXED */
|
||||
#define MT_8BIT_IDX_ARGB1555 (1<<3)
|
||||
#define MT_8BIT_IDX_ARGB4444 (2<<3)
|
||||
#define MT_8BIT_IDX_AY88 (3<<3)
|
||||
#define MT_8BIT_IDX_ABGR8888 (4<<3)
|
||||
#define MT_8BIT_IDX_BUMP_88DVDU (5<<3)
|
||||
#define MT_8BIT_IDX_BUMP_655LDVDU (6<<3)
|
||||
#define MT_8BIT_IDX_ARGB8888 (7<<3)
|
||||
#define MT_8BIT_I8 (0<<3) /* SURFACE_8BIT */
|
||||
#define MT_8BIT_L8 (1<<3)
|
||||
#define MT_8BIT_A8 (4<<3)
|
||||
#define MT_16BIT_RGB565 (0<<3) /* SURFACE_16BIT */
|
||||
#define MT_16BIT_ARGB1555 (1<<3)
|
||||
#define MT_16BIT_ARGB4444 (2<<3)
|
||||
#define MT_16BIT_AY88 (3<<3)
|
||||
#define MT_16BIT_DIB_ARGB1555_8888 (4<<3)
|
||||
#define MT_16BIT_BUMP_88DVDU (5<<3)
|
||||
#define MT_16BIT_BUMP_655LDVDU (6<<3)
|
||||
#define MT_16BIT_DIB_RGB565_8888 (7<<3)
|
||||
#define MT_32BIT_ARGB8888 (0<<3) /* SURFACE_32BIT */
|
||||
#define MT_32BIT_ABGR8888 (1<<3)
|
||||
#define MT_32BIT_XRGB8888 (2<<3)
|
||||
#define MT_32BIT_XBGR8888 (3<<3)
|
||||
#define MT_32BIT_BUMP_XLDVDU_8888 (6<<3)
|
||||
#define MT_32BIT_DIB_8888 (7<<3)
|
||||
#define MT_411_YUV411 (0<<3) /* SURFACE_411 */
|
||||
#define MT_422_YCRCB_SWAPY (0<<3) /* SURFACE_422 */
|
||||
#define MT_422_YCRCB_NORMAL (1<<3)
|
||||
#define MT_422_YCRCB_SWAPUV (2<<3)
|
||||
#define MT_422_YCRCB_SWAPUVY (3<<3)
|
||||
#define MT_COMPRESS_DXT1 (0<<3) /* SURFACE_COMPRESSED */
|
||||
#define MT_COMPRESS_DXT2_3 (1<<3)
|
||||
#define MT_COMPRESS_DXT4_5 (2<<3)
|
||||
#define MT_COMPRESS_FXT1 (3<<3)
|
||||
#define TM0S1_COLORSPACE_CONVERSION (1 << 2)
|
||||
#define TM0S1_TILED_SURFACE (1 << 1)
|
||||
#define TM0S1_TILE_WALK (1 << 0)
|
||||
|
||||
#define TM0S2_PITCH_SHIFT 21
|
||||
#define TM0S2_CUBE_FACE_ENA_SHIFT 15
|
||||
#define TM0S2_CUBE_FACE_ENA_MASK (1<<15)
|
||||
#define TM0S2_MAP_FORMAT (1<<14)
|
||||
#define TM0S2_MAP_2D (0<<14)
|
||||
#define TM0S2_MAP_3D_CUBE (1<<14)
|
||||
#define TM0S2_VERTICAL_LINE_STRIDE (1<<13)
|
||||
#define TM0S2_VERITCAL_LINE_STRIDE_OFF (1<<12)
|
||||
#define TM0S2_OUTPUT_CHAN_SHIFT 10
|
||||
#define TM0S2_OUTPUT_CHAN_MASK (3<<10)
|
||||
|
||||
#define TM0S3_MIP_FILTER_MASK (0x3<<30)
|
||||
#define TM0S3_MIP_FILTER_SHIFT 30
|
||||
#define MIPFILTER_NONE 0
|
||||
#define MIPFILTER_NEAREST 1
|
||||
#define MIPFILTER_LINEAR 3
|
||||
#define TM0S3_MAG_FILTER_MASK (0x3<<28)
|
||||
#define TM0S3_MAG_FILTER_SHIFT 28
|
||||
#define TM0S3_MIN_FILTER_MASK (0x3<<26)
|
||||
#define TM0S3_MIN_FILTER_SHIFT 26
|
||||
#define FILTER_NEAREST 0
|
||||
#define FILTER_LINEAR 1
|
||||
#define FILTER_ANISOTROPIC 2
|
||||
|
||||
#define TM0S3_LOD_BIAS_SHIFT 17
|
||||
#define TM0S3_LOD_BIAS_MASK (0x1ff<<17)
|
||||
#define TM0S3_MAX_MIP_SHIFT 9
|
||||
#define TM0S3_MAX_MIP_MASK (0xff<<9)
|
||||
#define TM0S3_MIN_MIP_SHIFT 3
|
||||
#define TM0S3_MIN_MIP_MASK (0x3f<<3)
|
||||
#define TM0S3_KILL_PIXEL (1<<2)
|
||||
#define TM0S3_KEYED_FILTER (1<<1)
|
||||
#define TM0S3_CHROMA_KEY (1<<0)
|
||||
|
||||
/* _3DSTATE_MAP_TEXEL_STREAM, p188 */
|
||||
#define _3DSTATE_MAP_TEX_STREAM_CMD (CMD_3D|(0x1c<<24)|(0x05<<19))
|
||||
#define DISABLE_TEX_STREAM_BUMP (1<<12)
|
||||
#define ENABLE_TEX_STREAM_BUMP ((1<<12)|(1<<11))
|
||||
#define TEX_MODIFY_UNIT_0 0
|
||||
#define TEX_MODIFY_UNIT_1 (1<<8)
|
||||
#define ENABLE_TEX_STREAM_COORD_SET (1<<7)
|
||||
#define TEX_STREAM_COORD_SET(x) ((x)<<4)
|
||||
#define ENABLE_TEX_STREAM_MAP_IDX (1<<3)
|
||||
#define TEX_STREAM_MAP_IDX(x) (x)
|
||||
|
||||
#define FLUSH_MAP_CACHE (1<<0)
|
||||
|
||||
#define _3DSTATE_MAP_FILTER_CMD (CMD_3D|(0x1c<<24)|(0x02<<19))
|
||||
#define FILTER_TEXMAP_INDEX(x) ((x) << 16)
|
||||
#define MAG_MODE_FILTER_ENABLE (1 << 5)
|
||||
#define MIN_MODE_FILTER_ENABLE (1 << 2)
|
||||
#define MAG_MAPFILTER_NEAREST (0 << 3)
|
||||
#define MAG_MAPFILTER_LINEAR (1 << 3)
|
||||
#define MAG_MAPFILTER_ANISOTROPIC (2 << 3)
|
||||
#define MIN_MAPFILTER_NEAREST (0)
|
||||
#define MIN_MAPFILTER_LINEAR (1)
|
||||
#define MIN_MAPFILTER_ANISOTROPIC (2)
|
||||
#define ENABLE_KEYS (1<<15)
|
||||
#define DISABLE_COLOR_KEY 0
|
||||
#define DISABLE_CHROMA_KEY 0
|
||||
#define DISABLE_KILL_PIXEL 0
|
||||
#define ENABLE_MIP_MODE_FILTER (1 << 9)
|
||||
#define MIPFILTER_NONE 0
|
||||
#define MIPFILTER_NEAREST 1
|
||||
#define MIPFILTER_LINEAR 3
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,844 @@
|
|||
/**************************************************************************
|
||||
*
|
||||
* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
|
||||
* All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the
|
||||
* "Software"), to deal in the Software without restriction, including
|
||||
* without limitation the rights to use, copy, modify, merge, publish,
|
||||
* distribute, sub license, and/or sell copies of the Software, and to
|
||||
* permit persons to whom the Software is furnished to do so, subject to
|
||||
* the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the
|
||||
* next paragraph) shall be included in all copies or substantial portions
|
||||
* of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
|
||||
* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
|
||||
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
||||
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
||||
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
**************************************************************************/
|
||||
|
||||
#ifndef _I915_REG_H_
|
||||
#define _I915_REG_H_
|
||||
|
||||
#define I915_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value)
|
||||
|
||||
#define CMD_3D (0x3<<29)
|
||||
|
||||
#define PRIM3D (CMD_3D | (0x1f<<24))
|
||||
#define PRIM3D_INDIRECT_SEQUENTIAL ((1<<23) | (0<<17))
|
||||
#define PRIM3D_TRILIST (PRIM3D | (0x0<<18))
|
||||
#define PRIM3D_TRISTRIP (PRIM3D | (0x1<<18))
|
||||
#define PRIM3D_TRISTRIP_RVRSE (PRIM3D | (0x2<<18))
|
||||
#define PRIM3D_TRIFAN (PRIM3D | (0x3<<18))
|
||||
#define PRIM3D_POLY (PRIM3D | (0x4<<18))
|
||||
#define PRIM3D_LINELIST (PRIM3D | (0x5<<18))
|
||||
#define PRIM3D_LINESTRIP (PRIM3D | (0x6<<18))
|
||||
#define PRIM3D_RECTLIST (PRIM3D | (0x7<<18))
|
||||
#define PRIM3D_POINTLIST (PRIM3D | (0x8<<18))
|
||||
#define PRIM3D_DIB (PRIM3D | (0x9<<18))
|
||||
#define PRIM3D_CLEAR_RECT (PRIM3D | (0xa<<18))
|
||||
#define PRIM3D_ZONE_INIT (PRIM3D | (0xd<<18))
|
||||
#define PRIM3D_MASK (0x1f<<18)
|
||||
|
||||
/* p137 */
|
||||
#define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
|
||||
#define AA_LINE_ECAAR_WIDTH_ENABLE (1<<16)
|
||||
#define AA_LINE_ECAAR_WIDTH_0_5 0
|
||||
#define AA_LINE_ECAAR_WIDTH_1_0 (1<<14)
|
||||
#define AA_LINE_ECAAR_WIDTH_2_0 (2<<14)
|
||||
#define AA_LINE_ECAAR_WIDTH_4_0 (3<<14)
|
||||
#define AA_LINE_REGION_WIDTH_ENABLE (1<<8)
|
||||
#define AA_LINE_REGION_WIDTH_0_5 0
|
||||
#define AA_LINE_REGION_WIDTH_1_0 (1<<6)
|
||||
#define AA_LINE_REGION_WIDTH_2_0 (2<<6)
|
||||
#define AA_LINE_REGION_WIDTH_4_0 (3<<6)
|
||||
|
||||
/* 3DSTATE_BACKFACE_STENCIL_OPS, p138*/
|
||||
#define _3DSTATE_BACKFACE_STENCIL_OPS (CMD_3D | (0x8<<24))
|
||||
#define BFO_ENABLE_STENCIL_REF (1<<23)
|
||||
#define BFO_STENCIL_REF_SHIFT 15
|
||||
#define BFO_STENCIL_REF_MASK (0xff<<15)
|
||||
#define BFO_ENABLE_STENCIL_FUNCS (1<<14)
|
||||
#define BFO_STENCIL_TEST_SHIFT 11
|
||||
#define BFO_STENCIL_TEST_MASK (0x7<<11)
|
||||
#define BFO_STENCIL_FAIL_SHIFT 8
|
||||
#define BFO_STENCIL_FAIL_MASK (0x7<<8)
|
||||
#define BFO_STENCIL_PASS_Z_FAIL_SHIFT 5
|
||||
#define BFO_STENCIL_PASS_Z_FAIL_MASK (0x7<<5)
|
||||
#define BFO_STENCIL_PASS_Z_PASS_SHIFT 2
|
||||
#define BFO_STENCIL_PASS_Z_PASS_MASK (0x7<<2)
|
||||
#define BFO_ENABLE_STENCIL_TWO_SIDE (1<<1)
|
||||
#define BFO_STENCIL_TWO_SIDE (1<<0)
|
||||
|
||||
/* 3DSTATE_BACKFACE_STENCIL_MASKS, p140 */
|
||||
#define _3DSTATE_BACKFACE_STENCIL_MASKS (CMD_3D | (0x9<<24))
|
||||
#define BFM_ENABLE_STENCIL_TEST_MASK (1<<17)
|
||||
#define BFM_ENABLE_STENCIL_WRITE_MASK (1<<16)
|
||||
#define BFM_STENCIL_TEST_MASK_SHIFT 8
|
||||
#define BFM_STENCIL_TEST_MASK_MASK (0xff<<8)
|
||||
#define BFM_STENCIL_WRITE_MASK_SHIFT 0
|
||||
#define BFM_STENCIL_WRITE_MASK_MASK (0xff<<0)
|
||||
|
||||
/* 3DSTATE_BIN_CONTROL p141 */
|
||||
|
||||
/* p143 */
|
||||
#define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
|
||||
/* Dword 1 */
|
||||
#define BUF_3D_ID_COLOR_BACK (0x3<<24)
|
||||
#define BUF_3D_ID_DEPTH (0x7<<24)
|
||||
#define BUF_3D_USE_FENCE (1<<23)
|
||||
#define BUF_3D_TILED_SURFACE (1<<22)
|
||||
#define BUF_3D_TILE_WALK_X 0
|
||||
#define BUF_3D_TILE_WALK_Y (1<<21)
|
||||
#define BUF_3D_PITCH(x) (((x)/4)<<2)
|
||||
/* Dword 2 */
|
||||
#define BUF_3D_ADDR(x) ((x) & ~0x3)
|
||||
|
||||
/* 3DSTATE_CHROMA_KEY */
|
||||
|
||||
/* 3DSTATE_CLEAR_PARAMETERS, p150 */
|
||||
#define _3DSTATE_CLEAR_PARAMETERS (CMD_3D | (0x1d<<24) | (0x9c<<16) | 5)
|
||||
/* Dword 1 */
|
||||
#define CLEARPARAM_CLEAR_RECT (1 << 16)
|
||||
#define CLEARPARAM_ZONE_INIT (0 << 16)
|
||||
#define CLEARPARAM_WRITE_COLOR (1 << 2)
|
||||
#define CLEARPARAM_WRITE_DEPTH (1 << 1)
|
||||
#define CLEARPARAM_WRITE_STENCIL (1 << 0)
|
||||
|
||||
/* 3DSTATE_CONSTANT_BLEND_COLOR, p153 */
|
||||
#define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
|
||||
|
||||
/* 3DSTATE_COORD_SET_BINDINGS, p154 */
|
||||
#define _3DSTATE_COORD_SET_BINDINGS (CMD_3D | (0x16<<24))
|
||||
#define CSB_TCB(iunit, eunit) ((eunit)<<(iunit*3))
|
||||
|
||||
/* p156 */
|
||||
#define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16))
|
||||
|
||||
/* p157 */
|
||||
#define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16))
|
||||
|
||||
/* p158 */
|
||||
#define _3DSTATE_DFLT_Z_CMD (CMD_3D | (0x1d<<24) | (0x98<<16))
|
||||
|
||||
/* 3DSTATE_DEPTH_OFFSET_SCALE, p159 */
|
||||
#define _3DSTATE_DEPTH_OFFSET_SCALE (CMD_3D | (0x1d<<24) | (0x97<<16))
|
||||
/* scale in dword 1 */
|
||||
|
||||
/* The depth subrectangle is not supported, but must be disabled. */
|
||||
/* 3DSTATE_DEPTH_SUBRECT_DISABLE, p160 */
|
||||
#define _3DSTATE_DEPTH_SUBRECT_DISABLE (CMD_3D | (0x1c<<24) | (0x11<<19) | (1 << 1) | (0 << 0))
|
||||
|
||||
/* p161 */
|
||||
#define _3DSTATE_DST_BUF_VARS_CMD (CMD_3D | (0x1d<<24) | (0x85<<16))
|
||||
/* Dword 1 */
|
||||
#define TEX_DEFAULT_COLOR_OGL (0<<30)
|
||||
#define TEX_DEFAULT_COLOR_D3D (1<<30)
|
||||
#define ZR_EARLY_DEPTH (1<<29)
|
||||
#define LOD_PRECLAMP_OGL (1<<28)
|
||||
#define LOD_PRECLAMP_D3D (0<<28)
|
||||
#define DITHER_FULL_ALWAYS (0<<26)
|
||||
#define DITHER_FULL_ON_FB_BLEND (1<<26)
|
||||
#define DITHER_CLAMPED_ALWAYS (2<<26)
|
||||
#define LINEAR_GAMMA_BLEND_32BPP (1<<25)
|
||||
#define DEBUG_DISABLE_ENH_DITHER (1<<24)
|
||||
#define DSTORG_HORT_BIAS(x) ((x)<<20)
|
||||
#define DSTORG_VERT_BIAS(x) ((x)<<16)
|
||||
#define COLOR_4_2_2_CHNL_WRT_ALL 0
|
||||
#define COLOR_4_2_2_CHNL_WRT_Y (1<<12)
|
||||
#define COLOR_4_2_2_CHNL_WRT_CR (2<<12)
|
||||
#define COLOR_4_2_2_CHNL_WRT_CB (3<<12)
|
||||
#define COLOR_4_2_2_CHNL_WRT_CRCB (4<<12)
|
||||
#define COLR_BUF_8BIT 0
|
||||
#define COLR_BUF_RGB555 (1<<8)
|
||||
#define COLR_BUF_RGB565 (2<<8)
|
||||
#define COLR_BUF_ARGB8888 (3<<8)
|
||||
#define COLR_BUF_ARGB4444 (8<<8)
|
||||
#define COLR_BUF_ARGB1555 (9<<8)
|
||||
#define COLR_BUF_ARGB2AAA (0xa<<8)
|
||||
#define DEPTH_FRMT_16_FIXED 0
|
||||
#define DEPTH_FRMT_16_FLOAT (1<<2)
|
||||
#define DEPTH_FRMT_24_FIXED_8_OTHER (2<<2)
|
||||
#define VERT_LINE_STRIDE_1 (1<<1)
|
||||
#define VERT_LINE_STRIDE_0 (0<<1)
|
||||
#define VERT_LINE_STRIDE_OFS_1 1
|
||||
#define VERT_LINE_STRIDE_OFS_0 0
|
||||
|
||||
/* p166 */
|
||||
#define _3DSTATE_DRAW_RECT_CMD (CMD_3D|(0x1d<<24)|(0x80<<16)|3)
|
||||
/* Dword 1 */
|
||||
#define DRAW_RECT_DIS_DEPTH_OFS (1<<30)
|
||||
#define DRAW_DITHER_OFS_X(x) ((x)<<26)
|
||||
#define DRAW_DITHER_OFS_Y(x) ((x)<<24)
|
||||
/* Dword 2 */
|
||||
#define DRAW_YMIN(x) ((x)<<16)
|
||||
#define DRAW_XMIN(x) (x)
|
||||
/* Dword 3 */
|
||||
#define DRAW_YMAX(x) ((x)<<16)
|
||||
#define DRAW_XMAX(x) (x)
|
||||
/* Dword 4 */
|
||||
#define DRAW_YORG(x) ((x)<<16)
|
||||
#define DRAW_XORG(x) (x)
|
||||
|
||||
/* 3DSTATE_FILTER_COEFFICIENTS_4X4, p170 */
|
||||
|
||||
/* 3DSTATE_FILTER_COEFFICIENTS_6X5, p172 */
|
||||
|
||||
/* _3DSTATE_FOG_COLOR, p173 */
|
||||
#define _3DSTATE_FOG_COLOR_CMD (CMD_3D|(0x15<<24))
|
||||
#define FOG_COLOR_RED(x) ((x)<<16)
|
||||
#define FOG_COLOR_GREEN(x) ((x)<<8)
|
||||
#define FOG_COLOR_BLUE(x) (x)
|
||||
|
||||
/* _3DSTATE_FOG_MODE, p174 */
|
||||
#define _3DSTATE_FOG_MODE_CMD (CMD_3D|(0x1d<<24)|(0x89<<16)|2)
|
||||
/* Dword 1 */
|
||||
#define FMC1_FOGFUNC_MODIFY_ENABLE (1<<31)
|
||||
#define FMC1_FOGFUNC_VERTEX (0<<28)
|
||||
#define FMC1_FOGFUNC_PIXEL_EXP (1<<28)
|
||||
#define FMC1_FOGFUNC_PIXEL_EXP2 (2<<28)
|
||||
#define FMC1_FOGFUNC_PIXEL_LINEAR (3<<28)
|
||||
#define FMC1_FOGFUNC_MASK (3<<28)
|
||||
#define FMC1_FOGINDEX_MODIFY_ENABLE (1<<27)
|
||||
#define FMC1_FOGINDEX_Z (0<<25)
|
||||
#define FMC1_FOGINDEX_W (1<<25)
|
||||
#define FMC1_C1_C2_MODIFY_ENABLE (1<<24)
|
||||
#define FMC1_DENSITY_MODIFY_ENABLE (1<<23)
|
||||
#define FMC1_C1_ONE (1<<13)
|
||||
#define FMC1_C1_MASK (0xffff<<4)
|
||||
/* Dword 2 */
|
||||
#define FMC2_C2_ONE (1<<16)
|
||||
/* Dword 3 */
|
||||
#define FMC3_D_ONE (1<<16)
|
||||
|
||||
/* _3DSTATE_INDEPENDENT_ALPHA_BLEND, p177 */
|
||||
#define _3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD (CMD_3D|(0x0b<<24))
|
||||
#define IAB_MODIFY_ENABLE (1<<23)
|
||||
#define IAB_ENABLE (1<<22)
|
||||
#define IAB_MODIFY_FUNC (1<<21)
|
||||
#define IAB_FUNC_SHIFT 16
|
||||
#define IAB_MODIFY_SRC_FACTOR (1<<11)
|
||||
#define IAB_SRC_FACTOR_SHIFT 6
|
||||
#define IAB_SRC_FACTOR_MASK (BLENDFACT_MASK<<6)
|
||||
#define IAB_MODIFY_DST_FACTOR (1<<5)
|
||||
#define IAB_DST_FACTOR_SHIFT 0
|
||||
#define IAB_DST_FACTOR_MASK (BLENDFACT_MASK<<0)
|
||||
|
||||
#define BLENDFACT_ZERO 0x01
|
||||
#define BLENDFACT_ONE 0x02
|
||||
#define BLENDFACT_SRC_COLR 0x03
|
||||
#define BLENDFACT_INV_SRC_COLR 0x04
|
||||
#define BLENDFACT_SRC_ALPHA 0x05
|
||||
#define BLENDFACT_INV_SRC_ALPHA 0x06
|
||||
#define BLENDFACT_DST_ALPHA 0x07
|
||||
#define BLENDFACT_INV_DST_ALPHA 0x08
|
||||
#define BLENDFACT_DST_COLR 0x09
|
||||
#define BLENDFACT_INV_DST_COLR 0x0a
|
||||
#define BLENDFACT_SRC_ALPHA_SATURATE 0x0b
|
||||
#define BLENDFACT_CONST_COLOR 0x0c
|
||||
#define BLENDFACT_INV_CONST_COLOR 0x0d
|
||||
#define BLENDFACT_CONST_ALPHA 0x0e
|
||||
#define BLENDFACT_INV_CONST_ALPHA 0x0f
|
||||
#define BLENDFACT_MASK 0x0f
|
||||
|
||||
#define BLENDFUNC_ADD 0x0
|
||||
#define BLENDFUNC_SUBTRACT 0x1
|
||||
#define BLENDFUNC_REVERSE_SUBTRACT 0x2
|
||||
#define BLENDFUNC_MIN 0x3
|
||||
#define BLENDFUNC_MAX 0x4
|
||||
#define BLENDFUNC_MASK 0x7
|
||||
|
||||
/* 3DSTATE_LOAD_INDIRECT, p180 */
|
||||
|
||||
#define _3DSTATE_LOAD_INDIRECT (CMD_3D|(0x1d<<24)|(0x7<<16))
|
||||
#define LI0_STATE_STATIC_INDIRECT (0x01<<8)
|
||||
#define LI0_STATE_DYNAMIC_INDIRECT (0x02<<8)
|
||||
#define LI0_STATE_SAMPLER (0x04<<8)
|
||||
#define LI0_STATE_MAP (0x08<<8)
|
||||
#define LI0_STATE_PROGRAM (0x10<<8)
|
||||
#define LI0_STATE_CONSTANTS (0x20<<8)
|
||||
|
||||
#define SIS0_BUFFER_ADDRESS(x) ((x)&~0x3)
|
||||
#define SIS0_FORCE_LOAD (1<<1)
|
||||
#define SIS0_BUFFER_VALID (1<<0)
|
||||
#define SIS1_BUFFER_LENGTH(x) ((x)&0xff)
|
||||
|
||||
#define DIS0_BUFFER_ADDRESS(x) ((x)&~0x3)
|
||||
#define DIS0_BUFFER_RESET (1<<1)
|
||||
#define DIS0_BUFFER_VALID (1<<0)
|
||||
|
||||
#define SSB0_BUFFER_ADDRESS(x) ((x)&~0x3)
|
||||
#define SSB0_FORCE_LOAD (1<<1)
|
||||
#define SSB0_BUFFER_VALID (1<<0)
|
||||
#define SSB1_BUFFER_LENGTH(x) ((x)&0xff)
|
||||
|
||||
#define MSB0_BUFFER_ADDRESS(x) ((x)&~0x3)
|
||||
#define MSB0_FORCE_LOAD (1<<1)
|
||||
#define MSB0_BUFFER_VALID (1<<0)
|
||||
#define MSB1_BUFFER_LENGTH(x) ((x)&0xff)
|
||||
|
||||
#define PSP0_BUFFER_ADDRESS(x) ((x)&~0x3)
|
||||
#define PSP0_FORCE_LOAD (1<<1)
|
||||
#define PSP0_BUFFER_VALID (1<<0)
|
||||
#define PSP1_BUFFER_LENGTH(x) ((x)&0xff)
|
||||
|
||||
#define PSC0_BUFFER_ADDRESS(x) ((x)&~0x3)
|
||||
#define PSC0_FORCE_LOAD (1<<1)
|
||||
#define PSC0_BUFFER_VALID (1<<0)
|
||||
#define PSC1_BUFFER_LENGTH(x) ((x)&0xff)
|
||||
|
||||
/* _3DSTATE_RASTERIZATION_RULES */
|
||||
#define _3DSTATE_RASTER_RULES_CMD (CMD_3D|(0x07<<24))
|
||||
#define ENABLE_POINT_RASTER_RULE (1<<15)
|
||||
#define OGL_POINT_RASTER_RULE (1<<13)
|
||||
#define ENABLE_TEXKILL_3D_4D (1<<10)
|
||||
#define TEXKILL_3D (0<<9)
|
||||
#define TEXKILL_4D (1<<9)
|
||||
#define ENABLE_LINE_STRIP_PROVOKE_VRTX (1<<8)
|
||||
#define ENABLE_TRI_FAN_PROVOKE_VRTX (1<<5)
|
||||
#define LINE_STRIP_PROVOKE_VRTX(x) ((x)<<6)
|
||||
#define TRI_FAN_PROVOKE_VRTX(x) ((x)<<3)
|
||||
|
||||
/* _3DSTATE_SCISSOR_ENABLE, p256 */
|
||||
#define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D|(0x1c<<24)|(0x10<<19))
|
||||
#define ENABLE_SCISSOR_RECT ((1<<1) | 1)
|
||||
#define DISABLE_SCISSOR_RECT (1<<1)
|
||||
|
||||
/* _3DSTATE_SCISSOR_RECTANGLE_0, p257 */
|
||||
#define _3DSTATE_SCISSOR_RECT_0_CMD (CMD_3D|(0x1d<<24)|(0x81<<16)|1)
|
||||
/* Dword 1 */
|
||||
#define SCISSOR_RECT_0_YMIN(x) ((x)<<16)
|
||||
#define SCISSOR_RECT_0_XMIN(x) (x)
|
||||
/* Dword 2 */
|
||||
#define SCISSOR_RECT_0_YMAX(x) ((x)<<16)
|
||||
#define SCISSOR_RECT_0_XMAX(x) (x)
|
||||
|
||||
/* p189 */
|
||||
#define _3DSTATE_LOAD_STATE_IMMEDIATE_1 ((0x3<<29)|(0x1d<<24)|(0x04<<16))
|
||||
#define I1_LOAD_S(n) (1<<(4+n))
|
||||
|
||||
#define S0_VB_OFFSET_MASK 0xffffffc
|
||||
#define S0_AUTO_CACHE_INV_DISABLE (1<<0)
|
||||
|
||||
#define S1_VERTEX_WIDTH_SHIFT 24
|
||||
#define S1_VERTEX_WIDTH_MASK (0x3f<<24)
|
||||
#define S1_VERTEX_PITCH_SHIFT 16
|
||||
#define S1_VERTEX_PITCH_MASK (0x3f<<16)
|
||||
|
||||
#define TEXCOORDFMT_2D 0x0
|
||||
#define TEXCOORDFMT_3D 0x1
|
||||
#define TEXCOORDFMT_4D 0x2
|
||||
#define TEXCOORDFMT_1D 0x3
|
||||
#define TEXCOORDFMT_2D_16 0x4
|
||||
#define TEXCOORDFMT_4D_16 0x5
|
||||
#define TEXCOORDFMT_NOT_PRESENT 0xf
|
||||
#define S2_TEXCOORD_FMT0_MASK 0xf
|
||||
#define S2_TEXCOORD_FMT1_SHIFT 4
|
||||
#define S2_TEXCOORD_FMT(unit, type) ((type)<<(unit*4))
|
||||
#define S2_TEXCOORD_NONE (~0)
|
||||
|
||||
#define TEXCOORD_WRAP_SHORTEST_TCX 8
|
||||
#define TEXCOORD_WRAP_SHORTEST_TCY 4
|
||||
#define TEXCOORD_WRAP_SHORTEST_TCZ 2
|
||||
#define TEXCOORD_PERSPECTIVE_DISABLE 1
|
||||
|
||||
#define S3_WRAP_SHORTEST_TCX(unit) (TEXCOORD_WRAP_SHORTEST_TCX << ((unit) * 4))
|
||||
#define S3_WRAP_SHORTEST_TCY(unit) (TEXCOORD_WRAP_SHORTEST_TCY << ((unit) * 4))
|
||||
#define S3_WRAP_SHORTEST_TCZ(unit) (TEXCOORD_WRAP_SHORTEST_TCZ << ((unit) * 4))
|
||||
#define S3_PERSPECTIVE_DISABLE(unit) (TEXCOORD_PERSPECTIVE_DISABLE << ((unit) * 4))
|
||||
|
||||
/* S3 not interesting */
|
||||
|
||||
#define S4_POINT_WIDTH_SHIFT 23
|
||||
#define S4_POINT_WIDTH_MASK (0x1ff<<23)
|
||||
#define S4_LINE_WIDTH_SHIFT 19
|
||||
#define S4_LINE_WIDTH_ONE (0x2<<19)
|
||||
#define S4_LINE_WIDTH_MASK (0xf<<19)
|
||||
#define S4_FLATSHADE_ALPHA (1<<18)
|
||||
#define S4_FLATSHADE_FOG (1<<17)
|
||||
#define S4_FLATSHADE_SPECULAR (1<<16)
|
||||
#define S4_FLATSHADE_COLOR (1<<15)
|
||||
#define S4_CULLMODE_BOTH (0<<13)
|
||||
#define S4_CULLMODE_NONE (1<<13)
|
||||
#define S4_CULLMODE_CW (2<<13)
|
||||
#define S4_CULLMODE_CCW (3<<13)
|
||||
#define S4_CULLMODE_MASK (3<<13)
|
||||
#define S4_VFMT_POINT_WIDTH (1<<12)
|
||||
#define S4_VFMT_SPEC_FOG (1<<11)
|
||||
#define S4_VFMT_COLOR (1<<10)
|
||||
#define S4_VFMT_DEPTH_OFFSET (1<<9)
|
||||
#define S4_VFMT_XYZ (1<<6)
|
||||
#define S4_VFMT_XYZW (2<<6)
|
||||
#define S4_VFMT_XY (3<<6)
|
||||
#define S4_VFMT_XYW (4<<6)
|
||||
#define S4_VFMT_XYZW_MASK (7<<6)
|
||||
#define S4_FORCE_DEFAULT_DIFFUSE (1<<5)
|
||||
#define S4_FORCE_DEFAULT_SPECULAR (1<<4)
|
||||
#define S4_LOCAL_DEPTH_OFFSET_ENABLE (1<<3)
|
||||
#define S4_VFMT_FOG_PARAM (1<<2)
|
||||
#define S4_SPRITE_POINT_ENABLE (1<<1)
|
||||
#define S4_LINE_ANTIALIAS_ENABLE (1<<0)
|
||||
|
||||
#define S4_VFMT_MASK (S4_VFMT_POINT_WIDTH | \
|
||||
S4_VFMT_SPEC_FOG | \
|
||||
S4_VFMT_COLOR | \
|
||||
S4_VFMT_DEPTH_OFFSET | \
|
||||
S4_VFMT_XYZW_MASK | \
|
||||
S4_VFMT_FOG_PARAM)
|
||||
|
||||
#define S5_WRITEDISABLE_ALPHA (1<<31)
|
||||
#define S5_WRITEDISABLE_RED (1<<30)
|
||||
#define S5_WRITEDISABLE_GREEN (1<<29)
|
||||
#define S5_WRITEDISABLE_BLUE (1<<28)
|
||||
#define S5_WRITEDISABLE_MASK (0xf<<28)
|
||||
#define S5_FORCE_DEFAULT_POINT_SIZE (1<<27)
|
||||
#define S5_LAST_PIXEL_ENABLE (1<<26)
|
||||
#define S5_GLOBAL_DEPTH_OFFSET_ENABLE (1<<25)
|
||||
#define S5_FOG_ENABLE (1<<24)
|
||||
#define S5_STENCIL_REF_SHIFT 16
|
||||
#define S5_STENCIL_REF_MASK (0xff<<16)
|
||||
#define S5_STENCIL_TEST_FUNC_SHIFT 13
|
||||
#define S5_STENCIL_TEST_FUNC_MASK (0x7<<13)
|
||||
#define S5_STENCIL_FAIL_SHIFT 10
|
||||
#define S5_STENCIL_FAIL_MASK (0x7<<10)
|
||||
#define S5_STENCIL_PASS_Z_FAIL_SHIFT 7
|
||||
#define S5_STENCIL_PASS_Z_FAIL_MASK (0x7<<7)
|
||||
#define S5_STENCIL_PASS_Z_PASS_SHIFT 4
|
||||
#define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4)
|
||||
#define S5_STENCIL_WRITE_ENABLE (1<<3)
|
||||
#define S5_STENCIL_TEST_ENABLE (1<<2)
|
||||
#define S5_COLOR_DITHER_ENABLE (1<<1)
|
||||
#define S5_LOGICOP_ENABLE (1<<0)
|
||||
|
||||
#define S6_ALPHA_TEST_ENABLE (1<<31)
|
||||
#define S6_ALPHA_TEST_FUNC_SHIFT 28
|
||||
#define S6_ALPHA_TEST_FUNC_MASK (0x7<<28)
|
||||
#define S6_ALPHA_REF_SHIFT 20
|
||||
#define S6_ALPHA_REF_MASK (0xff<<20)
|
||||
#define S6_DEPTH_TEST_ENABLE (1<<19)
|
||||
#define S6_DEPTH_TEST_FUNC_SHIFT 16
|
||||
#define S6_DEPTH_TEST_FUNC_MASK (0x7<<16)
|
||||
#define S6_CBUF_BLEND_ENABLE (1<<15)
|
||||
#define S6_CBUF_BLEND_FUNC_SHIFT 12
|
||||
#define S6_CBUF_BLEND_FUNC_MASK (0x7<<12)
|
||||
#define S6_CBUF_SRC_BLEND_FACT_SHIFT 8
|
||||
#define S6_CBUF_SRC_BLEND_FACT_MASK (0xf<<8)
|
||||
#define S6_CBUF_DST_BLEND_FACT_SHIFT 4
|
||||
#define S6_CBUF_DST_BLEND_FACT_MASK (0xf<<4)
|
||||
#define S6_DEPTH_WRITE_ENABLE (1<<3)
|
||||
#define S6_COLOR_WRITE_ENABLE (1<<2)
|
||||
#define S6_TRISTRIP_PV_SHIFT 0
|
||||
#define S6_TRISTRIP_PV_MASK (0x3<<0)
|
||||
|
||||
#define S7_DEPTH_OFFSET_CONST_MASK ~0
|
||||
|
||||
/* 3DSTATE_MAP_DEINTERLACER_PARAMETERS */
|
||||
/* 3DSTATE_MAP_PALETTE_LOAD_32, p206 */
|
||||
|
||||
/* _3DSTATE_MODES_4, p218 */
|
||||
#define _3DSTATE_MODES_4_CMD (CMD_3D|(0x0d<<24))
|
||||
#define ENABLE_LOGIC_OP_FUNC (1<<23)
|
||||
#define LOGIC_OP_FUNC(x) ((x)<<18)
|
||||
#define LOGICOP_MASK (0xf<<18)
|
||||
#define LOGICOP_COPY 0xc
|
||||
#define MODE4_ENABLE_STENCIL_TEST_MASK ((1<<17)|(0xff00))
|
||||
#define ENABLE_STENCIL_TEST_MASK (1<<17)
|
||||
#define STENCIL_TEST_MASK(x) ((x)<<8)
|
||||
#define MODE4_ENABLE_STENCIL_WRITE_MASK ((1<<16)|(0x00ff))
|
||||
#define ENABLE_STENCIL_WRITE_MASK (1<<16)
|
||||
#define STENCIL_WRITE_MASK(x) ((x)&0xff)
|
||||
|
||||
/* _3DSTATE_MODES_5, p220 */
|
||||
#define _3DSTATE_MODES_5_CMD (CMD_3D|(0x0c<<24))
|
||||
#define PIPELINE_FLUSH_RENDER_CACHE (1<<18)
|
||||
#define PIPELINE_FLUSH_TEXTURE_CACHE (1<<16)
|
||||
|
||||
/* p221 */
|
||||
#define _3DSTATE_PIXEL_SHADER_CONSTANTS (CMD_3D|(0x1d<<24)|(0x6<<16))
|
||||
#define PS1_REG(n) (1<<(n))
|
||||
#define PS2_CONST_X(n) (n)
|
||||
#define PS3_CONST_Y(n) (n)
|
||||
#define PS4_CONST_Z(n) (n)
|
||||
#define PS5_CONST_W(n) (n)
|
||||
|
||||
/* p222 */
|
||||
|
||||
#define I915_MAX_TEX_INDIRECT 4
|
||||
#define I915_MAX_TEX_INSN 32
|
||||
#define I915_MAX_ALU_INSN 64
|
||||
#define I915_MAX_DECL_INSN 27
|
||||
#define I915_MAX_TEMPORARY 16
|
||||
|
||||
/* Each instruction is 3 dwords long, though most don't require all
|
||||
* this space. Maximum of 123 instructions. Smaller maxes per insn
|
||||
* type.
|
||||
*/
|
||||
#define _3DSTATE_PIXEL_SHADER_PROGRAM (CMD_3D|(0x1d<<24)|(0x5<<16))
|
||||
|
||||
#define REG_TYPE_R 0 /* temporary regs, no need to
|
||||
* dcl, must be written before
|
||||
* read -- Preserved between
|
||||
* phases.
|
||||
*/
|
||||
#define REG_TYPE_T 1 /* Interpolated values, must be
|
||||
* dcl'ed before use.
|
||||
*
|
||||
* 0..7: texture coord,
|
||||
* 8: diffuse spec,
|
||||
* 9: specular color,
|
||||
* 10: fog parameter in w.
|
||||
*/
|
||||
#define REG_TYPE_CONST 2 /* Restriction: only one const
|
||||
* can be referenced per
|
||||
* instruction, though it may be
|
||||
* selected for multiple inputs.
|
||||
* Constants not initialized
|
||||
* default to zero.
|
||||
*/
|
||||
#define REG_TYPE_S 3 /* sampler */
|
||||
#define REG_TYPE_OC 4 /* output color (rgba) */
|
||||
#define REG_TYPE_OD 5 /* output depth (w), xyz are
|
||||
* temporaries. If not written,
|
||||
* interpolated depth is used?
|
||||
*/
|
||||
#define REG_TYPE_U 6 /* unpreserved temporaries */
|
||||
#define REG_TYPE_MASK 0x7
|
||||
#define REG_NR_MASK 0xf
|
||||
|
||||
/* REG_TYPE_T:
|
||||
*/
|
||||
#define T_TEX0 0
|
||||
#define T_TEX1 1
|
||||
#define T_TEX2 2
|
||||
#define T_TEX3 3
|
||||
#define T_TEX4 4
|
||||
#define T_TEX5 5
|
||||
#define T_TEX6 6
|
||||
#define T_TEX7 7
|
||||
#define T_DIFFUSE 8
|
||||
#define T_SPECULAR 9
|
||||
#define T_FOG_W 10 /* interpolated fog is in W coord */
|
||||
|
||||
/* Arithmetic instructions */
|
||||
|
||||
/* .replicate_swizzle == selection and replication of a particular
|
||||
* scalar channel, ie., .xxxx, .yyyy, .zzzz or .wwww
|
||||
*/
|
||||
#define A0_NOP (0x0<<24) /* no operation */
|
||||
#define A0_ADD (0x1<<24) /* dst = src0 + src1 */
|
||||
#define A0_MOV (0x2<<24) /* dst = src0 */
|
||||
#define A0_MUL (0x3<<24) /* dst = src0 * src1 */
|
||||
#define A0_MAD (0x4<<24) /* dst = src0 * src1 + src2 */
|
||||
#define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */
|
||||
#define A0_DP3 (0x6<<24) /* dst.xyzw = src0.xyz dot src1.xyz */
|
||||
#define A0_DP4 (0x7<<24) /* dst.xyzw = src0.xyzw dot src1.xyzw */
|
||||
#define A0_FRC (0x8<<24) /* dst = src0 - floor(src0) */
|
||||
#define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */
|
||||
#define A0_RSQ (0xa<<24) /* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */
|
||||
#define A0_EXP (0xb<<24) /* dst.xyzw = exp2(src0.replicate_swizzle) */
|
||||
#define A0_LOG (0xc<<24) /* dst.xyzw = log2(abs(src0.replicate_swizzle)) */
|
||||
#define A0_CMP (0xd<<24) /* dst = (src0 >= 0.0) ? src1 : src2 */
|
||||
#define A0_MIN (0xe<<24) /* dst = (src0 < src1) ? src0 : src1 */
|
||||
#define A0_MAX (0xf<<24) /* dst = (src0 >= src1) ? src0 : src1 */
|
||||
#define A0_FLR (0x10<<24) /* dst = floor(src0) */
|
||||
#define A0_MOD (0x11<<24) /* dst = src0 fmod 1.0 */
|
||||
#define A0_TRC (0x12<<24) /* dst = int(src0) */
|
||||
#define A0_SGE (0x13<<24) /* dst = src0 >= src1 ? 1.0 : 0.0 */
|
||||
#define A0_SLT (0x14<<24) /* dst = src0 < src1 ? 1.0 : 0.0 */
|
||||
#define A0_DEST_SATURATE (1<<22)
|
||||
#define A0_DEST_TYPE_SHIFT 19
|
||||
/* Allow: R, OC, OD, U */
|
||||
#define A0_DEST_NR_SHIFT 14
|
||||
/* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */
|
||||
#define A0_DEST_CHANNEL_X (1<<10)
|
||||
#define A0_DEST_CHANNEL_Y (2<<10)
|
||||
#define A0_DEST_CHANNEL_Z (4<<10)
|
||||
#define A0_DEST_CHANNEL_W (8<<10)
|
||||
#define A0_DEST_CHANNEL_ALL (0xf<<10)
|
||||
#define A0_DEST_CHANNEL_SHIFT 10
|
||||
#define A0_SRC0_TYPE_SHIFT 7
|
||||
#define A0_SRC0_NR_SHIFT 2
|
||||
|
||||
#define A0_DEST_CHANNEL_XY (A0_DEST_CHANNEL_X|A0_DEST_CHANNEL_Y)
|
||||
#define A0_DEST_CHANNEL_XYZ (A0_DEST_CHANNEL_XY|A0_DEST_CHANNEL_Z)
|
||||
|
||||
#define SRC_X 0
|
||||
#define SRC_Y 1
|
||||
#define SRC_Z 2
|
||||
#define SRC_W 3
|
||||
#define SRC_ZERO 4
|
||||
#define SRC_ONE 5
|
||||
|
||||
#define A1_SRC0_CHANNEL_X_NEGATE (1<<31)
|
||||
#define A1_SRC0_CHANNEL_X_SHIFT 28
|
||||
#define A1_SRC0_CHANNEL_Y_NEGATE (1<<27)
|
||||
#define A1_SRC0_CHANNEL_Y_SHIFT 24
|
||||
#define A1_SRC0_CHANNEL_Z_NEGATE (1<<23)
|
||||
#define A1_SRC0_CHANNEL_Z_SHIFT 20
|
||||
#define A1_SRC0_CHANNEL_W_NEGATE (1<<19)
|
||||
#define A1_SRC0_CHANNEL_W_SHIFT 16
|
||||
#define A1_SRC1_TYPE_SHIFT 13
|
||||
#define A1_SRC1_NR_SHIFT 8
|
||||
#define A1_SRC1_CHANNEL_X_NEGATE (1<<7)
|
||||
#define A1_SRC1_CHANNEL_X_SHIFT 4
|
||||
#define A1_SRC1_CHANNEL_Y_NEGATE (1<<3)
|
||||
#define A1_SRC1_CHANNEL_Y_SHIFT 0
|
||||
|
||||
#define A2_SRC1_CHANNEL_Z_NEGATE (1<<31)
|
||||
#define A2_SRC1_CHANNEL_Z_SHIFT 28
|
||||
#define A2_SRC1_CHANNEL_W_NEGATE (1<<27)
|
||||
#define A2_SRC1_CHANNEL_W_SHIFT 24
|
||||
#define A2_SRC2_TYPE_SHIFT 21
|
||||
#define A2_SRC2_NR_SHIFT 16
|
||||
#define A2_SRC2_CHANNEL_X_NEGATE (1<<15)
|
||||
#define A2_SRC2_CHANNEL_X_SHIFT 12
|
||||
#define A2_SRC2_CHANNEL_Y_NEGATE (1<<11)
|
||||
#define A2_SRC2_CHANNEL_Y_SHIFT 8
|
||||
#define A2_SRC2_CHANNEL_Z_NEGATE (1<<7)
|
||||
#define A2_SRC2_CHANNEL_Z_SHIFT 4
|
||||
#define A2_SRC2_CHANNEL_W_NEGATE (1<<3)
|
||||
#define A2_SRC2_CHANNEL_W_SHIFT 0
|
||||
|
||||
/* Texture instructions */
|
||||
#define T0_TEXLD (0x15<<24) /* Sample texture using predeclared
|
||||
* sampler and address, and output
|
||||
* filtered texel data to destination
|
||||
* register */
|
||||
#define T0_TEXLDP (0x16<<24) /* Same as texld but performs a
|
||||
* perspective divide of the texture
|
||||
* coordinate .xyz values by .w before
|
||||
* sampling. */
|
||||
#define T0_TEXLDB (0x17<<24) /* Same as texld but biases the
|
||||
* computed LOD by w. Only S4.6 two's
|
||||
* comp is used. This implies that a
|
||||
* float to fixed conversion is
|
||||
* done. */
|
||||
#define T0_TEXKILL (0x18<<24) /* Does not perform a sampling
|
||||
* operation. Simply kills the pixel
|
||||
* if any channel of the address
|
||||
* register is < 0.0. */
|
||||
#define T0_DEST_TYPE_SHIFT 19
|
||||
/* Allow: R, OC, OD, U */
|
||||
/* Note: U (unpreserved) regs do not retain their values between
|
||||
* phases (cannot be used for feedback)
|
||||
*
|
||||
* Note: oC and OD registers can only be used as the destination of a
|
||||
* texture instruction once per phase (this is an implementation
|
||||
* restriction).
|
||||
*/
|
||||
#define T0_DEST_NR_SHIFT 14
|
||||
/* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */
|
||||
#define T0_SAMPLER_NR_SHIFT 0 /* This field ignored for TEXKILL */
|
||||
#define T0_SAMPLER_NR_MASK (0xf<<0)
|
||||
|
||||
#define T1_ADDRESS_REG_TYPE_SHIFT 24 /* Reg to use as texture coord */
|
||||
/* Allow R, T, OC, OD -- R, OC, OD are 'dependent' reads, new program phase */
|
||||
#define T1_ADDRESS_REG_NR_SHIFT 17
|
||||
#define T2_MBZ 0
|
||||
|
||||
/* Declaration instructions */
|
||||
#define D0_DCL (0x19<<24) /* Declare a t (interpolated attrib)
|
||||
* register or an s (sampler)
|
||||
* register. */
|
||||
#define D0_SAMPLE_TYPE_SHIFT 22
|
||||
#define D0_SAMPLE_TYPE_2D (0x0<<22)
|
||||
#define D0_SAMPLE_TYPE_CUBE (0x1<<22)
|
||||
#define D0_SAMPLE_TYPE_VOLUME (0x2<<22)
|
||||
#define D0_SAMPLE_TYPE_MASK (0x3<<22)
|
||||
|
||||
#define D0_TYPE_SHIFT 19
|
||||
/* Allow: T, S */
|
||||
#define D0_NR_SHIFT 14
|
||||
/* Allow T: 0..10, S: 0..15 */
|
||||
#define D0_CHANNEL_X (1<<10)
|
||||
#define D0_CHANNEL_Y (2<<10)
|
||||
#define D0_CHANNEL_Z (4<<10)
|
||||
#define D0_CHANNEL_W (8<<10)
|
||||
#define D0_CHANNEL_ALL (0xf<<10)
|
||||
#define D0_CHANNEL_NONE (0<<10)
|
||||
|
||||
#define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y)
|
||||
#define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z)
|
||||
|
||||
/* I915 Errata: Do not allow (xz), (xw), (xzw) combinations for diffuse
|
||||
* or specular declarations.
|
||||
*
|
||||
* For T dcls, only allow: (x), (xy), (xyz), (w), (xyzw)
|
||||
*
|
||||
* Must be zero for S (sampler) dcls
|
||||
*/
|
||||
#define D1_MBZ 0
|
||||
#define D2_MBZ 0
|
||||
|
||||
/* p207.
|
||||
* The DWORD count is 3 times the number of bits set in MS1_MAPMASK_MASK
|
||||
*/
|
||||
#define _3DSTATE_MAP_STATE (CMD_3D|(0x1d<<24)|(0x0<<16))
|
||||
|
||||
#define MS1_MAPMASK_SHIFT 0
|
||||
#define MS1_MAPMASK_MASK (0x8fff<<0)
|
||||
|
||||
#define MS2_UNTRUSTED_SURFACE (1<<31)
|
||||
#define MS2_ADDRESS_MASK 0xfffffffc
|
||||
#define MS2_VERTICAL_LINE_STRIDE (1<<1)
|
||||
#define MS2_VERTICAL_OFFSET (1<<1)
|
||||
|
||||
#define MS3_HEIGHT_SHIFT 21
|
||||
#define MS3_WIDTH_SHIFT 10
|
||||
#define MS3_PALETTE_SELECT (1<<9)
|
||||
#define MS3_MAPSURF_FORMAT_SHIFT 7
|
||||
#define MS3_MAPSURF_FORMAT_MASK (0x7<<7)
|
||||
#define MAPSURF_8BIT (1<<7)
|
||||
#define MAPSURF_16BIT (2<<7)
|
||||
#define MAPSURF_32BIT (3<<7)
|
||||
#define MAPSURF_422 (5<<7)
|
||||
#define MAPSURF_COMPRESSED (6<<7)
|
||||
#define MAPSURF_4BIT_INDEXED (7<<7)
|
||||
#define MS3_MT_FORMAT_MASK (0x7 << 3)
|
||||
#define MS3_MT_FORMAT_SHIFT 3
|
||||
#define MT_4BIT_IDX_ARGB8888 (7<<3) /* SURFACE_4BIT_INDEXED */
|
||||
#define MT_8BIT_I8 (0<<3) /* SURFACE_8BIT */
|
||||
#define MT_8BIT_L8 (1<<3)
|
||||
#define MT_8BIT_A8 (4<<3)
|
||||
#define MT_8BIT_MONO8 (5<<3)
|
||||
#define MT_16BIT_RGB565 (0<<3) /* SURFACE_16BIT */
|
||||
#define MT_16BIT_ARGB1555 (1<<3)
|
||||
#define MT_16BIT_ARGB4444 (2<<3)
|
||||
#define MT_16BIT_AY88 (3<<3)
|
||||
#define MT_16BIT_88DVDU (5<<3)
|
||||
#define MT_16BIT_BUMP_655LDVDU (6<<3)
|
||||
#define MT_16BIT_I16 (7<<3)
|
||||
#define MT_16BIT_L16 (8<<3)
|
||||
#define MT_16BIT_A16 (9<<3)
|
||||
#define MT_32BIT_ARGB8888 (0<<3) /* SURFACE_32BIT */
|
||||
#define MT_32BIT_ABGR8888 (1<<3)
|
||||
#define MT_32BIT_XRGB8888 (2<<3)
|
||||
#define MT_32BIT_XBGR8888 (3<<3)
|
||||
#define MT_32BIT_QWVU8888 (4<<3)
|
||||
#define MT_32BIT_AXVU8888 (5<<3)
|
||||
#define MT_32BIT_LXVU8888 (6<<3)
|
||||
#define MT_32BIT_XLVU8888 (7<<3)
|
||||
#define MT_32BIT_ARGB2101010 (8<<3)
|
||||
#define MT_32BIT_ABGR2101010 (9<<3)
|
||||
#define MT_32BIT_AWVU2101010 (0xA<<3)
|
||||
#define MT_32BIT_GR1616 (0xB<<3)
|
||||
#define MT_32BIT_VU1616 (0xC<<3)
|
||||
#define MT_32BIT_xI824 (0xD<<3)
|
||||
#define MT_32BIT_xA824 (0xE<<3)
|
||||
#define MT_32BIT_xL824 (0xF<<3)
|
||||
#define MT_422_YCRCB_SWAPY (0<<3) /* SURFACE_422 */
|
||||
#define MT_422_YCRCB_NORMAL (1<<3)
|
||||
#define MT_422_YCRCB_SWAPUV (2<<3)
|
||||
#define MT_422_YCRCB_SWAPUVY (3<<3)
|
||||
#define MT_COMPRESS_DXT1 (0<<3) /* SURFACE_COMPRESSED */
|
||||
#define MT_COMPRESS_DXT2_3 (1<<3)
|
||||
#define MT_COMPRESS_DXT4_5 (2<<3)
|
||||
#define MT_COMPRESS_FXT1 (3<<3)
|
||||
#define MT_COMPRESS_DXT1_RGB (4<<3)
|
||||
#define MS3_USE_FENCE_REGS (1<<2)
|
||||
#define MS3_TILED_SURFACE (1<<1)
|
||||
#define MS3_TILE_WALK (1<<0)
|
||||
|
||||
/* The pitch is the pitch measured in DWORDS, minus 1 */
|
||||
#define MS4_PITCH_SHIFT 21
|
||||
#define MS4_CUBE_FACE_ENA_NEGX (1<<20)
|
||||
#define MS4_CUBE_FACE_ENA_POSX (1<<19)
|
||||
#define MS4_CUBE_FACE_ENA_NEGY (1<<18)
|
||||
#define MS4_CUBE_FACE_ENA_POSY (1<<17)
|
||||
#define MS4_CUBE_FACE_ENA_NEGZ (1<<16)
|
||||
#define MS4_CUBE_FACE_ENA_POSZ (1<<15)
|
||||
#define MS4_CUBE_FACE_ENA_MASK (0x3f<<15)
|
||||
#define MS4_MAX_LOD_SHIFT 9
|
||||
#define MS4_MAX_LOD_MASK (0x3f<<9)
|
||||
#define MS4_MIP_LAYOUT_LEGACY (0<<8)
|
||||
#define MS4_MIP_LAYOUT_BELOW_LPT (0<<8)
|
||||
#define MS4_MIP_LAYOUT_RIGHT_LPT (1<<8)
|
||||
#define MS4_VOLUME_DEPTH_SHIFT 0
|
||||
#define MS4_VOLUME_DEPTH_MASK (0xff<<0)
|
||||
|
||||
/* p244.
|
||||
* The DWORD count is 3 times the number of bits set in SS1_MAPMASK_MASK.
|
||||
*/
|
||||
#define _3DSTATE_SAMPLER_STATE (CMD_3D|(0x1d<<24)|(0x1<<16))
|
||||
|
||||
#define SS1_MAPMASK_SHIFT 0
|
||||
#define SS1_MAPMASK_MASK (0x8fff<<0)
|
||||
|
||||
#define SS2_REVERSE_GAMMA_ENABLE (1<<31)
|
||||
#define SS2_PACKED_TO_PLANAR_ENABLE (1<<30)
|
||||
#define SS2_COLORSPACE_CONVERSION (1<<29)
|
||||
#define SS2_CHROMAKEY_SHIFT 27
|
||||
#define SS2_BASE_MIP_LEVEL_SHIFT 22
|
||||
#define SS2_BASE_MIP_LEVEL_MASK (0x1f<<22)
|
||||
#define SS2_MIP_FILTER_SHIFT 20
|
||||
#define SS2_MIP_FILTER_MASK (0x3<<20)
|
||||
#define MIPFILTER_NONE 0
|
||||
#define MIPFILTER_NEAREST 1
|
||||
#define MIPFILTER_LINEAR 3
|
||||
#define SS2_MAG_FILTER_SHIFT 17
|
||||
#define SS2_MAG_FILTER_MASK (0x7<<17)
|
||||
#define FILTER_NEAREST 0
|
||||
#define FILTER_LINEAR 1
|
||||
#define FILTER_ANISOTROPIC 2
|
||||
#define FILTER_4X4_1 3
|
||||
#define FILTER_4X4_2 4
|
||||
#define FILTER_4X4_FLAT 5
|
||||
#define FILTER_6X5_MONO 6 /* XXX - check */
|
||||
#define SS2_MIN_FILTER_SHIFT 14
|
||||
#define SS2_MIN_FILTER_MASK (0x7<<14)
|
||||
#define SS2_LOD_BIAS_SHIFT 5
|
||||
#define SS2_LOD_BIAS_ONE (0x10<<5)
|
||||
#define SS2_LOD_BIAS_MASK (0x1ff<<5)
|
||||
/* Shadow requires:
|
||||
* MT_X8{I,L,A}24 or MT_{I,L,A}16 texture format
|
||||
* FILTER_4X4_x MIN and MAG filters
|
||||
*/
|
||||
#define SS2_SHADOW_ENABLE (1<<4)
|
||||
#define SS2_MAX_ANISO_MASK (1<<3)
|
||||
#define SS2_MAX_ANISO_2 (0<<3)
|
||||
#define SS2_MAX_ANISO_4 (1<<3)
|
||||
#define SS2_SHADOW_FUNC_SHIFT 0
|
||||
#define SS2_SHADOW_FUNC_MASK (0x7<<0)
|
||||
/* SS2_SHADOW_FUNC values: see COMPAREFUNC_* */
|
||||
|
||||
#define SS3_MIN_LOD_SHIFT 24
|
||||
#define SS3_MIN_LOD_ONE (0x10<<24)
|
||||
#define SS3_MIN_LOD_MASK (0xff<<24)
|
||||
#define SS3_KILL_PIXEL_ENABLE (1<<17)
|
||||
#define SS3_TCX_ADDR_MODE_SHIFT 12
|
||||
#define SS3_TCX_ADDR_MODE_MASK (0x7<<12)
|
||||
#define TEXCOORDMODE_WRAP 0
|
||||
#define TEXCOORDMODE_MIRROR 1
|
||||
#define TEXCOORDMODE_CLAMP_EDGE 2
|
||||
#define TEXCOORDMODE_CUBE 3
|
||||
#define TEXCOORDMODE_CLAMP_BORDER 4
|
||||
#define TEXCOORDMODE_MIRROR_ONCE 5
|
||||
#define SS3_TCY_ADDR_MODE_SHIFT 9
|
||||
#define SS3_TCY_ADDR_MODE_MASK (0x7<<9)
|
||||
#define SS3_TCZ_ADDR_MODE_SHIFT 6
|
||||
#define SS3_TCZ_ADDR_MODE_MASK (0x7<<6)
|
||||
#define SS3_NORMALIZED_COORDS (1<<5)
|
||||
#define SS3_TEXTUREMAP_INDEX_SHIFT 1
|
||||
#define SS3_TEXTUREMAP_INDEX_MASK (0xf<<1)
|
||||
#define SS3_DEINTERLACER_ENABLE (1<<0)
|
||||
|
||||
#define SS4_BORDER_COLOR_MASK (~0)
|
||||
|
||||
/* 3DSTATE_SPAN_STIPPLE, p258
|
||||
*/
|
||||
#define _3DSTATE_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16))
|
||||
#define ST1_ENABLE (1<<16)
|
||||
#define ST1_MASK (0xffff)
|
||||
|
||||
#define FLUSH_MAP_CACHE (1<<0)
|
||||
#define FLUSH_RENDER_CACHE (1<<1)
|
||||
|
||||
#endif
|
||||
|
|
@ -28,8 +28,7 @@
|
|||
#ifndef _I915XVMC_H
|
||||
#define _I915XVMC_H
|
||||
|
||||
#include "intel_xvmc.h"
|
||||
#include "intel_hwmc.h"
|
||||
#include "intel_xvmc_private.h"
|
||||
|
||||
#define I915_SUBPIC_PALETTE_SIZE 16
|
||||
#define MAX_SUBCONTEXT_LEN 1024
|
||||
|
|
@ -0,0 +1,476 @@
|
|||
/*
|
||||
* New regs for broadwater -- we need to split this file up sensibly somehow.
|
||||
*/
|
||||
#define BRW_3D(Pipeline,Opcode,Subopcode) ((3 << 29) | \
|
||||
((Pipeline) << 27) | \
|
||||
((Opcode) << 24) | \
|
||||
((Subopcode) << 16))
|
||||
|
||||
#define BRW_URB_FENCE BRW_3D(0, 0, 0)
|
||||
#define BRW_CS_URB_STATE BRW_3D(0, 0, 1)
|
||||
#define BRW_CONSTANT_BUFFER BRW_3D(0, 0, 2)
|
||||
#define BRW_STATE_PREFETCH BRW_3D(0, 0, 3)
|
||||
|
||||
#define BRW_STATE_BASE_ADDRESS BRW_3D(0, 1, 1)
|
||||
#define BRW_STATE_SIP BRW_3D(0, 1, 2)
|
||||
#define BRW_PIPELINE_SELECT BRW_3D(0, 1, 4)
|
||||
|
||||
#define NEW_PIPELINE_SELECT BRW_3D(1, 1, 4)
|
||||
|
||||
#define BRW_MEDIA_STATE_POINTERS BRW_3D(2, 0, 0)
|
||||
#define BRW_MEDIA_OBJECT BRW_3D(2, 1, 0)
|
||||
|
||||
#define BRW_3DSTATE_PIPELINED_POINTERS BRW_3D(3, 0, 0)
|
||||
#define BRW_3DSTATE_BINDING_TABLE_POINTERS BRW_3D(3, 0, 1)
|
||||
# define GEN6_3DSTATE_BINDING_TABLE_MODIFY_PS (1 << 12)/* for GEN6 */
|
||||
# define GEN6_3DSTATE_BINDING_TABLE_MODIFY_GS (1 << 9) /* for GEN6 */
|
||||
# define GEN6_3DSTATE_BINDING_TABLE_MODIFY_VS (1 << 8) /* for GEN6 */
|
||||
|
||||
#define BRW_3DSTATE_VERTEX_BUFFERS BRW_3D(3, 0, 8)
|
||||
#define BRW_3DSTATE_VERTEX_ELEMENTS BRW_3D(3, 0, 9)
|
||||
#define BRW_3DSTATE_INDEX_BUFFER BRW_3D(3, 0, 0xa)
|
||||
#define BRW_3DSTATE_VF_STATISTICS BRW_3D(3, 0, 0xb)
|
||||
|
||||
#define BRW_3DSTATE_DRAWING_RECTANGLE BRW_3D(3, 1, 0)
|
||||
#define BRW_3DSTATE_CONSTANT_COLOR BRW_3D(3, 1, 1)
|
||||
#define BRW_3DSTATE_SAMPLER_PALETTE_LOAD BRW_3D(3, 1, 2)
|
||||
#define BRW_3DSTATE_CHROMA_KEY BRW_3D(3, 1, 4)
|
||||
#define BRW_3DSTATE_DEPTH_BUFFER BRW_3D(3, 1, 5)
|
||||
# define BRW_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT 29
|
||||
# define BRW_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT 18
|
||||
|
||||
#define BRW_3DSTATE_POLY_STIPPLE_OFFSET BRW_3D(3, 1, 6)
|
||||
#define BRW_3DSTATE_POLY_STIPPLE_PATTERN BRW_3D(3, 1, 7)
|
||||
#define BRW_3DSTATE_LINE_STIPPLE BRW_3D(3, 1, 8)
|
||||
#define BRW_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP BRW_3D(3, 1, 9)
|
||||
/* These two are BLC and CTG only, not BW or CL */
|
||||
#define BRW_3DSTATE_AA_LINE_PARAMS BRW_3D(3, 1, 0xa)
|
||||
#define BRW_3DSTATE_GS_SVB_INDEX BRW_3D(3, 1, 0xb)
|
||||
|
||||
#define BRW_PIPE_CONTROL BRW_3D(3, 2, 0)
|
||||
|
||||
#define BRW_3DPRIMITIVE BRW_3D(3, 3, 0)
|
||||
|
||||
#define BRW_3DSTATE_CLEAR_PARAMS BRW_3D(3, 1, 0x10)
|
||||
/* DW1 */
|
||||
# define BRW_3DSTATE_DEPTH_CLEAR_VALID (1 << 15)
|
||||
|
||||
/* for GEN6+ */
|
||||
#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS BRW_3D(3, 0, 0x02)
|
||||
# define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_PS (1 << 12)
|
||||
# define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_GS (1 << 9)
|
||||
# define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_VS (1 << 8)
|
||||
|
||||
#define GEN6_3DSTATE_URB BRW_3D(3, 0, 0x05)
|
||||
/* DW1 */
|
||||
# define GEN6_3DSTATE_URB_VS_SIZE_SHIFT 16
|
||||
# define GEN6_3DSTATE_URB_VS_ENTRIES_SHIFT 0
|
||||
/* DW2 */
|
||||
# define GEN6_3DSTATE_URB_GS_ENTRIES_SHIFT 8
|
||||
# define GEN6_3DSTATE_URB_GS_SIZE_SHIFT 0
|
||||
|
||||
#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS BRW_3D(3, 0, 0x0d)
|
||||
# define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CC (1 << 12)
|
||||
# define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_SF (1 << 11)
|
||||
# define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CLIP (1 << 10)
|
||||
|
||||
#define GEN6_3DSTATE_CC_STATE_POINTERS BRW_3D(3, 0, 0x0e)
|
||||
|
||||
#define GEN6_3DSTATE_VS BRW_3D(3, 0, 0x10)
|
||||
|
||||
#define GEN6_3DSTATE_GS BRW_3D(3, 0, 0x11)
|
||||
/* DW4 */
|
||||
# define GEN6_3DSTATE_GS_DISPATCH_START_GRF_SHIFT 0
|
||||
|
||||
#define GEN6_3DSTATE_CLIP BRW_3D(3, 0, 0x12)
|
||||
|
||||
#define GEN6_3DSTATE_SF BRW_3D(3, 0, 0x13)
|
||||
/* DW1 */
|
||||
# define GEN6_3DSTATE_SF_NUM_OUTPUTS_SHIFT 22
|
||||
# define GEN6_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT 11
|
||||
# define GEN6_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT 4
|
||||
/* DW2 */
|
||||
/* DW3 */
|
||||
# define GEN6_3DSTATE_SF_CULL_BOTH (0 << 29)
|
||||
# define GEN6_3DSTATE_SF_CULL_NONE (1 << 29)
|
||||
# define GEN6_3DSTATE_SF_CULL_FRONT (2 << 29)
|
||||
# define GEN6_3DSTATE_SF_CULL_BACK (3 << 29)
|
||||
/* DW4 */
|
||||
# define GEN6_3DSTATE_SF_TRI_PROVOKE_SHIFT 29
|
||||
# define GEN6_3DSTATE_SF_LINE_PROVOKE_SHIFT 27
|
||||
# define GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT 25
|
||||
|
||||
|
||||
#define GEN6_3DSTATE_WM BRW_3D(3, 0, 0x14)
|
||||
/* DW2 */
|
||||
# define GEN6_3DSTATE_WM_SAMPLER_COUNT_SHITF 27
|
||||
# define GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT 18
|
||||
/* DW4 */
|
||||
# define GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT 16
|
||||
/* DW5 */
|
||||
# define GEN6_3DSTATE_WM_MAX_THREADS_SHIFT 25
|
||||
# define GEN6_3DSTATE_WM_DISPATCH_ENABLE (1 << 19)
|
||||
# define GEN6_3DSTATE_WM_16_DISPATCH_ENABLE (1 << 1)
|
||||
# define GEN6_3DSTATE_WM_8_DISPATCH_ENABLE (1 << 0)
|
||||
/* DW6 */
|
||||
# define GEN6_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT 20
|
||||
# define GEN6_3DSTATE_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 15)
|
||||
# define GEN6_3DSTATE_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 14)
|
||||
# define GEN6_3DSTATE_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 13)
|
||||
# define GEN6_3DSTATE_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 12)
|
||||
# define GEN6_3DSTATE_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 11)
|
||||
# define GEN6_3DSTATE_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 10)
|
||||
|
||||
|
||||
#define GEN6_3DSTATE_CONSTANT_VS BRW_3D(3, 0, 0x15)
|
||||
#define GEN6_3DSTATE_CONSTANT_GS BRW_3D(3, 0, 0x16)
|
||||
#define GEN6_3DSTATE_CONSTANT_PS BRW_3D(3, 0, 0x17)
|
||||
|
||||
#define GEN6_3DSTATE_SAMPLE_MASK BRW_3D(3, 0, 0x18)
|
||||
|
||||
#define GEN6_3DSTATE_MULTISAMPLE BRW_3D(3, 1, 0x0d)
|
||||
/* DW1 */
|
||||
# define GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER (0 << 4)
|
||||
# define GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_UPPER_LEFT (1 << 4)
|
||||
# define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_1 (0 << 1)
|
||||
# define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_4 (2 << 1)
|
||||
# define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_8 (3 << 1)
|
||||
|
||||
/* on GEN7+ */
|
||||
/* _3DSTATE_VERTEX_BUFFERS on GEN7*/
|
||||
/* DW1 */
|
||||
#define GEN7_VB0_ADDRESS_MODIFYENABLE (1 << 14)
|
||||
|
||||
/* _3DPRIMITIVE on GEN7 */
|
||||
/* DW1 */
|
||||
# define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL (0 << 8)
|
||||
# define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM (1 << 8)
|
||||
|
||||
/* 3DSTATE_WM on GEN7 */
|
||||
/* DW1 */
|
||||
# define GEN7_WM_STATISTICS_ENABLE (1 << 31)
|
||||
# define GEN7_WM_DEPTH_CLEAR (1 << 30)
|
||||
# define GEN7_WM_DISPATCH_ENABLE (1 << 29)
|
||||
# define GEN6_WM_DEPTH_RESOLVE (1 << 28)
|
||||
# define GEN7_WM_HIERARCHICAL_DEPTH_RESOLVE (1 << 27)
|
||||
# define GEN7_WM_KILL_ENABLE (1 << 25)
|
||||
# define GEN7_WM_PSCDEPTH_OFF (0 << 23)
|
||||
# define GEN7_WM_PSCDEPTH_ON (1 << 23)
|
||||
# define GEN7_WM_PSCDEPTH_ON_GE (2 << 23)
|
||||
# define GEN7_WM_PSCDEPTH_ON_LE (3 << 23)
|
||||
# define GEN7_WM_USES_SOURCE_DEPTH (1 << 20)
|
||||
# define GEN7_WM_USES_SOURCE_W (1 << 19)
|
||||
# define GEN7_WM_POSITION_ZW_PIXEL (0 << 17)
|
||||
# define GEN7_WM_POSITION_ZW_CENTROID (2 << 17)
|
||||
# define GEN7_WM_POSITION_ZW_SAMPLE (3 << 17)
|
||||
# define GEN7_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 16)
|
||||
# define GEN7_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 15)
|
||||
# define GEN7_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 14)
|
||||
# define GEN7_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 13)
|
||||
# define GEN7_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 12)
|
||||
# define GEN7_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 11)
|
||||
# define GEN7_WM_USES_INPUT_COVERAGE_MASK (1 << 10)
|
||||
# define GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5 (0 << 8)
|
||||
# define GEN7_WM_LINE_END_CAP_AA_WIDTH_1_0 (1 << 8)
|
||||
# define GEN7_WM_LINE_END_CAP_AA_WIDTH_2_0 (2 << 8)
|
||||
# define GEN7_WM_LINE_END_CAP_AA_WIDTH_4_0 (3 << 8)
|
||||
# define GEN7_WM_LINE_AA_WIDTH_0_5 (0 << 6)
|
||||
# define GEN7_WM_LINE_AA_WIDTH_1_0 (1 << 6)
|
||||
# define GEN7_WM_LINE_AA_WIDTH_2_0 (2 << 6)
|
||||
# define GEN7_WM_LINE_AA_WIDTH_4_0 (3 << 6)
|
||||
# define GEN7_WM_POLYGON_STIPPLE_ENABLE (1 << 4)
|
||||
# define GEN7_WM_LINE_STIPPLE_ENABLE (1 << 3)
|
||||
# define GEN7_WM_POINT_RASTRULE_UPPER_RIGHT (1 << 2)
|
||||
# define GEN7_WM_MSRAST_OFF_PIXEL (0 << 0)
|
||||
# define GEN7_WM_MSRAST_OFF_PATTERN (1 << 0)
|
||||
# define GEN7_WM_MSRAST_ON_PIXEL (2 << 0)
|
||||
# define GEN7_WM_MSRAST_ON_PATTERN (3 << 0)
|
||||
/* DW2 */
|
||||
# define GEN7_WM_MSDISPMODE_PERPIXEL (1 << 31)
|
||||
|
||||
#define GEN7_3DSTATE_CLEAR_PARAMS BRW_3D(3, 0, 0x04)
|
||||
#define GEN7_3DSTATE_DEPTH_BUFFER BRW_3D(3, 0, 0x05)
|
||||
|
||||
#define GEN7_3DSTATE_CONSTANT_HS BRW_3D(3, 0, 0x19)
|
||||
#define GEN7_3DSTATE_CONSTANT_DS BRW_3D(3, 0, 0x1a)
|
||||
|
||||
#define GEN7_3DSTATE_HS BRW_3D(3, 0, 0x1b)
|
||||
#define GEN7_3DSTATE_TE BRW_3D(3, 0, 0x1c)
|
||||
#define GEN7_3DSTATE_DS BRW_3D(3, 0, 0x1d)
|
||||
#define GEN7_3DSTATE_STREAMOUT BRW_3D(3, 0, 0x1e)
|
||||
#define GEN7_3DSTATE_SBE BRW_3D(3, 0, 0x1f)
|
||||
|
||||
/* DW1 */
|
||||
# define GEN7_SBE_SWIZZLE_CONTROL_MODE (1 << 28)
|
||||
# define GEN7_SBE_NUM_OUTPUTS_SHIFT 22
|
||||
# define GEN7_SBE_SWIZZLE_ENABLE (1 << 21)
|
||||
# define GEN7_SBE_POINT_SPRITE_LOWERLEFT (1 << 20)
|
||||
# define GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT 11
|
||||
# define GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT 4
|
||||
|
||||
#define GEN7_3DSTATE_PS BRW_3D(3, 0, 0x20)
|
||||
/* DW1: kernel pointer */
|
||||
/* DW2 */
|
||||
# define GEN7_PS_SPF_MODE (1 << 31)
|
||||
# define GEN7_PS_VECTOR_MASK_ENABLE (1 << 30)
|
||||
# define GEN7_PS_SAMPLER_COUNT_SHIFT 27
|
||||
# define GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18
|
||||
# define GEN7_PS_FLOATING_POINT_MODE_IEEE_754 (0 << 16)
|
||||
# define GEN7_PS_FLOATING_POINT_MODE_ALT (1 << 16)
|
||||
/* DW3: scratch space */
|
||||
/* DW4 */
|
||||
# define GEN7_PS_MAX_THREADS_SHIFT_IVB 24
|
||||
# define GEN7_PS_MAX_THREADS_SHIFT_HSW 23
|
||||
# define GEN7_PS_SAMPLE_MASK_SHIFT_HSW 12
|
||||
# define GEN7_PS_PUSH_CONSTANT_ENABLE (1 << 11)
|
||||
# define GEN7_PS_ATTRIBUTE_ENABLE (1 << 10)
|
||||
# define GEN7_PS_OMASK_TO_RENDER_TARGET (1 << 9)
|
||||
# define GEN7_PS_DUAL_SOURCE_BLEND_ENABLE (1 << 7)
|
||||
# define GEN7_PS_POSOFFSET_NONE (0 << 3)
|
||||
# define GEN7_PS_POSOFFSET_CENTROID (2 << 3)
|
||||
# define GEN7_PS_POSOFFSET_SAMPLE (3 << 3)
|
||||
# define GEN7_PS_32_DISPATCH_ENABLE (1 << 2)
|
||||
# define GEN7_PS_16_DISPATCH_ENABLE (1 << 1)
|
||||
# define GEN7_PS_8_DISPATCH_ENABLE (1 << 0)
|
||||
/* DW5 */
|
||||
# define GEN7_PS_DISPATCH_START_GRF_SHIFT_0 16
|
||||
# define GEN7_PS_DISPATCH_START_GRF_SHIFT_1 8
|
||||
# define GEN7_PS_DISPATCH_START_GRF_SHIFT_2 0
|
||||
/* DW6: kernel 1 pointer */
|
||||
/* DW7: kernel 2 pointer */
|
||||
|
||||
#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL BRW_3D(3, 0, 0x21)
|
||||
#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC BRW_3D(3, 0, 0x23)
|
||||
|
||||
#define GEN7_3DSTATE_BLEND_STATE_POINTERS BRW_3D(3, 0, 0x24)
|
||||
#define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS BRW_3D(3, 0, 0x25)
|
||||
|
||||
#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS BRW_3D(3, 0, 0x26)
|
||||
#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS BRW_3D(3, 0, 0x27)
|
||||
#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS BRW_3D(3, 0, 0x28)
|
||||
#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS BRW_3D(3, 0, 0x29)
|
||||
#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS BRW_3D(3, 0, 0x2a)
|
||||
|
||||
#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS BRW_3D(3, 0, 0x2b)
|
||||
#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS BRW_3D(3, 0, 0x2e)
|
||||
#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS BRW_3D(3, 0, 0x2f)
|
||||
|
||||
#define GEN7_3DSTATE_URB_VS BRW_3D(3, 0, 0x30)
|
||||
#define GEN7_3DSTATE_URB_HS BRW_3D(3, 0, 0x31)
|
||||
#define GEN7_3DSTATE_URB_DS BRW_3D(3, 0, 0x32)
|
||||
#define GEN7_3DSTATE_URB_GS BRW_3D(3, 0, 0x33)
|
||||
/* DW1 */
|
||||
# define GEN7_URB_ENTRY_NUMBER_SHIFT 0
|
||||
# define GEN7_URB_ENTRY_SIZE_SHIFT 16
|
||||
# define GEN7_URB_STARTING_ADDRESS_SHIFT 25
|
||||
|
||||
#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS BRW_3D(3, 1, 0x12)
|
||||
#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS BRW_3D(3, 1, 0x16)
|
||||
/* DW1 */
|
||||
# define GEN7_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT 16
|
||||
|
||||
|
||||
#define PIPELINE_SELECT_3D 0
|
||||
#define PIPELINE_SELECT_MEDIA 1
|
||||
|
||||
#define UF0_CS_REALLOC (1 << 13)
|
||||
#define UF0_VFE_REALLOC (1 << 12)
|
||||
#define UF0_SF_REALLOC (1 << 11)
|
||||
#define UF0_CLIP_REALLOC (1 << 10)
|
||||
#define UF0_GS_REALLOC (1 << 9)
|
||||
#define UF0_VS_REALLOC (1 << 8)
|
||||
#define UF1_CLIP_FENCE_SHIFT 20
|
||||
#define UF1_GS_FENCE_SHIFT 10
|
||||
#define UF1_VS_FENCE_SHIFT 0
|
||||
#define UF2_CS_FENCE_SHIFT 20
|
||||
#define UF2_VFE_FENCE_SHIFT 10
|
||||
#define UF2_SF_FENCE_SHIFT 0
|
||||
|
||||
/* for BRW_STATE_BASE_ADDRESS */
|
||||
#define BASE_ADDRESS_MODIFY (1 << 0)
|
||||
|
||||
/* for BRW_3DSTATE_PIPELINED_POINTERS */
|
||||
#define BRW_GS_DISABLE 0
|
||||
#define BRW_GS_ENABLE 1
|
||||
#define BRW_CLIP_DISABLE 0
|
||||
#define BRW_CLIP_ENABLE 1
|
||||
|
||||
/* for BRW_PIPE_CONTROL */
|
||||
#define BRW_PIPE_CONTROL_CS_STALL (1 << 20)
|
||||
#define BRW_PIPE_CONTROL_NOWRITE (0 << 14)
|
||||
#define BRW_PIPE_CONTROL_WRITE_QWORD (1 << 14)
|
||||
#define BRW_PIPE_CONTROL_WRITE_DEPTH (2 << 14)
|
||||
#define BRW_PIPE_CONTROL_WRITE_TIME (3 << 14)
|
||||
#define BRW_PIPE_CONTROL_DEPTH_STALL (1 << 13)
|
||||
#define BRW_PIPE_CONTROL_WC_FLUSH (1 << 12)
|
||||
#define BRW_PIPE_CONTROL_IS_FLUSH (1 << 11)
|
||||
#define BRW_PIPE_CONTROL_TC_FLUSH (1 << 10)
|
||||
#define BRW_PIPE_CONTROL_NOTIFY_ENABLE (1 << 8)
|
||||
#define BRW_PIPE_CONTROL_GLOBAL_GTT (1 << 2)
|
||||
#define BRW_PIPE_CONTROL_LOCAL_PGTT (0 << 2)
|
||||
#define BRW_PIPE_CONTROL_STALL_AT_SCOREBOARD (1 << 1)
|
||||
#define BRW_PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0)
|
||||
|
||||
/* VERTEX_BUFFER_STATE Structure */
|
||||
#define VB0_BUFFER_INDEX_SHIFT 27
|
||||
#define GEN6_VB0_BUFFER_INDEX_SHIFT 26
|
||||
#define VB0_VERTEXDATA (0 << 26)
|
||||
#define VB0_INSTANCEDATA (1 << 26)
|
||||
#define GEN6_VB0_VERTEXDATA (0 << 20)
|
||||
#define GEN6_VB0_INSTANCEDATA (1 << 20)
|
||||
#define VB0_BUFFER_PITCH_SHIFT 0
|
||||
|
||||
/* VERTEX_ELEMENT_STATE Structure */
|
||||
#define VE0_VERTEX_BUFFER_INDEX_SHIFT 27
|
||||
#define GEN6_VE0_VERTEX_BUFFER_INDEX_SHIFT 26 /* for GEN6 */
|
||||
#define VE0_VALID (1 << 26)
|
||||
#define GEN6_VE0_VALID (1 << 25) /* for GEN6 */
|
||||
#define VE0_FORMAT_SHIFT 16
|
||||
#define VE0_OFFSET_SHIFT 0
|
||||
#define VE1_VFCOMPONENT_0_SHIFT 28
|
||||
#define VE1_VFCOMPONENT_1_SHIFT 24
|
||||
#define VE1_VFCOMPONENT_2_SHIFT 20
|
||||
#define VE1_VFCOMPONENT_3_SHIFT 16
|
||||
#define VE1_DESTINATION_ELEMENT_OFFSET_SHIFT 0
|
||||
|
||||
/* 3DPRIMITIVE bits */
|
||||
#define BRW_3DPRIMITIVE_VERTEX_SEQUENTIAL (0 << 15)
|
||||
#define BRW_3DPRIMITIVE_VERTEX_RANDOM (1 << 15)
|
||||
/* Primitive types are in brw_defines.h */
|
||||
#define BRW_3DPRIMITIVE_TOPOLOGY_SHIFT 10
|
||||
|
||||
#define BRW_SVG_CTL 0x7400
|
||||
|
||||
#define BRW_SVG_CTL_GS_BA (0 << 8)
|
||||
#define BRW_SVG_CTL_SS_BA (1 << 8)
|
||||
#define BRW_SVG_CTL_IO_BA (2 << 8)
|
||||
#define BRW_SVG_CTL_GS_AUB (3 << 8)
|
||||
#define BRW_SVG_CTL_IO_AUB (4 << 8)
|
||||
#define BRW_SVG_CTL_SIP (5 << 8)
|
||||
|
||||
#define BRW_SVG_RDATA 0x7404
|
||||
#define BRW_SVG_WORK_CTL 0x7408
|
||||
|
||||
#define BRW_VF_CTL 0x7500
|
||||
|
||||
#define BRW_VF_CTL_SNAPSHOT_COMPLETE (1 << 31)
|
||||
#define BRW_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID (0 << 8)
|
||||
#define BRW_VF_CTL_SNAPSHOT_MUX_SELECT_VF_DEBUG (1 << 8)
|
||||
#define BRW_VF_CTL_SNAPSHOT_TYPE_VERTEX_SEQUENCE (0 << 4)
|
||||
#define BRW_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX (1 << 4)
|
||||
#define BRW_VF_CTL_SKIP_INITIAL_PRIMITIVES (1 << 3)
|
||||
#define BRW_VF_CTL_MAX_PRIMITIVES_LIMIT_ENABLE (1 << 2)
|
||||
#define BRW_VF_CTL_VERTEX_RANGE_LIMIT_ENABLE (1 << 1)
|
||||
#define BRW_VF_CTL_SNAPSHOT_ENABLE (1 << 0)
|
||||
|
||||
#define BRW_VF_STRG_VAL 0x7504
|
||||
#define BRW_VF_STR_VL_OVR 0x7508
|
||||
#define BRW_VF_VC_OVR 0x750c
|
||||
#define BRW_VF_STR_PSKIP 0x7510
|
||||
#define BRW_VF_MAX_PRIM 0x7514
|
||||
#define BRW_VF_RDATA 0x7518
|
||||
|
||||
#define BRW_VS_CTL 0x7600
|
||||
#define BRW_VS_CTL_SNAPSHOT_COMPLETE (1 << 31)
|
||||
#define BRW_VS_CTL_SNAPSHOT_MUX_VERTEX_0 (0 << 8)
|
||||
#define BRW_VS_CTL_SNAPSHOT_MUX_VERTEX_1 (1 << 8)
|
||||
#define BRW_VS_CTL_SNAPSHOT_MUX_VALID_COUNT (2 << 8)
|
||||
#define BRW_VS_CTL_SNAPSHOT_MUX_VS_KERNEL_POINTER (3 << 8)
|
||||
#define BRW_VS_CTL_SNAPSHOT_ALL_THREADS (1 << 2)
|
||||
#define BRW_VS_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1)
|
||||
#define BRW_VS_CTL_SNAPSHOT_ENABLE (1 << 0)
|
||||
|
||||
#define BRW_VS_STRG_VAL 0x7604
|
||||
#define BRW_VS_RDATA 0x7608
|
||||
|
||||
#define BRW_SF_CTL 0x7b00
|
||||
#define BRW_SF_CTL_SNAPSHOT_COMPLETE (1 << 31)
|
||||
#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_0_FF_ID (0 << 8)
|
||||
#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_0_REL_COUNT (1 << 8)
|
||||
#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_1_FF_ID (2 << 8)
|
||||
#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_1_REL_COUNT (3 << 8)
|
||||
#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_2_FF_ID (4 << 8)
|
||||
#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_2_REL_COUNT (5 << 8)
|
||||
#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT (6 << 8)
|
||||
#define BRW_SF_CTL_SNAPSHOT_MUX_SF_KERNEL_POINTER (7 << 8)
|
||||
#define BRW_SF_CTL_MIN_MAX_PRIMITIVE_RANGE_ENABLE (1 << 4)
|
||||
#define BRW_SF_CTL_DEBUG_CLIP_RECTANGLE_ENABLE (1 << 3)
|
||||
#define BRW_SF_CTL_SNAPSHOT_ALL_THREADS (1 << 2)
|
||||
#define BRW_SF_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1)
|
||||
#define BRW_SF_CTL_SNAPSHOT_ENABLE (1 << 0)
|
||||
|
||||
#define BRW_SF_STRG_VAL 0x7b04
|
||||
#define BRW_SF_RDATA 0x7b18
|
||||
|
||||
#define BRW_WIZ_CTL 0x7c00
|
||||
#define BRW_WIZ_CTL_SNAPSHOT_COMPLETE (1 << 31)
|
||||
#define BRW_WIZ_CTL_SUBSPAN_INSTANCE_SHIFT 16
|
||||
#define BRW_WIZ_CTL_SNAPSHOT_MUX_WIZ_KERNEL_POINTER (0 << 8)
|
||||
#define BRW_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE (1 << 8)
|
||||
#define BRW_WIZ_CTL_SNAPSHOT_MUX_PRIMITIVE_SEQUENCE (2 << 8)
|
||||
#define BRW_WIZ_CTL_SINGLE_SUBSPAN_DISPATCH (1 << 6)
|
||||
#define BRW_WIZ_CTL_IGNORE_COLOR_SCOREBOARD_STALLS (1 << 5)
|
||||
#define BRW_WIZ_CTL_ENABLE_SUBSPAN_INSTANCE_COMPARE (1 << 4)
|
||||
#define BRW_WIZ_CTL_USE_UPSTREAM_SNAPSHOT_FLAG (1 << 3)
|
||||
#define BRW_WIZ_CTL_SNAPSHOT_ALL_THREADS (1 << 2)
|
||||
#define BRW_WIZ_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1)
|
||||
#define BRW_WIZ_CTL_SNAPSHOT_ENABLE (1 << 0)
|
||||
|
||||
#define BRW_WIZ_STRG_VAL 0x7c04
|
||||
#define BRW_WIZ_RDATA 0x7c18
|
||||
|
||||
#define BRW_TS_CTL 0x7e00
|
||||
#define BRW_TS_CTL_SNAPSHOT_COMPLETE (1 << 31)
|
||||
#define BRW_TS_CTL_SNAPSHOT_MESSAGE_ERROR (0 << 8)
|
||||
#define BRW_TS_CTL_SNAPSHOT_INTERFACE_DESCRIPTOR (3 << 8)
|
||||
#define BRW_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS (1 << 2)
|
||||
#define BRW_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS (1 << 1)
|
||||
#define BRW_TS_CTL_SNAPSHOT_ENABLE (1 << 0)
|
||||
|
||||
#define BRW_TS_STRG_VAL 0x7e04
|
||||
#define BRW_TS_RDATA 0x7e08
|
||||
|
||||
#define BRW_TD_CTL 0x8000
|
||||
#define BRW_TD_CTL_MUX_SHIFT 8
|
||||
#define BRW_TD_CTL_EXTERNAL_HALT_R0_DEBUG_MATCH (1 << 7)
|
||||
#define BRW_TD_CTL_FORCE_EXTERNAL_HALT (1 << 6)
|
||||
#define BRW_TD_CTL_EXCEPTION_MASK_OVERRIDE (1 << 5)
|
||||
#define BRW_TD_CTL_FORCE_THREAD_BREAKPOINT_ENABLE (1 << 4)
|
||||
#define BRW_TD_CTL_BREAKPOINT_ENABLE (1 << 2)
|
||||
#define BRW_TD_CTL2 0x8004
|
||||
#define BRW_TD_CTL2_ILLEGAL_OPCODE_EXCEPTION_OVERRIDE (1 << 28)
|
||||
#define BRW_TD_CTL2_MASKSTACK_EXCEPTION_OVERRIDE (1 << 26)
|
||||
#define BRW_TD_CTL2_SOFTWARE_EXCEPTION_OVERRIDE (1 << 25)
|
||||
#define BRW_TD_CTL2_ACTIVE_THREAD_LIMIT_SHIFT 16
|
||||
#define BRW_TD_CTL2_ACTIVE_THREAD_LIMIT_ENABLE (1 << 8)
|
||||
#define BRW_TD_CTL2_THREAD_SPAWNER_EXECUTION_MASK_ENABLE (1 << 7)
|
||||
#define BRW_TD_CTL2_WIZ_EXECUTION_MASK_ENABLE (1 << 6)
|
||||
#define BRW_TD_CTL2_SF_EXECUTION_MASK_ENABLE (1 << 5)
|
||||
#define BRW_TD_CTL2_CLIPPER_EXECUTION_MASK_ENABLE (1 << 4)
|
||||
#define BRW_TD_CTL2_GS_EXECUTION_MASK_ENABLE (1 << 3)
|
||||
#define BRW_TD_CTL2_VS_EXECUTION_MASK_ENABLE (1 << 0)
|
||||
#define BRW_TD_VF_VS_EMSK 0x8008
|
||||
#define BRW_TD_GS_EMSK 0x800c
|
||||
#define BRW_TD_CLIP_EMSK 0x8010
|
||||
#define BRW_TD_SF_EMSK 0x8014
|
||||
#define BRW_TD_WIZ_EMSK 0x8018
|
||||
#define BRW_TD_0_6_EHTRG_VAL 0x801c
|
||||
#define BRW_TD_0_7_EHTRG_VAL 0x8020
|
||||
#define BRW_TD_0_6_EHTRG_MSK 0x8024
|
||||
#define BRW_TD_0_7_EHTRG_MSK 0x8028
|
||||
#define BRW_TD_RDATA 0x802c
|
||||
#define BRW_TD_TS_EMSK 0x8030
|
||||
|
||||
#define BRW_EU_CTL 0x8800
|
||||
#define BRW_EU_CTL_SELECT_SHIFT 16
|
||||
#define BRW_EU_CTL_DATA_MUX_SHIFT 8
|
||||
#define BRW_EU_ATT_0 0x8810
|
||||
#define BRW_EU_ATT_1 0x8814
|
||||
#define BRW_EU_ATT_DATA_0 0x8820
|
||||
#define BRW_EU_ATT_DATA_1 0x8824
|
||||
#define BRW_EU_ATT_CLR_0 0x8830
|
||||
#define BRW_EU_ATT_CLR_1 0x8834
|
||||
#define BRW_EU_RDATA 0x8840
|
||||
|
||||
/* End regs for broadwater */
|
||||
|
||||
|
|
@ -24,13 +24,11 @@
|
|||
* Zou Nan hai <nanhai.zou@intel.com>
|
||||
*
|
||||
*/
|
||||
#include "intel_xvmc.h"
|
||||
#include "intel_xvmc_private.h"
|
||||
#include "i830_reg.h"
|
||||
#include "i965_reg.h"
|
||||
#include "brw_defines.h"
|
||||
#include "brw_structs.h"
|
||||
#include "intel_batchbuffer.h"
|
||||
#include "intel_hwmc.h"
|
||||
#define BATCH_STRUCT(x) intelBatchbufferData(&x, sizeof(x), 0)
|
||||
#define URB_SIZE 256 /* XXX */
|
||||
|
||||
|
|
@ -43,7 +43,7 @@
|
|||
#include <X11/extensions/XvMC.h>
|
||||
#include <X11/extensions/XvMClib.h>
|
||||
|
||||
#include "intel_xvmc.h"
|
||||
#include "intel_xvmc_private.h"
|
||||
#include "intel_batchbuffer.h"
|
||||
#include "brw_defines.h"
|
||||
#include "brw_structs.h"
|
||||
|
|
@ -24,7 +24,7 @@
|
|||
* Zhenyu Wang <zhenyu.z.wang@intel.com>
|
||||
*
|
||||
*/
|
||||
#include "intel_xvmc.h"
|
||||
#include "intel_xvmc_private.h"
|
||||
#include <xcb/xcb.h>
|
||||
#include <xcb/xcb_aux.h>
|
||||
#include <xcb/dri2.h>
|
||||
|
|
@ -24,7 +24,7 @@
|
|||
* Zhenyu Wang <zhenyu.z.wang@intel.com>
|
||||
*
|
||||
*/
|
||||
#include "intel_xvmc.h"
|
||||
#include "intel_xvmc_private.h"
|
||||
|
||||
#define DUMPFILE "./intel_xvmc_dump"
|
||||
|
||||
|
|
@ -41,7 +41,6 @@
|
|||
#include <stdint.h>
|
||||
|
||||
#include <xf86drm.h>
|
||||
#include "intel_hwmc.h"
|
||||
#include <X11/X.h>
|
||||
#include <X11/Xlibint.h>
|
||||
#include <X11/Xutil.h>
|
||||
|
|
@ -52,9 +51,11 @@
|
|||
#include <X11/extensions/XvMClib.h>
|
||||
#include <X11/extensions/vldXvMC.h>
|
||||
#include <drm_sarea.h>
|
||||
|
||||
#include "i915_drm.h"
|
||||
#include "intel_bufmgr.h"
|
||||
|
||||
#include "intel_xvmc.h"
|
||||
#include "intel_batchbuffer.h"
|
||||
|
||||
#define GTT_PAGE_SIZE 4*1024
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue