Add untested save/restore code, and starting on not using VBEValidateModes
This commit is contained in:
Eric Anholt
Eric Anholt
parent
73496b765c
commit
4955cd267e
1
TODO
1
TODO
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@ -1 +1,2 @@
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- licensing of new files
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- Figure out what exactly doublescan, interlace mean, and see if we support them.
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32
src/i830.h
32
src/i830.h
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@ -377,6 +377,38 @@ typedef struct _I830Rec {
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Bool devicePresence;
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OsTimerPtr devicesTimer;
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CARD32 saveDSPACNTR;
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CARD32 saveDSPBCNTR;
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CARD32 savePIPEACONF;
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CARD32 savePIPEBCONF;
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CARD32 savePIPEASRC;
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CARD32 savePIPEBSRC;
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CARD32 saveFPA0;
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CARD32 saveFPA1;
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CARD32 saveDPLL_A;
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CARD32 saveHTOTAL_A;
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CARD32 saveHBLANK_A;
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CARD32 saveHSYNC_A;
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CARD32 saveVTOTAL_A;
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CARD32 saveVBLANK_A;
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CARD32 saveVSYNC_A;
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CARD32 saveDSPASTRIDE;
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CARD32 saveDSPAPOS;
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CARD32 saveDSPABASE;
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CARD32 saveFPB0;
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CARD32 saveFPB1;
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CARD32 saveDPLL_B;
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CARD32 saveHTOTAL_B;
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CARD32 saveHBLANK_B;
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CARD32 saveHSYNC_B;
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CARD32 saveVTOTAL_B;
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CARD32 saveVBLANK_B;
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CARD32 saveVSYNC_B;
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CARD32 saveDSPBSTRIDE;
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CARD32 saveDSPBPOS;
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CARD32 saveDSPBBASE;
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} I830Rec;
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#define I830PTR(p) ((I830Ptr)((p)->driverPrivate))
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@ -697,6 +697,7 @@ I830GetBestRefresh(ScrnInfoPtr pScrn, int refresh)
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return i;
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}
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#if 0
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static int
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SetRefreshRate(ScrnInfoPtr pScrn, int mode, int refresh)
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{
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@ -724,7 +725,6 @@ SetRefreshRate(ScrnInfoPtr pScrn, int mode, int refresh)
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return 0;
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}
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#if 0
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static Bool
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SetPowerStatus(ScrnInfoPtr pScrn, int mode)
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{
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@ -2075,6 +2075,7 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
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int DDCclock = 0;
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char *s;
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DisplayModePtr p, pMon;
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ClockRangePtr clockRanges;
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pointer pDDCModule = NULL, pVBEModule = NULL;
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Bool enable;
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const char *chipname;
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@ -3225,6 +3226,20 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
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SetPipeAccess(pScrn);
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VBESetModeNames(pScrn->modePool);
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#if 0
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/*
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* Setup the ClockRanges, which describe what clock ranges are available,
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* and what sort of modes they can be used for.
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*/
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clockRanges = xnfcalloc(sizeof(ClockRange), 1);
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clockRanges->next = NULL;
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clockRanges->minClock = 12000; /* XXX: Random number */
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clockRanges->maxClock = 400000; /* XXX: May be lower */
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clockRanges->clockIndex = -1; /* programmable */
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clockRanges->interlaceAllowed = TRUE; /* XXX check this */
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clockRanges->doubleScanAllowed = FALSE; /* XXX check this */
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#endif
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/*
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* XXX DDC information: There's code in xf86ValidateModes
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* (VBEValidateModes) to set monitor defaults based on DDC information
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@ -3235,12 +3250,23 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
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/* XXX Need to get relevant modes and virtual parameters. */
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/* Do the mode validation without regard to special scanline pitches. */
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SetPipeAccess(pScrn);
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#if 1
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n = VBEValidateModes(pScrn, NULL, pScrn->display->modes, NULL,
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NULL, 0, MAX_DISPLAY_PITCH, 1,
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0, MAX_DISPLAY_HEIGHT,
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pScrn->display->virtualX,
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pScrn->display->virtualY,
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memsize, LOOKUP_BEST_REFRESH);
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#else
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n = xf86ValidateModes(pScrn, pScrn->monitor->Modes,
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pScrn->display->modes, clockRanges,
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NULL, 256, 4096,
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pScrn->bitsPerPixel, 128, 4096,
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pScrn->display->virtualX,
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pScrn->display->virtualY,
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pI830->FbMapSize,
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LOOKUP_BEST_REFRESH);
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#endif
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if (n <= 0) {
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xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes.\n");
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PreInitCleanup(pScrn);
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@ -3716,6 +3742,39 @@ SaveHWState(ScrnInfoPtr pScrn)
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DPRINTF(PFX, "SaveHWState\n");
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/* Save video mode information for native mode-setting. */
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pI830->saveDSPACNTR = INREG(DSPACNTR);
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pI830->saveDSPBCNTR = INREG(DSPBCNTR);
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pI830->savePIPEACONF = INREG(PIPEACONF);
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pI830->savePIPEBCONF = INREG(PIPEBCONF);
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pI830->savePIPEASRC = INREG(PIPEASRC);
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pI830->savePIPEBSRC = INREG(PIPEBSRC);
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pI830->saveFPA0 = INREG(FPA0);
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pI830->saveFPA1 = INREG(FPA1);
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pI830->saveDPLL_A = INREG(DPLL_A);
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pI830->saveHTOTAL_A = INREG(HTOTAL_A);
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pI830->saveHBLANK_A = INREG(HBLANK_A);
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pI830->saveHSYNC_A = INREG(HSYNC_A);
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pI830->saveVTOTAL_A = INREG(VTOTAL_A);
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pI830->saveVBLANK_A = INREG(VBLANK_A);
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pI830->saveVSYNC_A = INREG(VSYNC_A);
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pI830->saveDSPASTRIDE = INREG(DSPASTRIDE);
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pI830->saveDSPAPOS = INREG(DSPAPOS);
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pI830->saveDSPABASE = INREG(DSPABASE);
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pI830->saveFPB0 = INREG(FPB0);
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pI830->saveFPB1 = INREG(FPB1);
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pI830->saveDPLL_B = INREG(DPLL_B);
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pI830->saveHTOTAL_B = INREG(HTOTAL_B);
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pI830->saveHBLANK_B = INREG(HBLANK_B);
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pI830->saveHSYNC_B = INREG(HSYNC_B);
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pI830->saveVTOTAL_B = INREG(VTOTAL_B);
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pI830->saveVBLANK_B = INREG(VBLANK_B);
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pI830->saveVSYNC_B = INREG(VSYNC_B);
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pI830->saveDSPBSTRIDE = INREG(DSPBSTRIDE);
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pI830->saveDSPBPOS = INREG(DSPBPOS);
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pI830->saveDSPBBASE = INREG(DSPBBASE);
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if (I830IsPrimary(pScrn) && pI830->pipe != pI830->origPipe)
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SetBIOSPipe(pScrn, pI830->origPipe);
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else
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@ -3788,6 +3847,7 @@ RestoreHWState(ScrnInfoPtr pScrn)
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vgaRegPtr vgaReg = &hwp->SavedReg;
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VESAPtr pVesa;
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Bool restored = FALSE;
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CARD32 temp;
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DPRINTF(PFX, "RestoreHWState\n");
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@ -3852,6 +3912,54 @@ RestoreHWState(ScrnInfoPtr pScrn)
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vgaHWRestore(pScrn, vgaReg, VGA_SR_FONTS);
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vgaHWLock(hwp);
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/* First, disable display planes */
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temp = INREG(DSPACNTR);
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OUTREG(DSPACNTR, temp & ~DISPLAY_PLANE_ENABLE);
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temp = INREG(DSPBCNTR);
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OUTREG(DSPBCNTR, temp & ~DISPLAY_PLANE_ENABLE);
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/* Next, disable display pipes */
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temp = INREG(PIPEACONF);
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OUTREG(PIPEACONF, temp & ~PIPEACONF_ENABLE);
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temp = INREG(PIPEBCONF);
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OUTREG(PIPEBCONF, temp & ~PIPEBCONF_ENABLE);
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/* XXX: Wait for a vblank */
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sleep(1);
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OUTREG(FPA0, pI830->saveFPA0);
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OUTREG(FPA1, pI830->saveFPA1);
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OUTREG(DPLL_A, pI830->saveDPLL_A);
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OUTREG(HTOTAL_A, pI830->saveHTOTAL_A);
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OUTREG(HBLANK_A, pI830->saveHBLANK_A);
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OUTREG(HSYNC_A, pI830->saveHSYNC_A);
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OUTREG(VTOTAL_A, pI830->saveVTOTAL_A);
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OUTREG(VBLANK_A, pI830->saveVBLANK_A);
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OUTREG(VSYNC_A, pI830->saveVSYNC_A);
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OUTREG(DSPASTRIDE, pI830->saveDSPASTRIDE);
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OUTREG(DSPAPOS, pI830->saveDSPAPOS);
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OUTREG(DSPABASE, pI830->saveDSPABASE);
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OUTREG(FPB0, pI830->saveFPB0);
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OUTREG(FPB1, pI830->saveFPB1);
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OUTREG(DPLL_B, pI830->saveDPLL_B);
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OUTREG(HTOTAL_B, pI830->saveHTOTAL_B);
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OUTREG(HBLANK_B, pI830->saveHBLANK_B);
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OUTREG(HSYNC_B, pI830->saveHSYNC_B);
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OUTREG(VTOTAL_B, pI830->saveVTOTAL_B);
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OUTREG(VBLANK_B, pI830->saveVBLANK_B);
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OUTREG(VSYNC_B, pI830->saveVSYNC_B);
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OUTREG(DSPBSTRIDE, pI830->saveDSPBSTRIDE);
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OUTREG(DSPBPOS, pI830->saveDSPBPOS);
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OUTREG(DSPBBASE, pI830->saveDSPBBASE);
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OUTREG(DSPACNTR, pI830->saveDSPACNTR);
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OUTREG(DSPBCNTR, pI830->saveDSPBCNTR);
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OUTREG(PIPEACONF, pI830->savePIPEACONF);
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OUTREG(PIPEBCONF, pI830->savePIPEBCONF);
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OUTREG(PIPEASRC, pI830->savePIPEASRC);
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OUTREG(PIPEBSRC, pI830->savePIPEBSRC);
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return TRUE;
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}
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