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Merge branch 'master' into crestline

This commit is contained in:
Wang Zhenyu 2006-11-06 10:25:23 +08:00
parent 64447c7a05 fbb376bd1a
commit 49a6bea7d9
21 changed files with 1513 additions and 1054 deletions
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17
configure.ac
View File

@ -22,7 +22,7 @@
AC_PREREQ(2.57)
AC_INIT([xf86-video-i810],
1.6.5,
1.7.2,
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
xf86-video-i810)
@ -49,6 +49,9 @@ AC_DISABLE_STATIC
AC_PROG_LIBTOOL
AC_PROG_CC
AC_CHECK_PROG(gen4asm, [intel-gen4asm], yes, no)
AM_CONDITIONAL(HAVE_GEN4ASM, test x$gen4asm = xyes)
AH_TOP([#include "xorg-server.h"])
AC_ARG_WITH(xorg-module-dir,
@ -62,6 +65,11 @@ AC_ARG_ENABLE(dri, AC_HELP_STRING([--disable-dri],
[DRI="$enableval"],
[DRI=auto])
AC_ARG_ENABLE(video-debug, AC_HELP_STRING([--enable-video-debug],
[Enable video debugging support [[default=no]]]),
[VIDEO_DEBUG="$enableval"],
[VIDEO_DEBUG=no])
# Checks for extensions
XORG_DRIVER_CHECK_EXT(XINERAMA, xineramaproto)
@ -114,11 +122,16 @@ CFLAGS="$CFLAGS $WARN_CFLAGS"
AM_CONDITIONAL(DRI, test x$DRI = xyes)
if test "$DRI" = yes; then
PKG_CHECK_MODULES(DRI, [libdrm >= 2.0 xf86driproto])
PKG_CHECK_MODULES(DRI, [libdrm >= 2.2 xf86driproto])
AC_DEFINE(XF86DRI,1,[Enable DRI driver support])
AC_DEFINE(XF86DRI_DEVEL,1,[Enable developmental DRI driver support])
fi
AM_CONDITIONAL(VIDEO_DEBUG, test x$VIDEO_DEBUG = xyes)
if test "$VIDEO_DEBUG" = yes; then
AC_DEFINE(VIDEO_DEBUG,1,[Enable debug support])
fi
AC_SUBST([DRI_CFLAGS])
AC_SUBST([XORG_CFLAGS])
AC_SUBST([moduledir])

28
man/i810.man
View File

@ -49,7 +49,7 @@ DRI is enabled. This amount may be changed with the
entry in the config file
.B "Device"
section. It may be set to any reasonable value up to 64MB for older
chipsets or 128MB for newer chipets. It is advisable to check the
chipsets or 128MB for newer chipsets. It is advisable to check the
__xservername__
log file to check if any features have been disabled because of insufficient
video memory. In particular, DRI support or tiling mode may be disabled
@ -201,8 +201,32 @@ Default: 0 degrees.
.BI "Option \*qLinearAlloc\*q \*q" integer \*q
Allows more memory for the offscreen allocator. This usually helps in
situations where HDTV movies are required to play but not enough offscreen
memory is usually available. Set this to 6144 for upto 1920x1080 HDTV support.
memory is usually available. Set this to 8160 for upto 1920x1080 HDTV support.
Default 0KB (off).
.TP
.BI "Option \*qLegacy3D\*q \*q" boolean \*q
Enable support for the legacy i915_dri.so 3D driver.
This will, among other things, make the 2D driver tell libGL to
load the 3D driver i915_dri.so instead of the newer i915tex_dri.so.
This option is only used for chipsets in the range i830-i945.
Default for i830-i945 series: Enabled for i915 drm versions < 1.7.0. Otherwise
disabled.
Default for i810: The option is not used.
Default for i965: The option is always true.
.TP
.BI "Option \*qAperTexSize\*q \*q" integer \*q
Give the size in kiB of the AGP aperture area that is reserved for the
DRM memory manager present in i915 drm from version 1.7.0 and upwards,
and that is used with the 3D driver in Mesa from version 6.5.2 and
upwards. If the size is set too high to make room for pre-allocated
VideoRam, the driver will try to reduce it automatically. If you use only
older Mesa or DRM versions, you may set this value to zero, and
atctivate the legacy texture pool (see
.B "Option \*qLegacy3D\*q"
). If you run 3D programs with large texture memory requirements, you might
gain some performance by increasing this value.
Default: 32768.
.SH "SEE ALSO"
__xservername__(__appmansuffix__), __xconfigfile__(__filemansuffix__), xorgconfig(__appmansuffix__), Xserver(__appmansuffix__), X(__miscmansuffix__)

12
src/Makefile.am
View File

@ -33,6 +33,7 @@ i810_drv_ladir = @moduledir@/drivers
i810_drv_la_SOURCES = \
brw_defines.h \
brw_structs.h \
sf_prog.h \
wm_prog.h \
common.h \
i810_accel.c \
@ -66,6 +67,13 @@ i810_drv_la_SOURCES = \
i915_reg.h \
i915_video.c
if HAVE_GEN4ASM
sf_prog.h: packed_yuv_sf.g4a
intel-gen4asm -o sf_prog.h packed_yuv_sf.g4a
wm_prog.h: packed_yuv_wm.g4a
intel-gen4asm -o wm_prog.h packed_yuv_wm.g4a
endif
if DRI
i810_drv_la_SOURCES += \
i810_dri.c \
@ -74,3 +82,7 @@ i810_drv_la_SOURCES += \
i810_hwmc.c \
i830_dri.h
endif
EXTRA_DIST = \
packed_yuv_sf.g4a \
packed_yuv_wm.g4a

1336
src/brw_structs.h
View File

File diff suppressed because it is too large Load Diff

4
src/i810_dri.h
View File

@ -9,8 +9,8 @@
#define I810_MAX_DRAWABLES 256
#define I810_MAJOR_VERSION 1
#define I810_MINOR_VERSION 6
#define I810_PATCHLEVEL 3
#define I810_MINOR_VERSION 7
#define I810_PATCHLEVEL 2
typedef struct {
drm_handle_t regs;

15
src/i810_driver.c
View File

@ -315,6 +315,12 @@ const char *I810drmSymbols[] = {
"drmGetLibVersion",
"drmGetVersion",
"drmRmMap",
#ifdef XSERVER_LIBDRM_MM
"drmMMInit",
"drmMMTakedown",
"drmMMLock",
"drmMMUnlock",
#endif
NULL
};
@ -335,6 +341,8 @@ const char *I810driSymbols[] = {
NULL
};
#endif /* I830_ONLY */
const char *I810shadowSymbols[] = {
"shadowInit",
"shadowSetup",
@ -342,8 +350,6 @@ const char *I810shadowSymbols[] = {
NULL
};
#endif /* I830_ONLY */
#ifndef I810_DEBUG
int I810_DEBUG = (0
/* | DEBUG_ALWAYS_SYNC */
@ -410,9 +416,9 @@ i810Setup(pointer module, pointer opts, int *errmaj, int *errmin)
#ifdef XF86DRI
I810drmSymbols,
I810driSymbols,
#endif
I810shadowSymbols,
I810shadowFBSymbols,
#endif
I810vbeSymbols, vbeOptionalSymbols,
I810ddcSymbols, I810int10Symbols, NULL);
@ -1189,14 +1195,13 @@ I810MapMem(ScrnInfoPtr pScrn)
long i;
for (i = 2; i < pI810->FbMapSize; i <<= 1) ;
pI810->FbMapSize = i;
if (!I810MapMMIO(pScrn))
return FALSE;
pI810->FbBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER,
pI810->PciTag,
pI810->LinearAddr, pI810->FbMapSize);
pI810->LinearAddr, i);
if (!pI810->FbBase)
return FALSE;

11
src/i810_reg.h
View File

@ -1238,12 +1238,11 @@ typedef enum {
TvIndex,
DfpIndex,
LfpIndex,
Crt2Index,
Tv2Index,
Dfp2Index,
UnknownIndex,
Unknown2Index,
NumDisplayTypes,
NumKnownDisplayTypes = UnknownIndex
Lfp2Index,
NumDisplayTypes
} DisplayType;
/* What's connected to the pipes (as reported by the BIOS) */
@ -1252,10 +1251,10 @@ typedef enum {
#define PIPE_TV_ACTIVE (1 << TvIndex)
#define PIPE_DFP_ACTIVE (1 << DfpIndex)
#define PIPE_LCD_ACTIVE (1 << LfpIndex)
#define PIPE_CRT2_ACTIVE (1 << Crt2Index)
#define PIPE_TV2_ACTIVE (1 << Tv2Index)
#define PIPE_DFP2_ACTIVE (1 << Dfp2Index)
#define PIPE_UNKNOWN_ACTIVE ((1 << UnknownIndex) | \
(1 << Unknown2Index))
#define PIPE_LCD2_ACTIVE (1 << Lfp2Index)
#define PIPE_SIZED_DISP_MASK (PIPE_DFP_ACTIVE | \
PIPE_LCD_ACTIVE | \

15
src/i830.h
View File

@ -107,6 +107,13 @@ typedef struct _VESARec {
} VESARec, *VESAPtr;
#ifdef XF86DRI
#define I830_MM_MINPAGES 512
#define I830_MM_MAXSIZE (32*1024)
#define I830_KERNEL_MM (1 << 0) /* Initialize the kernel memory manager*/
#define I830_KERNEL_TEX (1 << 1) /* Allocate texture memory pool */
#endif
typedef struct _I830Rec *I830Ptr;
typedef void (*I830WriteIndexedByteFunc)(I830Ptr pI830, IOADDRESS addr,
@ -285,6 +292,8 @@ typedef struct _I830Rec {
int TexGranularity;
int drmMinor;
Bool have3DWindows;
int mmModeFlags;
int mmSize;
unsigned int front_tiled;
unsigned int back_tiled;
@ -573,4 +582,10 @@ Rotation I830GetRotation(ScreenPtr pScreen);
#define _845_DRAM_RW_CONTROL 0x90
#define DRAM_WRITE 0x33330000
/*
* Xserver MM compatibility. Remove code guarded by this when the
* XServer contains the libdrm mm code
*/
#undef XSERVER_LIBDRM_MM
#endif /* _I830_H_ */

4
src/i830_accel.c
View File

@ -395,6 +395,7 @@ I830AccelInit(ScreenPtr pScreen)
return XAAInit(pScreen, infoPtr);
}
#ifdef XF86DRI
static unsigned int
CheckTiling(ScrnInfoPtr pScrn)
{
@ -416,6 +417,9 @@ CheckTiling(ScrnInfoPtr pScrn)
return tiled;
}
#else
#define CheckTiling(pScrn) 0
#endif
void
I830SetupForSolidFill(ScrnInfoPtr pScrn, int color, int rop,

9
src/i830_common.h
View File

@ -121,6 +121,15 @@ typedef struct {
unsigned int depth_tiled;
unsigned int rotated_tiled;
unsigned int rotated2_tiled;
int pipeA_x;
int pipeA_y;
int pipeA_w;
int pipeA_h;
int pipeB_x;
int pipeB_y;
int pipeB_w;
int pipeB_h;
} drmI830Sarea;
/* Flags for perf_boxes

18
src/i830_cursor.c
View File

@ -520,11 +520,17 @@ I830SetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
x -= pScrn->frameX0;
y -= pScrn->frameY0;
/* Clamp the cursor position to the visible screen area */
if (x >= pScrn->currentMode->HDisplay) x = pScrn->currentMode->HDisplay - 1;
if (y >= pScrn->currentMode->VDisplay) y = pScrn->currentMode->VDisplay - 1;
if (x <= -I810_CURSOR_X) x = -I810_CURSOR_X + 1;
if (y <= -I810_CURSOR_Y) y = -I810_CURSOR_Y + 1;
if (pScrn->currentMode) {
/* Clamp the cursor position to the visible screen area */
if (x >= pScrn->currentMode->HDisplay) x = pScrn->currentMode->HDisplay - 1;
if (y >= pScrn->currentMode->VDisplay) y = pScrn->currentMode->VDisplay - 1;
if (x <= -I810_CURSOR_X) x = -I810_CURSOR_X + 1;
if (y <= -I810_CURSOR_Y) y = -I810_CURSOR_Y + 1;
} else {
/* Can't ensure the cursor will be visible, so hide it */
hide = TRUE;
show = FALSE;
}
#if 0
/*
@ -655,7 +661,7 @@ I830ShowCursor(ScrnInfoPtr pScrn)
temp &= ~(CURSOR_FORMAT_MASK | CURSOR_GAMMA_ENABLE);
temp |= CURSOR_ENABLE;
if (pI830->CursorIsARGB)
temp |= CURSOR_FORMAT_ARGB;
temp |= CURSOR_FORMAT_ARGB | CURSOR_GAMMA_ENABLE;
else
temp |= CURSOR_FORMAT_3C;
OUTREG(CURSOR_CONTROL, temp);

113
src/i830_dri.c
View File

@ -1,4 +1,4 @@
/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.c,v 1.15 2003/06/18 13:14:17 dawes Exp $ */
/* $xfree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.c,v 1.15 2003/06/18 13:14:17 dawes Exp $ */
/**************************************************************************
Copyright 2001 VA Linux Systems Inc., Fremont, California.
@ -84,8 +84,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "dristruct.h"
static char I830KernelDriverName[] = "i915";
static char I830ClientDriverName[] = "i915";
static char I830ClientDriverName[] = "i915tex";
static char I965ClientDriverName[] = "i965";
static char I830LegacyClientDriverName[] = "i915";
static Bool I830InitVisualConfigs(ScreenPtr pScreen);
static Bool I830CreateContext(ScreenPtr pScreen, VisualPtr visual,
@ -644,10 +645,31 @@ I830DRIScreenInit(ScreenPtr pScreen)
return FALSE;
}
pI830->drmMinor = version->version_minor;
if (!(pI830->mmModeFlags & I830_KERNEL_TEX)) {
if ((version->version_major > 1) ||
((version->version_minor >= 7) &&
(version->version_major == 1))) {
pI830->mmModeFlags |= I830_KERNEL_MM;
} else {
pI830->mmModeFlags |= I830_KERNEL_TEX;
}
} else {
xf86DrvMsg(pScreen->myNum, X_INFO,
"Not enabling the DRM memory manager.\n");
}
drmFreeVersion(version);
}
}
/*
* Backwards compatibility
*/
if ((pDRIInfo->clientDriverName == I830ClientDriverName) &&
(pI830->mmModeFlags & I830_KERNEL_TEX)) {
pDRIInfo->clientDriverName = I830LegacyClientDriverName;
}
return TRUE;
}
@ -707,18 +729,20 @@ I830DRIMapScreenRegions(ScrnInfoPtr pScrn, drmI830Sarea *sarea)
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[drm] Depth Buffer = 0x%08x\n",
(int)sarea->depth_handle);
if (drmAddMap(pI830->drmSubFD,
(drm_handle_t)sarea->tex_offset + pI830->LinearAddr,
sarea->tex_size, DRM_AGP, 0,
(drmAddress) &sarea->tex_handle) < 0) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"[drm] drmAddMap(tex_handle) failed. Disabling DRI\n");
DRICloseScreen(pScreen);
return FALSE;
}
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[drm] textures = 0x%08x\n",
(int)sarea->tex_handle);
if (pI830->mmModeFlags & I830_KERNEL_TEX) {
if (drmAddMap(pI830->drmSubFD,
(drm_handle_t)sarea->tex_offset + pI830->LinearAddr,
sarea->tex_size, DRM_AGP, 0,
(drmAddress) &sarea->tex_handle) < 0) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"[drm] drmAddMap(tex_handle) failed. Disabling DRI\n");
DRICloseScreen(pScreen);
return FALSE;
}
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[drm] textures = 0x%08x\n",
(int)sarea->tex_handle);
}
return TRUE;
}
@ -835,29 +859,6 @@ I830DRIDoMappings(ScreenPtr pScreen)
I830SetParam(pScrn, I830_SETPARAM_USE_MI_BATCHBUFFER_START, 1 );
}
/* Okay now initialize the dma engine */
{
pI830DRI->irq = drmGetInterruptFromBusID(pI830->drmSubFD,
((pciConfigPtr) pI830->
PciInfo->thisCard)->busnum,
((pciConfigPtr) pI830->
PciInfo->thisCard)->devnum,
((pciConfigPtr) pI830->
PciInfo->thisCard)->funcnum);
if (drmCtlInstHandler(pI830->drmSubFD, pI830DRI->irq)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"[drm] failure adding irq handler\n");
pI830DRI->irq = 0;
DRICloseScreen(pScreen);
return FALSE;
}
else
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"[drm] dma control initialized, using IRQ %d\n",
pI830DRI->irq);
}
pI830DRI = (I830DRIPtr) pI830->pDRIInfo->devPrivate;
pI830DRI->deviceID = pI830->PciInfo->chipType;
pI830DRI->width = pScrn->virtualX;
@ -982,7 +983,34 @@ I830DRIFinishScreenInit(ScreenPtr pScreen)
pI830->allowPageFlip = 0;
return DRIFinishScreenInit(pScreen);
if (!DRIFinishScreenInit(pScreen))
return FALSE;
/* Okay now initialize the dma engine */
{
I830DRIPtr pI830DRI = (I830DRIPtr) pI830->pDRIInfo->devPrivate;
pI830DRI->irq = drmGetInterruptFromBusID(pI830->drmSubFD,
((pciConfigPtr) pI830->
PciInfo->thisCard)->busnum,
((pciConfigPtr) pI830->
PciInfo->thisCard)->devnum,
((pciConfigPtr) pI830->
PciInfo->thisCard)->funcnum);
if (drmCtlInstHandler(pI830->drmSubFD, pI830DRI->irq)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"[drm] failure adding irq handler\n");
pI830DRI->irq = 0;
DRICloseScreen(pScreen);
return FALSE;
}
else
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"[drm] dma control initialized, using IRQ %d\n",
pI830DRI->irq);
return TRUE;
}
}
void
@ -1471,7 +1499,7 @@ I830UpdateDRIBuffers(ScrnInfoPtr pScrn, drmI830Sarea *sarea)
success = I830DRIMapScreenRegions(pScrn, sarea);
if (success)
if (success && (pI830->mmModeFlags & I830_KERNEL_TEX))
I830InitTextureHeap(pScrn, sarea);
return success;
@ -1485,9 +1513,12 @@ I830DRISetVBlankInterrupt (ScrnInfoPtr pScrn, Bool on)
if (pI830->directRenderingEnabled && pI830->drmMinor >= 5) {
if (on) {
if (pI830->planeEnabled[1])
pipe.pipe = DRM_I830_VBLANK_PIPE_B;
else
if (pI830->planeEnabled[1]) {
if (pI830->drmMinor >= 6)
pipe.pipe = DRM_I830_VBLANK_PIPE_A | DRM_I830_VBLANK_PIPE_B;
else
pipe.pipe = DRM_I830_VBLANK_PIPE_B;
} else
pipe.pipe = DRM_I830_VBLANK_PIPE_A;
} else {
pipe.pipe = 0;

4
src/i830_dri.h
View File

@ -9,8 +9,8 @@
#define I830_MAX_DRAWABLES 256
#define I830_MAJOR_VERSION 1
#define I830_MINOR_VERSION 6
#define I830_PATCHLEVEL 4
#define I830_MINOR_VERSION 7
#define I830_PATCHLEVEL 2
#define I830_REG_SIZE 0x80000

405
src/i830_driver.c
View File

@ -197,6 +197,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifdef XF86DRI
#include "dri.h"
#include <sys/ioctl.h>
#include <errno.h>
#endif
#define BIT(x) (1 << (x))
@ -270,7 +272,9 @@ typedef enum {
OPTION_SECONDHSYNC,
OPTION_SECONDVREFRESH,
OPTION_SECONDPOSITION,
OPTION_INTELXINERAMA
OPTION_INTELXINERAMA,
OPTION_INTELTEXPOOL,
OPTION_INTELMMSIZE
} I830Opts;
static OptionInfoRec I830BIOSOptions[] = {
@ -298,6 +302,8 @@ static OptionInfoRec I830BIOSOptions[] = {
{OPTION_SECONDVREFRESH,"SecondMonitorVertRefresh",OPTV_STRING,{0}, FALSE },
{OPTION_SECONDPOSITION,"SecondPosition",OPTV_STRING, {0}, FALSE },
{OPTION_INTELXINERAMA,"MergedXinerama",OPTV_BOOLEAN, {0}, TRUE},
{OPTION_INTELTEXPOOL,"Legacy3D", OPTV_BOOLEAN, {0}, FALSE},
{OPTION_INTELMMSIZE, "AperTexSize", OPTV_INTEGER, {0}, FALSE},
{-1, NULL, OPTV_NONE, {0}, FALSE}
};
/* *INDENT-ON* */
@ -1344,15 +1350,49 @@ I830UpdateXineramaScreenInfo(ScrnInfoPtr pScrn1)
Bool infochanged = FALSE;
Bool usenonrect = pI830->NonRect;
const char *rectxine = "\t... setting up rectangular Xinerama layout\n";
#ifdef XF86DRI
drmI830Sarea *sarea = NULL;
if (pI830->directRenderingEnabled) {
sarea = (drmI830Sarea *) DRIGetSAREAPrivate(pScrn1->pScreen);
}
#endif
pI830->MBXNR1XMAX = pI830->MBXNR1YMAX = pI830->MBXNR2XMAX = pI830->MBXNR2YMAX = 65536;
pI830->HaveNonRect = pI830->HaveOffsRegions = FALSE;
if(!pI830->MergedFB) return;
if(!pI830->MergedFB) {
#ifdef XF86DRI
if (pI830->directRenderingEnabled) {
sarea->pipeA_x = sarea->pipeA_y = sarea->pipeB_x = sarea->pipeB_y = 0;
if(I830noPanoramiXExtension) return;
if (pI830->planeEnabled[0]) {
sarea->pipeA_w = pScrn1->virtualX;
sarea->pipeA_h = pScrn1->virtualY;
} else {
sarea->pipeA_w = 0;
sarea->pipeA_h = 0;
}
if(!I830XineramadataPtr) return;
if (pI830->planeEnabled[1]) {
sarea->pipeB_w = pScrn1->virtualX;
sarea->pipeB_h = pScrn1->virtualY;
} else {
sarea->pipeB_w = 0;
sarea->pipeB_h = 0;
}
}
#endif
return;
}
if (I830noPanoramiXExtension || !I830XineramadataPtr) {
#ifdef XF86DRI
if (!pI830->directRenderingEnabled)
#endif
return;
}
if(pI830->SecondIsScrn0) {
scrnnum1 = 1;
@ -1633,14 +1673,30 @@ I830UpdateXineramaScreenInfo(ScrnInfoPtr pScrn1)
}
I830XineramadataPtr[scrnnum1].x = x1;
I830XineramadataPtr[scrnnum1].y = y1;
I830XineramadataPtr[scrnnum1].width = w1;
I830XineramadataPtr[scrnnum1].height = h1;
I830XineramadataPtr[scrnnum2].x = x2;
I830XineramadataPtr[scrnnum2].y = y2;
I830XineramadataPtr[scrnnum2].width = w2;
I830XineramadataPtr[scrnnum2].height = h2;
#ifdef XF86DRI
if (pI830->directRenderingEnabled) {
sarea->pipeA_x = x1;
sarea->pipeA_y = y1;
sarea->pipeA_w = w1;
sarea->pipeA_h = h1;
sarea->pipeB_x = x2;
sarea->pipeB_y = y2;
sarea->pipeB_w = w2;
sarea->pipeB_h = h2;
}
#endif
if (I830XineramadataPtr && !I830noPanoramiXExtension) {
I830XineramadataPtr[scrnnum1].x = x1;
I830XineramadataPtr[scrnnum1].y = y1;
I830XineramadataPtr[scrnnum1].width = w1;
I830XineramadataPtr[scrnnum1].height = h1;
I830XineramadataPtr[scrnnum2].x = x2;
I830XineramadataPtr[scrnnum2].y = y2;
I830XineramadataPtr[scrnnum2].width = w2;
I830XineramadataPtr[scrnnum2].height = h2;
} else
return;
if(infochanged) {
xf86DrvMsg(pScrn1->scrnIndex, X_INFO,
@ -2016,9 +2072,6 @@ I830XineramaExtensionInit(ScrnInfoPtr pScrn)
pI830->I830XineramaVY = 0;
}
I830UpdateXineramaScreenInfo(pScrn);
}
static void
@ -2575,37 +2628,15 @@ static Bool
I830Set640x480(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
int m = 0x30; /* 640x480 8bpp */
int m;
switch (pScrn->depth) {
case 15:
m = 0x40;
break;
case 16:
m = 0x41;
break;
case 24:
m = 0x50;
break;
}
m |= (1 << 15) | (1 << 14);
/* 640x480 8bpp */
m = 0x30 | (1 << 15) | (1 << 14);
if (VBESetVBEMode(pI830->pVbe, m, NULL))
return TRUE;
/* if the first failed, let's try the next - usually 800x600 */
m = 0x32;
switch (pScrn->depth) {
case 15:
case 16:
m = 0x42;
break;
case 24:
m = 0x52;
break;
}
m |= (1 << 15) | (1 << 14);
m = 0x32 | (1 << 15) | (1 << 14);
if (VBESetVBEMode(pI830->pVbe, m, NULL))
return TRUE;
@ -2854,12 +2885,14 @@ GetDisplayInfo(ScrnInfoPtr pScrn, int device, Bool *attached, Bool *present,
DPRINTF(PFX, "GetDisplayInfo: device: 0x%x\n", device);
switch (device & 0xff) {
case 0x01:
case 0x02:
case 0x04:
case 0x08:
case 0x10:
case 0x20:
case PIPE_CRT:
case PIPE_TV:
case PIPE_DFP:
case PIPE_LFP:
case PIPE_CRT2:
case PIPE_TV2:
case PIPE_DFP2:
case PIPE_LFP2:
break;
default:
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
@ -2966,10 +2999,6 @@ PrintDisplayDeviceInfo(ScrnInfoPtr pScrn)
name = DeviceToString(-1);
} while (name);
if (pipe & PIPE_UNKNOWN_ACTIVE)
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"\tSome unknown display devices may also be present\n");
} else {
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"No active displays on Pipe %c.\n", PIPE_NAME(n));
@ -3002,7 +3031,7 @@ GetPipeSizes(ScrnInfoPtr pScrn)
pipe = (pI830->operatingDevices >> PIPE_SHIFT(n)) & PIPE_ACTIVE_MASK;
pI830->pipeDisplaySize[n].x1 = pI830->pipeDisplaySize[n].y1 = 0;
pI830->pipeDisplaySize[n].x2 = pI830->pipeDisplaySize[n].y2 = 4096;
for (i = 0; i < NumKnownDisplayTypes; i++) {
for (i = 0; i < NumDisplayTypes; i++) {
if (pipe & (1 << i) & PIPE_SIZED_DISP_MASK) {
if (pI830->displaySize[i].x2 != 0) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@ -3039,7 +3068,7 @@ I830DetectDisplayDevice(ScrnInfoPtr pScrn)
"\t If you encounter this problem please add \n"
"\t\t Option \"DisplayInfo\" \"FALSE\"\n"
"\t to the Device section of your XF86Config file.\n");
for (i = 0; i < NumKnownDisplayTypes; i++) {
for (i = 0; i < NumDisplayTypes; i++) {
if (GetDisplayInfo(pScrn, 1 << i, &pI830->displayAttached[i],
&pI830->displayPresent[i],
&pI830->displaySize[i].x2,
@ -3804,6 +3833,28 @@ I830IsPrimary(ScrnInfoPtr pScrn)
return TRUE;
}
#ifdef XF86DRI
static void
I830ReduceMMSize(ScrnInfoPtr pScrn, unsigned long newSize,
const char *reason)
{
I830Ptr pI830 = I830PTR(pScrn);
newSize = ROUND_DOWN_TO(newSize, GTT_PAGE_SIZE);
if (newSize / GTT_PAGE_SIZE > I830_MM_MINPAGES) {
pI830->mmSize = newSize / 1024;
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"DRM memory manager aperture size is reduced to %d kiB\n"
"\t%s\n", pI830->mmSize, reason);
} else {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"DRM memory manager will be disabled\n\t%s\n", reason);
pI830->mmSize = 0;
}
}
#endif
static Bool
I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
{
@ -3826,6 +3877,9 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
const char *chipname;
unsigned int ver;
char v[5];
#ifdef XF86DRI
unsigned long savedMMSize;
#endif
if (pScrn->numEntities != 1)
return FALSE;
@ -4225,7 +4279,46 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
"runs only at depths 16 and 24.\n");
pI830->directRenderingDisabled = TRUE;
}
}
pI830->mmModeFlags = 0;
if (!pI830->directRenderingDisabled) {
Bool tmp = FALSE;
if (IS_I965G(pI830))
pI830->mmModeFlags |= I830_KERNEL_TEX;
from = X_PROBED;
if (xf86GetOptValBool(pI830->Options,
OPTION_INTELTEXPOOL, &tmp)) {
from = X_CONFIG;
if (tmp) {
pI830->mmModeFlags |= I830_KERNEL_TEX;
} else {
pI830->mmModeFlags &= ~I830_KERNEL_TEX;
}
}
if (from == X_CONFIG ||
(pI830->mmModeFlags & I830_KERNEL_TEX)) {
xf86DrvMsg(pScrn->scrnIndex, from,
"Will %stry to allocate texture pool "
"for old Mesa 3D driver.\n",
(pI830->mmModeFlags & I830_KERNEL_TEX) ?
"" : "not ");
}
pI830->mmSize = I830_MM_MAXSIZE;
from = X_INFO;
if (xf86GetOptValInteger(pI830->Options, OPTION_INTELMMSIZE,
&(pI830->mmSize))) {
from = X_CONFIG;
}
xf86DrvMsg(pScrn->scrnIndex, from,
"Will try to reserve %d kiB of AGP aperture space\n"
"\tfor the DRM memory manager.\n",
pI830->mmSize);
}
}
#endif
pI830->LinearAlloc = 0;
@ -5333,9 +5426,15 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
* If DRI is potentially usable, check if there is enough memory available
* for it, and if there's also enough to allow tiling to be enabled.
*/
#if defined(XF86DRI)
if (!I830CheckDRIAvailable(pScrn))
if (!I830CheckDRIAvailable(pScrn)) {
pI830->directRenderingDisabled = TRUE;
pI830->mmSize = 0;
} else if (pScrn->videoRam > pI830->FbMapSize / 1024 - pI830->mmSize) {
I830ReduceMMSize(pScrn, pI830->FbMapSize - KB(pScrn->videoRam),
"to make room for video memory");
}
if (I830IsPrimary(pScrn) && !pI830->directRenderingDisabled) {
int savedDisplayWidth = pScrn->displayWidth;
@ -5377,7 +5476,9 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
* If the displayWidth is a tilable pitch, test if there's enough
* memory available to enable tiling.
*/
savedMMSize = pI830->mmSize;
if (pScrn->displayWidth == pitches[i]) {
retry_dryrun:
I830ResetAllocations(pScrn, 0);
if (I830Allocate2DMemory(pScrn, ALLOCATE_DRY_RUN | ALLOC_INITIAL) &&
I830Allocate3DMemory(pScrn, ALLOCATE_DRY_RUN)) {
@ -5389,7 +5490,13 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
"required to\n\tenable tiling mode for DRI.\n",
(memNeeded + 1023) / 1024);
}
if (pI830->MemoryAperture.Size < 0) {
if (pI830->MemoryAperture.Size < 0) {
if (KB(pI830->mmSize) > I830_MM_MINPAGES * GTT_PAGE_SIZE) {
I830ReduceMMSize(pScrn, I830_MM_MINPAGES * GTT_PAGE_SIZE,
"to make room in AGP aperture for tiling.");
goto retry_dryrun;
}
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Allocation with DRI tiling enabled would "
"exceed the\n"
@ -5417,7 +5524,9 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
* Tiling can't be enabled. Check if there's enough memory for DRI
* without tiling.
*/
pI830->mmSize = savedMMSize;
pI830->disableTiling = TRUE;
retry_dryrun2:
I830ResetAllocations(pScrn, 0);
if (I830Allocate2DMemory(pScrn, ALLOCATE_DRY_RUN | ALLOC_INITIAL) &&
I830Allocate3DMemory(pScrn, ALLOCATE_DRY_RUN | ALLOC_NO_TILING)) {
@ -5430,6 +5539,11 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
(memNeeded + 1023) / 1024);
}
if (pI830->MemoryAperture.Size < 0) {
if (KB(pI830->mmSize) > I830_MM_MINPAGES * GTT_PAGE_SIZE) {
I830ReduceMMSize(pScrn, I830_MM_MINPAGES * GTT_PAGE_SIZE,
"to save AGP aperture space for video memory.");
goto retry_dryrun2;
}
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Allocation with DRI enabled would "
"exceed the\n"
@ -5438,6 +5552,7 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
pI830->FbMapSize / 1024,
-pI830->MemoryAperture.Size / 1024);
}
pI830->mmSize = 0;
pI830->directRenderingDisabled = TRUE;
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Disabling DRI.\n");
}
@ -5450,6 +5565,16 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
#endif
pI830->disableTiling = TRUE; /* no DRI - so disableTiling */
if (pScrn->displayWidth >= 4096) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Cannot support > 1024x768 in leftof/rightof configurations. disabling DRI.\n");
pI830->directRenderingDisabled = TRUE;
}
if (pScrn->virtualY > 2048) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Cannot support > 2048 vertical lines. disabling acceleration.\n");
pI830->noAccel = TRUE;
}
pI830->displayWidth = pScrn->displayWidth;
SetPipeAccess(pScrn);
@ -6925,6 +7050,7 @@ I830InitFBManager(
BoxPtr FullBox
){
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
I830Ptr pI830 = I830PTR(pScrn);
RegionRec ScreenRegion;
RegionRec FullRegion;
BoxRec ScreenBox;
@ -6933,7 +7059,7 @@ I830InitFBManager(
ScreenBox.x1 = 0;
ScreenBox.y1 = 0;
ScreenBox.x2 = pScrn->displayWidth;
if (pScrn->virtualX > pScrn->virtualY)
if (!pI830->MergedFB && pScrn->virtualX > pScrn->virtualY)
ScreenBox.y2 = pScrn->virtualX;
else
ScreenBox.y2 = pScrn->virtualY;
@ -6991,6 +7117,87 @@ IntelEmitInvarientState(ScrnInfoPtr pScrn)
}
}
#ifdef XF86DRI
#ifndef DRM_BO_MEM_TT
#error "Wrong drm.h file included. You need to compile and install a recent libdrm."
#endif
#ifndef XSERVER_LIBDRM_MM
static int
I830DrmMMInit(int drmFD, unsigned long pageOffs, unsigned long pageSize,
unsigned memType)
{
drm_mm_init_arg_t arg;
int ret;
memset(&arg, 0, sizeof(arg));
arg.req.op = mm_init;
arg.req.p_offset = pageOffs;
arg.req.p_size = pageSize;
arg.req.mem_type = memType;
ret = ioctl(drmFD, DRM_IOCTL_MM_INIT, &arg);
if (ret)
return -errno;
return 0;
}
static int
I830DrmMMTakedown(int drmFD, unsigned memType)
{
drm_mm_init_arg_t arg;
int ret = 0;
memset(&arg, 0, sizeof(arg));
arg.req.op = mm_takedown;
arg.req.mem_type = memType;
if (ioctl(drmFD, DRM_IOCTL_MM_INIT, &arg)) {
ret = -errno;
}
return ret;
}
static int I830DrmMMLock(int fd, unsigned memType)
{
drm_mm_init_arg_t arg;
int ret;
memset(&arg, 0, sizeof(arg));
arg.req.op = mm_lock;
arg.req.mem_type = memType;
do{
ret = ioctl(fd, DRM_IOCTL_MM_INIT, &arg);
} while (ret && errno == EAGAIN);
return ret;
}
static int I830DrmMMUnlock(int fd, unsigned memType)
{
drm_mm_init_arg_t arg;
int ret;
memset(&arg, 0, sizeof(arg));
arg.req.op = mm_unlock;
arg.req.mem_type = memType;
do{
ret = ioctl(fd, DRM_IOCTL_MM_INIT, &arg);
} while (ret && errno == EAGAIN);
return ret;
}
#endif
#endif
static Bool
I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
{
@ -7447,6 +7654,9 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "libshadow is version %d.%d.%d, required 1.1.0 or greater for rotation.\n",pI830->shadowReq.majorversion,pI830->shadowReq.minorversion,pI830->shadowReq.patchlevel);
}
/* Call this unconditionally, as it also sets some fields in the SAREA */
I830UpdateXineramaScreenInfo(pScrn);
if (serverGeneration == 1)
xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options);
@ -7495,9 +7705,52 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
break;
}
#ifdef XF86DRI
if (pI830->directRenderingEnabled && (pI830->mmModeFlags & I830_KERNEL_MM)) {
unsigned long aperEnd = ROUND_DOWN_TO(pI830->FbMapSize, GTT_PAGE_SIZE)
/ GTT_PAGE_SIZE;
unsigned long aperStart = ROUND_TO(pI830->FbMapSize - KB(pI830->mmSize), GTT_PAGE_SIZE)
/ GTT_PAGE_SIZE;
if (aperEnd < aperStart || aperEnd - aperStart < I830_MM_MINPAGES) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Too little AGP aperture space for DRM memory manager.\n"
"\tPlease increase AGP aperture size from BIOS configuration screen\n"
"\tor decrease the amount of video RAM using option \"VideoRam\".\n"
"\tDisabling DRI.\n");
pI830->directRenderingOpen = FALSE;
I830DRICloseScreen(pScreen);
pI830->directRenderingEnabled = FALSE;
} else {
#ifndef XSERVER_LIBDRM_MM
if (I830DrmMMInit(pI830->drmSubFD, aperStart, aperEnd - aperStart,
DRM_BO_MEM_TT)) {
#else
if (drmMMInit(pI830->drmSubFD, aperStart, aperEnd - aperStart,
DRM_BO_MEM_TT)) {
#endif
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Could not initialize the DRM memory manager.\n");
pI830->directRenderingOpen = FALSE;
I830DRICloseScreen(pScreen);
pI830->directRenderingEnabled = FALSE;
} else {
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Initialized DRM memory manager, %ld AGP pages\n"
"\tat AGP offset 0x%lx\n",
aperEnd - aperStart,
aperStart);
}
}
}
#endif
return TRUE;
}
static void
I830AdjustFrame(int scrnIndex, int x, int y, int flags)
{
@ -7651,7 +7904,13 @@ I830BIOSLeaveVT(int scrnIndex, int flags)
#ifdef XF86DRI
if (pI830->directRenderingOpen) {
DRILock(screenInfo.screens[pScrn->scrnIndex], 0);
if (pI830->mmModeFlags & I830_KERNEL_MM) {
#ifndef XSERVER_LIBDRM_MM
I830DrmMMLock(pI830->drmSubFD, DRM_BO_MEM_TT);
#else
drmMMLock(pI830->drmSubFD, DRM_BO_MEM_TT);
#endif
}
I830DRISetVBlankInterrupt (pScrn, FALSE);
drmCtlUninstHandler(pI830->drmSubFD);
@ -8019,7 +8278,11 @@ I830BIOSEnterVT(int scrnIndex, int flags)
* the Video BIOS with our saved devices, and only when that fails,
* we'll warm boot it.
*/
if (!I830Set640x480(pScrn)) {
/* Check Pipe conf registers or possibly HTOTAL/VTOTAL for 0x00000000)*/
CARD32 temp;
Bool set = I830Set640x480(pScrn);
temp = pI830->pipe ? INREG(PIPEBCONF) : INREG(PIPEACONF);
if (!set || !(temp & 0x80000000)) {
xf86Int10InfoPtr pInt;
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@ -8084,13 +8347,15 @@ I830BIOSEnterVT(int scrnIndex, int flags)
#ifdef XF86DRI
if (pI830->directRenderingEnabled) {
I830DRISetVBlankInterrupt (pScrn, TRUE);
if (!pI830->starting) {
ScreenPtr pScreen = pScrn->pScreen;
drmI830Sarea *sarea = (drmI830Sarea *) DRIGetSAREAPrivate(pScreen);
int i;
I830DRIResume(screenInfo.screens[scrnIndex]);
I830DRISetVBlankInterrupt (pScrn, TRUE);
I830RefreshRing(pScrn);
I830Sync(pScrn);
@ -8100,6 +8365,14 @@ I830BIOSEnterVT(int scrnIndex, int flags)
for(i = 0; i < I830_NR_TEX_REGIONS+1 ; i++)
sarea->texList[i].age = sarea->texAge;
if (pI830->mmModeFlags & I830_KERNEL_MM) {
#ifndef XSERVER_LIBDRM_MM
I830DrmMMUnlock(pI830->drmSubFD, DRM_BO_MEM_TT);
#else
drmMMUnlock(pI830->drmSubFD, DRM_BO_MEM_TT);
#endif
}
DPRINTF(PFX, "calling dri unlock\n");
DRIUnlock(screenInfo.screens[pScrn->scrnIndex]);
}
@ -8189,10 +8462,9 @@ I830BIOSSwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
/* Since RandR (indirectly) uses SwitchMode(), we need to
* update our Xinerama info here, too, in case of resizing
* Call this unconditionally, as it also sets some fields in the SAREA
*/
if(pI830->MergedFB) {
I830UpdateXineramaScreenInfo(pScrn);
}
I830UpdateXineramaScreenInfo(pScrn);
return ret;
}
@ -8314,6 +8586,13 @@ I830BIOSCloseScreen(int scrnIndex, ScreenPtr pScreen)
pI830->closing = TRUE;
#ifdef XF86DRI
if (pI830->directRenderingOpen) {
if (pI830->mmModeFlags & I830_KERNEL_MM) {
#ifndef XSERVER_LIBDRM_MM
I830DrmMMTakedown(pI830->drmSubFD, DRM_BO_MEM_TT);
#else
drmMMTakedown(pI830->drmSubFD, DRM_BO_MEM_TT);
#endif
}
pI830->directRenderingOpen = FALSE;
I830DRICloseScreen(pScreen);
}

80
src/i830_memory.c
View File

@ -783,7 +783,7 @@ I830Allocate2DMemory(ScrnInfoPtr pScrn, const int flags)
pI830->FbMemBox.x1 = 0;
pI830->FbMemBox.x2 = pScrn->displayWidth;
pI830->FbMemBox.y1 = 0;
if (pScrn->virtualX > pScrn->virtualY)
if (!pI830->MergedFB && pScrn->virtualX > pScrn->virtualY)
pI830->FbMemBox.y2 = pScrn->virtualX;
else
pI830->FbMemBox.y2 = pScrn->virtualY;
@ -855,7 +855,7 @@ I830Allocate2DMemory(ScrnInfoPtr pScrn, const int flags)
}
#if 1 /* ROTATION */
if (pScrn->virtualX > pScrn->virtualY)
if (!pI830->MergedFB && pScrn->virtualX > pScrn->virtualY)
size = lineSize * (pScrn->virtualX + cacheLines);
else
size = lineSize * (pScrn->virtualY + cacheLines);
@ -1107,6 +1107,12 @@ I830ResetAllocations(ScrnInfoPtr pScrn, const int flags)
pI830->MemoryAperture.Start = pI830->StolenMemory.End;
pI830->MemoryAperture.End = pI830->FbMapSize;
pI830->MemoryAperture.Size = pI830->FbMapSize - pI830->StolenMemory.Size;
#ifdef XF86DRI
if (!pI830->directRenderingDisabled) {
pI830->MemoryAperture.End -= KB(pI830->mmSize);
pI830->MemoryAperture.Size -= KB(pI830->mmSize);
}
#endif
pI830->StolenPool.Fixed = pI830->StolenMemory;
pI830->StolenPool.Total = pI830->StolenMemory;
#if ALLOCATE_ALL_BIOSMEM
@ -1286,37 +1292,41 @@ I830AllocateTextureMemory(ScrnInfoPtr pScrn, const int flags)
/* Allocate the remaining space for textures. */
memset(&(pI830->TexMem), 0, sizeof(pI830->TexMem));
pI830->TexMem.Key = -1;
size = GetFreeSpace(pScrn);
if (dryrun && (size < MB(1)))
size = MB(1);
i = myLog2(size / I830_NR_TEX_REGIONS);
if (i < I830_LOG_MIN_TEX_REGION_SIZE)
i = I830_LOG_MIN_TEX_REGION_SIZE;
pI830->TexGranularity = i;
/* Truncate size */
size >>= i;
size <<= i;
if (size < KB(512)) {
if (!dryrun) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Less than 512 kBytes for texture space (real %ld kBytes).\n",
size / 1024);
if (pI830->mmModeFlags & I830_KERNEL_TEX) {
size = GetFreeSpace(pScrn);
if (dryrun && (size < MB(1)))
size = MB(1);
i = myLog2(size / I830_NR_TEX_REGIONS);
if (i < I830_LOG_MIN_TEX_REGION_SIZE)
i = I830_LOG_MIN_TEX_REGION_SIZE;
pI830->TexGranularity = i;
/* Truncate size */
size >>= i;
size <<= i;
if (size < KB(512)) {
if (!dryrun) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Less than 512 kBytes for texture space (real %ld kBytes).\n",
size / 1024);
}
return FALSE;
}
return FALSE;
}
alloced = I830AllocVidMem(pScrn, &(pI830->TexMem),
&(pI830->StolenPool), size, GTT_PAGE_SIZE,
flags | FROM_ANYWHERE | ALLOCATE_AT_TOP);
if (alloced < size) {
if (!dryrun) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Failed to allocate texture space.\n");
alloced = I830AllocVidMem(pScrn, &(pI830->TexMem),
&(pI830->StolenPool), size, GTT_PAGE_SIZE,
flags | FROM_ANYWHERE | ALLOCATE_AT_TOP);
if (alloced < size) {
if (!dryrun) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Failed to allocate texture space.\n");
}
return FALSE;
}
return FALSE;
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
"%sAllocated %ld kB for textures at 0x%lx\n", s,
alloced / 1024, pI830->TexMem.Start);
}
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
"%sAllocated %ld kB for textures at 0x%lx\n", s,
alloced / 1024, pI830->TexMem.Start);
return TRUE;
}
@ -1514,7 +1524,9 @@ I830FixupOffsets(ScrnInfoPtr pScrn)
I830FixOffset(pScrn, &(pI830->ContextMem));
I830FixOffset(pScrn, &(pI830->BackBuffer));
I830FixOffset(pScrn, &(pI830->DepthBuffer));
I830FixOffset(pScrn, &(pI830->TexMem));
if (pI830->mmModeFlags & I830_KERNEL_TEX) {
I830FixOffset(pScrn, &(pI830->TexMem));
}
}
#endif
return TRUE;
@ -1913,7 +1925,8 @@ I830BindAGPMemory(ScrnInfoPtr pScrn)
return FALSE;
if (!BindMemRange(pScrn, &(pI830->DepthBuffer)))
return FALSE;
if (!BindMemRange(pScrn, &(pI830->TexMem)))
if ((pI830->mmModeFlags & I830_KERNEL_TEX) &&
!BindMemRange(pScrn, &(pI830->TexMem)))
return FALSE;
}
#endif
@ -1997,7 +2010,8 @@ I830UnbindAGPMemory(ScrnInfoPtr pScrn)
return FALSE;
if (!UnbindMemRange(pScrn, &(pI830->DepthBuffer)))
return FALSE;
if (!UnbindMemRange(pScrn, &(pI830->TexMem)))
if ((pI830->mmModeFlags & I830_KERNEL_TEX) &&
!UnbindMemRange(pScrn, &(pI830->TexMem)))
return FALSE;
}
#endif

43
src/i830_rotate.c
View File

@ -778,7 +778,7 @@ I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode)
/* Do heap teardown here
*/
{
if (pI8301->mmModeFlags & I830_KERNEL_TEX) {
drmI830MemDestroyHeap destroy;
destroy.region = I830_MEM_REGION_AGP;
@ -790,10 +790,11 @@ I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode)
}
}
if (pI8301->TexMem.Key != -1)
xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->TexMem.Key);
I830FreeVidMem(pScrn1, &(pI8301->TexMem));
if (pI8301->mmModeFlags & I830_KERNEL_TEX) {
if (pI8301->TexMem.Key != -1)
xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->TexMem.Key);
I830FreeVidMem(pScrn1, &(pI8301->TexMem));
}
if (pI8301->StolenPool.Allocated.Key != -1) {
xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->StolenPool.Allocated.Key);
xf86DeallocateGARTMemory(pScrn1->scrnIndex, pI8301->StolenPool.Allocated.Key);
@ -943,9 +944,11 @@ I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode)
pI8301->disableTiling ? ALLOC_NO_TILING : 0))
goto BAIL3;
if (!I830AllocateTextureMemory(pScrn1,
pI8301->disableTiling ? ALLOC_NO_TILING : 0))
goto BAIL4;
if (pI8301->mmModeFlags & I830_KERNEL_TEX) {
if (!I830AllocateTextureMemory(pScrn1,
pI8301->disableTiling ? ALLOC_NO_TILING : 0))
goto BAIL4;
}
I830DoPoolAllocation(pScrn1, &(pI8301->StolenPool));
@ -958,8 +961,10 @@ I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode)
xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->DepthBuffer.Key, pI8301->DepthBuffer.Offset);
if (pI8301->StolenPool.Allocated.Key != -1)
xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->StolenPool.Allocated.Key, pI8301->StolenPool.Allocated.Offset);
if (pI8301->TexMem.Key != -1)
xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->TexMem.Key, pI8301->TexMem.Offset);
if (pI8301->mmModeFlags & I830_KERNEL_TEX) {
if (pI8301->TexMem.Key != -1)
xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->TexMem.Key, pI8301->TexMem.Offset);
}
I830SetupMemoryTiling(pScrn1);
/* update fence registers */
for (i = 0; i < 8; i++)
@ -1031,7 +1036,6 @@ I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode)
pI830->AccelInfoRec->maxOffPixWidth = 1;
pI830->AccelInfoRec->maxOffPixHeight = 1;
}
return TRUE;
BAIL4:
@ -1175,11 +1179,12 @@ BAIL0:
pI8301->disableTiling ? ALLOC_NO_TILING : 0))
xf86DrvMsg(pScrn1->scrnIndex, X_INFO,
"Oh dear, the depth buffer failed - badness\n");
if (!I830AllocateTextureMemory(pScrn1,
pI8301->disableTiling ? ALLOC_NO_TILING : 0))
xf86DrvMsg(pScrn1->scrnIndex, X_INFO,
"Oh dear, the texture cache failed - badness\n");
if (pI8301->mmModeFlags & I830_KERNEL_TEX) {
if (!I830AllocateTextureMemory(pScrn1,
pI8301->disableTiling ? ALLOC_NO_TILING : 0))
xf86DrvMsg(pScrn1->scrnIndex, X_INFO,
"Oh dear, the texture cache failed - badness\n");
}
I830DoPoolAllocation(pScrn1, &(pI8301->StolenPool));
@ -1192,8 +1197,10 @@ BAIL0:
xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->DepthBuffer.Key, pI8301->DepthBuffer.Offset);
if (pI8301->StolenPool.Allocated.Key != -1)
xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->StolenPool.Allocated.Key, pI8301->StolenPool.Allocated.Offset);
if (pI8301->TexMem.Key != -1)
xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->TexMem.Key, pI8301->TexMem.Offset);
if (pI8301->mmModeFlags & I830_KERNEL_TEX) {
if (pI8301->TexMem.Key != -1)
xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->TexMem.Key, pI8301->TexMem.Offset);
}
I830SetupMemoryTiling(pScrn1);
/* update fence registers */
for (i = 0; i < 8; i++)

148
src/i830_video.c
View File

@ -1,4 +1,3 @@
#define VIDEO_DEBUG 0
/***************************************************************************
Copyright 2000 Intel Corporation. All Rights Reserved.
@ -130,9 +129,9 @@ static Atom xvBrightness, xvContrast, xvColorKey, xvPipe, xvDoubleBuffer;
static Atom xvGamma0, xvGamma1, xvGamma2, xvGamma3, xvGamma4, xvGamma5;
#define IMAGE_MAX_WIDTH 1920
#define IMAGE_MAX_HEIGHT 1080
#define IMAGE_MAX_HEIGHT 1088
#define IMAGE_MAX_WIDTH_LEGACY 1024
#define IMAGE_MAX_HEIGHT_LEGACY 1080
#define IMAGE_MAX_HEIGHT_LEGACY 1088
/*
* Broadwater requires a bit of extra video memory for state information
@ -158,11 +157,11 @@ Edummy(const char *dummy, ...)
#define OVERLAY_UPDATE \
do { \
BEGIN_LP_RING(6); \
OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE); \
OUT_RING(MI_NOOP); \
BEGIN_LP_RING(8); \
OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE); \
OUT_RING(MI_NOOP); \
if (!*pI830->overlayOn) { \
OUT_RING(MI_NOOP); \
OUT_RING(MI_NOOP); \
OUT_RING(MI_NOOP); \
OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_FLIP_ON); \
ErrorF("Overlay goes from off to on\n"); \
@ -172,10 +171,12 @@ Edummy(const char *dummy, ...)
OUT_RING(MI_NOOP); \
OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_FLIP_CONTINUE); \
} \
if (IS_I965G(pI830)) \
if (IS_I965G(pI830)) \
OUT_RING(pI830->OverlayMem->Start | OFC_UPDATE); \
else \
OUT_RING(pI830->OverlayMem->Physical | OFC_UPDATE); \
OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); \
OUT_RING(MI_NOOP); \
ADVANCE_LP_RING(); \
ErrorF("OVERLAY_UPDATE\n"); \
} while(0)
@ -184,20 +185,11 @@ Edummy(const char *dummy, ...)
do { \
if (*pI830->overlayOn) { \
int spin = 1000000; \
BEGIN_LP_RING(12); \
OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE); \
OUT_RING(MI_NOOP); \
OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); \
OUT_RING(MI_NOOP); \
OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_FLIP_CONTINUE); \
if (IS_I965G(pI830)) \
OUT_RING(pI830->OverlayMem->Start | OFC_UPDATE); \
else \
OUT_RING(pI830->OverlayMem->Physical | OFC_UPDATE); \
OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); \
OUT_RING(MI_NOOP); \
BEGIN_LP_RING(6); \
OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE); \
OUT_RING(MI_NOOP); \
OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_FLIP_OFF); \
if (IS_I965G(pI830)) \
if (IS_I965G(pI830)) \
OUT_RING(pI830->OverlayMem->Start | OFC_UPDATE); \
else \
OUT_RING(pI830->OverlayMem->Physical | OFC_UPDATE); \
@ -420,7 +412,7 @@ I830InitVideo(ScreenPtr pScreen)
XF86VideoAdaptorPtr overlayAdaptor = NULL, texturedAdaptor = NULL;
int num_adaptors;
DPRINTF(PFX, "I830InitVideo\n");
ErrorF("I830InitVideo\n");
#if 0
{
@ -494,7 +486,7 @@ I830ResetVideo(ScrnInfoPtr pScrn)
I830OverlayRegPtr overlay =
(I830OverlayRegPtr) (pI830->FbBase + pI830->OverlayMem->Start);
DPRINTF(PFX, "I830ResetVideo: base: %p, offset: 0x%lx, obase: %p\n",
ErrorF("I830ResetVideo: base: %p, offset: 0x%lx, obase: %p\n",
pI830->FbBase, pI830->OverlayMem->Start, overlay);
/*
* Default to maximum image size in YV12
@ -663,7 +655,7 @@ I830SetupImageVideoOverlay(ScreenPtr pScreen)
I830PortPrivPtr pPriv;
XF86AttributePtr att;
DPRINTF(PFX, "I830SetupImageVideoOverlay\n");
ErrorF("I830SetupImageVideoOverlay\n");
if (!(adapt = xcalloc(1, sizeof(XF86VideoAdaptorRec) +
sizeof(I830PortPrivRec) + sizeof(DevUnion))))
@ -688,8 +680,7 @@ I830SetupImageVideoOverlay(ScreenPtr pScreen)
adapt->pPortPrivates[0].ptr = (pointer) (pPriv);
adapt->nAttributes = NUM_ATTRIBUTES;
if (pI830->Clone)
adapt->nAttributes += CLONE_ATTRIBUTES;
adapt->nAttributes += CLONE_ATTRIBUTES;
if (IS_I9XX(pI830))
adapt->nAttributes += GAMMA_ATTRIBUTES; /* has gamma */
adapt->pAttributes = xnfalloc(sizeof(XF86AttributeRec) * adapt->nAttributes);
@ -697,10 +688,8 @@ I830SetupImageVideoOverlay(ScreenPtr pScreen)
att = adapt->pAttributes;
memcpy((char *)att, (char*)Attributes, sizeof(XF86AttributeRec)* NUM_ATTRIBUTES);
att+=NUM_ATTRIBUTES;
if (pI830->Clone) {
memcpy((char*)att, (char*)CloneAttributes, sizeof(XF86AttributeRec) * CLONE_ATTRIBUTES);
att+=CLONE_ATTRIBUTES;
}
memcpy((char*)att, (char*)CloneAttributes, sizeof(XF86AttributeRec) * CLONE_ATTRIBUTES);
att+=CLONE_ATTRIBUTES;
if (IS_I9XX(pI830)) {
memcpy((char*)att, (char*)GammaAttributes, sizeof(XF86AttributeRec) * GAMMA_ATTRIBUTES);
att+=GAMMA_ATTRIBUTES;
@ -759,8 +748,7 @@ I830SetupImageVideoOverlay(ScreenPtr pScreen)
xvDoubleBuffer = MAKE_ATOM("XV_DOUBLE_BUFFER");
/* Allow the pipe to be switched from pipe A to B when in clone mode */
if (pI830->Clone)
xvPipe = MAKE_ATOM("XV_PIPE");
xvPipe = MAKE_ATOM("XV_PIPE");
if (IS_I9XX(pI830)) {
xvGamma0 = MAKE_ATOM("XV_GAMMA0");
@ -789,7 +777,7 @@ I830SetupImageVideoTextured(ScreenPtr pScreen)
int nports = 16, i;
int nAttributes;
DPRINTF(PFX, "I830SetupImageVideoOverlay\n");
ErrorF("I830SetupImageVideoOverlay\n");
nAttributes = NUM_TEXTURED_ATTRIBUTES;
@ -892,24 +880,19 @@ I830StopVideo(ScrnInfoPtr pScrn, pointer data, Bool shutdown)
I830PortPrivPtr pPriv = (I830PortPrivPtr) data;
I830Ptr pI830 = I830PTR(pScrn);
I830OverlayRegPtr overlay =
(I830OverlayRegPtr) (pI830->FbBase + pI830->OverlayMem->Start);
if (pPriv->textured)
return;
DPRINTF(PFX, "I830StopVideo\n");
ErrorF("I830StopVideo\n");
REGION_EMPTY(pScrn->pScreen, &pPriv->clip);
if (shutdown) {
if (pPriv->videoStatus & CLIENT_VIDEO_ON) {
overlay->OCMD &= ~OVERLAY_ENABLE;
I830ResetVideo(pScrn);
OVERLAY_UPDATE;
#if 1
OVERLAY_OFF;
#endif
if (pI830->entityPrivate)
pI830->entityPrivate->XvInUse = -1;
@ -951,22 +934,14 @@ I830SetPortAttribute(ScrnInfoPtr pScrn,
pPriv->brightness = value;
overlay->OCLRC0 = (pPriv->contrast << 18) | (pPriv->brightness & 0xff);
ErrorF("BRIGHTNESS\n");
overlay->OCMD &= ~OVERLAY_ENABLE;
OVERLAY_UPDATE;
#if 1
OVERLAY_OFF;
#endif
} else if (attribute == xvContrast) {
if ((value < 0) || (value > 255))
return BadValue;
pPriv->contrast = value;
overlay->OCLRC0 = (pPriv->contrast << 18) | (pPriv->brightness & 0xff);
ErrorF("CONTRAST\n");
overlay->OCMD &= ~OVERLAY_ENABLE;
OVERLAY_UPDATE;
#if 1
OVERLAY_OFF;
#endif
} else if (pI830->Clone && attribute == xvPipe) {
if ((value < 0) || (value > 1))
return BadValue;
@ -980,11 +955,7 @@ I830SetPortAttribute(ScrnInfoPtr pScrn,
else
overlay->OCONFIG |= OVERLAY_PIPE_B;
ErrorF("PIPE CHANGE\n");
overlay->OCMD &= ~OVERLAY_ENABLE;
OVERLAY_UPDATE;
#if 1
OVERLAY_OFF;
#endif
} else if (attribute == xvGamma0 && (IS_I9XX(pI830))) {
pPriv->gamma0 = value;
} else if (attribute == xvGamma1 && (IS_I9XX(pI830))) {
@ -1011,11 +982,7 @@ I830SetPortAttribute(ScrnInfoPtr pScrn,
break;
}
ErrorF("COLORKEY\n");
overlay->OCMD &= ~OVERLAY_ENABLE;
OVERLAY_UPDATE;
#if 1
OVERLAY_OFF;
#endif
REGION_EMPTY(pScrn->pScreen, &pPriv->clip);
} else if(attribute == xvDoubleBuffer) {
if ((value < 0) || (value > 1))
@ -1026,20 +993,20 @@ I830SetPortAttribute(ScrnInfoPtr pScrn,
} else
return BadMatch;
/* We've already confirmed that the overlay is off, ready for updating */
/* Ensure that the overlay is off, ready for updating */
if ((attribute == xvGamma0 ||
attribute == xvGamma1 ||
attribute == xvGamma2 ||
attribute == xvGamma3 ||
attribute == xvGamma4 ||
attribute == xvGamma5) && (IS_I9XX(pI830))) {
CARD32 r = overlay->OCMD & OVERLAY_ENABLE;
ErrorF("GAMMA\n");
overlay->OCMD &= ~OVERLAY_ENABLE;
OVERLAY_UPDATE;
#if 1
OVERLAY_OFF;
#endif
I830UpdateGamma(pScrn);
overlay->OCMD |= r;
OVERLAY_UPDATE;
}
return Success;
@ -1056,7 +1023,7 @@ I830GetPortAttribute(ScrnInfoPtr pScrn,
*value = pPriv->brightness;
} else if (attribute == xvContrast) {
*value = pPriv->contrast;
} else if (pI830->Clone && attribute == xvPipe) {
} else if (attribute == xvPipe) {
*value = pPriv->pipe;
} else if (attribute == xvGamma0 && (IS_I9XX(pI830))) {
*value = pPriv->gamma0;
@ -1687,8 +1654,11 @@ I830DisplayVideo(ScrnInfoPtr pScrn, int id, short width, short height,
I830ResetVideo(pScrn);
/* Ensure overlay is turned on with OVERLAY_ENABLE at 0 */
if (!*pI830->overlayOn)
if (!*pI830->overlayOn) {
ErrorF("TURNING ON OVERLAY BEFORE UPDATE\n");
I830ResetVideo(pScrn);
OVERLAY_UPDATE;
}
/* Fix up the dstBox if outside the visible screen */
{
@ -2128,40 +2098,7 @@ static const CARD32 sip_kernel_static[][4] = {
#define SF_MAX_THREADS 1
static const CARD32 sf_kernel_static[][4] = {
/* send 0 (1) g6<1>F g1.12<0,1,0>F math mlen 1 rlen 1 { align1 + } */
{ 0x00000031, 0x20c01fbd, 0x0000002c, 0x01110081 },
/* send 0 (1) g6.4<1>F g1.20<0,1,0>F math mlen 1 rlen 1 { align1 + } */
{ 0x00000031, 0x20c41fbd, 0x00000034, 0x01110081 },
/* add (8) g7<1>F g4<8,8,1>F g3<8,8,1>F { align1 + } */
{ 0x00600040, 0x20e077bd, 0x008d0080, 0x008d4060 },
/* mul (1) g7<1>F g7<0,1,0>F g6<0,1,0>F { align1 + } */
{ 0x00000041, 0x20e077bd, 0x000000e0, 0x000000c0 },
/* mul (1) g7.4<1>F g7.4<0,1,0>F g6.4<0,1,0>F { align1 + } */
{ 0x00000041, 0x20e477bd, 0x000000e4, 0x000000c4 },
/* mov (8) m1<1>F g7<0,1,0>F { align1 + } */
{ 0x00600001, 0x202003be, 0x000000e0, 0x00000000 },
/* mov (8) m2<1>F g7.4<0,1,0>F { align1 + } */
{ 0x00600001, 0x204003be, 0x000000e4, 0x00000000 },
/* mov (8) m3<1>F g3<8,8,1>F { align1 + } */
{ 0x00600001, 0x206003be, 0x008d0060, 0x00000000 },
/* send 0 (8) a0<1>F g0<8,8,1>F urb mlen 4 rlen 0 write +0 transpose used complete EOT{ align1 + } */
{ 0x00600031, 0x20001fbc, 0x008d0000, 0x8640c800 },
/* nop (4) g0<1>UD { align1 + } */
{ 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
/* nop (4) g0<1>UD { align1 + } */
{ 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
/* nop (4) g0<1>UD { align1 + } */
{ 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
/* nop (4) g0<1>UD { align1 + } */
{ 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
/* nop (4) g0<1>UD { align1 + } */
{ 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
/* nop (4) g0<1>UD { align1 + } */
{ 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
/* nop (4) g0<1>UD { align1 + } */
{ 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
/* nop (4) g0<1>UD { align1 + } */
{ 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
#include "sf_prog.h"
};
/*
@ -2922,7 +2859,7 @@ I830AllocateMemory(ScrnInfoPtr pScrn, FBLinearPtr linear, int size)
ScreenPtr pScreen;
FBLinearPtr new_linear = NULL;
DPRINTF(PFX, "I830AllocateMemory\n");
ErrorF("I830AllocateMemory\n");
if (linear) {
if (linear->size >= size)
@ -2994,7 +2931,7 @@ I830PutImage(ScrnInfoPtr pScrn,
int pitchAlignMask;
int extraLinear;
DPRINTF(PFX, "I830PutImage: src: (%d,%d)(%d,%d), dst: (%d,%d)(%d,%d)\n"
ErrorF("I830PutImage: src: (%d,%d)(%d,%d), dst: (%d,%d)(%d,%d)\n"
"width %d, height %d\n", src_x, src_y, src_w, src_h, drw_x, drw_y,
drw_w, drw_h, width, height);
@ -3326,8 +3263,6 @@ I830BlockHandler(int i,
ScrnInfoPtr pScrn = xf86Screens[i];
I830Ptr pI830 = I830PTR(pScrn);
I830PortPrivPtr pPriv = GET_PORT_PRIVATE(pScrn);
I830OverlayRegPtr overlay =
(I830OverlayRegPtr) (pI830->FbBase + pI830->OverlayMem->Start);
pScreen->BlockHandler = pI830->BlockHandler;
@ -3345,11 +3280,10 @@ I830BlockHandler(int i,
if (pPriv->offTime < now) {
/* Turn off the overlay */
ErrorF("BLOCKHANDLER\n");
overlay->OCMD &= ~OVERLAY_ENABLE;
I830ResetVideo(pScrn);
OVERLAY_UPDATE;
#if 1
OVERLAY_OFF;
#endif
pPriv->videoStatus = FREE_TIMER;
pPriv->freeTime = now + FREE_DELAY;
@ -3458,15 +3392,11 @@ I830StopSurface(XF86SurfacePtr surface)
if (pPriv->isOn) {
I830Ptr pI830 = I830PTR(pScrn);
I830OverlayRegPtr overlay =
(I830OverlayRegPtr) (pI830->FbBase + pI830->OverlayMem->Start);
ErrorF("StopSurface\n");
overlay->OCMD &= ~OVERLAY_ENABLE;
I830ResetVideo(pScrn);
OVERLAY_UPDATE;
#if 1
OVERLAY_OFF;
#endif
if (pI830->entityPrivate)
pI830->entityPrivate->XvInUse = -1;

17
src/packed_yuv_sf.g4a Normal file
View File

@ -0,0 +1,17 @@
send (1) 0 g6<1>F g1.12<0,1,0>F math inv scalar mlen 1 rlen 1 { align1 };
send (1) 0 g6.4<1>F g1.20<0,1,0>F math inv scalar mlen 1 rlen 1 { align1 };
add (8) g7<1>F g4<8,8,1>F -g3<8,8,1>F { align1 };
mul (1) g7<1>F g7<0,1,0>F g6<0,1,0>F { align1 };
mul (1) g7.4<1>F g7.4<0,1,0>F g6.4<0,1,0>F { align1 };
mov (8) m1<1>F g7<0,1,0>F { align1 };
mov (8) m2<1>F g7.4<0,1,0>F { align1 };
mov (8) m3<1>F g3<8,8,1>F { align1 };
send (8) 0 null g0<8,8,1>F urb 0 transpose used complete mlen 4 rlen 0 { align1 EOT };
nop;
nop;
nop;
nop;
nop;
nop;
nop;
nop;

161
src/packed_yuv_wm.g4a Normal file
View File

@ -0,0 +1,161 @@
/* The initial payload of the thread is always g0.
* WM_URB (incoming URB entries) is g3
* X0_R is g4
* X1_R is g5
* Y0_R is g6
* Y1_R is g7
*/
/* Set up the X/Y screen coordinates of the pixels in our 4 subspans. Each
* subspan is a 2x2 rectangle, and the screen x/y of the upper left of each
* subspan are given in GRF register 1.2 through 1.5 (which, with the word
* addressing below, are 1.4 through 1.11).
*
* The result is WM_X*_R and WM_Y*R being:
*
* X0: {ss0.x, ss0.x+1, ss0.x, ss0.x+1, ss1.x, ss1.x+1, ss1.x, ss1.x+y}
* Y0: {ss0.y, ss0.y, ss0.y+1, ss0.y+1, ss1.y, ss1.y, ss1.y+1, ss1.y+1}
* X1: {ss2.x, ss2.x+1, ss2.x, ss2.x+1, ss3.x, ss3.x+1, ss3.x, ss3.x+y}
* Y1: {ss2.y, ss2.y, ss2.y+1, ss2.y+1, ss3.y, ss3.y, ss3.y+1, ss3.y+1}
*/
/* Set up ss0.x coordinates*/
mov (1) g4<1>F g1.8<0,1,0>UW { align1 };
add (1) g4.4<1>F g1.8<0,1,0>UW 1UB { align1 };
mov (1) g4.8<1>F g1.8<0,1,0>UW { align1 };
add (1) g4.12<1>F g1.8<0,1,0>UW 1UB { align1 };
/* Set up ss0.y coordinates */
mov (1) g6<1>F g1.10<0,1,0>UW { align1 };
mov (1) g6.4<1>F g1.10<0,1,0>UW { align1 };
add (1) g6.8<1>F g1.10<0,1,0>UW 1UB { align1 };
add (1) g6.12<1>F g1.10<0,1,0>UW 1UB { align1 };
/* set up ss1.x coordinates */
mov (1) g4.16<1>F g1.12<0,1,0>UW { align1 };
add (1) g4.20<1>F g1.12<0,1,0>UW 1UB { align1 };
mov (1) g4.24<1>F g1.12<0,1,0>UW { align1 };
add (1) g4.28<1>F g1.12<0,1,0>UW 1UB { align1 };
/* set up ss1.y coordinates */
mov (1) g6.16<1>F g1.14<0,1,0>UW { align1 };
mov (1) g6.20<1>F g1.14<0,1,0>UW { align1 };
add (1) g6.24<1>F g1.14<0,1,0>UW 1UB { align1 };
add (1) g6.28<1>F g1.14<0,1,0>UW 1UB { align1 };
/* Set up ss2.x coordinates */
mov (1) g5<1>F g1.16<0,1,0>UW { align1 };
add (1) g5.4<1>F g1.16<0,1,0>UW 1UB { align1 };
mov (1) g5.8<1>F g1.16<0,1,0>UW { align1 };
add (1) g5.12<1>F g1.16<0,1,0>UW 1UB { align1 };
/* Set up ss2.y coordinates */
mov (1) g7<1>F g1.18<0,1,0>UW { align1 };
mov (1) g7.4<1>F g1.18<0,1,0>UW { align1 };
add (1) g7.8<1>F g1.18<0,1,0>UW 1UB { align1 };
add (1) g7.12<1>F g1.18<0,1,0>UW 1UB { align1 };
/* Set up ss3.x coordinates */
mov (1) g5.16<1>F g1.20<0,1,0>UW { align1 };
add (1) g5.20<1>F g1.20<0,1,0>UW 1UB { align1 };
mov (1) g5.24<1>F g1.20<0,1,0>UW { align1 };
add (1) g5.28<1>F g1.20<0,1,0>UW 1UB { align1 };
/* Set up ss3.y coordinates */
mov (1) g7.16<1>F g1.22<0,1,0>UW { align1 };
mov (1) g7.20<1>F g1.22<0,1,0>UW { align1 };
add (1) g7.24<1>F g1.22<0,1,0>UW 1UB { align1 };
add (1) g7.28<1>F g1.22<0,1,0>UW 1UB { align1 };
/* Now, map these screen space coordinates into texture coordinates. */
/* subtract screen-space X origin of vertex 0. */
add (8) g4<1>F g4<8,8,1>F -g1<0,1,0>F { align1 };
add (8) g5<1>F g5<8,8,1>F -g1<0,1,0>F { align1 };
/* scale by texture X increment */
mul (8) g4<1>F g4<8,8,1>F g3<0,1,0>F { align1 };
mul (8) g5<1>F g5<8,8,1>F g3<0,1,0>F { align1 };
/* add in texture X offset */
add (8) g4<1>F g4<8,8,1>F g3.12<0,1,0>F { align1 };
add (8) g5<1>F g5<8,8,1>F g3.12<0,1,0>F { align1 };
/* subtract screen-space Y origin of vertex 0. */
add (8) g6<1>F g6<8,8,1>F -g1.4<0,1,0>F { align1 };
add (8) g7<1>F g7<8,8,1>F -g1.4<0,1,0>F { align1 };
/* scale by texture Y increment */
mul (8) g6<1>F g6<8,8,1>F g3.20<0,1,0>F { align1 };
mul (8) g7<1>F g7<8,8,1>F g3.20<0,1,0>F { align1 };
/* add in texture Y offset */
add (8) g6<1>F g6<8,8,1>F g3.28<0,1,0>F { align1 };
add (8) g7<1>F g7<8,8,1>F g3.28<0,1,0>F { align1 };
/* sampler */
mov (8) m1<1>F g4<8,8,1>F { align1 };
mov (8) m2<1>F g5<8,8,1>F { align1 };
mov (8) m3<1>F g6<8,8,1>F { align1 };
mov (8) m4<1>F g7<8,8,1>F { align1 };
/*
* g0 holds the PS thread payload, which (oddly) contains
* precisely what the sampler wants to see in m0
*/
send (16) 0 g12<1>UW g0<8,8,1>UW sampler (1,0,F) mlen 5 rlen 8 { align1 };
mov (8) g19<1>UW g19<8,8,1>UW { align1 };
/* color space conversion function:
* R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255), 0, 1)
* G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255), 0, 1)
* B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255), 0, 1)
*
* Y is g14, g15.
* Cr is g12, g13.
* Cb is g16, g17.
*
* R is g2, g6.
* G is g3, g7.
* B is g4, g8.
*/
/* Y = Y - 16/255 */
add (8) g14<1>F g14<8,8,1>F -0.0627451F { align1 };
/* Cr = Cr - 128/255 */
add (8) g12<1>F g12<8,8,1>F -0.501961F { align1 };
/* Cb = Cb - 128 / 255 */
add (8) g16<1>F g16<8,8,1>F -0.501961F { align1 };
/* Y = Y * 1.164 */
mul (8) g14<1>F g14<8,8,1>F 1.164F { align1 };
/* acc = 1.596 * Cr */
mul (8) null g12<8,8,1>F 1.596F { align1 };
/* R = acc + Y */
mac.sat (8) m2<1>F g14<8,8,1>F 1F { align1 };
/* acc = Cr * -0.813 */
mul (8) null g12<8,8,1>F -0.813F { align1 };
/* acc += Cb * -0.392 */
mac (8) null g16<8,8,1>F -0.392F { align1 };
/* G = acc + Y */
mac.sat (8) m3<1>F g14<8,8,1>F 1F { align1 };
/* acc = Cb * 2.017 */
mul (8) null g16<8,8,1>F 2.017F { align1 };
/* B = acc + Y */
mac.sat (8) m4<1>F g14<8,8,1>F 1F { align1 };
/* and do it again */
add (8) g15<1>F g15<8,8,1>F -0.0627451F { align1 };
add (8) g13<1>F g13<8,8,1>F -0.501961F { align1 };
add (8) g17<1>F g17<8,8,1>F -0.501961F { align1 };
mul (8) g15<1>F g15<8,8,1>F 1.164F { align1 };
mul (8) null g13<8,8,1>F 1.596F { align1 };
mac.sat (8) m6<1>F g15<8,8,1>F 1F { align1 };
mul (8) null g13<8,8,1>F -0.813F { align1 };
mac (8) null g17<8,8,1>F -0.392F { align1 };
mac.sat (8) m7<1>F g15<8,8,1>F 1F { align1 };
mul (8) null g17<8,8,1>F 2.017F { align1 };
mac.sat (8) m8<1>F g15<8,8,1>F 1F { align1 };
/* Pass through control information:
*/
mov (8) m1<1>UD g1<8,8,1>UD { align1 mask_disable };
/* Send framebuffer write message: XXX: acc0? */
send (16) 0 acc0<1>UW g0<8,8,1>UW write (
0, /* binding table index 0 */
8, /* pixel scoreboard clear */
4, /* render target write */
0 /* no write commit message */
) mlen 10 rlen 0 { align1 EOT };
/* padding */
nop;
nop;
nop;
nop;
nop;
nop;
nop;
nop;

17
src/sf_prog.h Normal file
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@ -0,0 +1,17 @@
{ 0x00000031, 0x20c01fbd, 0x0000002c, 0x01110081 },
{ 0x00000031, 0x20c41fbd, 0x00000034, 0x01110081 },
{ 0x00600040, 0x20e077bd, 0x008d0080, 0x008d4060 },
{ 0x00000041, 0x20e077bd, 0x000000e0, 0x000000c0 },
{ 0x00000041, 0x20e477bd, 0x000000e4, 0x000000c4 },
{ 0x00600001, 0x202003be, 0x000000e0, 0x00000000 },
{ 0x00600001, 0x204003be, 0x000000e4, 0x00000000 },
{ 0x00600001, 0x206003be, 0x008d0060, 0x00000000 },
{ 0x00600031, 0x20001fbc, 0x008d0000, 0x8640c800 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },

110
src/wm_prog.h
View File

@ -1,166 +1,82 @@
/* wm_program */
/* mov (1) g4<1>F g1.8<0,1,0>UW { align1 + } */
{ 0x00000001, 0x2080013d, 0x00000028, 0x00000000 },
/* add (1) g4.4<1>F g1.8<0,1,0>UW 1 { align1 + } */
{ 0x00000040, 0x20840d3d, 0x00000028, 0x00000001 },
/* mov (1) g4.8<1>F g1.8<0,1,0>UW { align1 + } */
{ 0x00000001, 0x2088013d, 0x00000028, 0x00000000 },
/* add (1) g4.12<1>F g1.8<0,1,0>UW 1 { align1 + } */
{ 0x00000040, 0x208c0d3d, 0x00000028, 0x00000001 },
/* mov (1) g6<1>F g1.10<0,1,0>UW { align1 + } */
{ 0x00000001, 0x20c0013d, 0x0000002a, 0x00000000 },
/* mov (1) g6.4<1>F g1.10<0,1,0>UW { align1 + } */
{ 0x00000001, 0x20c4013d, 0x0000002a, 0x00000000 },
/* add (1) g6.8<1>F g1.10<0,1,0>UW 1 { align1 + } */
{ 0x00000040, 0x20c80d3d, 0x0000002a, 0x00000001 },
/* add (1) g6.12<1>F g1.10<0,1,0>UW 1 { align1 + } */
{ 0x00000040, 0x20cc0d3d, 0x0000002a, 0x00000001 },
/* mov (1) g4.16<1>F g1.12<0,1,0>UW { align1 + } */
{ 0x00000001, 0x2090013d, 0x0000002c, 0x00000000 },
/* add (1) g4.20<1>F g1.12<0,1,0>UW 1 { align1 + } */
{ 0x00000040, 0x20940d3d, 0x0000002c, 0x00000001 },
/* mov (1) g4.24<1>F g1.12<0,1,0>UW { align1 + } */
{ 0x00000001, 0x2098013d, 0x0000002c, 0x00000000 },
/* add (1) g4.28<1>F g1.12<0,1,0>UW 1 { align1 + } */
{ 0x00000040, 0x209c0d3d, 0x0000002c, 0x00000001 },
/* mov (1) g6.16<1>F g1.14<0,1,0>UW { align1 + } */
{ 0x00000001, 0x20d0013d, 0x0000002e, 0x00000000 },
/* mov (1) g6.20<1>F g1.14<0,1,0>UW { align1 + } */
{ 0x00000001, 0x20d4013d, 0x0000002e, 0x00000000 },
/* add (1) g6.24<1>F g1.14<0,1,0>UW 1 { align1 + } */
{ 0x00000040, 0x20d80d3d, 0x0000002e, 0x00000001 },
/* add (1) g6.28<1>F g1.14<0,1,0>UW 1 { align1 + } */
{ 0x00000040, 0x20dc0d3d, 0x0000002e, 0x00000001 },
/* mov (1) g5<1>F g1.16<0,1,0>UW { align1 + } */
{ 0x00000001, 0x20a0013d, 0x00000030, 0x00000000 },
/* add (1) g5.4<1>F g1.16<0,1,0>UW 1 { align1 + } */
{ 0x00000040, 0x20a40d3d, 0x00000030, 0x00000001 },
/* mov (1) g5.8<1>F g1.16<0,1,0>UW { align1 + } */
{ 0x00000001, 0x20a8013d, 0x00000030, 0x00000000 },
/* add (1) g5.12<1>F g1.16<0,1,0>UW 1 { align1 + } */
{ 0x00000040, 0x20ac0d3d, 0x00000030, 0x00000001 },
/* mov (1) g7<1>F g1.18<0,1,0>UW { align1 + } */
{ 0x00000001, 0x20e0013d, 0x00000032, 0x00000000 },
/* mov (1) g7.4<1>F g1.18<0,1,0>UW { align1 + } */
{ 0x00000001, 0x20e4013d, 0x00000032, 0x00000000 },
/* add (1) g7.8<1>F g1.18<0,1,0>UW 1 { align1 + } */
{ 0x00000040, 0x20e80d3d, 0x00000032, 0x00000001 },
/* add (1) g7.12<1>F g1.18<0,1,0>UW 1 { align1 + } */
{ 0x00000040, 0x20ec0d3d, 0x00000032, 0x00000001 },
/* mov (1) g5.16<1>F g1.20<0,1,0>UW { align1 + } */
{ 0x00000001, 0x20b0013d, 0x00000034, 0x00000000 },
/* add (1) g5.20<1>F g1.20<0,1,0>UW 1 { align1 + } */
{ 0x00000040, 0x20b40d3d, 0x00000034, 0x00000001 },
/* mov (1) g5.24<1>F g1.20<0,1,0>UW { align1 + } */
{ 0x00000001, 0x20b8013d, 0x00000034, 0x00000000 },
/* add (1) g5.28<1>F g1.20<0,1,0>UW 1 { align1 + } */
{ 0x00000040, 0x20bc0d3d, 0x00000034, 0x00000001 },
/* mov (1) g7.16<1>F g1.22<0,1,0>UW { align1 + } */
{ 0x00000001, 0x20f0013d, 0x00000036, 0x00000000 },
/* mov (1) g7.20<1>F g1.22<0,1,0>UW { align1 + } */
{ 0x00000001, 0x20f4013d, 0x00000036, 0x00000000 },
/* add (1) g7.24<1>F g1.22<0,1,0>UW 1 { align1 + } */
{ 0x00000040, 0x20f80d3d, 0x00000036, 0x00000001 },
/* add (1) g7.28<1>F g1.22<0,1,0>UW 1 { align1 + } */
{ 0x00000040, 0x20fc0d3d, 0x00000036, 0x00000001 },
/* add (8) g4<1>F g4<8,8,1>F g1<0,1,0>F { align1 + } */
{ 0x00600040, 0x208077bd, 0x008d0080, 0x00004020 },
/* add (8) g5<1>F g5<8,8,1>F g1<0,1,0>F { align1 + } */
{ 0x00600040, 0x20a077bd, 0x008d00a0, 0x00004020 },
/* mul (8) g4<1>F g4<8,8,1>F g3<0,1,0>F { align1 + } */
{ 0x00600041, 0x208077bd, 0x008d0080, 0x00000060 },
/* mul (8) g5<1>F g5<8,8,1>F g3<0,1,0>F { align1 + } */
{ 0x00600041, 0x20a077bd, 0x008d00a0, 0x00000060 },
/* add (8) g4<1>F g4<8,8,1>F g3.12<0,1,0>F { align1 + } */
{ 0x00600040, 0x208077bd, 0x008d0080, 0x0000006c },
/* add (8) g5<1>F g5<8,8,1>F g3.12<0,1,0>F { align1 + } */
{ 0x00600040, 0x20a077bd, 0x008d00a0, 0x0000006c },
/* add (8) g6<1>F g6<8,8,1>F g1.4<0,1,0>F { align1 + } */
{ 0x00600040, 0x20c077bd, 0x008d00c0, 0x00004024 },
/* add (8) g7<1>F g7<8,8,1>F g1.4<0,1,0>F { align1 + } */
{ 0x00600040, 0x20e077bd, 0x008d00e0, 0x00004024 },
/* mul (8) g6<1>F g6<8,8,1>F g3.20<0,1,0>F { align1 + } */
{ 0x00600041, 0x20c077bd, 0x008d00c0, 0x00000074 },
/* mul (8) g7<1>F g7<8,8,1>F g3.20<0,1,0>F { align1 + } */
{ 0x00600041, 0x20e077bd, 0x008d00e0, 0x00000074 },
/* add (8) g6<1>F g6<8,8,1>F g3.28<0,1,0>F { align1 + } */
{ 0x00600040, 0x20c077bd, 0x008d00c0, 0x0000007c },
/* add (8) g7<1>F g7<8,8,1>F g3.28<0,1,0>F { align1 + } */
{ 0x00600040, 0x20e077bd, 0x008d00e0, 0x0000007c },
/* mov (8) m1<1>F g4<8,8,1>F { align1 + } */
{ 0x00600001, 0x202003be, 0x008d0080, 0x00000000 },
/* mov (8) m2<1>F g5<8,8,1>F { align1 + } */
{ 0x00600001, 0x204003be, 0x008d00a0, 0x00000000 },
/* mov (8) m3<1>F g6<8,8,1>F { align1 + } */
{ 0x00600001, 0x206003be, 0x008d00c0, 0x00000000 },
/* mov (8) m4<1>F g7<8,8,1>F { align1 + } */
{ 0x00600001, 0x208003be, 0x008d00e0, 0x00000000 },
/* send 0 (16) g12<1>UW g0<8,8,1>UW sampler mlen 5 rlen 8 { align1 + } */
{ 0x00800031, 0x21801d29, 0x008d0000, 0x02580001 },
/* mov (8) g19<1>UW g19<8,8,1>UW { align1 + } */
{ 0x00600001, 0x22600129, 0x008d0260, 0x00000000 },
/* add (8) g14<1>F g14<8,8,1>F -0.0627451{ align1 + } */
{ 0x00600040, 0x21c07fbd, 0x008d01c0, 0xbd808081 },
/* add (8) g12<1>F g12<8,8,1>F -0.501961{ align1 + } */
{ 0x00600040, 0x21807fbd, 0x008d0180, 0xbf008081 },
/* add (8) g16<1>F g16<8,8,1>F -0.501961{ align1 + } */
{ 0x00600040, 0x22007fbd, 0x008d0200, 0xbf008081 },
/* mul (8) g14<1>F g14<8,8,1>F 1.164{ align1 + } */
{ 0x00600040, 0x21807fbd, 0x008d0180, 0xbf008084 },
{ 0x00600040, 0x22007fbd, 0x008d0200, 0xbf008084 },
{ 0x00600041, 0x21c07fbd, 0x008d01c0, 0x3f94fdf4 },
/* mul (8) a0<1>F g12<8,8,1>F 1.596{ align1 + } */
{ 0x00600041, 0x20007fbc, 0x008d0180, 0x3fcc49ba },
/* mac (8) m2<1>F g14<8,8,1>F 1{ align1 + Saturate } */
{ 0x80600048, 0x20407fbe, 0x008d01c0, 0x3f800000 },
/* mul (8) a0<1>F g12<8,8,1>F -0.813{ align1 + } */
{ 0x00600041, 0x20007fbc, 0x008d0180, 0xbf5020c5 },
/* mac (8) a0<1>F g16<8,8,1>F -0.392{ align1 + } */
{ 0x00600048, 0x20007fbc, 0x008d0200, 0xbec8b439 },
/* mac (8) m3<1>F g14<8,8,1>F 1{ align1 + Saturate } */
{ 0x80600048, 0x20607fbe, 0x008d01c0, 0x3f800000 },
/* mul (8) a0<1>F g16<8,8,1>F 2.017{ align1 + } */
{ 0x00600041, 0x20007fbc, 0x008d0200, 0x40011687 },
/* mac (8) m4<1>F g14<8,8,1>F 1{ align1 + Saturate } */
{ 0x80600048, 0x20807fbe, 0x008d01c0, 0x3f800000 },
/* add (8) g15<1>F g15<8,8,1>F -0.0627451{ align1 + } */
{ 0x00600040, 0x21e07fbd, 0x008d01e0, 0xbd808081 },
/* add (8) g13<1>F g13<8,8,1>F -0.501961{ align1 + } */
{ 0x00600040, 0x21a07fbd, 0x008d01a0, 0xbf008081 },
/* add (8) g17<1>F g17<8,8,1>F -0.501961{ align1 + } */
{ 0x00600040, 0x22207fbd, 0x008d0220, 0xbf008081 },
/* mul (8) g15<1>F g15<8,8,1>F 1.164{ align1 + } */
{ 0x00600040, 0x21a07fbd, 0x008d01a0, 0xbf008084 },
{ 0x00600040, 0x22207fbd, 0x008d0220, 0xbf008084 },
{ 0x00600041, 0x21e07fbd, 0x008d01e0, 0x3f94fdf4 },
/* mul (8) a0<1>F g13<8,8,1>F 1.596{ align1 + } */
{ 0x00600041, 0x20007fbc, 0x008d01a0, 0x3fcc49ba },
/* mac (8) m6<1>F g15<8,8,1>F 1{ align1 + Saturate } */
{ 0x80600048, 0x20c07fbe, 0x008d01e0, 0x3f800000 },
/* mul (8) a0<1>F g13<8,8,1>F -0.813{ align1 + } */
{ 0x00600041, 0x20007fbc, 0x008d01a0, 0xbf5020c5 },
/* mac (8) a0<1>F g17<8,8,1>F -0.392{ align1 + } */
{ 0x00600048, 0x20007fbc, 0x008d0220, 0xbec8b439 },
/* mac (8) m7<1>F g15<8,8,1>F 1{ align1 + Saturate } */
{ 0x80600048, 0x20e07fbe, 0x008d01e0, 0x3f800000 },
/* mul (8) a0<1>F g17<8,8,1>F 2.017{ align1 + } */
{ 0x00600041, 0x20007fbc, 0x008d0220, 0x40011687 },
/* mac (8) m8<1>F g15<8,8,1>F 1{ align1 + Saturate } */
{ 0x80600048, 0x21007fbe, 0x008d01e0, 0x3f800000 },
/* mov (8) m1<1>UD g1<8,8,1>UD { align1 mask_disable + } */
{ 0x00600201, 0x20200022, 0x008d0020, 0x00000000 },
/* send 0 (16) a0<1>UW g0<8,8,1>UW write mlen 10 rlen 0 EOT{ align1 + } */
{ 0x00800031, 0x20001d28, 0x008d0000, 0x85a04800 },
/* nop (4) g0<1>UD { align1 + } */
{ 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
/* nop (4) g0<1>UD { align1 + } */
{ 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
/* nop (4) g0<1>UD { align1 + } */
{ 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
/* nop (4) g0<1>UD { align1 + } */
{ 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
/* nop (4) g0<1>UD { align1 + } */
{ 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
/* nop (4) g0<1>UD { align1 + } */
{ 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
/* nop (4) g0<1>UD { align1 + } */
{ 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
/* nop (4) g0<1>UD { align1 + } */
{ 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
{ 0x00800031, 0x24001d28, 0x008d0000, 0x85a04800 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },