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uxa: fix 3DSTATE_PS to fill in number of samples for Haswell 

The sample mask value must match what is set for 3DSTATE_SAMPLE_MASK,
through gen6_upload_invariant_states().

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Gwenole Beauchesne 2012-05-04 18:26:46 +02:00 committed by Chris Wilson
parent 412668464c
commit 4cd9ec9d40
3 changed files with 7 additions and 2 deletions
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1
src/i965_reg.h
View File

@ -221,6 +221,7 @@
/* DW4 */
# define GEN7_PS_MAX_THREADS_SHIFT_IVB 24
# define GEN7_PS_MAX_THREADS_SHIFT_HSW 23
# define GEN7_PS_SAMPLE_MASK_SHIFT_HSW 12
# define GEN7_PS_PUSH_CONSTANT_ENABLE (1 << 11)
# define GEN7_PS_ATTRIBUTE_ENABLE (1 << 10)
# define GEN7_PS_OMASK_TO_RENDER_TARGET (1 << 9)

4
src/i965_render.c
View File

@ -2695,9 +2695,11 @@ gen7_composite_wm_state(intel_screen_private *intel,
{
int num_surfaces = has_mask ? 3 : 2;
unsigned int max_threads_shift = GEN7_PS_MAX_THREADS_SHIFT_IVB;
unsigned int num_samples = 0;
if (IS_HSW(intel)) {
max_threads_shift = GEN7_PS_MAX_THREADS_SHIFT_HSW;
num_samples = 1 << GEN7_PS_SAMPLE_MASK_SHIFT_HSW;
}
if (intel->gen6_render_state.kernel == bo)
@ -2715,7 +2717,7 @@ gen7_composite_wm_state(intel_screen_private *intel,
OUT_BATCH((1 << GEN7_PS_SAMPLER_COUNT_SHIFT) |
(num_surfaces << GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
OUT_BATCH(0); /* scratch space base offset */
OUT_BATCH(((48 - 1) << max_threads_shift) |
OUT_BATCH(((48 - 1) << max_threads_shift) | num_samples |
GEN7_PS_ATTRIBUTE_ENABLE |
GEN7_PS_16_DISPATCH_ENABLE);
OUT_BATCH((6 << GEN7_PS_DISPATCH_START_GRF_SHIFT_0));

4
src/i965_video.c
View File

@ -1641,9 +1641,11 @@ gen7_upload_wm_state(ScrnInfoPtr scrn, Bool is_packed)
{
intel_screen_private *intel = intel_get_screen_private(scrn);
unsigned int max_threads_shift = GEN7_PS_MAX_THREADS_SHIFT_IVB;
unsigned int num_samples = 0;
if (IS_HSW(intel)) {
max_threads_shift = GEN7_PS_MAX_THREADS_SHIFT_HSW;
num_samples = 1 << GEN7_PS_SAMPLE_MASK_SHIFT_HSW;
}
/* disable WM constant buffer */
@ -1678,7 +1680,7 @@ gen7_upload_wm_state(ScrnInfoPtr scrn, Bool is_packed)
OUT_BATCH(0); /* scratch space base offset */
OUT_BATCH(
((48 - 1) << max_threads_shift) |
((48 - 1) << max_threads_shift) | num_samples |
GEN7_PS_ATTRIBUTE_ENABLE |
GEN7_PS_16_DISPATCH_ENABLE);
OUT_BATCH(