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Rename uxa-specific functions and structs 

This starts to separate uxa from the rest of the driver by renaming
uxa-specific functions and structs to make it clear which portions of
the driver are uxa-specific and which are common.

Signed-off-by: Keith Packard <keithp@keithp.com>
Acked-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Keith Packard 2014-07-24 10:27:55 -07:00
parent 57c67199d0
commit 616dea2c67
21 changed files with 1998 additions and 1666 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/uxa/Makefile.am
View File

@ -25,6 +25,7 @@ AM_CFLAGS += -I$(top_srcdir)/xvmc -I$(top_srcdir)/src -I$(top_srcdir)/src/render
noinst_LTLIBRARIES = libuxa.la
libuxa_la_LIBADD = $(UDEV_LIBS) $(DRMINTEL_LIBS) $(DRM_LIBS)
libuxa_la_SOURCES = \
intel_uxa.h \
brw_defines.h \
brw_structs.h \
common.h \
@ -38,6 +39,9 @@ libuxa_la_SOURCES = \
intel_uxa.c \
intel_video.c \
intel_video.h \
intel_video_overlay.c \
intel_video_overlay.h \
intel_uxa_video.c \
i830_3d.c \
i830_render.c \
i830_reg.h \

82
src/uxa/i830_render.c
View File

@ -166,7 +166,7 @@ static Bool i830_get_dest_format(PicturePtr dest_picture, uint32_t * dst_format)
break;
default:
scrn = xf86ScreenToScrn(dest_picture->pDrawable->pScreen);
intel_debug_fallback(scrn, "Unsupported dest format 0x%x\n",
intel_uxa_debug_fallback(scrn, "Unsupported dest format 0x%x\n",
(int)dest_picture->format);
return FALSE;
}
@ -197,7 +197,7 @@ static Bool i830_get_blend_cntl(ScrnInfoPtr scrn, int op, PicturePtr mask,
*/
if (dst_format == PICT_a8 && ((sblend == BLENDFACTOR_DST_ALPHA ||
sblend == BLENDFACTOR_INV_DST_ALPHA))) {
intel_debug_fallback(scrn, "Can't do dst alpha blending with "
intel_uxa_debug_fallback(scrn, "Can't do dst alpha blending with "
"PICT_a8 dest.\n");
return FALSE;
}
@ -257,7 +257,7 @@ static void i830_texture_setup(PicturePtr picture, PixmapPtr pixmap, int unit)
intel->scale_units[unit][1] = pixmap->drawable.height;
intel->transform[unit] = picture->transform;
if (intel_transform_is_affine(intel->transform[unit]))
if (intel_uxa_transform_is_affine(intel->transform[unit]))
texcoordtype = TEXCOORDTYPE_CARTESIAN;
else
texcoordtype = TEXCOORDTYPE_HOMOGENEOUS;
@ -293,9 +293,9 @@ static void i830_texture_setup(PicturePtr picture, PixmapPtr pixmap, int unit)
}
filter |= (MIPFILTER_NONE << TM0S3_MIP_FILTER_SHIFT);
if (intel_pixmap_tiled(pixmap)) {
if (intel_uxa_pixmap_tiled(pixmap)) {
tiling_bits = TM0S1_TILED_SURFACE;
if (intel_get_pixmap_private(pixmap)->tiling
if (intel_uxa_get_pixmap_private(pixmap)->tiling
== I915_TILING_Y)
tiling_bits |= TM0S1_TILE_WALK;
} else
@ -352,7 +352,7 @@ i830_check_composite(int op,
/* Check for unsupported compositing operations. */
if (op >= sizeof(i830_blend_op) / sizeof(i830_blend_op[0])) {
intel_debug_fallback(scrn, "Unsupported Composite op 0x%x\n",
intel_uxa_debug_fallback(scrn, "Unsupported Composite op 0x%x\n",
op);
return FALSE;
}
@ -365,7 +365,7 @@ i830_check_composite(int op,
*/
if (i830_blend_op[op].src_alpha &&
(i830_blend_op[op].src_blend != BLENDFACTOR_ZERO)) {
intel_debug_fallback(scrn, "Component alpha not "
intel_uxa_debug_fallback(scrn, "Component alpha not "
"supported with source alpha and "
"source value blending.\n");
return FALSE;
@ -373,12 +373,12 @@ i830_check_composite(int op,
}
if (!i830_get_dest_format(dest_picture, &tmp1)) {
intel_debug_fallback(scrn, "Get Color buffer format\n");
intel_uxa_debug_fallback(scrn, "Get Color buffer format\n");
return FALSE;
}
if (width > 2048 || height > 2048) {
intel_debug_fallback(scrn, "Operation is too large (%d, %d)\n", width, height);
intel_uxa_debug_fallback(scrn, "Operation is too large (%d, %d)\n", width, height);
return FALSE;
}
@ -391,7 +391,7 @@ i830_check_composite_target(PixmapPtr pixmap)
if (pixmap->drawable.width > 2048 || pixmap->drawable.height > 2048)
return FALSE;
if(!intel_check_pitch_3d(pixmap))
if(!intel_uxa_check_pitch_3d(pixmap))
return FALSE;
return TRUE;
@ -404,14 +404,14 @@ i830_check_composite_texture(ScreenPtr screen, PicturePtr picture)
intel_screen_private *intel = intel_get_screen_private(scrn);
if (picture->repeatType > RepeatReflect) {
intel_debug_fallback(scrn, "Unsupported picture repeat %d\n",
intel_uxa_debug_fallback(scrn, "Unsupported picture repeat %d\n",
picture->repeatType);
return FALSE;
}
if (picture->filter != PictFilterNearest &&
picture->filter != PictFilterBilinear) {
intel_debug_fallback(scrn, "Unsupported filter 0x%x\n",
intel_uxa_debug_fallback(scrn, "Unsupported filter 0x%x\n",
picture->filter);
return FALSE;
}
@ -422,7 +422,7 @@ i830_check_composite_texture(ScreenPtr screen, PicturePtr picture)
w = picture->pDrawable->width;
h = picture->pDrawable->height;
if ((w > 2048) || (h > 2048)) {
intel_debug_fallback(scrn,
intel_uxa_debug_fallback(scrn,
"Picture w/h too large (%dx%d)\n",
w, h);
return FALSE;
@ -430,7 +430,7 @@ i830_check_composite_texture(ScreenPtr screen, PicturePtr picture)
/* XXX we can use the xrgb32 types if there the picture covers the clip */
if (!i8xx_get_card_format(intel, picture)) {
intel_debug_fallback(scrn, "Unsupported picture format "
intel_uxa_debug_fallback(scrn, "Unsupported picture format "
"0x%x\n",
(int)picture->format);
return FALSE;
@ -451,9 +451,9 @@ i830_prepare_composite(int op, PicturePtr source_picture,
intel_screen_private *intel = intel_get_screen_private(scrn);
drm_intel_bo *bo_table[] = {
NULL, /* batch_bo */
intel_get_pixmap_bo(source),
mask ? intel_get_pixmap_bo(mask) : NULL,
intel_get_pixmap_bo(dest),
intel_uxa_get_pixmap_bo(source),
mask ? intel_uxa_get_pixmap_bo(mask) : NULL,
intel_uxa_get_pixmap_bo(dest),
};
intel->render_source_picture = source_picture;
@ -463,7 +463,7 @@ i830_prepare_composite(int op, PicturePtr source_picture,
intel->render_dest_picture = dest_picture;
intel->render_dest = dest;
if (!intel_check_pitch_3d(source))
if (!intel_uxa_check_pitch_3d(source))
return FALSE;
if (mask) {
if (mask_picture->componentAlpha &&
@ -474,22 +474,22 @@ i830_prepare_composite(int op, PicturePtr source_picture,
*/
if (i830_blend_op[op].src_alpha &&
(i830_blend_op[op].src_blend != BLENDFACTOR_ZERO)) {
intel_debug_fallback(scrn, "Component alpha not "
intel_uxa_debug_fallback(scrn, "Component alpha not "
"supported with source alpha and "
"source value blending.\n");
return FALSE;
}
}
if (!intel_check_pitch_3d(mask))
if (!intel_uxa_check_pitch_3d(mask))
return FALSE;
}
if (!intel_check_pitch_3d(dest))
if (!intel_uxa_check_pitch_3d(dest))
return FALSE;
if (!i830_get_dest_format(dest_picture, &intel->render_dest_format))
return FALSE;
if (!intel_get_aperture_space(scrn, bo_table, ARRAY_SIZE(bo_table)))
if (!intel_uxa_get_aperture_space(scrn, bo_table, ARRAY_SIZE(bo_table)))
return FALSE;
if (mask) {
@ -564,7 +564,7 @@ i830_prepare_composite(int op, PicturePtr source_picture,
intel->s8_blendctl = blendctl;
}
if (intel_pixmap_is_dirty(source) || intel_pixmap_is_dirty(mask))
if (intel_uxa_pixmap_is_dirty(source) || intel_uxa_pixmap_is_dirty(mask))
intel_batch_emit_flush(scrn);
intel->needs_render_state_emit = TRUE;
@ -585,9 +585,9 @@ static void i830_emit_composite_state(ScrnInfoPtr scrn)
assert(intel->in_batch_atomic);
if (intel_pixmap_tiled(intel->render_dest)) {
if (intel_uxa_pixmap_tiled(intel->render_dest)) {
tiling_bits = BUF_3D_TILED_SURFACE;
if (intel_get_pixmap_private(intel->render_dest)->tiling
if (intel_uxa_get_pixmap_private(intel->render_dest)->tiling
== I915_TILING_Y)
tiling_bits |= BUF_3D_TILE_WALK_Y;
} else
@ -636,12 +636,12 @@ static void i830_emit_composite_state(ScrnInfoPtr scrn)
DISABLE_STENCIL_WRITE | ENABLE_TEX_CACHE |
DISABLE_DITHER | ENABLE_COLOR_WRITE | DISABLE_DEPTH_WRITE);
if (intel_transform_is_affine(intel->render_source_picture->transform))
if (intel_uxa_transform_is_affine(intel->render_source_picture->transform))
texcoordfmt |= (TEXCOORDFMT_2D << 0);
else
texcoordfmt |= (TEXCOORDFMT_3D << 0);
if (intel->render_mask) {
if (intel_transform_is_affine
if (intel_uxa_transform_is_affine
(intel->render_mask_picture->transform))
texcoordfmt |= (TEXCOORDFMT_2D << 2);
else
@ -677,23 +677,23 @@ i830_emit_composite_primitive(PixmapPtr dest,
{
float x = srcX, y = srcY;
is_affine_src = intel_transform_is_affine(intel->transform[0]);
is_affine_src = intel_uxa_transform_is_affine(intel->transform[0]);
if (is_affine_src) {
if (!intel_get_transformed_coordinates(x, y,
if (!intel_uxa_get_transformed_coordinates(x, y,
intel->
transform[0],
&src_x[0],
&src_y[0]))
return;
if (!intel_get_transformed_coordinates(x, y + h,
if (!intel_uxa_get_transformed_coordinates(x, y + h,
intel->
transform[0],
&src_x[1],
&src_y[1]))
return;
if (!intel_get_transformed_coordinates(x + w, y + h,
if (!intel_uxa_get_transformed_coordinates(x + w, y + h,
intel->
transform[0],
&src_x[2],
@ -702,7 +702,7 @@ i830_emit_composite_primitive(PixmapPtr dest,
per_vertex += 2; /* src x/y */
} else {
if (!intel_get_transformed_coordinates_3d(x, y,
if (!intel_uxa_get_transformed_coordinates_3d(x, y,
intel->
transform[0],
&src_x[0],
@ -710,7 +710,7 @@ i830_emit_composite_primitive(PixmapPtr dest,
&src_w[0]))
return;
if (!intel_get_transformed_coordinates_3d(x, y + h,
if (!intel_uxa_get_transformed_coordinates_3d(x, y + h,
intel->
transform[0],
&src_x[1],
@ -718,7 +718,7 @@ i830_emit_composite_primitive(PixmapPtr dest,
&src_w[1]))
return;
if (!intel_get_transformed_coordinates_3d(x + w, y + h,
if (!intel_uxa_get_transformed_coordinates_3d(x + w, y + h,
intel->
transform[0],
&src_x[2],
@ -733,23 +733,23 @@ i830_emit_composite_primitive(PixmapPtr dest,
if (intel->render_mask) {
float x = maskX, y = maskY;
is_affine_mask = intel_transform_is_affine(intel->transform[1]);
is_affine_mask = intel_uxa_transform_is_affine(intel->transform[1]);
if (is_affine_mask) {
if (!intel_get_transformed_coordinates(x, y,
if (!intel_uxa_get_transformed_coordinates(x, y,
intel->
transform[1],
&mask_x[0],
&mask_y[0]))
return;
if (!intel_get_transformed_coordinates(x, y + h,
if (!intel_uxa_get_transformed_coordinates(x, y + h,
intel->
transform[1],
&mask_x[1],
&mask_y[1]))
return;
if (!intel_get_transformed_coordinates(x + w, y + h,
if (!intel_uxa_get_transformed_coordinates(x + w, y + h,
intel->
transform[1],
&mask_x[2],
@ -758,7 +758,7 @@ i830_emit_composite_primitive(PixmapPtr dest,
per_vertex += 2; /* mask x/y */
} else {
if (!intel_get_transformed_coordinates_3d(x, y,
if (!intel_uxa_get_transformed_coordinates_3d(x, y,
intel->
transform[1],
&mask_x[0],
@ -766,7 +766,7 @@ i830_emit_composite_primitive(PixmapPtr dest,
&mask_w[0]))
return;
if (!intel_get_transformed_coordinates_3d(x, y + h,
if (!intel_uxa_get_transformed_coordinates_3d(x, y + h,
intel->
transform[1],
&mask_x[1],
@ -774,7 +774,7 @@ i830_emit_composite_primitive(PixmapPtr dest,
&mask_w[1]))
return;
if (!intel_get_transformed_coordinates_3d(x + w, y + h,
if (!intel_uxa_get_transformed_coordinates_3d(x + w, y + h,
intel->
transform[1],
&mask_x[2],

100
src/uxa/i915_render.c
View File

@ -174,7 +174,7 @@ static Bool i915_get_dest_format(PicturePtr dest_picture, uint32_t * dst_format)
break;
default:
scrn = xf86ScreenToScrn(dest_picture->pDrawable->pScreen);
intel_debug_fallback(scrn,
intel_uxa_debug_fallback(scrn,
"Unsupported dest format 0x%x\n",
(int)dest_picture->format);
return FALSE;
@ -195,7 +195,7 @@ i915_check_composite(int op,
/* Check for unsupported compositing operations. */
if (op >= sizeof(i915_blend_op) / sizeof(i915_blend_op[0])) {
intel_debug_fallback(scrn, "Unsupported Composite op 0x%x\n",
intel_uxa_debug_fallback(scrn, "Unsupported Composite op 0x%x\n",
op);
return FALSE;
}
@ -208,7 +208,7 @@ i915_check_composite(int op,
if (i915_blend_op[op].src_alpha &&
(i915_blend_op[op].src_blend != BLENDFACT_ZERO)) {
if (op != PictOpOver) {
intel_debug_fallback(scrn,
intel_uxa_debug_fallback(scrn,
"Component alpha not supported "
"with source alpha and source "
"value blending.\n");
@ -218,7 +218,7 @@ i915_check_composite(int op,
}
if (!i915_get_dest_format(dest_picture, &tmp1)) {
intel_debug_fallback(scrn, "Get Color buffer format\n");
intel_uxa_debug_fallback(scrn, "Get Color buffer format\n");
return FALSE;
}
@ -234,7 +234,7 @@ i915_check_composite_target(PixmapPtr pixmap)
if (pixmap->drawable.width > 2048 || pixmap->drawable.height > 2048)
return FALSE;
if(!intel_check_pitch_3d(pixmap))
if(!intel_uxa_check_pitch_3d(pixmap))
return FALSE;
return TRUE;
@ -245,7 +245,7 @@ i915_check_composite_texture(ScreenPtr screen, PicturePtr picture)
{
if (picture->repeatType > RepeatReflect) {
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
intel_debug_fallback(scrn, "Unsupported picture repeat %d\n",
intel_uxa_debug_fallback(scrn, "Unsupported picture repeat %d\n",
picture->repeatType);
return FALSE;
}
@ -253,7 +253,7 @@ i915_check_composite_texture(ScreenPtr screen, PicturePtr picture)
if (picture->filter != PictFilterNearest &&
picture->filter != PictFilterBilinear) {
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
intel_debug_fallback(scrn, "Unsupported filter 0x%x\n",
intel_uxa_debug_fallback(scrn, "Unsupported filter 0x%x\n",
picture->filter);
return FALSE;
}
@ -268,7 +268,7 @@ i915_check_composite_texture(ScreenPtr screen, PicturePtr picture)
h = picture->pDrawable->height;
if ((w > 2048) || (h > 2048)) {
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
intel_debug_fallback(scrn,
intel_uxa_debug_fallback(scrn,
"Picture w/h too large (%dx%d)\n",
w, h);
return FALSE;
@ -283,7 +283,7 @@ i915_check_composite_texture(ScreenPtr screen, PicturePtr picture)
if (i == sizeof(i915_tex_formats) / sizeof(i915_tex_formats[0]))
{
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
intel_debug_fallback(scrn, "Unsupported picture format "
intel_uxa_debug_fallback(scrn, "Unsupported picture format "
"0x%x\n",
(int)picture->format);
return FALSE;
@ -313,7 +313,7 @@ static Bool i915_texture_setup(PicturePtr picture, PixmapPtr pixmap, int unit)
break;
}
if (i == sizeof(i915_tex_formats) / sizeof(i915_tex_formats[0])) {
intel_debug_fallback(scrn, "unknown texture format\n");
intel_uxa_debug_fallback(scrn, "unknown texture format\n");
return FALSE;
}
format = i915_tex_formats[i].card_fmt;
@ -345,15 +345,15 @@ static Bool i915_texture_setup(PicturePtr picture, PixmapPtr pixmap, int unit)
(FILTER_LINEAR << SS2_MIN_FILTER_SHIFT);
break;
default:
intel_debug_fallback(scrn, "Bad filter 0x%x\n",
intel_uxa_debug_fallback(scrn, "Bad filter 0x%x\n",
picture->filter);
return FALSE;
}
/* offset filled in at emit time */
if (intel_pixmap_tiled(pixmap)) {
if (intel_uxa_pixmap_tiled(pixmap)) {
tiling_bits = MS3_TILED_SURFACE;
if (intel_get_pixmap_private(pixmap)->tiling
if (intel_uxa_get_pixmap_private(pixmap)->tiling
== I915_TILING_Y)
tiling_bits |= MS3_TILE_WALK;
} else
@ -415,19 +415,19 @@ i915_emit_composite_primitive_affine_source(intel_screen_private *intel,
{
float src_x[3], src_y[3];
if (!intel_get_transformed_coordinates(srcX, srcY,
if (!intel_uxa_get_transformed_coordinates(srcX, srcY,
intel->transform[0],
&src_x[0],
&src_y[0]))
return;
if (!intel_get_transformed_coordinates(srcX, srcY + h,
if (!intel_uxa_get_transformed_coordinates(srcX, srcY + h,
intel->transform[0],
&src_x[1],
&src_y[1]))
return;
if (!intel_get_transformed_coordinates(srcX + w, srcY + h,
if (!intel_uxa_get_transformed_coordinates(srcX + w, srcY + h,
intel->transform[0],
&src_x[2],
&src_y[2]))
@ -492,30 +492,30 @@ i915_emit_composite_primitive(intel_screen_private *intel,
src_unit = tex_unit++;
is_affine_src = intel_transform_is_affine(intel->transform[src_unit]);
is_affine_src = intel_uxa_transform_is_affine(intel->transform[src_unit]);
if (is_affine_src) {
if (!intel_get_transformed_coordinates(srcX, srcY,
if (!intel_uxa_get_transformed_coordinates(srcX, srcY,
intel->
transform[src_unit],
&src_x[0],
&src_y[0]))
return;
if (!intel_get_transformed_coordinates(srcX, srcY + h,
if (!intel_uxa_get_transformed_coordinates(srcX, srcY + h,
intel->
transform[src_unit],
&src_x[1],
&src_y[1]))
return;
if (!intel_get_transformed_coordinates(srcX + w, srcY + h,
if (!intel_uxa_get_transformed_coordinates(srcX + w, srcY + h,
intel->
transform[src_unit],
&src_x[2],
&src_y[2]))
return;
} else {
if (!intel_get_transformed_coordinates_3d(srcX, srcY,
if (!intel_uxa_get_transformed_coordinates_3d(srcX, srcY,
intel->
transform[src_unit],
&src_x[0],
@ -523,7 +523,7 @@ i915_emit_composite_primitive(intel_screen_private *intel,
&src_w[0]))
return;
if (!intel_get_transformed_coordinates_3d(srcX, srcY + h,
if (!intel_uxa_get_transformed_coordinates_3d(srcX, srcY + h,
intel->
transform[src_unit],
&src_x[1],
@ -531,7 +531,7 @@ i915_emit_composite_primitive(intel_screen_private *intel,
&src_w[1]))
return;
if (!intel_get_transformed_coordinates_3d(srcX + w, srcY + h,
if (!intel_uxa_get_transformed_coordinates_3d(srcX + w, srcY + h,
intel->
transform[src_unit],
&src_x[2],
@ -543,30 +543,30 @@ i915_emit_composite_primitive(intel_screen_private *intel,
if (intel->render_mask) {
mask_unit = tex_unit++;
is_affine_mask = intel_transform_is_affine(intel->transform[mask_unit]);
is_affine_mask = intel_uxa_transform_is_affine(intel->transform[mask_unit]);
if (is_affine_mask) {
if (!intel_get_transformed_coordinates(maskX, maskY,
if (!intel_uxa_get_transformed_coordinates(maskX, maskY,
intel->
transform[mask_unit],
&mask_x[0],
&mask_y[0]))
return;
if (!intel_get_transformed_coordinates(maskX, maskY + h,
if (!intel_uxa_get_transformed_coordinates(maskX, maskY + h,
intel->
transform[mask_unit],
&mask_x[1],
&mask_y[1]))
return;
if (!intel_get_transformed_coordinates(maskX + w, maskY + h,
if (!intel_uxa_get_transformed_coordinates(maskX + w, maskY + h,
intel->
transform[mask_unit],
&mask_x[2],
&mask_y[2]))
return;
} else {
if (!intel_get_transformed_coordinates_3d(maskX, maskY,
if (!intel_uxa_get_transformed_coordinates_3d(maskX, maskY,
intel->
transform[mask_unit],
&mask_x[0],
@ -574,7 +574,7 @@ i915_emit_composite_primitive(intel_screen_private *intel,
&mask_w[0]))
return;
if (!intel_get_transformed_coordinates_3d(maskX, maskY + h,
if (!intel_uxa_get_transformed_coordinates_3d(maskX, maskY + h,
intel->
transform[mask_unit],
&mask_x[1],
@ -582,7 +582,7 @@ i915_emit_composite_primitive(intel_screen_private *intel,
&mask_w[1]))
return;
if (!intel_get_transformed_coordinates_3d(maskX + w, maskY + h,
if (!intel_uxa_get_transformed_coordinates_3d(maskX + w, maskY + h,
intel->
transform[mask_unit],
&mask_x[2],
@ -653,9 +653,9 @@ i915_prepare_composite(int op, PicturePtr source_picture,
intel_screen_private *intel = intel_get_screen_private(scrn);
drm_intel_bo *bo_table[] = {
NULL, /* batch_bo */
intel_get_pixmap_bo(dest),
intel_get_pixmap_bo(source),
mask ? intel_get_pixmap_bo(mask) : NULL,
intel_uxa_get_pixmap_bo(dest),
intel_uxa_get_pixmap_bo(source),
mask ? intel_uxa_get_pixmap_bo(mask) : NULL,
};
int tex_unit = 0;
int floats_per_vertex;
@ -667,20 +667,20 @@ i915_prepare_composite(int op, PicturePtr source_picture,
intel->render_dest_picture = dest_picture;
intel->render_dest = dest;
if (!intel_check_pitch_3d(source))
if (!intel_uxa_check_pitch_3d(source))
return FALSE;
if (mask && !intel_check_pitch_3d(mask))
if (mask && !intel_uxa_check_pitch_3d(mask))
return FALSE;
if (!intel_check_pitch_3d(dest))
if (!intel_uxa_check_pitch_3d(dest))
return FALSE;
if (!i915_get_dest_format(dest_picture,
&intel->i915_render_state.dst_format))
return FALSE;
if (!intel_get_aperture_space(scrn, bo_table, ARRAY_SIZE(bo_table)))
if (!intel_uxa_get_aperture_space(scrn, bo_table, ARRAY_SIZE(bo_table)))
return FALSE;
if (mask_picture != NULL && mask_picture->componentAlpha &&
@ -703,11 +703,11 @@ i915_prepare_composite(int op, PicturePtr source_picture,
floats_per_vertex = 2; /* dest x/y */
if (!i915_texture_setup(source_picture, source, tex_unit++)) {
intel_debug_fallback(scrn, "fail to setup src texture\n");
intel_uxa_debug_fallback(scrn, "fail to setup src texture\n");
return FALSE;
}
if (intel_transform_is_affine(source_picture->transform))
if (intel_uxa_transform_is_affine(source_picture->transform))
floats_per_vertex += 2; /* src x/y */
else
floats_per_vertex += 4; /* src x/y/z/w */
@ -715,12 +715,12 @@ i915_prepare_composite(int op, PicturePtr source_picture,
if (mask_picture != NULL) {
assert(mask != NULL);
if (!i915_texture_setup(mask_picture, mask, tex_unit++)) {
intel_debug_fallback(scrn,
intel_uxa_debug_fallback(scrn,
"fail to setup mask texture\n");
return FALSE;
}
if (intel_transform_is_affine(mask_picture->transform))
if (intel_uxa_transform_is_affine(mask_picture->transform))
floats_per_vertex += 2; /* mask x/y */
else
floats_per_vertex += 4; /* mask x/y/z/w */
@ -728,7 +728,7 @@ i915_prepare_composite(int op, PicturePtr source_picture,
intel->i915_render_state.op = op;
if (intel_pixmap_is_dirty(source) || intel_pixmap_is_dirty(mask))
if (intel_uxa_pixmap_is_dirty(source) || intel_uxa_pixmap_is_dirty(mask))
intel_batch_emit_flush(scrn);
intel->needs_render_state_emit = TRUE;
@ -737,7 +737,7 @@ i915_prepare_composite(int op, PicturePtr source_picture,
if (!mask) {
if (intel->transform[0] == NULL)
intel->prim_emit = i915_emit_composite_primitive_identity_source;
else if (intel_transform_is_affine(intel->transform[0]))
else if (intel_uxa_transform_is_affine(intel->transform[0]))
intel->prim_emit = i915_emit_composite_primitive_affine_source;
} else {
if (intel->transform[0] == NULL) {
@ -775,7 +775,7 @@ i915_composite_emit_shader(intel_screen_private *intel, CARD8 op)
else
src_reg = FS_OC;
if (intel_transform_is_affine(intel->transform[0]))
if (intel_uxa_transform_is_affine(intel->transform[0]))
i915_fs_texld(src_reg, FS_S0, FS_T0);
else
i915_fs_texldp(src_reg, FS_S0, FS_T0);
@ -787,7 +787,7 @@ i915_composite_emit_shader(intel_screen_private *intel, CARD8 op)
i915_fs_dcl(FS_S1);
/* Load the source_picture texel */
if (intel_transform_is_affine(intel->transform[0]))
if (intel_uxa_transform_is_affine(intel->transform[0]))
i915_fs_texld(FS_R0, FS_S0, FS_T0);
else
i915_fs_texldp(FS_R0, FS_S0, FS_T0);
@ -795,7 +795,7 @@ i915_composite_emit_shader(intel_screen_private *intel, CARD8 op)
src_reg = FS_R0;
/* Load the mask_picture texel */
if (intel_transform_is_affine(intel->transform[1]))
if (intel_uxa_transform_is_affine(intel->transform[1]))
i915_fs_texld(FS_R1, FS_S1, FS_T1);
else
i915_fs_texldp(FS_R1, FS_S1, FS_T1);
@ -883,9 +883,9 @@ static void i915_emit_composite_setup(ScrnInfoPtr scrn)
if (1) {
uint32_t tiling_bits;
if (intel_pixmap_tiled(dest)) {
if (intel_uxa_pixmap_tiled(dest)) {
tiling_bits = BUF_3D_TILED_SURFACE;
if (intel_get_pixmap_private(dest)->tiling
if (intel_uxa_get_pixmap_private(dest)->tiling
== I915_TILING_Y)
tiling_bits |= BUF_3D_TILE_WALK_Y;
} else
@ -916,12 +916,12 @@ static void i915_emit_composite_setup(ScrnInfoPtr scrn)
ss2 = ~0;
ss2 &= ~S2_TEXCOORD_FMT(0, TEXCOORDFMT_NOT_PRESENT);
ss2 |= S2_TEXCOORD_FMT(0,
intel_transform_is_affine(intel->transform[0]) ?
intel_uxa_transform_is_affine(intel->transform[0]) ?
TEXCOORDFMT_2D : TEXCOORDFMT_4D);
if (mask) {
ss2 &= ~S2_TEXCOORD_FMT(1, TEXCOORDFMT_NOT_PRESENT);
ss2 |= S2_TEXCOORD_FMT(1,
intel_transform_is_affine(intel->transform[1]) ?
intel_uxa_transform_is_affine(intel->transform[1]) ?
TEXCOORDFMT_2D : TEXCOORDFMT_4D);
}

10
src/uxa/i915_video.c
View File

@ -67,7 +67,7 @@ I915DisplayVideoTextured(ScrnInfoPtr scrn,
dyo = dstRegion->extents.y1;
if (pixmap->drawable.width > 2048 || pixmap->drawable.height > 2048 ||
!intel_check_pitch_3d(pixmap)) {
!intel_uxa_check_pitch_3d(pixmap)) {
ScreenPtr screen = pixmap->drawable.pScreen;
target = screen->CreatePixmap(screen,
@ -78,7 +78,7 @@ I915DisplayVideoTextured(ScrnInfoPtr scrn,
if (target == NULL)
return;
if (intel_get_pixmap_bo(target) == NULL) {
if (intel_uxa_get_pixmap_bo(target) == NULL) {
screen->DestroyPixmap(target);
return;
}
@ -159,9 +159,9 @@ I915DisplayVideoTextured(ScrnInfoPtr scrn,
DSTORG_VERT_BIAS(0x8) | format);
/* front buffer, pitch, offset */
if (intel_pixmap_tiled(target)) {
if (intel_uxa_pixmap_tiled(target)) {
tiling = BUF_3D_TILED_SURFACE;
if (intel_get_pixmap_private(target)->tiling == I915_TILING_Y)
if (intel_uxa_get_pixmap_private(target)->tiling == I915_TILING_Y)
tiling |= BUF_3D_TILE_WALK_Y;
} else
tiling = 0;
@ -488,5 +488,5 @@ I915DisplayVideoTextured(ScrnInfoPtr scrn,
target->drawable.pScreen->DestroyPixmap(target);
}
intel_debug_flush(scrn);
intel_uxa_debug_flush(scrn);
}

98
src/uxa/i965_render.c
View File

@ -186,7 +186,7 @@ i965_check_composite(int op,
/* Check for unsupported compositing operations. */
if (op >= sizeof(i965_blend_op) / sizeof(i965_blend_op[0])) {
intel_debug_fallback(scrn,
intel_uxa_debug_fallback(scrn,
"Unsupported Composite op 0x%x\n", op);
return FALSE;
}
@ -199,7 +199,7 @@ i965_check_composite(int op,
*/
if (i965_blend_op[op].src_alpha &&
(i965_blend_op[op].src_blend != BRW_BLENDFACTOR_ZERO)) {
intel_debug_fallback(scrn,
intel_uxa_debug_fallback(scrn,
"Component alpha not supported "
"with source alpha and source "
"value blending.\n");
@ -208,7 +208,7 @@ i965_check_composite(int op,
}
if (i965_get_dest_format(dest_picture) == -1) {
intel_debug_fallback(scrn, "Usupported Color buffer format 0x%x\n",
intel_uxa_debug_fallback(scrn, "Usupported Color buffer format 0x%x\n",
(int)dest_picture->format);
return FALSE;
}
@ -221,7 +221,7 @@ i965_check_composite_texture(ScreenPtr screen, PicturePtr picture)
{
if (picture->repeatType > RepeatReflect) {
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
intel_debug_fallback(scrn,
intel_uxa_debug_fallback(scrn,
"extended repeat (%d) not supported\n",
picture->repeatType);
return FALSE;
@ -230,7 +230,7 @@ i965_check_composite_texture(ScreenPtr screen, PicturePtr picture)
if (picture->filter != PictFilterNearest &&
picture->filter != PictFilterBilinear) {
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
intel_debug_fallback(scrn, "Unsupported filter 0x%x\n",
intel_uxa_debug_fallback(scrn, "Unsupported filter 0x%x\n",
picture->filter);
return FALSE;
}
@ -242,7 +242,7 @@ i965_check_composite_texture(ScreenPtr screen, PicturePtr picture)
h = picture->pDrawable->height;
if ((w > 8192) || (h > 8192)) {
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
intel_debug_fallback(scrn,
intel_uxa_debug_fallback(scrn,
"Picture w/h too large (%dx%d)\n",
w, h);
return FALSE;
@ -257,7 +257,7 @@ i965_check_composite_texture(ScreenPtr screen, PicturePtr picture)
if (i == sizeof(i965_tex_formats) / sizeof(i965_tex_formats[0]))
{
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
intel_debug_fallback(scrn,
intel_uxa_debug_fallback(scrn,
"Unsupported picture format "
"0x%x\n",
(int)picture->format);
@ -791,7 +791,7 @@ static drm_intel_bo *gen4_create_sf_state(intel_screen_private *intel,
sf_state = memset(sf_state_bo->virtual, 0, sizeof(*sf_state));
sf_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(SF_KERNEL_NUM_GRF);
sf_state->thread0.kernel_start_pointer =
intel_emit_reloc(sf_state_bo,
intel_uxa_emit_reloc(sf_state_bo,
offsetof(struct brw_sf_unit_state, thread0),
kernel_bo, sf_state->thread0.grf_reg_count << 1,
I915_GEM_DOMAIN_INSTRUCTION, 0) >> 6;
@ -838,7 +838,7 @@ static drm_intel_bo *sampler_border_color_create(intel_screen_private *intel)
sampler_border_color.color[2] = 0; /* B */
sampler_border_color.color[3] = 0; /* A */
return intel_bo_alloc_for_data(intel,
return intel_uxa_bo_alloc_for_data(intel,
&sampler_border_color,
sizeof(sampler_border_color),
"gen4 render sampler border color");
@ -902,7 +902,7 @@ gen4_sampler_state_init(drm_intel_bo * sampler_state_bo,
}
sampler_state->ss2.border_color_pointer =
intel_emit_reloc(sampler_state_bo, sampler_state_offset +
intel_uxa_emit_reloc(sampler_state_bo, sampler_state_offset +
offsetof(struct brw_sampler_state, ss2),
border_color_bo, 0,
I915_GEM_DOMAIN_SAMPLER, 0) >> 5;
@ -968,7 +968,7 @@ gen7_sampler_state_init(drm_intel_bo * sampler_state_bo,
}
sampler_state->ss2.default_color_pointer =
intel_emit_reloc(sampler_state_bo, sampler_state_offset +
intel_uxa_emit_reloc(sampler_state_bo, sampler_state_offset +
offsetof(struct gen7_sampler_state, ss2),
border_color_bo, 0,
I915_GEM_DOMAIN_SAMPLER, 0) >> 5;
@ -1084,7 +1084,7 @@ cc_state_init(drm_intel_bo * cc_state_bo,
cc_state->cc3.alpha_test = 0; /* disable alpha test */
cc_state->cc4.cc_viewport_state_offset =
intel_emit_reloc(cc_state_bo, cc_state_offset +
intel_uxa_emit_reloc(cc_state_bo, cc_state_offset +
offsetof(struct brw_cc_unit_state, cc4),
cc_vp_bo, 0, I915_GEM_DOMAIN_INSTRUCTION, 0) >> 5;
@ -1125,7 +1125,7 @@ static drm_intel_bo *gen4_create_wm_state(intel_screen_private *intel,
state = memset(wm_state_bo->virtual, 0, sizeof(*state));
state->thread0.grf_reg_count = BRW_GRF_BLOCKS(PS_KERNEL_NUM_GRF);
state->thread0.kernel_start_pointer =
intel_emit_reloc(wm_state_bo,
intel_uxa_emit_reloc(wm_state_bo,
offsetof(struct brw_wm_unit_state, thread0),
kernel_bo, state->thread0.grf_reg_count << 1,
I915_GEM_DOMAIN_INSTRUCTION, 0) >> 6;
@ -1149,7 +1149,7 @@ static drm_intel_bo *gen4_create_wm_state(intel_screen_private *intel,
state->wm4.sampler_count = 1; /* 1-4 samplers used */
state->wm4.sampler_state_pointer =
intel_emit_reloc(wm_state_bo,
intel_uxa_emit_reloc(wm_state_bo,
offsetof(struct brw_wm_unit_state, wm4),
sampler_bo,
state->wm4.sampler_count << 2,
@ -1219,7 +1219,7 @@ static drm_intel_bo *gen4_create_vs_unit_state(intel_screen_private *intel)
vs_state.vs6.vs_enable = 0;
vs_state.vs6.vert_cache_disable = 1;
return intel_bo_alloc_for_data(intel, &vs_state, sizeof(vs_state),
return intel_uxa_bo_alloc_for_data(intel, &vs_state, sizeof(vs_state),
"gen4 render VS state");
}
@ -1309,7 +1309,7 @@ gen4_set_picture_surface_state(intel_screen_private *intel,
PicturePtr picture, PixmapPtr pixmap,
Bool is_dst)
{
struct intel_pixmap *priv = intel_get_pixmap_private(pixmap);
struct intel_uxa_pixmap *priv = intel_uxa_get_pixmap_private(pixmap);
struct brw_surface_state *ss;
uint32_t write_domain, read_domains;
int offset;
@ -1341,7 +1341,7 @@ gen4_set_picture_surface_state(intel_screen_private *intel,
ss->ss2.width = pixmap->drawable.width - 1;
ss->ss3.pitch = intel_pixmap_pitch(pixmap) - 1;
ss->ss3.tile_walk = 0; /* Tiled X */
ss->ss3.tiled_surface = intel_pixmap_tiled(pixmap) ? 1 : 0;
ss->ss3.tiled_surface = intel_uxa_pixmap_tiled(pixmap) ? 1 : 0;
dri_bo_emit_reloc(intel->surface_bo,
read_domains, write_domain,
@ -1361,7 +1361,7 @@ gen7_set_picture_surface_state(intel_screen_private *intel,
PicturePtr picture, PixmapPtr pixmap,
Bool is_dst)
{
struct intel_pixmap *priv = intel_get_pixmap_private(pixmap);
struct intel_uxa_pixmap *priv = intel_uxa_get_pixmap_private(pixmap);
struct gen7_surface_state *ss;
uint32_t write_domain, read_domains;
int offset;
@ -1386,7 +1386,7 @@ gen7_set_picture_surface_state(intel_screen_private *intel,
ss->ss0.surface_format = i965_get_card_format(picture);
ss->ss0.tile_walk = 0; /* Tiled X */
ss->ss0.tiled_surface = intel_pixmap_tiled(pixmap) ? 1 : 0;
ss->ss0.tiled_surface = intel_uxa_pixmap_tiled(pixmap) ? 1 : 0;
ss->ss1.base_addr = priv->bo->offset;
ss->ss2.height = pixmap->drawable.height - 1;
@ -1819,19 +1819,19 @@ i965_emit_composite_primitive_affine_source(intel_screen_private *intel,
{
float src_x[3], src_y[3];
if (!intel_get_transformed_coordinates(srcX, srcY,
if (!intel_uxa_get_transformed_coordinates(srcX, srcY,
intel->transform[0],
&src_x[0],
&src_y[0]))
return;
if (!intel_get_transformed_coordinates(srcX, srcY + h,
if (!intel_uxa_get_transformed_coordinates(srcX, srcY + h,
intel->transform[0],
&src_x[1],
&src_y[1]))
return;
if (!intel_get_transformed_coordinates(srcX + w, srcY + h,
if (!intel_uxa_get_transformed_coordinates(srcX + w, srcY + h,
intel->transform[0],
&src_x[2],
&src_y[2]))
@ -1893,39 +1893,39 @@ i965_emit_composite_primitive(intel_screen_private *intel,
Bool is_affine = intel->gen4_render_state->composite_op.is_affine;
if (is_affine) {
if (!intel_get_transformed_coordinates(srcX, srcY,
if (!intel_uxa_get_transformed_coordinates(srcX, srcY,
intel->transform[0],
&src_x[0],
&src_y[0]))
return;
if (!intel_get_transformed_coordinates(srcX, srcY + h,
if (!intel_uxa_get_transformed_coordinates(srcX, srcY + h,
intel->transform[0],
&src_x[1],
&src_y[1]))
return;
if (!intel_get_transformed_coordinates(srcX + w, srcY + h,
if (!intel_uxa_get_transformed_coordinates(srcX + w, srcY + h,
intel->transform[0],
&src_x[2],
&src_y[2]))
return;
} else {
if (!intel_get_transformed_coordinates_3d(srcX, srcY,
if (!intel_uxa_get_transformed_coordinates_3d(srcX, srcY,
intel->transform[0],
&src_x[0],
&src_y[0],
&src_w[0]))
return;
if (!intel_get_transformed_coordinates_3d(srcX, srcY + h,
if (!intel_uxa_get_transformed_coordinates_3d(srcX, srcY + h,
intel->transform[0],
&src_x[1],
&src_y[1],
&src_w[1]))
return;
if (!intel_get_transformed_coordinates_3d(srcX + w, srcY + h,
if (!intel_uxa_get_transformed_coordinates_3d(srcX + w, srcY + h,
intel->transform[0],
&src_x[2],
&src_y[2],
@ -1935,39 +1935,39 @@ i965_emit_composite_primitive(intel_screen_private *intel,
if (intel->render_mask) {
if (is_affine) {
if (!intel_get_transformed_coordinates(maskX, maskY,
if (!intel_uxa_get_transformed_coordinates(maskX, maskY,
intel->transform[1],
&mask_x[0],
&mask_y[0]))
return;
if (!intel_get_transformed_coordinates(maskX, maskY + h,
if (!intel_uxa_get_transformed_coordinates(maskX, maskY + h,
intel->transform[1],
&mask_x[1],
&mask_y[1]))
return;
if (!intel_get_transformed_coordinates(maskX + w, maskY + h,
if (!intel_uxa_get_transformed_coordinates(maskX + w, maskY + h,
intel->transform[1],
&mask_x[2],
&mask_y[2]))
return;
} else {
if (!intel_get_transformed_coordinates_3d(maskX, maskY,
if (!intel_uxa_get_transformed_coordinates_3d(maskX, maskY,
intel->transform[1],
&mask_x[0],
&mask_y[0],
&mask_w[0]))
return;
if (!intel_get_transformed_coordinates_3d(maskX, maskY + h,
if (!intel_uxa_get_transformed_coordinates_3d(maskX, maskY + h,
intel->transform[1],
&mask_x[1],
&mask_y[1],
&mask_w[1]))
return;
if (!intel_get_transformed_coordinates_3d(maskX + w, maskY + h,
if (!intel_uxa_get_transformed_coordinates_3d(maskX + w, maskY + h,
intel->transform[1],
&mask_x[2],
&mask_y[2],
@ -2029,14 +2029,14 @@ i965_prepare_composite(int op, PicturePtr source_picture,
composite_op->src_filter =
sampler_state_filter_from_picture(source_picture->filter);
if (composite_op->src_filter == SS_INVALID_FILTER) {
intel_debug_fallback(scrn, "Bad src filter 0x%x\n",
intel_uxa_debug_fallback(scrn, "Bad src filter 0x%x\n",
source_picture->filter);
return FALSE;
}
composite_op->src_extend =
sampler_state_extend_from_picture(source_picture->repeatType);
if (composite_op->src_extend == SS_INVALID_EXTEND) {
intel_debug_fallback(scrn, "Bad src repeat 0x%x\n",
intel_uxa_debug_fallback(scrn, "Bad src repeat 0x%x\n",
source_picture->repeatType);
return FALSE;
}
@ -2050,7 +2050,7 @@ i965_prepare_composite(int op, PicturePtr source_picture,
*/
if (i965_blend_op[op].src_alpha &&
(i965_blend_op[op].src_blend != BRW_BLENDFACTOR_ZERO)) {
intel_debug_fallback(scrn,
intel_uxa_debug_fallback(scrn,
"Component alpha not supported "
"with source alpha and source "
"value blending.\n");
@ -2061,14 +2061,14 @@ i965_prepare_composite(int op, PicturePtr source_picture,
composite_op->mask_filter =
sampler_state_filter_from_picture(mask_picture->filter);
if (composite_op->mask_filter == SS_INVALID_FILTER) {
intel_debug_fallback(scrn, "Bad mask filter 0x%x\n",
intel_uxa_debug_fallback(scrn, "Bad mask filter 0x%x\n",
mask_picture->filter);
return FALSE;
}
composite_op->mask_extend =
sampler_state_extend_from_picture(mask_picture->repeatType);
if (composite_op->mask_extend == SS_INVALID_EXTEND) {
intel_debug_fallback(scrn, "Bad mask repeat 0x%x\n",
intel_uxa_debug_fallback(scrn, "Bad mask repeat 0x%x\n",
mask_picture->repeatType);
return FALSE;
}
@ -2078,7 +2078,7 @@ i965_prepare_composite(int op, PicturePtr source_picture,
}
/* Flush any pending writes prior to relocating the textures. */
if (intel_pixmap_is_dirty(source) || intel_pixmap_is_dirty(mask))
if (intel_uxa_pixmap_is_dirty(source) || intel_uxa_pixmap_is_dirty(mask))
intel_batch_emit_flush(scrn);
composite_op->op = op;
@ -2093,7 +2093,7 @@ i965_prepare_composite(int op, PicturePtr source_picture,
intel->scale_units[0][1] = 1. / source->drawable.height;
intel->transform[0] = source_picture->transform;
composite_op->is_affine = intel_transform_is_affine(intel->transform[0]);
composite_op->is_affine = intel_uxa_transform_is_affine(intel->transform[0]);
if (mask_picture == NULL) {
intel->transform[1] = NULL;
@ -2105,7 +2105,7 @@ i965_prepare_composite(int op, PicturePtr source_picture,
intel->scale_units[1][0] = 1. / mask->drawable.width;
intel->scale_units[1][1] = 1. / mask->drawable.height;
composite_op->is_affine &=
intel_transform_is_affine(intel->transform[1]);
intel_uxa_transform_is_affine(intel->transform[1]);
}
if (mask) {
@ -2159,7 +2159,7 @@ i965_prepare_composite(int op, PicturePtr source_picture,
if (!i965_composite_check_aperture(intel)) {
intel_batch_submit(scrn);
if (!i965_composite_check_aperture(intel)) {
intel_debug_fallback(scrn,
intel_uxa_debug_fallback(scrn,
"Couldn't fit render operation "
"in aperture\n");
return FALSE;
@ -2367,21 +2367,21 @@ void gen4_render_state_init(ScrnInfoPtr scrn)
/* Set up the two SF states (one for blending with a mask, one without) */
if (IS_GEN5(intel)) {
sf_kernel_bo = intel_bo_alloc_for_data(intel,
sf_kernel_bo = intel_uxa_bo_alloc_for_data(intel,
sf_kernel_static_gen5,
sizeof
(sf_kernel_static_gen5),
"sf kernel gen5");
sf_kernel_mask_bo =
intel_bo_alloc_for_data(intel, sf_kernel_mask_static_gen5,
intel_uxa_bo_alloc_for_data(intel, sf_kernel_mask_static_gen5,
sizeof(sf_kernel_mask_static_gen5),
"sf mask kernel");
} else {
sf_kernel_bo = intel_bo_alloc_for_data(intel,
sf_kernel_bo = intel_uxa_bo_alloc_for_data(intel,
sf_kernel_static,
sizeof(sf_kernel_static),
"sf kernel");
sf_kernel_mask_bo = intel_bo_alloc_for_data(intel,
sf_kernel_mask_bo = intel_uxa_bo_alloc_for_data(intel,
sf_kernel_mask_static,
sizeof
(sf_kernel_mask_static),
@ -2395,7 +2395,7 @@ void gen4_render_state_init(ScrnInfoPtr scrn)
wm_kernels = IS_GEN5(intel) ? wm_kernels_gen5 : wm_kernels_gen4;
for (m = 0; m < KERNEL_COUNT; m++) {
render->wm_kernel_bo[m] =
intel_bo_alloc_for_data(intel,
intel_uxa_bo_alloc_for_data(intel,
wm_kernels[m].data,
wm_kernels[m].size,
"WM kernel");
@ -2919,7 +2919,7 @@ gen6_render_state_init(ScrnInfoPtr scrn)
wm_kernels = IS_GEN7(intel) ? wm_kernels_gen7 : wm_kernels_gen6;
for (m = 0; m < KERNEL_COUNT; m++) {
render->wm_kernel_bo[m] =
intel_bo_alloc_for_data(intel,
intel_uxa_bo_alloc_for_data(intel,
wm_kernels[m].data,
wm_kernels[m].size,
"WM kernel gen6/7");

48
src/uxa/i965_video.c
View File

@ -388,7 +388,7 @@ static void i965_create_dst_surface_state(ScrnInfoPtr scrn,
{
intel_screen_private *intel = intel_get_screen_private(scrn);
struct brw_surface_state dest_surf_state;
drm_intel_bo *pixmap_bo = intel_get_pixmap_bo(pixmap);
drm_intel_bo *pixmap_bo = intel_uxa_get_pixmap_bo(pixmap);
assert(pixmap_bo != NULL);
memset(&dest_surf_state, 0, sizeof(dest_surf_state));
@ -414,7 +414,7 @@ static void i965_create_dst_surface_state(ScrnInfoPtr scrn,
dest_surf_state.ss0.render_cache_read_mode = 0;
dest_surf_state.ss1.base_addr =
intel_emit_reloc(surf_bo, offset + offsetof(struct brw_surface_state, ss1),
intel_uxa_emit_reloc(surf_bo, offset + offsetof(struct brw_surface_state, ss1),
pixmap_bo, 0, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER);
dest_surf_state.ss2.height = pixmap->drawable.height - 1;
@ -422,7 +422,7 @@ static void i965_create_dst_surface_state(ScrnInfoPtr scrn,
dest_surf_state.ss2.mip_count = 0;
dest_surf_state.ss2.render_target_rotation = 0;
dest_surf_state.ss3.pitch = intel_pixmap_pitch(pixmap) - 1;
dest_surf_state.ss3.tiled_surface = intel_pixmap_tiled(pixmap);
dest_surf_state.ss3.tiled_surface = intel_uxa_pixmap_tiled(pixmap);
dest_surf_state.ss3.tile_walk = 0; /* TileX */
dri_bo_subdata(surf_bo,
@ -465,7 +465,7 @@ static void i965_create_src_surface_state(ScrnInfoPtr scrn,
if (src_bo) {
src_surf_state.ss1.base_addr =
intel_emit_reloc(surface_bo,
intel_uxa_emit_reloc(surface_bo,
offset + offsetof(struct brw_surface_state, ss1),
src_bo, src_offset,
I915_GEM_DOMAIN_SAMPLER, 0);
@ -485,13 +485,13 @@ static void gen7_create_dst_surface_state(ScrnInfoPtr scrn,
{
intel_screen_private *intel = intel_get_screen_private(scrn);
struct gen7_surface_state dest_surf_state;
drm_intel_bo *pixmap_bo = intel_get_pixmap_bo(pixmap);
drm_intel_bo *pixmap_bo = intel_uxa_get_pixmap_bo(pixmap);
assert(pixmap_bo != NULL);
memset(&dest_surf_state, 0, sizeof(dest_surf_state));
dest_surf_state.ss0.surface_type = BRW_SURFACE_2D;
dest_surf_state.ss0.tiled_surface = intel_pixmap_tiled(pixmap);
dest_surf_state.ss0.tiled_surface = intel_uxa_pixmap_tiled(pixmap);
dest_surf_state.ss0.tile_walk = 0; /* TileX */
if (intel->cpp == 2) {
@ -501,7 +501,7 @@ static void gen7_create_dst_surface_state(ScrnInfoPtr scrn,
}
dest_surf_state.ss1.base_addr =
intel_emit_reloc(surf_bo,
intel_uxa_emit_reloc(surf_bo,
offset + offsetof(struct gen7_surface_state, ss1),
pixmap_bo, 0,
I915_GEM_DOMAIN_SAMPLER, 0);
@ -543,7 +543,7 @@ static void gen7_create_src_surface_state(ScrnInfoPtr scrn,
if (src_bo) {
src_surf_state.ss1.base_addr =
intel_emit_reloc(surface_bo,
intel_uxa_emit_reloc(surface_bo,
offset + offsetof(struct gen7_surface_state, ss1),
src_bo, src_offset,
I915_GEM_DOMAIN_SAMPLER, 0);
@ -596,7 +596,7 @@ static drm_intel_bo *i965_create_sampler_state(ScrnInfoPtr scrn)
sampler_state.ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
sampler_state.ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
return intel_bo_alloc_for_data(intel,
return intel_uxa_bo_alloc_for_data(intel,
&sampler_state, sizeof(sampler_state),
"textured video sampler state");
}
@ -613,7 +613,7 @@ static drm_intel_bo *gen7_create_sampler_state(ScrnInfoPtr scrn)
sampler_state.ss3.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
sampler_state.ss3.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
return intel_bo_alloc_for_data(intel,
return intel_uxa_bo_alloc_for_data(intel,
&sampler_state, sizeof(sampler_state),
"textured video sampler state");
}
@ -633,7 +633,7 @@ static drm_intel_bo *i965_create_vs_state(ScrnInfoPtr scrn)
vs_state.vs6.vs_enable = 0;
vs_state.vs6.vert_cache_disable = 1;
return intel_bo_alloc_for_data(intel,
return intel_uxa_bo_alloc_for_data(intel,
&vs_state, sizeof(vs_state),
"textured video vs state");
}
@ -643,7 +643,7 @@ static drm_intel_bo *i965_create_program(ScrnInfoPtr scrn,
unsigned int program_size)
{
intel_screen_private *intel = intel_get_screen_private(scrn);
return intel_bo_alloc_for_data(intel,
return intel_uxa_bo_alloc_for_data(intel,
program, program_size,
"textured video program");
}
@ -680,7 +680,7 @@ static drm_intel_bo *i965_create_sf_state(ScrnInfoPtr scrn)
memset(&sf_state, 0, sizeof(sf_state));
sf_state.thread0.grf_reg_count = BRW_GRF_BLOCKS(SF_KERNEL_NUM_GRF);
sf_state.thread0.kernel_start_pointer =
intel_emit_reloc(sf_bo, offsetof(struct brw_sf_unit_state, thread0),
intel_uxa_emit_reloc(sf_bo, offsetof(struct brw_sf_unit_state, thread0),
kernel_bo, sf_state.thread0.grf_reg_count << 1,
I915_GEM_DOMAIN_INSTRUCTION, 0) >> 6;
sf_state.sf1.single_program_flow = 1; /* XXX */
@ -764,7 +764,7 @@ static drm_intel_bo *i965_create_wm_state(ScrnInfoPtr scrn,
memset(&wm_state, 0, sizeof(wm_state));
wm_state.thread0.grf_reg_count = BRW_GRF_BLOCKS(PS_KERNEL_NUM_GRF);
wm_state.thread0.kernel_start_pointer =
intel_emit_reloc(wm_bo, offsetof(struct brw_wm_unit_state, thread0),
intel_uxa_emit_reloc(wm_bo, offsetof(struct brw_wm_unit_state, thread0),
kernel_bo, wm_state.thread0.grf_reg_count << 1,
I915_GEM_DOMAIN_INSTRUCTION, 0) >> 6;
wm_state.thread1.single_program_flow = 1; /* XXX */
@ -791,7 +791,7 @@ static drm_intel_bo *i965_create_wm_state(ScrnInfoPtr scrn,
wm_state.thread3.urb_entry_read_offset = 0; /* XXX */
wm_state.wm4.stats_enable = 1;
wm_state.wm4.sampler_state_pointer =
intel_emit_reloc(wm_bo, offsetof(struct brw_wm_unit_state, wm4),
intel_uxa_emit_reloc(wm_bo, offsetof(struct brw_wm_unit_state, wm4),
sampler_bo, 0,
I915_GEM_DOMAIN_INSTRUCTION, 0) >> 5;
if (IS_GEN5(intel))
@ -818,7 +818,7 @@ static drm_intel_bo *i965_create_cc_vp_state(ScrnInfoPtr scrn)
cc_viewport.min_depth = -1.e35;
cc_viewport.max_depth = 1.e35;
return intel_bo_alloc_for_data(intel,
return intel_uxa_bo_alloc_for_data(intel,
&cc_viewport, sizeof(cc_viewport),
"textured video cc viewport");
}
@ -850,7 +850,7 @@ static drm_intel_bo *i965_create_cc_state(ScrnInfoPtr scrn)
cc_state.cc3.blend_enable = 0; /* disable color blend */
cc_state.cc3.alpha_test = 0; /* disable alpha test */
cc_state.cc4.cc_viewport_state_offset =
intel_emit_reloc(cc_bo, offsetof(struct brw_cc_unit_state, cc4),
intel_uxa_emit_reloc(cc_bo, offsetof(struct brw_cc_unit_state, cc4),
cc_vp_bo, 0, I915_GEM_DOMAIN_INSTRUCTION, 0) >> 5;
cc_state.cc5.dither_enable = 0; /* disable dither */
cc_state.cc5.logicop_func = 0xc; /* WHITE */
@ -1287,7 +1287,7 @@ I965DisplayVideoTextured(ScrnInfoPtr scrn,
vb[i++] = (float)box_x1 + pix_xoff;
vb[i++] = (float)box_y1 + pix_yoff;
bo_table[0] = intel_bo_alloc_for_data(intel,
bo_table[0] = intel_uxa_bo_alloc_for_data(intel,
vb, sizeof(vb),
"textured video vbo");
@ -1341,7 +1341,7 @@ I965DisplayVideoTextured(ScrnInfoPtr scrn,
/* release reference once we're finished */
drm_intel_bo_unreference(surface_state_binding_table_bo);
intel_debug_flush(scrn);
intel_uxa_debug_flush(scrn);
}
void i965_free_video(ScrnInfoPtr scrn)
@ -1387,7 +1387,7 @@ gen6_create_cc_state(ScrnInfoPtr scrn)
cc_state.constant_b = 1.0;
cc_state.constant_a = 1.0;
return intel_bo_alloc_for_data(intel,
return intel_uxa_bo_alloc_for_data(intel,
&cc_state, sizeof(cc_state),
"textured video cc state");
}
@ -1403,7 +1403,7 @@ gen6_create_blend_state(ScrnInfoPtr scrn)
blend_state.blend1.logic_op_func = 0xc;
blend_state.blend1.pre_blend_clamp_enable = 1;
return intel_bo_alloc_for_data(intel,
return intel_uxa_bo_alloc_for_data(intel,
&blend_state, sizeof(blend_state),
"textured video blend state");
}
@ -1415,7 +1415,7 @@ gen6_create_depth_stencil_state(ScrnInfoPtr scrn)
struct gen6_depth_stencil_state depth_stencil_state;
memset(&depth_stencil_state, 0, sizeof(depth_stencil_state));
return intel_bo_alloc_for_data(intel,
return intel_uxa_bo_alloc_for_data(intel,
&depth_stencil_state,
sizeof(depth_stencil_state),
"textured video blend state");
@ -1917,7 +1917,7 @@ void Gen6DisplayVideoTextured(ScrnInfoPtr scrn,
vb[i++] = (float)box_x1 + pix_xoff;
vb[i++] = (float)box_y1 + pix_yoff;
bo_table[0] = intel_bo_alloc_for_data(intel,
bo_table[0] = intel_uxa_bo_alloc_for_data(intel,
vb, sizeof(vb),
"video vbo");
@ -1936,5 +1936,5 @@ void Gen6DisplayVideoTextured(ScrnInfoPtr scrn,
/* release reference once we're finished */
drm_intel_bo_unreference(surface_state_binding_table_bo);
intel_debug_flush(scrn);
intel_uxa_debug_flush(scrn);
}

266
src/uxa/intel.h
View File

@ -93,63 +93,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define MAX_PIPES 4 /* consider making all users dynamic */
struct intel_pixmap {
dri_bo *bo;
struct list batch;
uint8_t tiling;
int8_t busy :2;
uint8_t dirty :1;
uint8_t offscreen :1;
uint8_t pinned :5;
#define PIN_SCANOUT 0x1
#define PIN_DRI2 0x2
#define PIN_DRI3 0x4
#define PIN_PRIME 0x8
#define PIN_GLAMOR 0x10
};
#if HAS_DEVPRIVATEKEYREC
extern DevPrivateKeyRec uxa_pixmap_index;
#else
extern int uxa_pixmap_index;
#endif
static inline struct intel_pixmap *intel_get_pixmap_private(PixmapPtr pixmap)
{
#if HAS_DEVPRIVATEKEYREC
return dixGetPrivate(&pixmap->devPrivates, &uxa_pixmap_index);
#else
return dixLookupPrivate(&pixmap->devPrivates, &uxa_pixmap_index);
#endif
}
static inline Bool intel_pixmap_is_busy(struct intel_pixmap *priv)
{
if (priv->busy == -1)
priv->busy = drm_intel_bo_busy(priv->bo);
return priv->busy;
}
static inline void intel_set_pixmap_private(PixmapPtr pixmap, struct intel_pixmap *intel)
{
dixSetPrivate(&pixmap->devPrivates, &uxa_pixmap_index, intel);
}
static inline Bool intel_pixmap_is_dirty(PixmapPtr pixmap)
{
return pixmap && intel_get_pixmap_private(pixmap)->dirty;
}
static inline Bool intel_pixmap_tiled(PixmapPtr pixmap)
{
return intel_get_pixmap_private(pixmap)->tiling != I915_TILING_NONE;
}
dri_bo *intel_get_pixmap_bo(PixmapPtr pixmap);
void intel_set_pixmap_bo(PixmapPtr pixmap, dri_bo * bo);
#include "common.h"
#define PITCH_NONE 0
@ -500,22 +443,10 @@ intel_get_screen_private(ScrnInfoPtr scrn)
#define MIN(a,b) ((a) < (b) ? (a) : (b))
#endif
static inline int intel_pixmap_pitch(PixmapPtr pixmap)
{
return pixmap->devKind;
}
extern void intel_video_init(ScreenPtr pScreen);
extern void intel_box_intersect(BoxPtr dest, BoxPtr a, BoxPtr b);
extern void intel_crtc_box(xf86CrtcPtr crtc, BoxPtr crtc_box);
/* Batchbuffer support macros and functions */
#include "intel_batchbuffer.h"
/* I830 specific functions */
extern void IntelEmitInvarientState(ScrnInfoPtr scrn);
extern void I830EmitInvarientState(ScrnInfoPtr scrn);
extern void I915EmitInvarientState(ScrnInfoPtr scrn);
extern void I830EmitFlush(ScrnInfoPtr scrn);
extern void I830InitVideo(ScreenPtr pScreen);
extern xf86CrtcPtr intel_covering_crtc(ScrnInfoPtr scrn, BoxPtr box,
xf86CrtcPtr desired, BoxPtr crtc_box_ret);
@ -549,170 +480,6 @@ drm_intel_bo *intel_allocate_framebuffer(ScrnInfoPtr scrn,
int *out_stride,
uint32_t *out_tiling);
/* i830_render.c */
Bool i830_check_composite(int op,
PicturePtr sourcec, PicturePtr mask, PicturePtr dest,
int width, int height);
Bool i830_check_composite_target(PixmapPtr pixmap);
Bool i830_check_composite_texture(ScreenPtr screen, PicturePtr picture);
Bool i830_prepare_composite(int op, PicturePtr sourcec, PicturePtr mask,
PicturePtr dest, PixmapPtr sourcecPixmap,
PixmapPtr maskPixmap, PixmapPtr destPixmap);
void i830_composite(PixmapPtr dest, int srcX, int srcY,
int maskX, int maskY, int dstX, int dstY, int w, int h);
void i830_vertex_flush(intel_screen_private *intel);
/* i915_render.c */
Bool i915_check_composite(int op,
PicturePtr sourcec, PicturePtr mask, PicturePtr dest,
int width, int height);
Bool i915_check_composite_target(PixmapPtr pixmap);
Bool i915_check_composite_texture(ScreenPtr screen, PicturePtr picture);
Bool i915_prepare_composite(int op, PicturePtr sourcec, PicturePtr mask,
PicturePtr dest, PixmapPtr sourcecPixmap,
PixmapPtr maskPixmap, PixmapPtr destPixmap);
void i915_composite(PixmapPtr dest, int srcX, int srcY,
int maskX, int maskY, int dstX, int dstY, int w, int h);
void i915_vertex_flush(intel_screen_private *intel);
void i915_batch_commit_notify(intel_screen_private *intel);
void i830_batch_commit_notify(intel_screen_private *intel);
/* i965_render.c */
unsigned int gen4_render_state_size(ScrnInfoPtr scrn);
void gen4_render_state_init(ScrnInfoPtr scrn);
void gen4_render_state_cleanup(ScrnInfoPtr scrn);
Bool i965_check_composite(int op,
PicturePtr sourcec, PicturePtr mask, PicturePtr dest,
int width, int height);
Bool i965_check_composite_texture(ScreenPtr screen, PicturePtr picture);
Bool i965_prepare_composite(int op, PicturePtr sourcec, PicturePtr mask,
PicturePtr dest, PixmapPtr sourcecPixmap,
PixmapPtr maskPixmap, PixmapPtr destPixmap);
void i965_composite(PixmapPtr dest, int srcX, int srcY,
int maskX, int maskY, int dstX, int dstY, int w, int h);
void i965_vertex_flush(intel_screen_private *intel);
void i965_batch_flush(intel_screen_private *intel);
void i965_batch_commit_notify(intel_screen_private *intel);
/* i965_3d.c */
void gen6_upload_invariant_states(intel_screen_private *intel);
void gen6_upload_viewport_state_pointers(intel_screen_private *intel,
drm_intel_bo *cc_vp_bo);
void gen7_upload_viewport_state_pointers(intel_screen_private *intel,
drm_intel_bo *cc_vp_bo);
void gen6_upload_urb(intel_screen_private *intel);
void gen7_upload_urb(intel_screen_private *intel);
void gen6_upload_cc_state_pointers(intel_screen_private *intel,
drm_intel_bo *blend_bo, drm_intel_bo *cc_bo,
drm_intel_bo *depth_stencil_bo,
uint32_t blend_offset);
void gen7_upload_cc_state_pointers(intel_screen_private *intel,
drm_intel_bo *blend_bo, drm_intel_bo *cc_bo,
drm_intel_bo *depth_stencil_bo,
uint32_t blend_offset);
void gen6_upload_sampler_state_pointers(intel_screen_private *intel,
drm_intel_bo *sampler_bo);
void gen7_upload_sampler_state_pointers(intel_screen_private *intel,
drm_intel_bo *sampler_bo);
void gen7_upload_bypass_states(intel_screen_private *intel);
void gen6_upload_gs_state(intel_screen_private *intel);
void gen6_upload_vs_state(intel_screen_private *intel);
void gen6_upload_clip_state(intel_screen_private *intel);
void gen6_upload_sf_state(intel_screen_private *intel, int num_sf_outputs, int read_offset);
void gen7_upload_sf_state(intel_screen_private *intel, int num_sf_outputs, int read_offset);
void gen6_upload_binding_table(intel_screen_private *intel, uint32_t ps_binding_table_offset);
void gen7_upload_binding_table(intel_screen_private *intel, uint32_t ps_binding_table_offset);
void gen6_upload_depth_buffer_state(intel_screen_private *intel);
void gen7_upload_depth_buffer_state(intel_screen_private *intel);
Bool intel_transform_is_affine(PictTransformPtr t);
Bool
intel_get_transformed_coordinates(int x, int y, PictTransformPtr transform,
float *x_out, float *y_out);
Bool
intel_get_transformed_coordinates_3d(int x, int y, PictTransformPtr transform,
float *x_out, float *y_out, float *z_out);
static inline void
intel_debug_fallback(ScrnInfoPtr scrn, const char *format, ...) _X_ATTRIBUTE_PRINTF(2, 3);
static inline void
intel_debug_fallback(ScrnInfoPtr scrn, const char *format, ...)
{
intel_screen_private *intel = intel_get_screen_private(scrn);
va_list ap;
va_start(ap, format);
if (intel->fallback_debug) {
xf86DrvMsg(scrn->scrnIndex, X_INFO, "fallback: ");
LogVMessageVerb(X_INFO, 1, format, ap);
}
va_end(ap);
}
static inline Bool
intel_check_pitch_2d(PixmapPtr pixmap)
{
uint32_t pitch = intel_pixmap_pitch(pixmap);
if (pitch > KB(32)) {
ScrnInfoPtr scrn = xf86ScreenToScrn(pixmap->drawable.pScreen);
intel_debug_fallback(scrn, "pitch exceeds 2d limit 32K\n");
return FALSE;
}
return TRUE;
}
/* For pre-965 chip only, as they have 8KB limit for 3D */
static inline Bool
intel_check_pitch_3d(PixmapPtr pixmap)
{
uint32_t pitch = intel_pixmap_pitch(pixmap);
if (pitch > KB(8)) {
ScrnInfoPtr scrn = xf86ScreenToScrn(pixmap->drawable.pScreen);
intel_debug_fallback(scrn, "pitch exceeds 3d limit 8K\n");
return FALSE;
}
return TRUE;
}
/**
* Little wrapper around drm_intel_bo_reloc to return the initial value you
* should stuff into the relocation entry.
*
* If only we'd done this before settling on the library API.
*/
static inline uint32_t
intel_emit_reloc(drm_intel_bo * bo, uint32_t offset,
drm_intel_bo * target_bo, uint32_t target_offset,
uint32_t read_domains, uint32_t write_domain)
{
drm_intel_bo_emit_reloc(bo, offset, target_bo, target_offset,
read_domains, write_domain);
return target_bo->offset + target_offset;
}
static inline drm_intel_bo *intel_bo_alloc_for_data(intel_screen_private *intel,
const void *data,
unsigned int size,
const char *name)
{
drm_intel_bo *bo;
int ret;
bo = drm_intel_bo_alloc(intel->bufmgr, name, size, 4096);
assert(bo);
ret = drm_intel_bo_subdata(bo, 0, size, data);
assert(ret == 0);
return bo;
(void)ret;
}
void intel_debug_flush(ScrnInfoPtr scrn);
static inline PixmapPtr get_drawable_pixmap(DrawablePtr drawable)
{
ScreenPtr screen = drawable->pScreen;
@ -730,24 +497,19 @@ static inline Bool pixmap_is_scanout(PixmapPtr pixmap)
return pixmap == screen->GetScreenPixmap(screen);
}
Bool intel_uxa_init(ScreenPtr pScreen);
Bool intel_uxa_create_screen_resources(ScreenPtr pScreen);
void intel_uxa_block_handler(intel_screen_private *intel);
Bool intel_get_aperture_space(ScrnInfoPtr scrn, drm_intel_bo ** bo_table,
int num_bos);
static inline Bool intel_pixmap_is_offscreen(PixmapPtr pixmap)
static inline int
intel_pixmap_pitch(PixmapPtr pixmap)
{
struct intel_pixmap *priv = intel_get_pixmap_private(pixmap);
return priv && priv->offscreen;
return (unsigned long)pixmap->devKind;
}
/*
* intel_sync.c
*/
#if HAVE_DRI3
Bool intel_sync_init(ScreenPtr screen);
void intel_sync_close(ScreenPtr screen);
#else
static inline Bool intel_sync_init(ScreenPtr screen) { return 0; }
void intel_sync_close(ScreenPtr screen);
#endif
/*
@ -766,4 +528,12 @@ Bool intel_present_screen_init(ScreenPtr screen);
static inline Bool intel_present_screen_init(ScreenPtr screen) { return 0; }
#endif
#include "intel_uxa.h"
dri_bo *
intel_get_pixmap_bo(PixmapPtr pixmap);
void
intel_set_pixmap_bo(PixmapPtr pixmap, dri_bo *bo);
#endif /* _I830_H_ */

8
src/uxa/intel_batchbuffer.c
View File

@ -142,7 +142,7 @@ void intel_batch_teardown(ScrnInfoPtr scrn)
static void intel_batch_do_flush(ScrnInfoPtr scrn)
{
intel_screen_private *intel = intel_get_screen_private(scrn);
struct intel_pixmap *priv;
struct intel_uxa_pixmap *priv;
list_for_each_entry(priv, &intel->batch_pixmaps, batch)
priv->dirty = 0;
@ -289,10 +289,10 @@ void intel_batch_submit(ScrnInfoPtr scrn)
}
while (!list_is_empty(&intel->batch_pixmaps)) {
struct intel_pixmap *entry;
struct intel_uxa_pixmap *entry;
entry = list_first_entry(&intel->batch_pixmaps,
struct intel_pixmap,
struct intel_uxa_pixmap,
batch);
entry->busy = -1;
@ -311,7 +311,7 @@ void intel_batch_submit(ScrnInfoPtr scrn)
intel->current_batch = 0;
}
void intel_debug_flush(ScrnInfoPtr scrn)
void intel_uxa_debug_flush(ScrnInfoPtr scrn)
{
intel_screen_private *intel = intel_get_screen_private(scrn);

4
src/uxa/intel_batchbuffer.h
View File

@ -129,7 +129,7 @@ intel_batch_emit_reloc(intel_screen_private *intel,
static inline void
intel_batch_mark_pixmap_domains(intel_screen_private *intel,
struct intel_pixmap *priv,
struct intel_uxa_pixmap *priv,
uint32_t read_domains, uint32_t write_domain)
{
assert (read_domains);
@ -149,7 +149,7 @@ intel_batch_emit_reloc_pixmap(intel_screen_private *intel, PixmapPtr pixmap,
uint32_t read_domains, uint32_t write_domain,
uint32_t delta, int needs_fence)
{
struct intel_pixmap *priv = intel_get_pixmap_private(pixmap);
struct intel_uxa_pixmap *priv = intel_uxa_get_pixmap_private(pixmap);
intel_batch_mark_pixmap_domains(intel, priv, read_domains, write_domain);

78
src/uxa/intel_display.c
View File

@ -2568,3 +2568,81 @@ restart_destroy:
out:
RRGetInfo(xf86ScrnToScreen(scrn), TRUE);
}
void intel_box_intersect(BoxPtr dest, BoxPtr a, BoxPtr b)
{
dest->x1 = a->x1 > b->x1 ? a->x1 : b->x1;
dest->x2 = a->x2 < b->x2 ? a->x2 : b->x2;
if (dest->x1 >= dest->x2) {
dest->x1 = dest->x2 = dest->y1 = dest->y2 = 0;
return;
}
dest->y1 = a->y1 > b->y1 ? a->y1 : b->y1;
dest->y2 = a->y2 < b->y2 ? a->y2 : b->y2;
if (dest->y1 >= dest->y2)
dest->x1 = dest->x2 = dest->y1 = dest->y2 = 0;
}
void intel_crtc_box(xf86CrtcPtr crtc, BoxPtr crtc_box)
{
if (crtc->enabled) {
crtc_box->x1 = crtc->x;
crtc_box->x2 =
crtc->x + xf86ModeWidth(&crtc->mode, crtc->rotation);
crtc_box->y1 = crtc->y;
crtc_box->y2 =
crtc->y + xf86ModeHeight(&crtc->mode, crtc->rotation);
} else
crtc_box->x1 = crtc_box->x2 = crtc_box->y1 = crtc_box->y2 = 0;
}
static int intel_box_area(BoxPtr box)
{
return (int)(box->x2 - box->x1) * (int)(box->y2 - box->y1);
}
/*
* Return the crtc covering 'box'. If two crtcs cover a portion of
* 'box', then prefer 'desired'. If 'desired' is NULL, then prefer the crtc
* with greater coverage
*/
xf86CrtcPtr
intel_covering_crtc(ScrnInfoPtr scrn,
BoxPtr box, xf86CrtcPtr desired, BoxPtr crtc_box_ret)
{
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn);
xf86CrtcPtr crtc, best_crtc;
int coverage, best_coverage;
int c;
BoxRec crtc_box, cover_box;
best_crtc = NULL;
best_coverage = 0;
crtc_box_ret->x1 = 0;
crtc_box_ret->x2 = 0;
crtc_box_ret->y1 = 0;
crtc_box_ret->y2 = 0;
for (c = 0; c < xf86_config->num_crtc; c++) {
crtc = xf86_config->crtc[c];
/* If the CRTC is off, treat it as not covering */
if (!intel_crtc_on(crtc))
continue;
intel_crtc_box(crtc, &crtc_box);
intel_box_intersect(&cover_box, &crtc_box, box);
coverage = intel_box_area(&cover_box);
if (coverage && crtc == desired) {
*crtc_box_ret = crtc_box;
return crtc;
}
if (coverage > best_coverage) {
*crtc_box_ret = crtc_box;
best_crtc = crtc;
best_coverage = coverage;
}
}
return best_crtc;
}

26
src/uxa/intel_dri.c
View File

@ -82,7 +82,7 @@ static int i830_client_key;
static uint32_t pixmap_flink(PixmapPtr pixmap)
{
struct intel_pixmap *priv = intel_get_pixmap_private(pixmap);
struct intel_uxa_pixmap *priv = intel_uxa_get_pixmap_private(pixmap);
uint32_t name;
if (priv == NULL || priv->bo == NULL)
@ -113,7 +113,7 @@ static PixmapPtr fixup_glamor(DrawablePtr drawable, PixmapPtr pixmap)
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
intel_screen_private *intel = intel_get_screen_private(scrn);
PixmapPtr old = get_drawable_pixmap(drawable);
struct intel_pixmap *priv = intel_get_pixmap_private(pixmap);
struct intel_uxa_pixmap *priv = intel_uxa_get_pixmap_private(pixmap);
GCPtr gc;
/* With a glamor pixmap, 2D pixmaps are created in texture
@ -140,12 +140,12 @@ static PixmapPtr fixup_glamor(DrawablePtr drawable, PixmapPtr pixmap)
FreeScratchGC(gc);
}
intel_set_pixmap_private(pixmap, NULL);
intel_uxa_set_pixmap_private(pixmap, NULL);
/* Exchange the underlying texture/image. */
intel_glamor_exchange_buffers(intel, old, pixmap);
/* And redirect the pixmap to the new bo (for 3D). */
intel_set_pixmap_private(old, priv);
intel_uxa_set_pixmap_private(old, priv);
old->refcnt++;
screen->ModifyPixmapHeader(old,
@ -739,10 +739,10 @@ i830_dri2_del_frame_event(DRI2FrameEventPtr info)
free(info);
}
static struct intel_pixmap *
static struct intel_uxa_pixmap *
intel_exchange_pixmap_buffers(struct intel_screen_private *intel, PixmapPtr front, PixmapPtr back)
{
struct intel_pixmap *new_front, *new_back;
struct intel_uxa_pixmap *new_front = NULL, *new_back;
RegionRec region;
/* Post damage on the front buffer so that listeners, such
@ -755,10 +755,10 @@ intel_exchange_pixmap_buffers(struct intel_screen_private *intel, PixmapPtr fron
region.data = NULL;
DamageRegionAppend(&front->drawable, &region);
new_front = intel_get_pixmap_private(back);
new_back = intel_get_pixmap_private(front);
intel_set_pixmap_private(front, new_front);
intel_set_pixmap_private(back, new_back);
new_front = intel_uxa_get_pixmap_private(back);
new_back = intel_uxa_get_pixmap_private(front);
intel_uxa_set_pixmap_private(front, new_front);
intel_uxa_set_pixmap_private(back, new_back);
new_front->busy = 1;
new_back->busy = -1;
@ -774,7 +774,7 @@ I830DRI2ExchangeBuffers(struct intel_screen_private *intel, DRI2BufferPtr front,
{
I830DRI2BufferPrivatePtr front_priv, back_priv;
int tmp;
struct intel_pixmap *new_front;
struct intel_uxa_pixmap *new_front;
front_priv = front->driverPrivate;
back_priv = back->driverPrivate;
@ -967,8 +967,8 @@ can_exchange(DrawablePtr drawable, DRI2BufferPtr front, DRI2BufferPtr back)
I830DRI2BufferPrivatePtr back_priv = back->driverPrivate;
PixmapPtr front_pixmap = front_priv->pixmap;
PixmapPtr back_pixmap = back_priv->pixmap;
struct intel_pixmap *front_intel = intel_get_pixmap_private(front_pixmap);
struct intel_pixmap *back_intel = intel_get_pixmap_private(back_pixmap);
struct intel_uxa_pixmap *front_intel = intel_uxa_get_pixmap_private(front_pixmap);
struct intel_uxa_pixmap *back_intel = intel_uxa_get_pixmap_private(back_pixmap);
if (!pScrn->vtSema)
return FALSE;

10
src/uxa/intel_dri3.c
View File

@ -57,7 +57,7 @@ static PixmapPtr intel_dri3_pixmap_from_fd(ScreenPtr screen,
{
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
intel_screen_private *intel = intel_get_screen_private(scrn);
struct intel_pixmap *priv;
struct intel_uxa_pixmap *priv;
PixmapPtr pixmap;
dri_bo *bo;
@ -89,10 +89,10 @@ static PixmapPtr intel_dri3_pixmap_from_fd(ScreenPtr screen,
if (bo == NULL)
goto free_pixmap;
intel_set_pixmap_bo(pixmap, bo);
intel_uxa_set_pixmap_bo(pixmap, bo);
dri_bo_unreference(bo);
priv = intel_get_pixmap_private(pixmap);
priv = intel_uxa_get_pixmap_private(pixmap);
if (priv == NULL)
goto free_pixmap;
@ -110,14 +110,14 @@ static int intel_dri3_fd_from_pixmap(ScreenPtr screen,
CARD16 *stride,
CARD32 *size)
{
struct intel_pixmap *priv;
struct intel_uxa_pixmap *priv;
int fd;
fd = intel_glamor_fd_from_pixmap(screen, pixmap, stride, size);
if (fd >= 0)
return fd;
priv = intel_get_pixmap_private(pixmap);
priv = intel_uxa_get_pixmap_private(pixmap);
if (!priv)
return -1;

39
src/uxa/intel_driver.c
View File

@ -169,6 +169,18 @@ static Bool i830CreateScreenResources(ScreenPtr screen)
return TRUE;
}
void
intel_set_pixmap_bo(PixmapPtr pixmap, dri_bo *bo)
{
intel_uxa_set_pixmap_bo(pixmap, bo);
}
dri_bo *
intel_get_pixmap_bo(PixmapPtr pixmap)
{
return intel_uxa_get_pixmap_bo(pixmap);
}
static void PreInitCleanup(ScrnInfoPtr scrn)
{
if (!scrn || !scrn->driverPrivate)
@ -612,29 +624,6 @@ static Bool I830PreInit(ScrnInfoPtr scrn, int flags)
return TRUE;
}
/**
* Intialiazes the hardware for the 3D pipeline use in the 2D driver.
*
* Some state caching is performed to avoid redundant state emits. This
* function is also responsible for marking the state as clobbered for DRI
* clients.
*/
void IntelEmitInvarientState(ScrnInfoPtr scrn)
{
intel_screen_private *intel = intel_get_screen_private(scrn);
/* If we've emitted our state since the last clobber by another client,
* skip it.
*/
if (intel->last_3d != LAST_3D_OTHER)
return;
if (IS_GEN2(intel))
I830EmitInvarientState(scrn);
else if IS_GEN3(intel)
I915EmitInvarientState(scrn);
}
#ifdef INTEL_PIXMAP_SHARING
static void
redisplay_dirty(ScreenPtr screen, PixmapDirtyUpdatePtr dirty)
@ -660,7 +649,7 @@ redisplay_dirty(ScreenPtr screen, PixmapDirtyUpdatePtr dirty)
intel_batch_submit(scrn);
if (!intel->has_prime_vmap_flush) {
drm_intel_bo *bo = intel_get_pixmap_bo(dirty->slave_dst->master_pixmap);
drm_intel_bo *bo = intel_uxa_get_pixmap_bo(dirty->slave_dst->master_pixmap);
was_blocked = xf86BlockSIGIO();
drm_intel_bo_map(bo, FALSE);
drm_intel_bo_unmap(bo);
@ -1002,7 +991,7 @@ I830ScreenInit(SCREEN_INIT_ARGS_DECL)
#endif
/* Init video */
if (intel->XvEnabled)
I830InitVideo(screen);
intel_video_init(screen);
#if HAVE_DRI2
switch (intel->dri2) {

4
src/uxa/intel_glamor.c
View File

@ -186,12 +186,12 @@ intel_glamor_create_textured_pixmap(PixmapPtr pixmap)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(pixmap->drawable.pScreen);
intel_screen_private *intel = intel_get_screen_private(scrn);
struct intel_pixmap *priv;
struct intel_uxa_pixmap *priv;
if ((intel->uxa_flags & UXA_USE_GLAMOR) == 0)
return TRUE;
priv = intel_get_pixmap_private(pixmap);
priv = intel_uxa_get_pixmap_private(pixmap);
if (glamor_egl_create_textured_pixmap(pixmap, priv->bo->handle,
intel_pixmap_pitch(pixmap))) {
drm_intel_bo_disable_reuse(priv->bo);

134
src/uxa/intel_uxa.c
View File

@ -131,13 +131,13 @@ gen4_context_switch(intel_screen_private *intel,
}
Bool
intel_get_aperture_space(ScrnInfoPtr scrn, drm_intel_bo ** bo_table,
intel_uxa_get_aperture_space(ScrnInfoPtr scrn, drm_intel_bo ** bo_table,
int num_bos)
{
intel_screen_private *intel = intel_get_screen_private(scrn);
if (intel->batch_bo == NULL) {
intel_debug_fallback(scrn, "VT inactive\n");
intel_uxa_debug_fallback(scrn, "VT inactive\n");
return FALSE;
}
@ -147,7 +147,7 @@ intel_get_aperture_space(ScrnInfoPtr scrn, drm_intel_bo ** bo_table,
bo_table[0] = intel->batch_bo;
if (drm_intel_bufmgr_check_aperture_space(bo_table, num_bos) !=
0) {
intel_debug_fallback(scrn, "Couldn't get aperture "
intel_uxa_debug_fallback(scrn, "Couldn't get aperture "
"space for BOs\n");
return FALSE;
}
@ -161,7 +161,7 @@ intel_uxa_check_solid(DrawablePtr drawable, int alu, Pixel planemask)
ScrnInfoPtr scrn = xf86ScreenToScrn(drawable->pScreen);
if (!UXA_PM_IS_SOLID(drawable, planemask)) {
intel_debug_fallback(scrn, "planemask is not solid\n");
intel_uxa_debug_fallback(scrn, "planemask is not solid\n");
return FALSE;
}
@ -187,13 +187,13 @@ intel_uxa_prepare_solid(PixmapPtr pixmap, int alu, Pixel planemask, Pixel fg)
intel_screen_private *intel = intel_get_screen_private(scrn);
drm_intel_bo *bo_table[] = {
NULL, /* batch_bo */
intel_get_pixmap_bo(pixmap),
intel_uxa_get_pixmap_bo(pixmap),
};
if (!intel_check_pitch_2d(pixmap))
if (!intel_uxa_check_pitch_2d(pixmap))
return FALSE;
if (!intel_get_aperture_space(scrn, bo_table, ARRAY_SIZE(bo_table)))
if (!intel_uxa_get_aperture_space(scrn, bo_table, ARRAY_SIZE(bo_table)))
return FALSE;
intel->BR[13] = (I830PatternROP[alu] & 0xff) << 16;
@ -245,7 +245,7 @@ static void intel_uxa_solid(PixmapPtr pixmap, int x1, int y1, int x2, int y2)
cmd |=
XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB;
if (INTEL_INFO(intel)->gen >= 040 && intel_pixmap_tiled(pixmap)) {
if (INTEL_INFO(intel)->gen >= 040 && intel_uxa_pixmap_tiled(pixmap)) {
assert((pitch % 512) == 0);
pitch >>= 2;
cmd |= XY_COLOR_BLT_TILED;
@ -274,12 +274,12 @@ intel_uxa_check_copy(PixmapPtr source, PixmapPtr dest,
ScrnInfoPtr scrn = xf86ScreenToScrn(dest->drawable.pScreen);
if (!UXA_PM_IS_SOLID(&source->drawable, planemask)) {
intel_debug_fallback(scrn, "planemask is not solid");
intel_uxa_debug_fallback(scrn, "planemask is not solid");
return FALSE;
}
if (source->drawable.bitsPerPixel != dest->drawable.bitsPerPixel) {
intel_debug_fallback(scrn, "mixed bpp copies unsupported\n");
intel_uxa_debug_fallback(scrn, "mixed bpp copies unsupported\n");
return FALSE;
}
switch (source->drawable.bitsPerPixel) {
@ -291,9 +291,9 @@ intel_uxa_check_copy(PixmapPtr source, PixmapPtr dest,
return FALSE;
}
if (!intel_check_pitch_2d(source))
if (!intel_uxa_check_pitch_2d(source))
return FALSE;
if (!intel_check_pitch_2d(dest))
if (!intel_uxa_check_pitch_2d(dest))
return FALSE;
return TRUE;
@ -307,11 +307,11 @@ intel_uxa_prepare_copy(PixmapPtr source, PixmapPtr dest, int xdir,
intel_screen_private *intel = intel_get_screen_private(scrn);
drm_intel_bo *bo_table[] = {
NULL, /* batch_bo */
intel_get_pixmap_bo(source),
intel_get_pixmap_bo(dest),
intel_uxa_get_pixmap_bo(source),
intel_uxa_get_pixmap_bo(dest),
};
if (!intel_get_aperture_space(scrn, bo_table, ARRAY_SIZE(bo_table)))
if (!intel_uxa_get_aperture_space(scrn, bo_table, ARRAY_SIZE(bo_table)))
return FALSE;
intel->render_source = source;
@ -386,13 +386,13 @@ intel_uxa_copy(PixmapPtr dest, int src_x1, int src_y1, int dst_x1,
XY_SRC_COPY_BLT_WRITE_RGB;
if (INTEL_INFO(intel)->gen >= 040) {
if (intel_pixmap_tiled(dest)) {
if (intel_uxa_pixmap_tiled(dest)) {
assert((dst_pitch % 512) == 0);
dst_pitch >>= 2;
cmd |= XY_SRC_COPY_BLT_DST_TILED;
}
if (intel_pixmap_tiled(intel->render_source)) {
if (intel_uxa_pixmap_tiled(intel->render_source)) {
assert((src_pitch % 512) == 0);
src_pitch >>= 2;
cmd |= XY_SRC_COPY_BLT_SRC_TILED;
@ -432,7 +432,7 @@ static void intel_uxa_done(PixmapPtr pixmap)
ADVANCE_BATCH();
}
intel_debug_flush(scrn);
intel_uxa_debug_flush(scrn);
}
/**
@ -448,7 +448,7 @@ static void i830_done_composite(PixmapPtr dest)
if (intel->vertex_flush)
intel->vertex_flush(intel);
intel_debug_flush(scrn);
intel_uxa_debug_flush(scrn);
}
#define xFixedToFloat(val) \
@ -476,7 +476,7 @@ _intel_transform_point(PictTransformPtr transform,
* transform may be null.
*/
Bool
intel_get_transformed_coordinates(int x, int y, PictTransformPtr transform,
intel_uxa_get_transformed_coordinates(int x, int y, PictTransformPtr transform,
float *x_out, float *y_out)
{
if (transform == NULL) {
@ -501,7 +501,7 @@ intel_get_transformed_coordinates(int x, int y, PictTransformPtr transform,
* transform may be null.
*/
Bool
intel_get_transformed_coordinates_3d(int x, int y, PictTransformPtr transform,
intel_uxa_get_transformed_coordinates_3d(int x, int y, PictTransformPtr transform,
float *x_out, float *y_out, float *w_out)
{
if (transform == NULL) {
@ -527,18 +527,18 @@ intel_get_transformed_coordinates_3d(int x, int y, PictTransformPtr transform,
*
* transform may be null.
*/
Bool intel_transform_is_affine(PictTransformPtr t)
Bool intel_uxa_transform_is_affine(PictTransformPtr t)
{
if (t == NULL)
return TRUE;
return t->matrix[2][0] == 0 && t->matrix[2][1] == 0;
}
dri_bo *intel_get_pixmap_bo(PixmapPtr pixmap)
dri_bo *intel_uxa_get_pixmap_bo(PixmapPtr pixmap)
{
struct intel_pixmap *intel;
struct intel_uxa_pixmap *intel;
intel = intel_get_pixmap_private(pixmap);
intel = intel_uxa_get_pixmap_private(pixmap);
if (intel == NULL)
return NULL;
@ -562,13 +562,13 @@ static unsigned intel_get_tile_width(intel_screen_private *intel, int tiling, in
return tile_width;
}
void intel_set_pixmap_bo(PixmapPtr pixmap, dri_bo * bo)
void intel_uxa_set_pixmap_bo(PixmapPtr pixmap, dri_bo * bo)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(pixmap->drawable.pScreen);
intel_screen_private *intel = intel_get_screen_private(scrn);
struct intel_pixmap *priv;
struct intel_uxa_pixmap *priv;
priv = intel_get_pixmap_private(pixmap);
priv = intel_uxa_get_pixmap_private(pixmap);
if (priv == NULL && bo == NULL)
return;
@ -589,7 +589,7 @@ free_priv:
unsigned tile_width;
int size, stride;
priv = calloc(1, sizeof (struct intel_pixmap));
priv = calloc(1, sizeof (struct intel_uxa_pixmap));
if (priv == NULL)
goto BAIL;
@ -646,19 +646,14 @@ free_priv:
}
BAIL:
intel_set_pixmap_private(pixmap, priv);
}
static Bool intel_uxa_pixmap_is_offscreen(PixmapPtr pixmap)
{
return intel_pixmap_is_offscreen(pixmap);
intel_uxa_set_pixmap_private(pixmap, priv);
}
static Bool intel_uxa_prepare_access(PixmapPtr pixmap, uxa_access_t access)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(pixmap->drawable.pScreen);
intel_screen_private *intel = intel_get_screen_private(scrn);
struct intel_pixmap *priv = intel_get_pixmap_private(pixmap);
struct intel_uxa_pixmap *priv = intel_uxa_get_pixmap_private(pixmap);
dri_bo *bo = priv->bo;
int ret;
@ -695,12 +690,12 @@ static Bool intel_uxa_prepare_access(PixmapPtr pixmap, uxa_access_t access)
static void intel_uxa_finish_access(PixmapPtr pixmap, uxa_access_t access)
{
struct intel_pixmap *priv;
struct intel_uxa_pixmap *priv;
if (access == UXA_GLAMOR_ACCESS_RW || access == UXA_GLAMOR_ACCESS_RO)
return;
priv = intel_get_pixmap_private(pixmap);
priv = intel_uxa_get_pixmap_private(pixmap);
if (priv == NULL)
return;
@ -712,7 +707,7 @@ static Bool intel_uxa_pixmap_put_image(PixmapPtr pixmap,
char *src, int src_pitch,
int x, int y, int w, int h)
{
struct intel_pixmap *priv = intel_get_pixmap_private(pixmap);
struct intel_uxa_pixmap *priv = intel_uxa_get_pixmap_private(pixmap);
int stride = intel_pixmap_pitch(pixmap);
int cpp = pixmap->drawable.bitsPerPixel/8;
int ret = FALSE;
@ -747,10 +742,10 @@ static Bool intel_uxa_put_image(PixmapPtr pixmap,
int w, int h,
char *src, int src_pitch)
{
struct intel_pixmap *priv;
struct intel_uxa_pixmap *priv;
priv = intel_get_pixmap_private(pixmap);
if (!intel_pixmap_is_busy(priv)) {
priv = intel_uxa_get_pixmap_private(pixmap);
if (!intel_uxa_pixmap_is_busy(priv)) {
/* bo is not busy so can be replaced without a stall, upload in-place. */
return intel_uxa_pixmap_put_image(pixmap, src, src_pitch, x, y, w, h);
} else {
@ -786,7 +781,7 @@ static Bool intel_uxa_put_image(PixmapPtr pixmap,
w, h,
0, 0,
stride, NULL);
intel_set_pixmap_bo(pixmap, bo);
intel_uxa_set_pixmap_bo(pixmap, bo);
dri_bo_unreference(bo);
return intel_uxa_pixmap_put_image(pixmap, src, src_pitch, 0, 0, w, h);
@ -833,7 +828,7 @@ static Bool intel_uxa_pixmap_get_image(PixmapPtr pixmap,
int x, int y, int w, int h,
char *dst, int dst_pitch)
{
struct intel_pixmap *priv = intel_get_pixmap_private(pixmap);
struct intel_uxa_pixmap *priv = intel_uxa_get_pixmap_private(pixmap);
int stride = intel_pixmap_pitch(pixmap);
int cpp = pixmap->drawable.bitsPerPixel/8;
@ -865,7 +860,7 @@ static Bool intel_uxa_get_image(PixmapPtr pixmap,
int w, int h,
char *dst, int dst_pitch)
{
struct intel_pixmap *priv;
struct intel_uxa_pixmap *priv;
PixmapPtr scratch = NULL;
Bool ret;
@ -876,8 +871,8 @@ static Bool intel_uxa_get_image(PixmapPtr pixmap,
* Also the gpu is much faster at detiling.
*/
priv = intel_get_pixmap_private(pixmap);
if (intel_pixmap_is_busy(priv) || priv->tiling != I915_TILING_NONE) {
priv = intel_uxa_get_pixmap_private(pixmap);
if (intel_uxa_pixmap_is_busy(priv) || priv->tiling != I915_TILING_NONE) {
ScreenPtr screen = pixmap->drawable.pScreen;
GCPtr gc;
@ -979,7 +974,7 @@ intel_uxa_create_pixmap(ScreenPtr screen, int w, int h, int depth,
{
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
intel_screen_private *intel = intel_get_screen_private(scrn);
struct intel_pixmap *priv;
struct intel_uxa_pixmap *priv;
PixmapPtr pixmap, new_pixmap = NULL;
if (!(usage & INTEL_CREATE_PIXMAP_DRI2)) {
@ -1040,7 +1035,7 @@ intel_uxa_create_pixmap(ScreenPtr screen, int w, int h, int depth,
if (size > intel->max_bo_size || stride >= KB(32))
goto fallback_pixmap;
priv = calloc(1, sizeof (struct intel_pixmap));
priv = calloc(1, sizeof (struct intel_uxa_pixmap));
if (priv == NULL)
goto fallback_pixmap;
@ -1063,7 +1058,7 @@ intel_uxa_create_pixmap(ScreenPtr screen, int w, int h, int depth,
priv->offscreen = 1;
list_init(&priv->batch);
intel_set_pixmap_private(pixmap, priv);
intel_uxa_set_pixmap_private(pixmap, priv);
screen->ModifyPixmapHeader(pixmap, w, h, 0, 0, stride, NULL);
@ -1109,7 +1104,7 @@ static Bool intel_uxa_destroy_pixmap(PixmapPtr pixmap)
{
if (pixmap->refcnt == 1) {
intel_glamor_destroy_pixmap(pixmap);
intel_set_pixmap_bo(pixmap, NULL);
intel_uxa_set_pixmap_bo(pixmap, NULL);
}
fbDestroyPixmap(pixmap);
return TRUE;
@ -1142,14 +1137,14 @@ Bool intel_uxa_create_screen_resources(ScreenPtr screen)
NULL))
return FALSE;
intel_set_pixmap_bo(pixmap, bo);
if (intel_get_pixmap_private(pixmap) == NULL)
intel_uxa_set_pixmap_bo(pixmap, bo);
if (intel_uxa_get_pixmap_private(pixmap) == NULL)
goto err;
if (!intel_glamor_create_screen_resources(screen))
goto err;
intel_get_pixmap_private(pixmap)->pinned |= PIN_SCANOUT;
intel_uxa_get_pixmap_private(pixmap)->pinned |= PIN_SCANOUT;
scrn->displayWidth = intel->front_pitch / intel->cpp;
return TRUE;
@ -1166,9 +1161,9 @@ intel_uxa_share_pixmap_backing(PixmapPtr ppix, ScreenPtr slave, void **fd_handle
{
ScrnInfoPtr scrn = xf86ScreenToScrn(ppix->drawable.pScreen);
intel_screen_private *intel = intel_get_screen_private(scrn);
struct intel_pixmap *priv = intel_get_pixmap_private(ppix);
struct intel_uxa_pixmap *priv = intel_uxa_get_pixmap_private(ppix);
unsigned int size, tiling, swizzle;
dri_bo *bo = intel_get_pixmap_bo(ppix), *newbo;
dri_bo *bo = intel_uxa_get_pixmap_bo(ppix), *newbo;
int stride;
int handle;
@ -1195,7 +1190,7 @@ intel_uxa_share_pixmap_backing(PixmapPtr ppix, ScreenPtr slave, void **fd_handle
if (tiling != I915_TILING_NONE)
drm_intel_bo_set_tiling(newbo, &tiling, stride);
priv->tiling = tiling;
intel_set_pixmap_bo(ppix, newbo);
intel_uxa_set_pixmap_bo(ppix, newbo);
ppix->drawable.pScreen->ModifyPixmapHeader(ppix, ppix->drawable.width,
ppix->drawable.height, 0, 0,
@ -1223,7 +1218,7 @@ intel_uxa_set_shared_pixmap_backing(PixmapPtr ppix, void *fd_handle)
if (!bo)
return FALSE;
intel_set_pixmap_bo(ppix, bo);
intel_uxa_set_pixmap_bo(ppix, bo);
close(ihandle);
return TRUE;
}
@ -1303,6 +1298,29 @@ static Bool intel_option_accel_blt(intel_screen_private *intel)
return strcasecmp(s, "blt") == 0;
}
/**
* Intialiazes the hardware for the 3D pipeline use in the 2D driver.
*
* Some state caching is performed to avoid redundant state emits. This
* function is also responsible for marking the state as clobbered for DRI
* clients.
*/
void IntelEmitInvarientState(ScrnInfoPtr scrn)
{
intel_screen_private *intel = intel_get_screen_private(scrn);
/* If we've emitted our state since the last clobber by another client,
* skip it.
*/
if (intel->last_3d != LAST_3D_OTHER)
return;
if (IS_GEN2(intel))
I830EmitInvarientState(scrn);
else if IS_GEN3(intel)
I915EmitInvarientState(scrn);
}
Bool intel_uxa_init(ScreenPtr screen)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);

299
src/uxa/intel_uxa.h Normal file
View File

@ -0,0 +1,299 @@
/*
* Copyright © 2014 Keith Packard
*
* Permission to use, copy, modify, distribute, and sell this software and its
* documentation for any purpose is hereby granted without fee, provided that
* the above copyright notice appear in all copies and that both that copyright
* notice and this permission notice appear in supporting documentation, and
* that the name of the copyright holders not be used in advertising or
* publicity pertaining to distribution of the software without specific,
* written prior permission. The copyright holders make no representations
* about the suitability of this software for any purpose. It is provided "as
* is" without express or implied warranty.
*
* THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
* EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
* OF THIS SOFTWARE.
*/
#ifndef _INTEL_UXA_H_
#define _INTEL_UXA_H_
#include "intel_video.h"
struct intel_uxa_pixmap {
dri_bo *bo;
struct list batch;
uint8_t tiling;
int8_t busy :2;
uint8_t dirty :1;
uint8_t offscreen :1;
uint8_t pinned :5;
#define PIN_SCANOUT 0x1
#define PIN_DRI2 0x2
#define PIN_DRI3 0x4
#define PIN_PRIME 0x8
#define PIN_GLAMOR 0x10
};
#if HAS_DEVPRIVATEKEYREC
extern DevPrivateKeyRec uxa_pixmap_index;
#else
extern int uxa_pixmap_index;
#endif
static inline struct intel_uxa_pixmap *intel_uxa_get_pixmap_private(PixmapPtr pixmap)
{
#if HAS_DEVPRIVATEKEYREC
return dixGetPrivate(&pixmap->devPrivates, &uxa_pixmap_index);
#else
return dixLookupPrivate(&pixmap->devPrivates, &uxa_pixmap_index);
#endif
}
static inline Bool intel_uxa_pixmap_is_busy(struct intel_uxa_pixmap *priv)
{
if (priv->busy == -1)
priv->busy = drm_intel_bo_busy(priv->bo);
return priv->busy;
}
static inline void intel_uxa_set_pixmap_private(PixmapPtr pixmap, struct intel_uxa_pixmap *intel)
{
dixSetPrivate(&pixmap->devPrivates, &uxa_pixmap_index, intel);
}
static inline Bool intel_uxa_pixmap_is_dirty(PixmapPtr pixmap)
{
return pixmap && intel_uxa_get_pixmap_private(pixmap)->dirty;
}
static inline Bool intel_uxa_pixmap_tiled(PixmapPtr pixmap)
{
return intel_uxa_get_pixmap_private(pixmap)->tiling != I915_TILING_NONE;
}
dri_bo *intel_uxa_get_pixmap_bo(PixmapPtr pixmap);
void intel_uxa_set_pixmap_bo(PixmapPtr pixmap, dri_bo * bo);
Bool intel_uxa_init(ScreenPtr pScreen);
Bool intel_uxa_create_screen_resources(ScreenPtr pScreen);
void intel_uxa_block_handler(intel_screen_private *intel);
static inline Bool intel_uxa_pixmap_is_offscreen(PixmapPtr pixmap)
{
struct intel_uxa_pixmap *priv = intel_uxa_get_pixmap_private(pixmap);
return priv && priv->offscreen;
}
/* Batchbuffer support macros and functions */
#include "intel_batchbuffer.h"
/* I830 specific functions */
extern void IntelEmitInvarientState(ScrnInfoPtr scrn);
extern void I830EmitInvarientState(ScrnInfoPtr scrn);
extern void I915EmitInvarientState(ScrnInfoPtr scrn);
extern void I830EmitFlush(ScrnInfoPtr scrn);
/* i830_render.c */
Bool i830_check_composite(int op,
PicturePtr sourcec, PicturePtr mask, PicturePtr dest,
int width, int height);
Bool i830_check_composite_target(PixmapPtr pixmap);
Bool i830_check_composite_texture(ScreenPtr screen, PicturePtr picture);
Bool i830_prepare_composite(int op, PicturePtr sourcec, PicturePtr mask,
PicturePtr dest, PixmapPtr sourcecPixmap,
PixmapPtr maskPixmap, PixmapPtr destPixmap);
void i830_composite(PixmapPtr dest, int srcX, int srcY,
int maskX, int maskY, int dstX, int dstY, int w, int h);
void i830_vertex_flush(intel_screen_private *intel);
/* i915_render.c */
Bool i915_check_composite(int op,
PicturePtr sourcec, PicturePtr mask, PicturePtr dest,
int width, int height);
Bool i915_check_composite_target(PixmapPtr pixmap);
Bool i915_check_composite_texture(ScreenPtr screen, PicturePtr picture);
Bool i915_prepare_composite(int op, PicturePtr sourcec, PicturePtr mask,
PicturePtr dest, PixmapPtr sourcecPixmap,
PixmapPtr maskPixmap, PixmapPtr destPixmap);
void i915_composite(PixmapPtr dest, int srcX, int srcY,
int maskX, int maskY, int dstX, int dstY, int w, int h);
void i915_vertex_flush(intel_screen_private *intel);
void i915_batch_commit_notify(intel_screen_private *intel);
void i830_batch_commit_notify(intel_screen_private *intel);
/* i965_render.c */
unsigned int gen4_render_state_size(ScrnInfoPtr scrn);
void gen4_render_state_init(ScrnInfoPtr scrn);
void gen4_render_state_cleanup(ScrnInfoPtr scrn);
Bool i965_check_composite(int op,
PicturePtr sourcec, PicturePtr mask, PicturePtr dest,
int width, int height);
Bool i965_check_composite_texture(ScreenPtr screen, PicturePtr picture);
Bool i965_prepare_composite(int op, PicturePtr sourcec, PicturePtr mask,
PicturePtr dest, PixmapPtr sourcecPixmap,
PixmapPtr maskPixmap, PixmapPtr destPixmap);
void i965_composite(PixmapPtr dest, int srcX, int srcY,
int maskX, int maskY, int dstX, int dstY, int w, int h);
void i965_vertex_flush(intel_screen_private *intel);
void i965_batch_flush(intel_screen_private *intel);
void i965_batch_commit_notify(intel_screen_private *intel);
/* i965_3d.c */
void gen6_upload_invariant_states(intel_screen_private *intel);
void gen6_upload_viewport_state_pointers(intel_screen_private *intel,
drm_intel_bo *cc_vp_bo);
void gen7_upload_viewport_state_pointers(intel_screen_private *intel,
drm_intel_bo *cc_vp_bo);
void gen6_upload_urb(intel_screen_private *intel);
void gen7_upload_urb(intel_screen_private *intel);
void gen6_upload_cc_state_pointers(intel_screen_private *intel,
drm_intel_bo *blend_bo, drm_intel_bo *cc_bo,
drm_intel_bo *depth_stencil_bo,
uint32_t blend_offset);
void gen7_upload_cc_state_pointers(intel_screen_private *intel,
drm_intel_bo *blend_bo, drm_intel_bo *cc_bo,
drm_intel_bo *depth_stencil_bo,
uint32_t blend_offset);
void gen6_upload_sampler_state_pointers(intel_screen_private *intel,
drm_intel_bo *sampler_bo);
void gen7_upload_sampler_state_pointers(intel_screen_private *intel,
drm_intel_bo *sampler_bo);
void gen7_upload_bypass_states(intel_screen_private *intel);
void gen6_upload_gs_state(intel_screen_private *intel);
void gen6_upload_vs_state(intel_screen_private *intel);
void gen6_upload_clip_state(intel_screen_private *intel);
void gen6_upload_sf_state(intel_screen_private *intel, int num_sf_outputs, int read_offset);
void gen7_upload_sf_state(intel_screen_private *intel, int num_sf_outputs, int read_offset);
void gen6_upload_binding_table(intel_screen_private *intel, uint32_t ps_binding_table_offset);
void gen7_upload_binding_table(intel_screen_private *intel, uint32_t ps_binding_table_offset);
void gen6_upload_depth_buffer_state(intel_screen_private *intel);
void gen7_upload_depth_buffer_state(intel_screen_private *intel);
Bool intel_uxa_transform_is_affine(PictTransformPtr t);
Bool
intel_uxa_get_transformed_coordinates(int x, int y, PictTransformPtr transform,
float *x_out, float *y_out);
Bool
intel_uxa_get_transformed_coordinates_3d(int x, int y, PictTransformPtr transform,
float *x_out, float *y_out, float *z_out);
static inline void
intel_uxa_debug_fallback(ScrnInfoPtr scrn, const char *format, ...) _X_ATTRIBUTE_PRINTF(2, 3);
static inline void
intel_uxa_debug_fallback(ScrnInfoPtr scrn, const char *format, ...)
{
intel_screen_private *intel = intel_get_screen_private(scrn);
va_list ap;
va_start(ap, format);
if (intel->fallback_debug) {
xf86DrvMsg(scrn->scrnIndex, X_INFO, "fallback: ");
LogVMessageVerb(X_INFO, 1, format, ap);
}
va_end(ap);
}
static inline Bool
intel_uxa_check_pitch_2d(PixmapPtr pixmap)
{
uint32_t pitch = intel_pixmap_pitch(pixmap);
if (pitch > KB(32)) {
ScrnInfoPtr scrn = xf86ScreenToScrn(pixmap->drawable.pScreen);
intel_uxa_debug_fallback(scrn, "pitch exceeds 2d limit 32K\n");
return FALSE;
}
return TRUE;
}
/* For pre-965 chip only, as they have 8KB limit for 3D */
static inline Bool
intel_uxa_check_pitch_3d(PixmapPtr pixmap)
{
uint32_t pitch = intel_pixmap_pitch(pixmap);
if (pitch > KB(8)) {
ScrnInfoPtr scrn = xf86ScreenToScrn(pixmap->drawable.pScreen);
intel_uxa_debug_fallback(scrn, "pitch exceeds 3d limit 8K\n");
return FALSE;
}
return TRUE;
}
/**
* Little wrapper around drm_intel_bo_reloc to return the initial value you
* should stuff into the relocation entry.
*
* If only we'd done this before settling on the library API.
*/
static inline uint32_t
intel_uxa_emit_reloc(drm_intel_bo * bo, uint32_t offset,
drm_intel_bo * target_bo, uint32_t target_offset,
uint32_t read_domains, uint32_t write_domain)
{
drm_intel_bo_emit_reloc(bo, offset, target_bo, target_offset,
read_domains, write_domain);
return target_bo->offset + target_offset;
}
static inline drm_intel_bo *intel_uxa_bo_alloc_for_data(intel_screen_private *intel,
const void *data,
unsigned int size,
const char *name)
{
drm_intel_bo *bo;
int ret;
bo = drm_intel_bo_alloc(intel->bufmgr, name, size, 4096);
assert(bo);
ret = drm_intel_bo_subdata(bo, 0, size, data);
assert(ret == 0);
return bo;
(void)ret;
}
void intel_uxa_debug_flush(ScrnInfoPtr scrn);
Bool intel_uxa_get_aperture_space(ScrnInfoPtr scrn, drm_intel_bo ** bo_table,
int num_bos);
XF86VideoAdaptorPtr intel_uxa_video_setup_image_textured(ScreenPtr screen);
void I915DisplayVideoTextured(ScrnInfoPtr scrn,
intel_adaptor_private *adaptor_priv,
int id, RegionPtr dstRegion, short width,
short height, int video_pitch, int video_pitch2,
short src_w, short src_h,
short drw_w, short drw_h, PixmapPtr pixmap);
void I965DisplayVideoTextured(ScrnInfoPtr scrn,
intel_adaptor_private *adaptor_priv,
int id, RegionPtr dstRegion, short width,
short height, int video_pitch, int video_pitch2,
short src_w, short src_h,
short drw_w, short drw_h, PixmapPtr pixmap);
void Gen6DisplayVideoTextured(ScrnInfoPtr scrn,
intel_adaptor_private *adaptor_priv,
int id, RegionPtr dstRegion, short width,
short height, int video_pitch, int video_pitch2,
short src_w, short src_h,
short drw_w, short drw_h, PixmapPtr pixmap);
void i965_free_video(ScrnInfoPtr scrn);
#endif /* _INTEL_UXA_H_ */

389
src/uxa/intel_uxa_video.c Normal file
View File

@ -0,0 +1,389 @@
/***************************************************************************
Copyright 2000 Intel Corporation. All Rights Reserved.
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sub license, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice (including the
next paragraph) shall be included in all copies or substantial portions
of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR
THE USE OR OTHER DEALINGS IN THE SOFTWARE.
**************************************************************************/
/*
* i830_video.c: i830/i845 Xv driver.
*
* Copyright © 2002 by Alan Hourihane and David Dawes
*
* Authors:
* Alan Hourihane <alanh@tungstengraphics.com>
* David Dawes <dawes@xfree86.org>
*
* Derived from i810 Xv driver:
*
* Authors of i810 code:
* Jonathan Bian <jonathan.bian@intel.com>
* Offscreen Images:
* Matt Sottek <matthew.j.sottek@intel.com>
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include <inttypes.h>
#include <math.h>
#include <string.h>
#include <assert.h>
#include <errno.h>
#include "xorg-server.h"
#include "xf86.h"
#include "xf86_OSproc.h"
#include "compiler.h"
#include "xf86Pci.h"
#include "xf86fbman.h"
#include "xf86drm.h"
#include "regionstr.h"
#include "randrstr.h"
#include "windowstr.h"
#include "damage.h"
#include "intel.h"
#include "intel_video.h"
#include "i830_reg.h"
#include "xf86xv.h"
#include <X11/extensions/Xv.h>
#include "dixstruct.h"
#include "fourcc.h"
#ifdef INTEL_XVMC
#define _INTEL_XVMC_SERVER_
#include "intel_xvmc.h"
#endif
#include "intel_glamor.h"
/* overlay debugging printf function */
#if 0
#define UXA_VIDEO_DEBUG ErrorF
#else
#define UXA_VIDEO_DEBUG if (0) ErrorF
#endif
static int intel_uxa_video_put_image_textured(ScrnInfoPtr, short, short, short, short, short, short,
short, short, int, unsigned char *, short, short,
Bool, RegionPtr, pointer, DrawablePtr);
static int
intel_uxa_video_set_port_attribute(ScrnInfoPtr scrn,
Atom attribute, INT32 value, pointer data)
{
intel_adaptor_private *adaptor_priv = (intel_adaptor_private *) data;
if (attribute == intel_xv_Brightness) {
if ((value < -128) || (value > 127))
return BadValue;
adaptor_priv->brightness = value;
return Success;
} else if (attribute == intel_xv_Contrast) {
if ((value < 0) || (value > 255))
return BadValue;
adaptor_priv->contrast = value;
return Success;
} else if (attribute == intel_xv_SyncToVblank) {
if ((value < -1) || (value > 1))
return BadValue;
adaptor_priv->SyncToVblank = value;
return Success;
} else {
return BadMatch;
}
}
static int xvmc_passthrough(int id)
{
#ifdef INTEL_XVMC
return id == FOURCC_XVMC;
#else
return 0;
#endif
}
static void
intel_wait_for_scanline(ScrnInfoPtr scrn, PixmapPtr pixmap,
xf86CrtcPtr crtc, RegionPtr clipBoxes)
{
intel_screen_private *intel = intel_get_screen_private(scrn);
pixman_box16_t box, crtc_box;
int pipe, event;
Bool full_height;
int y1, y2;
pipe = -1;
if (scrn->vtSema && pixmap_is_scanout(pixmap))
pipe = intel_crtc_to_pipe(crtc);
if (pipe < 0)
return;
box = *REGION_EXTENTS(unused, clipBoxes);
if (crtc->transform_in_use)
pixman_f_transform_bounds(&crtc->f_framebuffer_to_crtc, &box);
/* We could presume the clip was correctly computed... */
intel_crtc_box(crtc, &crtc_box);
intel_box_intersect(&box, &crtc_box, &box);
/*
* Make sure we don't wait for a scanline that will
* never occur
*/
y1 = (crtc_box.y1 <= box.y1) ? box.y1 - crtc_box.y1 : 0;
y2 = (box.y2 <= crtc_box.y2) ?
box.y2 - crtc_box.y1 : crtc_box.y2 - crtc_box.y1;
if (y2 <= y1)
return;
full_height = FALSE;
if (y1 == 0 && y2 == (crtc_box.y2 - crtc_box.y1))
full_height = TRUE;
/*
* Pre-965 doesn't have SVBLANK, so we need a bit
* of extra time for the blitter to start up and
* do its job for a full height blit
*/
if (full_height && INTEL_INFO(intel)->gen < 040)
y2 -= 2;
if (pipe == 0) {
pipe = MI_LOAD_SCAN_LINES_DISPLAY_PIPEA;
event = MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW;
if (full_height && INTEL_INFO(intel)->gen >= 040)
event = MI_WAIT_FOR_PIPEA_SVBLANK;
} else {
pipe = MI_LOAD_SCAN_LINES_DISPLAY_PIPEB;
event = MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW;
if (full_height && INTEL_INFO(intel)->gen >= 040)
event = MI_WAIT_FOR_PIPEB_SVBLANK;
}
if (crtc->mode.Flags & V_INTERLACE) {
/* DSL count field lines */
y1 /= 2;
y2 /= 2;
}
BEGIN_BATCH(5);
/* The documentation says that the LOAD_SCAN_LINES command
* always comes in pairs. Don't ask me why. */
OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | pipe);
OUT_BATCH((y1 << 16) | (y2-1));
OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | pipe);
OUT_BATCH((y1 << 16) | (y2-1));
OUT_BATCH(MI_WAIT_FOR_EVENT | event);
ADVANCE_BATCH();
}
/*
* The source rectangle of the video is defined by (src_x, src_y, src_w, src_h).
* The dest rectangle of the video is defined by (drw_x, drw_y, drw_w, drw_h).
* id is a fourcc code for the format of the video.
* buf is the pointer to the source data in system memory.
* width and height are the w/h of the source data.
* If "sync" is TRUE, then we must be finished with *buf at the point of return
* (which we always are).
* clipBoxes is the clipping region in screen space.
* data is a pointer to our port private.
* drawable is some Drawable, which might not be the screen in the case of
* compositing. It's a new argument to the function in the 1.1 server.
*/
static int
intel_uxa_video_put_image_textured(ScrnInfoPtr scrn,
short src_x, short src_y,
short drw_x, short drw_y,
short src_w, short src_h,
short drw_w, short drw_h,
int id, unsigned char *buf,
short width, short height,
Bool sync, RegionPtr clipBoxes, pointer data,
DrawablePtr drawable)
{
intel_screen_private *intel = intel_get_screen_private(scrn);
intel_adaptor_private *adaptor_priv = (intel_adaptor_private *) data;
PixmapPtr pixmap = get_drawable_pixmap(drawable);
int dstPitch, dstPitch2;
BoxRec dstBox;
xf86CrtcPtr crtc;
int top, left, npixels, nlines;
if (!intel_uxa_pixmap_is_offscreen(pixmap))
return BadAlloc;
#if 0
ErrorF("I830PutImage: src: (%d,%d)(%d,%d), dst: (%d,%d)(%d,%d)\n"
"width %d, height %d\n", src_x, src_y, src_w, src_h, drw_x,
drw_y, drw_w, drw_h, width, height);
#endif
if (!intel_clip_video_helper(scrn,
adaptor_priv,
&crtc,
&dstBox,
src_x, src_y, drw_x, drw_y,
src_w, src_h, drw_w, drw_h,
id,
&top, &left, &npixels, &nlines, clipBoxes,
width, height))
return Success;
if (xvmc_passthrough(id)) {
uint32_t *gem_handle = (uint32_t *)buf;
int size;
intel_setup_dst_params(scrn, adaptor_priv, width, height,
&dstPitch, &dstPitch2, &size, id);
if (IS_I915G(intel) || IS_I915GM(intel)) {
/* XXX: i915 is not support and needs some
* serious care. grep for KMS in i915_hwmc.c */
return BadAlloc;
}
if (adaptor_priv->buf)
drm_intel_bo_unreference(adaptor_priv->buf);
adaptor_priv->buf =
drm_intel_bo_gem_create_from_name(intel->bufmgr,
"xvmc surface",
*gem_handle);
if (adaptor_priv->buf == NULL)
return BadAlloc;
adaptor_priv->reusable = FALSE;
} else {
if (!intel_video_copy_data(scrn, adaptor_priv, width, height,
&dstPitch, &dstPitch2,
top, left, npixels, nlines, id, buf))
return BadAlloc;
}
if (crtc && adaptor_priv->SyncToVblank != 0 && INTEL_INFO(intel)->gen < 060) {
intel_wait_for_scanline(scrn, pixmap, crtc, clipBoxes);
}
if (INTEL_INFO(intel)->gen >= 060) {
Gen6DisplayVideoTextured(scrn, adaptor_priv, id, clipBoxes,
width, height, dstPitch, dstPitch2,
src_w, src_h,
drw_w, drw_h, pixmap);
} else if (INTEL_INFO(intel)->gen >= 040) {
I965DisplayVideoTextured(scrn, adaptor_priv, id, clipBoxes,
width, height, dstPitch, dstPitch2,
src_w, src_h,
drw_w, drw_h, pixmap);
} else {
I915DisplayVideoTextured(scrn, adaptor_priv, id, clipBoxes,
width, height, dstPitch, dstPitch2,
src_w, src_h, drw_w, drw_h,
pixmap);
}
intel_get_screen_private(scrn)->needs_flush = TRUE;
DamageDamageRegion(drawable, clipBoxes);
/* And make sure the WAIT_FOR_EVENT is queued before any
* modesetting/dpms operations on the pipe.
*/
intel_batch_submit(scrn);
return Success;
}
XF86VideoAdaptorPtr intel_uxa_video_setup_image_textured(ScreenPtr screen)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
intel_screen_private *intel = intel_get_screen_private(scrn);
XF86VideoAdaptorPtr adapt;
intel_adaptor_private *adaptor_privs;
DevUnion *devUnions;
int nports = 16, i;
UXA_VIDEO_DEBUG("intel_video_overlay_setup_image\n");
adapt = calloc(1, sizeof(XF86VideoAdaptorRec));
adaptor_privs = calloc(nports, sizeof(intel_adaptor_private));
devUnions = calloc(nports, sizeof(DevUnion));
if (adapt == NULL || adaptor_privs == NULL || devUnions == NULL) {
free(adapt);
free(adaptor_privs);
free(devUnions);
return NULL;
}
adapt->type = XvWindowMask | XvInputMask | XvImageMask;
adapt->flags = 0;
adapt->name = "Intel(R) Textured Video";
adapt->nEncodings = 1;
adapt->pEncodings = xnfalloc(sizeof(intel_xv_dummy_encoding));
memcpy(adapt->pEncodings, intel_xv_dummy_encoding, sizeof(intel_xv_dummy_encoding));
adapt->nFormats = NUM_FORMATS;
adapt->pFormats = intel_xv_formats;
adapt->nPorts = nports;
adapt->pPortPrivates = devUnions;
adapt->nAttributes = 0;
adapt->pAttributes = NULL;
if (IS_I915G(intel) || IS_I915GM(intel))
adapt->nImages = NUM_IMAGES - XVMC_IMAGE;
else
adapt->nImages = NUM_IMAGES;
adapt->pImages = intel_xv_images;
adapt->PutVideo = NULL;
adapt->PutStill = NULL;
adapt->GetVideo = NULL;
adapt->GetStill = NULL;
adapt->StopVideo = intel_video_stop_video;
adapt->SetPortAttribute = intel_uxa_video_set_port_attribute;
adapt->GetPortAttribute = intel_video_get_port_attribute;
adapt->QueryBestSize = intel_video_query_best_size;
adapt->PutImage = intel_uxa_video_put_image_textured;
adapt->QueryImageAttributes = intel_video_query_image_attributes;
for (i = 0; i < nports; i++) {
intel_adaptor_private *adaptor_priv = &adaptor_privs[i];
adaptor_priv->textured = TRUE;
adaptor_priv->videoStatus = 0;
adaptor_priv->buf = NULL;
adaptor_priv->old_buf[0] = NULL;
adaptor_priv->old_buf[1] = NULL;
adaptor_priv->rotation = RR_Rotate_0;
adaptor_priv->SyncToVblank = 1;
/* gotta uninit this someplace, XXX: shouldn't be necessary for textured */
REGION_NULL(screen, &adaptor_priv->clip);
adapt->pPortPrivates[i].ptr = (pointer) (adaptor_priv);
}
intel_xv_SyncToVblank = MAKE_ATOM("XV_SYNC_TO_VBLANK");
return adapt;
}

1310
src/uxa/intel_video.c
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File diff suppressed because it is too large Load Diff

150
src/uxa/intel_video.h
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@ -1,29 +1,32 @@
/***************************************************************************
Copyright 2000 Intel Corporation. All Rights Reserved.
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sub license, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
Copyright 2000 Intel Corporation. All Rights Reserved.
The above copyright notice and this permission notice (including the
next paragraph) shall be included in all copies or substantial portions
of the Software.
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sub license, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR
The above copyright notice and this permission notice (including the
next paragraph) shall be included in all copies or substantial portions
of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR
THE USE OR OTHER DEALINGS IN THE SOFTWARE.
**************************************************************************/
#ifndef _INTEL_VIDEO_H_
#define _INTEL_VIDEO_H_
#include "xf86.h"
#include "xf86_OSproc.h"
@ -61,35 +64,100 @@ typedef struct {
int SyncToVblank; /* -1: auto, 0: off, 1: on */
} intel_adaptor_private;
#define OFF_DELAY 250 /* milliseconds */
#define OFF_TIMER 0x01
#define CLIENT_VIDEO_ON 0x02
static inline intel_adaptor_private *
intel_get_adaptor_private(intel_screen_private *intel)
{
return intel->adaptor->pPortPrivates[0].ptr;
}
void I915DisplayVideoTextured(ScrnInfoPtr scrn,
intel_adaptor_private *adaptor_priv,
int id, RegionPtr dstRegion, short width,
short height, int video_pitch, int video_pitch2,
short src_w, short src_h,
short drw_w, short drw_h, PixmapPtr pixmap);
void I965DisplayVideoTextured(ScrnInfoPtr scrn,
intel_adaptor_private *adaptor_priv,
int id, RegionPtr dstRegion, short width,
short height, int video_pitch, int video_pitch2,
short src_w, short src_h,
short drw_w, short drw_h, PixmapPtr pixmap);
void Gen6DisplayVideoTextured(ScrnInfoPtr scrn,
intel_adaptor_private *adaptor_priv,
int id, RegionPtr dstRegion, short width,
short height, int video_pitch, int video_pitch2,
short src_w, short src_h,
short drw_w, short drw_h, PixmapPtr pixmap);
void i965_free_video(ScrnInfoPtr scrn);
int is_planar_fourcc(int id);
void intel_video_block_handler(intel_screen_private *intel);
int intel_video_query_image_attributes(ScrnInfoPtr, int, unsigned short *,
unsigned short *, int *, int *);
Bool
intel_video_copy_data(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv,
short width, short height, int *dstPitch, int *dstPitch2,
int top, int left, int npixels, int nlines,
int id, unsigned char *buf);
Bool
intel_clip_video_helper(ScrnInfoPtr scrn,
intel_adaptor_private *adaptor_priv,
xf86CrtcPtr * crtc_ret,
BoxPtr dst,
short src_x, short src_y,
short drw_x, short drw_y,
short src_w, short src_h,
short drw_w, short drw_h,
int id,
int *top, int* left, int* npixels, int *nlines,
RegionPtr reg, INT32 width, INT32 height);
void
intel_free_video_buffers(intel_adaptor_private *adaptor_priv);
int
intel_video_get_port_attribute(ScrnInfoPtr scrn,
Atom attribute, INT32 * value, pointer data);
void
intel_video_query_best_size(ScrnInfoPtr, Bool,
short, short, short, short, unsigned int *,
unsigned int *, pointer);
void
intel_setup_dst_params(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv, short width,
short height, int *dstPitch, int *dstPitch2, int *size,
int id);
void intel_video_stop_video(ScrnInfoPtr scrn, pointer data, Bool shutdown);
extern Atom intel_xv_Brightness, intel_xv_Contrast, intel_xv_Saturation, intel_xv_ColorKey, intel_xv_Pipe;
extern Atom intel_xv_Gamma0, intel_xv_Gamma1, intel_xv_Gamma2, intel_xv_Gamma3, intel_xv_Gamma4, intel_xv_Gamma5;
extern Atom intel_xv_SyncToVblank;
#define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, TRUE)
/* Limits for the overlay/textured video source sizes. The documented hardware
* limits are 2048x2048 or better for overlay and both of our textured video
* implementations. Additionally, on the 830 and 845, larger sizes resulted in
* the card hanging, so we keep the limits lower there.
*/
#define IMAGE_MAX_WIDTH 2048
#define IMAGE_MAX_HEIGHT 2048
#define IMAGE_MAX_WIDTH_LEGACY 1024
#define IMAGE_MAX_HEIGHT_LEGACY 1088
extern const XF86VideoEncodingRec intel_xv_dummy_encoding[1];
#define NUM_FORMATS 3
extern XF86VideoFormatRec intel_xv_formats[NUM_FORMATS];
#define NUM_ATTRIBUTES 5
extern XF86AttributeRec intel_xv_attributes[NUM_ATTRIBUTES];
#define GAMMA_ATTRIBUTES 6
extern XF86AttributeRec intel_xv_gamma_attributes[GAMMA_ATTRIBUTES];
#ifdef INTEL_XVMC
#define NUM_IMAGES 5
#define XVMC_IMAGE 1
#else
#define NUM_IMAGES 4
#define XVMC_IMAGE 0
#endif
extern XF86ImageRec intel_xv_images[NUM_IMAGES];
#endif /* _INTEL_VIDEO_H_ */

554
src/uxa/intel_video_overlay.c Normal file
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@ -0,0 +1,554 @@
/***************************************************************************
Copyright 2000 Intel Corporation. All Rights Reserved.
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sub license, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice (including the
next paragraph) shall be included in all copies or substantial portions
of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR
THE USE OR OTHER DEALINGS IN THE SOFTWARE.
**************************************************************************/
/*
* i830_video.c: i830/i845 Xv driver.
*
* Copyright © 2002 by Alan Hourihane and David Dawes
*
* Authors:
* Alan Hourihane <alanh@tungstengraphics.com>
* David Dawes <dawes@xfree86.org>
*
* Derived from i810 Xv driver:
*
* Authors of i810 code:
* Jonathan Bian <jonathan.bian@intel.com>
* Offscreen Images:
* Matt Sottek <matthew.j.sottek@intel.com>
*/
/*
* XXX Could support more formats.
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include <inttypes.h>
#include <math.h>
#include <string.h>
#include <assert.h>
#include <errno.h>
#include "xorg-server.h"
#include "xf86.h"
#include "xf86_OSproc.h"
#include "compiler.h"
#include "xf86Pci.h"
#include "xf86fbman.h"
#include "xf86drm.h"
#include "regionstr.h"
#include "randrstr.h"
#include "windowstr.h"
#include "damage.h"
#include "intel.h"
#include "intel_video.h"
#include "i830_reg.h"
#include "xf86xv.h"
#include <X11/extensions/Xv.h>
#include "dixstruct.h"
#include "fourcc.h"
#include "intel_video_overlay.h"
/* overlay debugging printf function */
#if 0
#define OVERLAY_DEBUG ErrorF
#else
#define OVERLAY_DEBUG if (0) ErrorF
#endif
/* kernel modesetting overlay functions */
static Bool intel_has_overlay(intel_screen_private *intel)
{
struct drm_i915_getparam gp;
int has_overlay = 0;
int ret;
gp.param = I915_PARAM_HAS_OVERLAY;
gp.value = &has_overlay;
ret = drmCommandWriteRead(intel->drmSubFD, DRM_I915_GETPARAM, &gp, sizeof(gp));
return ret == 0 && !! has_overlay;
}
static Bool intel_overlay_update_attrs(intel_screen_private *intel)
{
intel_adaptor_private *adaptor_priv = intel_get_adaptor_private(intel);
struct drm_intel_overlay_attrs attrs;
attrs.flags = I915_OVERLAY_UPDATE_ATTRS;
attrs.brightness = adaptor_priv->brightness;
attrs.contrast = adaptor_priv->contrast;
attrs.saturation = adaptor_priv->saturation;
attrs.color_key = adaptor_priv->colorKey;
attrs.gamma0 = adaptor_priv->gamma0;
attrs.gamma1 = adaptor_priv->gamma1;
attrs.gamma2 = adaptor_priv->gamma2;
attrs.gamma3 = adaptor_priv->gamma3;
attrs.gamma4 = adaptor_priv->gamma4;
attrs.gamma5 = adaptor_priv->gamma5;
return drmCommandWriteRead(intel->drmSubFD, DRM_I915_OVERLAY_ATTRS,
&attrs, sizeof(attrs)) == 0;
}
void intel_video_overlay_off(intel_screen_private *intel)
{
struct drm_intel_overlay_put_image request;
int ret;
request.flags = 0;
ret = drmCommandWrite(intel->drmSubFD, DRM_I915_OVERLAY_PUT_IMAGE,
&request, sizeof(request));
(void) ret;
}
static int
intel_video_overlay_set_port_attribute(ScrnInfoPtr scrn,
Atom attribute, INT32 value, pointer data)
{
intel_adaptor_private *adaptor_priv = (intel_adaptor_private *) data;
intel_screen_private *intel = intel_get_screen_private(scrn);
if (attribute == intel_xv_Brightness) {
if ((value < -128) || (value > 127))
return BadValue;
adaptor_priv->brightness = value;
OVERLAY_DEBUG("BRIGHTNESS\n");
} else if (attribute == intel_xv_Contrast) {
if ((value < 0) || (value > 255))
return BadValue;
adaptor_priv->contrast = value;
OVERLAY_DEBUG("CONTRAST\n");
} else if (attribute == intel_xv_Saturation) {
if ((value < 0) || (value > 1023))
return BadValue;
adaptor_priv->saturation = value;
} else if (attribute == intel_xv_Pipe) {
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn);
if ((value < -1) || (value >= xf86_config->num_crtc))
return BadValue;
if (value < 0)
adaptor_priv->desired_crtc = NULL;
else
adaptor_priv->desired_crtc = xf86_config->crtc[value];
} else if (attribute == intel_xv_Gamma0 && (INTEL_INFO(intel)->gen >= 030)) {
adaptor_priv->gamma0 = value;
} else if (attribute == intel_xv_Gamma1 && (INTEL_INFO(intel)->gen >= 030)) {
adaptor_priv->gamma1 = value;
} else if (attribute == intel_xv_Gamma2 && (INTEL_INFO(intel)->gen >= 030)) {
adaptor_priv->gamma2 = value;
} else if (attribute == intel_xv_Gamma3 && (INTEL_INFO(intel)->gen >= 030)) {
adaptor_priv->gamma3 = value;
} else if (attribute == intel_xv_Gamma4 && (INTEL_INFO(intel)->gen >= 030)) {
adaptor_priv->gamma4 = value;
} else if (attribute == intel_xv_Gamma5 && (INTEL_INFO(intel)->gen >= 030)) {
adaptor_priv->gamma5 = value;
} else if (attribute == intel_xv_ColorKey) {
adaptor_priv->colorKey = value;
OVERLAY_DEBUG("COLORKEY\n");
} else
return BadMatch;
if ((attribute == intel_xv_Gamma0 ||
attribute == intel_xv_Gamma1 ||
attribute == intel_xv_Gamma2 ||
attribute == intel_xv_Gamma3 ||
attribute == intel_xv_Gamma4 ||
attribute == intel_xv_Gamma5) && (INTEL_INFO(intel)->gen >= 030)) {
OVERLAY_DEBUG("GAMMA\n");
}
if (!intel_overlay_update_attrs(intel))
return BadValue;
if (attribute == intel_xv_ColorKey)
REGION_EMPTY(scrn->pScreen, &adaptor_priv->clip);
return Success;
}
static Bool
intel_overlay_put_image(intel_screen_private *intel,
xf86CrtcPtr crtc,
int id, short width, short height,
int dstPitch, int dstPitch2,
BoxPtr dstBox, short src_w, short src_h, short drw_w,
short drw_h)
{
intel_adaptor_private *adaptor_priv = intel_get_adaptor_private(intel);
struct drm_intel_overlay_put_image request;
int ret;
int planar = is_planar_fourcc(id);
float scale;
dri_bo *tmp;
request.flags = I915_OVERLAY_ENABLE;
request.bo_handle = adaptor_priv->buf->handle;
if (planar) {
request.stride_Y = dstPitch2;
request.stride_UV = dstPitch;
} else {
request.stride_Y = dstPitch;
request.stride_UV = 0;
}
request.offset_Y = adaptor_priv->YBufOffset;
request.offset_U = adaptor_priv->UBufOffset;
request.offset_V = adaptor_priv->VBufOffset;
OVERLAY_DEBUG("off_Y: %i, off_U: %i, off_V: %i\n", request.offset_Y,
request.offset_U, request.offset_V);
request.crtc_id = intel_crtc_id(crtc);
request.dst_x = dstBox->x1;
request.dst_y = dstBox->y1;
request.dst_width = dstBox->x2 - dstBox->x1;
request.dst_height = dstBox->y2 - dstBox->y1;
request.src_width = width;
request.src_height = height;
/* adjust src dimensions */
if (request.dst_height > 1) {
scale = ((float)request.dst_height - 1) / ((float)drw_h - 1);
request.src_scan_height = src_h * scale;
} else
request.src_scan_height = 1;
if (request.dst_width > 1) {
scale = ((float)request.dst_width - 1) / ((float)drw_w - 1);
request.src_scan_width = src_w * scale;
} else
request.src_scan_width = 1;
if (planar) {
request.flags |= I915_OVERLAY_YUV_PLANAR | I915_OVERLAY_YUV420;
} else {
request.flags |= I915_OVERLAY_YUV_PACKED | I915_OVERLAY_YUV422;
if (id == FOURCC_UYVY)
request.flags |= I915_OVERLAY_Y_SWAP;
}
ret = drmCommandWrite(intel->drmSubFD, DRM_I915_OVERLAY_PUT_IMAGE,
&request, sizeof(request));
if (ret)
return FALSE;
if (!adaptor_priv->reusable) {
drm_intel_bo_unreference(adaptor_priv->buf);
adaptor_priv->buf = NULL;
adaptor_priv->reusable = TRUE;
}
tmp = adaptor_priv->old_buf[1];
adaptor_priv->old_buf[1] = adaptor_priv->old_buf[0];
adaptor_priv->old_buf[0] = adaptor_priv->buf;
adaptor_priv->buf = tmp;
return TRUE;
}
static void
intel_update_dst_box_to_crtc_coords(ScrnInfoPtr scrn, xf86CrtcPtr crtc,
BoxPtr dstBox)
{
int tmp;
/* for overlay, we should take it from crtc's screen
* coordinate to current crtc's display mode.
* yeah, a bit confusing.
*/
switch (crtc->rotation & 0xf) {
case RR_Rotate_0:
dstBox->x1 -= crtc->x;
dstBox->x2 -= crtc->x;
dstBox->y1 -= crtc->y;
dstBox->y2 -= crtc->y;
break;
case RR_Rotate_90:
tmp = dstBox->x1;
dstBox->x1 = dstBox->y1 - crtc->x;
dstBox->y1 = scrn->virtualX - tmp - crtc->y;
tmp = dstBox->x2;
dstBox->x2 = dstBox->y2 - crtc->x;
dstBox->y2 = scrn->virtualX - tmp - crtc->y;
tmp = dstBox->y1;
dstBox->y1 = dstBox->y2;
dstBox->y2 = tmp;
break;
case RR_Rotate_180:
tmp = dstBox->x1;
dstBox->x1 = scrn->virtualX - dstBox->x2 - crtc->x;
dstBox->x2 = scrn->virtualX - tmp - crtc->x;
tmp = dstBox->y1;
dstBox->y1 = scrn->virtualY - dstBox->y2 - crtc->y;
dstBox->y2 = scrn->virtualY - tmp - crtc->y;
break;
case RR_Rotate_270:
tmp = dstBox->x1;
dstBox->x1 = scrn->virtualY - dstBox->y1 - crtc->x;
dstBox->y1 = tmp - crtc->y;
tmp = dstBox->x2;
dstBox->x2 = scrn->virtualY - dstBox->y2 - crtc->x;
dstBox->y2 = tmp - crtc->y;
tmp = dstBox->x1;
dstBox->x1 = dstBox->x2;
dstBox->x2 = tmp;
break;
}
return;
}
static Bool
intel_video_overlay_display(ScrnInfoPtr scrn, xf86CrtcPtr crtc,
int id, short width, short height,
int dstPitch, int dstPitch2,
BoxPtr dstBox, short src_w, short src_h, short drw_w,
short drw_h)
{
intel_screen_private *intel = intel_get_screen_private(scrn);
int tmp;
OVERLAY_DEBUG("I830DisplayVideo: %dx%d (pitch %d)\n", width, height,
dstPitch);
/*
* If the video isn't visible on any CRTC, turn it off
*/
if (!crtc) {
intel_video_overlay_off(intel);
return TRUE;
}
intel_update_dst_box_to_crtc_coords(scrn, crtc, dstBox);
if (crtc->rotation & (RR_Rotate_90 | RR_Rotate_270)) {
tmp = width;
width = height;
height = tmp;
tmp = drw_w;
drw_w = drw_h;
drw_h = tmp;
tmp = src_w;
src_w = src_h;
src_h = tmp;
}
return intel_overlay_put_image(intel, crtc, id,
width, height,
dstPitch, dstPitch2, dstBox,
src_w, src_h, drw_w, drw_h);
}
static int
intel_video_overlay_put_image(ScrnInfoPtr scrn,
short src_x, short src_y,
short drw_x, short drw_y,
short src_w, short src_h,
short drw_w, short drw_h,
int id, unsigned char *buf,
short width, short height,
Bool sync, RegionPtr clipBoxes, pointer data,
DrawablePtr drawable)
{
intel_adaptor_private *adaptor_priv = (intel_adaptor_private *) data;
int dstPitch, dstPitch2;
BoxRec dstBox;
xf86CrtcPtr crtc;
int top, left, npixels, nlines;
#if 0
ErrorF("I830PutImage: src: (%d,%d)(%d,%d), dst: (%d,%d)(%d,%d)\n"
"width %d, height %d\n", src_x, src_y, src_w, src_h, drw_x,
drw_y, drw_w, drw_h, width, height);
#endif
/* If dst width and height are less than 1/8th the src size, the
* src/dst scale factor becomes larger than 8 and doesn't fit in
* the scale register. */
if (src_w >= (drw_w * 8))
drw_w = src_w / 7;
if (src_h >= (drw_h * 8))
drw_h = src_h / 7;
if (!intel_clip_video_helper(scrn,
adaptor_priv,
&crtc,
&dstBox,
src_x, src_y, drw_x, drw_y,
src_w, src_h, drw_w, drw_h,
id,
&top, &left, &npixels, &nlines, clipBoxes,
width, height))
return Success;
/* overlay can't handle rotation natively, store it for the copy func */
if (crtc)
adaptor_priv->rotation = crtc->rotation;
else {
xf86DrvMsg(scrn->scrnIndex, X_WARNING,
"Fail to clip video to any crtc!\n");
return Success;
}
if (!intel_video_copy_data(scrn, adaptor_priv, width, height,
&dstPitch, &dstPitch2,
top, left, npixels, nlines, id, buf))
return BadAlloc;
if (!intel_video_overlay_display
(scrn, crtc, id, width, height, dstPitch, dstPitch2,
&dstBox, src_w, src_h, drw_w, drw_h))
return BadAlloc;
/* update cliplist */
if (!REGION_EQUAL(scrn->pScreen, &adaptor_priv->clip, clipBoxes)) {
REGION_COPY(scrn->pScreen, &adaptor_priv->clip, clipBoxes);
xf86XVFillKeyHelperDrawable(drawable,
adaptor_priv->colorKey,
clipBoxes);
}
adaptor_priv->videoStatus = CLIENT_VIDEO_ON;
return Success;
}
XF86VideoAdaptorPtr intel_video_overlay_setup_image(ScreenPtr screen)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
intel_screen_private *intel = intel_get_screen_private(scrn);
XF86VideoAdaptorPtr adapt;
intel_adaptor_private *adaptor_priv;
XF86AttributePtr att;
/* Set up overlay video if it is available */
intel->use_overlay = intel_has_overlay(intel);
if (!intel->use_overlay)
return NULL;
OVERLAY_DEBUG("intel_video_overlay_setup_image\n");
if (!(adapt = calloc(1,
sizeof(XF86VideoAdaptorRec) +
sizeof(intel_adaptor_private) +
sizeof(DevUnion))))
return NULL;
adapt->type = XvWindowMask | XvInputMask | XvImageMask;
adapt->flags = VIDEO_OVERLAID_IMAGES /*| VIDEO_CLIP_TO_VIEWPORT */ ;
adapt->name = "Intel(R) Video Overlay";
adapt->nEncodings = 1;
adapt->pEncodings = xnfalloc(sizeof(intel_xv_dummy_encoding));
memcpy(adapt->pEncodings, intel_xv_dummy_encoding, sizeof(intel_xv_dummy_encoding));
if (IS_845G(intel) || IS_I830(intel)) {
adapt->pEncodings->width = IMAGE_MAX_WIDTH_LEGACY;
adapt->pEncodings->height = IMAGE_MAX_HEIGHT_LEGACY;
}
adapt->nFormats = NUM_FORMATS;
adapt->pFormats = intel_xv_formats;
adapt->nPorts = 1;
adapt->pPortPrivates = (DevUnion *) (&adapt[1]);
adaptor_priv = (intel_adaptor_private *)&adapt->pPortPrivates[1];
adapt->pPortPrivates[0].ptr = (pointer) (adaptor_priv);
adapt->nAttributes = NUM_ATTRIBUTES;
if (INTEL_INFO(intel)->gen >= 030)
adapt->nAttributes += GAMMA_ATTRIBUTES; /* has gamma */
adapt->pAttributes =
xnfalloc(sizeof(XF86AttributeRec) * adapt->nAttributes);
/* Now copy the attributes */
att = adapt->pAttributes;
memcpy((char *)att, (char *)intel_xv_attributes,
sizeof(XF86AttributeRec) * NUM_ATTRIBUTES);
att += NUM_ATTRIBUTES;
if (INTEL_INFO(intel)->gen >= 030) {
memcpy((char *)att, (char *)intel_xv_gamma_attributes,
sizeof(XF86AttributeRec) * GAMMA_ATTRIBUTES);
}
adapt->nImages = NUM_IMAGES - XVMC_IMAGE;
adapt->pImages = intel_xv_images;
adapt->PutVideo = NULL;
adapt->PutStill = NULL;
adapt->GetVideo = NULL;
adapt->GetStill = NULL;
adapt->StopVideo = intel_video_stop_video;
adapt->SetPortAttribute = intel_video_overlay_set_port_attribute;
adapt->GetPortAttribute = intel_video_get_port_attribute;
adapt->QueryBestSize = intel_video_query_best_size;
adapt->PutImage = intel_video_overlay_put_image;
adapt->QueryImageAttributes = intel_video_query_image_attributes;
adaptor_priv->textured = FALSE;
adaptor_priv->colorKey = intel->colorKey & ((1 << scrn->depth) - 1);
adaptor_priv->videoStatus = 0;
adaptor_priv->brightness = -19; /* (255/219) * -16 */
adaptor_priv->contrast = 75; /* 255/219 * 64 */
adaptor_priv->saturation = 146; /* 128/112 * 128 */
adaptor_priv->desired_crtc = NULL;
adaptor_priv->buf = NULL;
adaptor_priv->old_buf[0] = NULL;
adaptor_priv->old_buf[1] = NULL;
adaptor_priv->gamma5 = 0xc0c0c0;
adaptor_priv->gamma4 = 0x808080;
adaptor_priv->gamma3 = 0x404040;
adaptor_priv->gamma2 = 0x202020;
adaptor_priv->gamma1 = 0x101010;
adaptor_priv->gamma0 = 0x080808;
adaptor_priv->rotation = RR_Rotate_0;
/* gotta uninit this someplace */
REGION_NULL(screen, &adaptor_priv->clip);
intel->adaptor = adapt;
intel_xv_ColorKey = MAKE_ATOM("XV_COLORKEY");
intel_xv_Brightness = MAKE_ATOM("XV_BRIGHTNESS");
intel_xv_Contrast = MAKE_ATOM("XV_CONTRAST");
intel_xv_Saturation = MAKE_ATOM("XV_SATURATION");
/* Allow the pipe to be switched from pipe A to B when in clone mode */
intel_xv_Pipe = MAKE_ATOM("XV_PIPE");
if (INTEL_INFO(intel)->gen >= 030) {
intel_xv_Gamma0 = MAKE_ATOM("XV_GAMMA0");
intel_xv_Gamma1 = MAKE_ATOM("XV_GAMMA1");
intel_xv_Gamma2 = MAKE_ATOM("XV_GAMMA2");
intel_xv_Gamma3 = MAKE_ATOM("XV_GAMMA3");
intel_xv_Gamma4 = MAKE_ATOM("XV_GAMMA4");
intel_xv_Gamma5 = MAKE_ATOM("XV_GAMMA5");
}
intel_overlay_update_attrs(intel);
return adapt;
}

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src/uxa/intel_video_overlay.h Normal file
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/***************************************************************************
Copyright 2000 Intel Corporation. All Rights Reserved.
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sub license, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice (including the
next paragraph) shall be included in all copies or substantial portions
of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR
THE USE OR OTHER DEALINGS IN THE SOFTWARE.
**************************************************************************/
/*
* i830_video.c: i830/i845 Xv driver.
*
* Copyright © 2002 by Alan Hourihane and David Dawes
*
* Authors:
* Alan Hourihane <alanh@tungstengraphics.com>
* David Dawes <dawes@xfree86.org>
*
* Derived from i810 Xv driver:
*
* Authors of i810 code:
* Jonathan Bian <jonathan.bian@intel.com>
* Offscreen Images:
* Matt Sottek <matthew.j.sottek@intel.com>
*/
#ifndef _INTEL_VIDEO_OVERLAY_H_
#define _INTEL_VIDEO_OVERLAY_H_
XF86VideoAdaptorPtr intel_video_overlay_setup_image(ScreenPtr);
void intel_video_overlay_off(intel_screen_private *intel);
#endif /* _INTEL_VIDEO_OVERLAY_H_ */