intel: Remove dependence upon having PciInfo

After some probing mechanisms, we may end up with a valid device without
knowing its PCI address a priori. Having a valid device, we can just
query it for the correct device id, and can safely abort any path that
requires PCI information that we don't have. (Those paths are not valid
under such hosting anyway - if it may be required, we could reconstruct
the address.)

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Chris Wilson 2013-10-03 15:35:54 +01:00
parent 4685e79d11
commit 6c157a925f
13 changed files with 91 additions and 47 deletions

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@ -373,6 +373,23 @@ const char *intel_get_client_name(ScrnInfoPtr scrn)
return dev->render_node;
}
int intel_get_device_id(ScrnInfoPtr scrn)
{
struct intel_device *dev = intel_device(scrn);
struct drm_i915_getparam gp;
int devid;
assert(dev && dev->fd != -1);
gp.param = I915_PARAM_CHIPSET_ID;
gp.value = &devid;
if (ioctl(dev->fd, DRM_IOCTL_I915_GETPARAM, &gp, sizeof(gp)))
return 0;
return devid;
}
int intel_get_master(ScrnInfoPtr scrn)
{
struct intel_device *dev = intel_device(scrn);

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@ -118,15 +118,14 @@ struct intel_device_info {
int gen;
};
void intel_detect_chipset(ScrnInfoPtr scrn,
EntityInfoPtr ent,
struct pci_device *pci);
void intel_detect_chipset(ScrnInfoPtr scrn, EntityInfoPtr ent);
int intel_open_device(int entity_num,
const struct pci_device *pci,
struct xf86_platform_device *dev);
int intel_get_device(ScrnInfoPtr scrn);
const char *intel_get_client_name(ScrnInfoPtr scrn);
int intel_get_device_id(ScrnInfoPtr scrn);
int intel_get_master(ScrnInfoPtr scrn);
int intel_put_master(ScrnInfoPtr scrn);
void intel_put_device(ScrnInfoPtr scrn);

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@ -258,23 +258,30 @@ static const struct pci_id_match intel_device_match[] = {
};
void
intel_detect_chipset(ScrnInfoPtr scrn,
EntityInfoPtr ent,
struct pci_device *pci)
intel_detect_chipset(ScrnInfoPtr scrn, EntityInfoPtr ent)
{
MessageType from = X_PROBED;
const char *name = NULL;
int devid;
int i;
if (ent->device->chipID >= 0) {
xf86DrvMsg(scrn->scrnIndex, from = X_CONFIG,
"ChipID override: 0x%04X\n",
ent->device->chipID);
pci->device_id = ent->device->chipID;
devid = ent->device->chipID;
} else {
struct pci_device *pci;
pci = xf86GetPciInfoForEntity(ent->index);
if (pci != NULL)
devid = pci->device_id;
else
devid = intel_get_device_id(scrn);
}
for (i = 0; intel_chipsets[i].name != NULL; i++) {
if (pci->device_id == intel_chipsets[i].token) {
if (devid == intel_chipsets[i].token) {
name = intel_chipsets[i].name;
break;
}
@ -283,20 +290,21 @@ intel_detect_chipset(ScrnInfoPtr scrn,
int gen = 0;
for (i = 0; intel_device_match[i].device_id != 0; i++) {
if (pci->device_id == intel_device_match[i].device_id) {
if (devid == intel_device_match[i].device_id) {
const struct intel_device_info *info = (void *)intel_device_match[i].match_data;
gen = info->gen >> 3;
break;
}
}
if(gen) {
if (gen) {
xf86DrvMsg(scrn->scrnIndex, from,
"gen%d engineering sample\n", gen);
} else {
xf86DrvMsg(scrn->scrnIndex, X_WARNING,
"Unknown chipset\n");
}
name = "unknown";
} else {
xf86DrvMsg(scrn->scrnIndex, from,

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@ -364,7 +364,7 @@ I810PreInit(ScrnInfoPtr scrn, int flags)
*/
I810DoDDC(scrn, pI810->pEnt->index);
intel_detect_chipset(scrn, pI810->pEnt, pI810->PciInfo);
intel_detect_chipset(scrn, pI810->pEnt);
pI810->LinearAddr = pI810->PciInfo->regions[0].base_addr;
xf86DrvMsg(scrn->scrnIndex, X_PROBED, "Linear framebuffer at 0x%lX\n",

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@ -3315,7 +3315,7 @@ const char *gen5_render_init(struct sna *sna, const char *backend)
#if !NO_COMPOSITE_SPANS
sna->render.check_composite_spans = gen5_check_composite_spans;
sna->render.composite_spans = gen5_render_composite_spans;
if (sna->PciInfo->device_id == 0x0044)
if (intel_get_device_id(sna->scrn) == 0x0044)
sna->render.prefer_gpu |= PREFER_GPU_SPANS;
#endif
sna->render.video = gen5_render_video;

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@ -3694,17 +3694,17 @@ static void gen6_render_fini(struct sna *sna)
kgem_bo_destroy(&sna->kgem, sna->render_state.gen6.general_bo);
}
static bool is_gt2(struct sna *sna)
static bool is_gt2(struct sna *sna, int devid)
{
return sna->PciInfo->device_id & 0x30;
return devid & 0x30;
}
static bool is_mobile(struct sna *sna)
static bool is_mobile(struct sna *sna, int devid)
{
return (sna->PciInfo->device_id & 0xf) == 0x6;
return (devid & 0xf) == 0x6;
}
static bool gen6_render_setup(struct sna *sna)
static bool gen6_render_setup(struct sna *sna, int devid)
{
struct gen6_render_state *state = &sna->render_state.gen6;
struct sna_static_stream general;
@ -3712,7 +3712,7 @@ static bool gen6_render_setup(struct sna *sna)
int i, j, k, l, m;
state->info = &gt1_info;
if (is_gt2(sna))
if (is_gt2(sna, devid))
state->info = &gt2_info; /* XXX requires GT_MODE WiZ disabled */
sna_static_stream_init(&general);
@ -3784,7 +3784,9 @@ static bool gen6_render_setup(struct sna *sna)
const char *gen6_render_init(struct sna *sna, const char *backend)
{
if (!gen6_render_setup(sna))
int devid = intel_get_device_id(sna->scrn);
if (!gen6_render_setup(sna, devid))
return backend;
sna->kgem.context_switch = gen6_render_context_switch;
@ -3799,7 +3801,7 @@ const char *gen6_render_init(struct sna *sna, const char *backend)
#if !NO_COMPOSITE_SPANS
sna->render.check_composite_spans = gen6_check_composite_spans;
sna->render.composite_spans = gen6_render_composite_spans;
if (is_mobile(sna))
if (is_mobile(sna, devid))
sna->render.prefer_gpu |= PREFER_GPU_SPANS;
#endif
sna->render.video = gen6_render_video;

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@ -3897,23 +3897,23 @@ static void gen7_render_fini(struct sna *sna)
kgem_bo_destroy(&sna->kgem, sna->render_state.gen7.general_bo);
}
static bool is_gt3(struct sna *sna)
static bool is_gt3(struct sna *sna, int devid)
{
assert(sna->kgem.gen == 075);
return sna->PciInfo->device_id & 0x20;
return devid & 0x20;
}
static bool is_gt2(struct sna *sna)
static bool is_gt2(struct sna *sna, int devid)
{
return sna->PciInfo->device_id & (is_hsw(sna)? 0x30 : 0x20);
return devid & (is_hsw(sna)? 0x30 : 0x20);
}
static bool is_mobile(struct sna *sna)
static bool is_mobile(struct sna *sna, int devid)
{
return (sna->PciInfo->device_id & 0xf) == 0x6;
return (devid & 0xf) == 0x6;
}
static bool gen7_render_setup(struct sna *sna)
static bool gen7_render_setup(struct sna *sna, int devid)
{
struct gen7_render_state *state = &sna->render_state.gen7;
struct sna_static_stream general;
@ -3922,19 +3922,19 @@ static bool gen7_render_setup(struct sna *sna)
if (is_ivb(sna)) {
state->info = &ivb_gt_info;
if (sna->PciInfo->device_id & 0xf) {
if (devid & 0xf) {
state->info = &ivb_gt1_info;
if (is_gt2(sna))
if (is_gt2(sna, devid))
state->info = &ivb_gt2_info; /* XXX requires GT_MODE WiZ disabled */
}
} else if (is_byt(sna)) {
state->info = &byt_gt_info;
} else if (is_hsw(sna)) {
state->info = &hsw_gt_info;
if (sna->PciInfo->device_id & 0xf) {
if (is_gt3(sna))
if (devid & 0xf) {
if (is_gt3(sna, devid))
state->info = &hsw_gt3_info;
else if (is_gt2(sna))
else if (is_gt2(sna, devid))
state->info = &hsw_gt2_info;
else
state->info = &hsw_gt1_info;
@ -4006,7 +4006,9 @@ static bool gen7_render_setup(struct sna *sna)
const char *gen7_render_init(struct sna *sna, const char *backend)
{
if (!gen7_render_setup(sna))
int devid = intel_get_device_id(sna->scrn);
if (!gen7_render_setup(sna, devid))
return backend;
sna->kgem.context_switch = gen7_render_context_switch;
@ -4020,7 +4022,7 @@ const char *gen7_render_init(struct sna *sna, const char *backend)
#if !NO_COMPOSITE_SPANS
sna->render.check_composite_spans = gen7_check_composite_spans;
sna->render.composite_spans = gen7_render_composite_spans;
if (is_mobile(sna) || is_gt2(sna) || is_byt(sna))
if (is_mobile(sna, devid) || is_gt2(sna, devid) || is_byt(sna))
sna->render.prefer_gpu |= PREFER_GPU_SPANS;
#endif
sna->render.video = gen7_render_video;

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@ -891,7 +891,7 @@ static bool is_hw_supported(struct kgem *kgem,
* hw acceleration.
*/
if (kgem->gen == 060 && dev->revision < 8) {
if (kgem->gen == 060 && dev && dev->revision < 8) {
/* pre-production SNB with dysfunctional BLT */
return false;
}
@ -1283,7 +1283,9 @@ void kgem_init(struct kgem *kgem, int fd, struct pci_device *dev, unsigned gen)
kgem->aperture_low, kgem->aperture_low / (1024*1024),
kgem->aperture_high, kgem->aperture_high / (1024*1024)));
kgem->aperture_mappable = agp_aperture_size(dev, gen);
kgem->aperture_mappable = 256 * 1024 * 1024;
if (dev != NULL)
kgem->aperture_mappable = agp_aperture_size(dev, gen);
if (kgem->aperture_mappable == 0 ||
kgem->aperture_mappable > aperture.aper_size)
kgem->aperture_mappable = aperture.aper_size;

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@ -288,7 +288,6 @@ struct sna {
#define SNA_TILING_ALL (~0)
EntityInfoPtr pEnt;
struct pci_device *PciInfo;
const struct intel_device_info *info;
ScreenBlockHandlerProcPtr BlockHandler;

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@ -476,12 +476,16 @@ has_device_backlight(xf86OutputPtr output, int *best_type)
{
struct sna_output *sna_output = output->driver_private;
struct sna *sna = to_sna(output->scrn);
struct pci_device *pci = sna->PciInfo;
struct pci_device *pci;
char path[1024];
char *best_iface = NULL;
DIR *dir;
struct dirent *de;
pci = xf86GetPciInfoForEntity(sna->pEnt->index);
if (pci == NULL)
return NULL;
snprintf(path, sizeof(path),
"/sys/bus/pci/devices/%04x:%02x:%02x.%d/backlight",
pci->domain, pci->bus, pci->dev, pci->func);

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@ -501,8 +501,6 @@ static Bool sna_pre_init(ScrnInfoPtr scrn, int flags)
scrn->displayWidth = 640; /* default it */
sna->PciInfo = xf86GetPciInfoForEntity(sna->pEnt->index);
scrn->monitor = scrn->confScreen->monitor;
scrn->progClock = TRUE;
scrn->rgbBits = 8;
@ -558,9 +556,11 @@ static Bool sna_pre_init(ScrnInfoPtr scrn, int flags)
sna_setup_capabilities(scrn, fd);
intel_detect_chipset(scrn, sna->pEnt, sna->PciInfo);
intel_detect_chipset(scrn, pEnt);
kgem_init(&sna->kgem, fd, sna->PciInfo, sna->info->gen);
kgem_init(&sna->kgem, fd,
xf86GetPciInfoForEntity(pEnt->index),
sna->info->gen);
if (xf86ReturnOptValBool(sna->Options, OPTION_ACCEL_DISABLE, FALSE) ||
!sna_option_cast_to_bool(sna, OPTION_ACCEL_METHOD, TRUE)) {
xf86DrvMsg(sna->scrn->scrnIndex, X_CONFIG,
@ -939,6 +939,7 @@ sna_screen_init(SCREEN_INIT_ARGS_DECL)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
struct sna *sna = to_sna(scrn);
struct pci_device *pci;
VisualPtr visuals;
DepthPtr depths;
int nvisuals;
@ -956,7 +957,11 @@ sna_screen_init(SCREEN_INIT_ARGS_DECL)
if (!sna_register_all_privates())
return FALSE;
scrn->videoRam = agp_aperture_size(sna->PciInfo, sna->kgem.gen) / 1024;
pci = xf86GetPciInfoForEntity(sna->pEnt->index);
if (pci != NULL)
scrn->videoRam = agp_aperture_size(pci, sna->kgem.gen) / 1024;
else
scrn->videoRam = 256;
miClearVisualTypes();
if (!miSetVisualTypes(scrn->depth,

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@ -81,12 +81,14 @@ static int create_context(XvPortPtr port, XvMCContextPtr ctx,
return BadAlloc;
if (sna->kgem.gen >= 040) {
int devid = intel_get_device_id(sna->scrn);
if (sna->kgem.gen >= 045)
priv->type = XVMC_I965_MPEG2_VLD;
else
priv->type = XVMC_I965_MPEG2_MC;
priv->i965.is_g4x = sna->kgem.gen == 045;
priv->i965.is_965_q = sna->PciInfo->device_id == PCI_CHIP_I965_Q;
priv->i965.is_965_q = devid == PCI_CHIP_I965_Q;
priv->i965.is_igdng = sna->kgem.gen == 050;
} else
priv->type = XVMC_I915_MPEG2_MC;
@ -199,10 +201,15 @@ static XvMCSurfaceInfoPtr surface_info_vld[] = {
void sna_video_xvmc_setup(struct sna *sna, ScreenPtr screen)
{
XvMCAdaptorRec *adaptors;
struct pci_device *pci;
const char *name;
char bus[64];
int i;
pci = xf86GetPciInfoForEntity(sna->pEnt->index);
if (pci == NULL)
return;
if (!sna->xv.num_adaptors)
return;
@ -253,8 +260,7 @@ void sna_video_xvmc_setup(struct sna *sna, ScreenPtr screen)
}
sprintf(bus, "pci:%04x:%02x:%02x.%d",
sna->PciInfo->domain,
sna->PciInfo->bus, sna->PciInfo->dev, sna->PciInfo->func);
pci->domain, pci->bus, pci->dev, pci->func);
xf86XvMCRegisterDRInfo(screen, (char *)SNA_XVMC_LIBNAME, bus,
SNA_XVMC_MAJOR, SNA_XVMC_MINOR,

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@ -186,7 +186,7 @@ static void PreInitCleanup(ScrnInfoPtr scrn)
static void intel_check_chipset_option(ScrnInfoPtr scrn)
{
intel_screen_private *intel = intel_get_screen_private(scrn);
intel_detect_chipset(scrn, intel->pEnt, intel->PciInfo);
intel_detect_chipset(scrn, intel->pEnt);
}
static Bool I830GetEarlyOptions(ScrnInfoPtr scrn)