Remove custom accelerated rotation code now that it's all done through Render.
This commit is contained in:
parent
e62751db8b
commit
72ea0e514d
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@ -74,7 +74,6 @@ i810_drv_la_SOURCES = \
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i830_video.c \
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i830_video.h \
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i830_reg.h \
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i830_rotate.c \
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i830_randr.c \
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i830_sdvo.c \
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i830_sdvo.h \
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@ -342,11 +342,8 @@ const char *I810driSymbols[] = {
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#endif /* I830_ONLY */
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const char *I810shadowSymbols[] = {
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"shadowInit",
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"shadowSetup",
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"shadowAdd",
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"shadowRemove",
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"shadowUpdateRotatePacked",
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NULL
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};
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@ -297,11 +297,7 @@ typedef struct _I830Rec {
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#endif
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unsigned long LinearAlloc;
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XF86ModReqInfo shadowReq; /* to test for later libshadow */
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I830MemRange RotatedMem;
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I830MemRange RotatedMem2;
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I830MemRange RotateStateMem; /* for G965 state buffer */
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Rotation rotation;
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int InitialRotation;
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int displayWidth;
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void (*PointerMoved)(int, int, int);
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CreateScreenResourcesProcPtr CreateScreenResources;
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@ -321,8 +317,6 @@ typedef struct _I830Rec {
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unsigned int front_tiled;
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unsigned int back_tiled;
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unsigned int depth_tiled;
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unsigned int rotated_tiled;
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unsigned int rotated2_tiled;
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#endif
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Bool NeedRingBufferLow;
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@ -550,8 +544,6 @@ extern void I830InitVideo(ScreenPtr pScreen);
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extern void i830_crtc_dpms_video(xf86CrtcPtr crtc, Bool on);
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#endif
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extern Bool I830AllocateRotatedBuffer(ScrnInfoPtr pScrn, const int flags);
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extern Bool I830AllocateRotated2Buffer(ScrnInfoPtr pScrn, const int flags);
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#ifdef XF86DRI
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extern Bool I830Allocate3DMemory(ScrnInfoPtr pScrn, const int flags);
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extern Bool I830AllocateBackBuffer(ScrnInfoPtr pScrn, const int flags);
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@ -606,7 +598,6 @@ extern void I830ReadAllRegisters(I830Ptr pI830, I830RegPtr i830Reg);
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extern void I830ChangeFrontbuffer(ScrnInfoPtr pScrn,int buffer);
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extern Bool I830IsPrimary(ScrnInfoPtr pScrn);
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extern Bool I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode);
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extern Bool I830FixOffset(ScrnInfoPtr pScrn, I830MemRange *mem);
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extern Bool I830I2CInit(ScrnInfoPtr pScrn, I2CBusPtr *bus_ptr, int i2c_reg,
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char *name);
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@ -397,17 +397,11 @@ I830_CloseFramebuffer(ScrnInfoPtr pScrn)
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};
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if (I830IsPrimary(pScrn)) {
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if (pI830->rotation != RR_Rotate_0)
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pScrn->fbOffset = pI830->RotatedMem.Start;
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else
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pScrn->fbOffset = pI830->FrontBuffer.Start;
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pScrn->fbOffset = pI830->FrontBuffer.Start;
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} else {
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I830Ptr pI8301 = I830PTR(pI830->entityPrivate->pScrn_1);
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if (pI830->rotation != RR_Rotate_0)
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pScrn->fbOffset = pI8301->RotatedMem2.Start;
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else
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pScrn->fbOffset = pI8301->FrontBuffer2.Start;
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pScrn->fbOffset = pI8301->FrontBuffer2.Start;
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}
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I830SelectBuffer(pScrn, I830_SELECT_FRONT);
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@ -1446,22 +1446,13 @@ I830UpdateDRIBuffers(ScrnInfoPtr pScrn, drmI830Sarea *sarea)
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sarea->front_tiled = pI830->front_tiled;
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sarea->back_tiled = pI830->back_tiled;
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sarea->depth_tiled = pI830->depth_tiled;
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sarea->rotated_tiled = pI830->rotated_tiled;
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#if 0
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sarea->rotated2_tiled = pI830->rotated2_tiled;
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#endif
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sarea->rotated_tiled = FALSE;
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if (pI830->rotation == RR_Rotate_0) {
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sarea->front_offset = pI830->FrontBuffer.Start;
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/* Don't use FrontBuffer.Size here as it includes the pixmap cache area
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* Instead, calculate the entire framebuffer.
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*/
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sarea->front_size = pI830->displayWidth * pScrn->virtualY * pI830->cpp;
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} else {
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/* Need to deal with rotated2 once we have dual head DRI */
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sarea->front_offset = pI830->RotatedMem.Start;
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sarea->front_size = pI830->RotatedMem.Size;
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}
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sarea->front_offset = pI830->FrontBuffer.Start;
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/* Don't use FrontBuffer.Size here as it includes the pixmap cache area
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* Instead, calculate the entire framebuffer.
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*/
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sarea->front_size = pI830->displayWidth * pScrn->virtualY * pI830->cpp;
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xf86DrvMsg(pScrn->scrnIndex, X_INFO,
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"[drm] init sarea width,height = %d x %d (pitch %d)\n",
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@ -1480,32 +1471,12 @@ I830UpdateDRIBuffers(ScrnInfoPtr pScrn, drmI830Sarea *sarea)
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sarea->virtualX = pScrn->virtualX;
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sarea->virtualY = pScrn->virtualY;
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switch (pI830->rotation) {
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case RR_Rotate_0:
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sarea->rotation = 0;
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break;
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case RR_Rotate_90:
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sarea->rotation = 90;
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break;
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case RR_Rotate_180:
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sarea->rotation = 180;
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break;
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case RR_Rotate_270:
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sarea->rotation = 270;
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break;
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default:
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sarea->rotation = 0;
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}
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if (pI830->rotation == RR_Rotate_0) {
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sarea->rotated_offset = -1;
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sarea->rotated_size = 0;
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}
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else {
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sarea->rotated_offset = pI830->FrontBuffer.Start;
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sarea->rotated_size = pI830->FrontBuffer.Size;
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}
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/* This is the original pitch */
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/* The rotation is now handled entirely by the X Server, so just leave the
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* DRI unaware.
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*/
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sarea->rotation = 0;
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sarea->rotated_offset = -1;
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sarea->rotated_size = 0;
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sarea->rotated_pitch = pI830->displayWidth;
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success = I830DRIMapScreenRegions(pScrn, sarea);
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@ -276,7 +276,6 @@ typedef enum {
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OPTION_MONITOR_LAYOUT,
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OPTION_CHECKDEVICES,
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OPTION_FIXEDPIPE,
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OPTION_ROTATE,
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OPTION_LINEARALLOC,
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OPTION_INTELTEXPOOL,
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OPTION_INTELMMSIZE
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@ -297,7 +296,6 @@ static OptionInfoRec I830Options[] = {
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{OPTION_MONITOR_LAYOUT, "MonitorLayout", OPTV_ANYSTR,{0}, FALSE},
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{OPTION_CHECKDEVICES, "CheckDevices",OPTV_BOOLEAN, {0}, FALSE},
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{OPTION_FIXEDPIPE, "FixedPipe", OPTV_ANYSTR, {0}, FALSE},
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{OPTION_ROTATE, "Rotate", OPTV_ANYSTR, {0}, FALSE},
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{OPTION_LINEARALLOC, "LinearAlloc", OPTV_INTEGER, {0}, FALSE},
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{OPTION_INTELTEXPOOL,"Legacy3D", OPTV_BOOLEAN, {0}, FALSE},
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{OPTION_INTELMMSIZE, "AperTexSize", OPTV_INTEGER, {0}, FALSE},
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@ -1368,17 +1366,9 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
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RestoreHWState(pScrn);
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pScrn->displayWidth = (pScrn->virtualX + 63) & ~63;
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/* XXX This should go away, replaced by xf86Crtc.c support for it */
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pI830->rotation = RR_Rotate_0;
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if ((s = xf86GetOptValString(pI830->Options, OPTION_ROTATE))) {
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pI830->InitialRotation = 0;
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if(!xf86NameCmp(s, "CW") || !xf86NameCmp(s, "270"))
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pI830->InitialRotation = 270;
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if(!xf86NameCmp(s, "CCW") || !xf86NameCmp(s, "90"))
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pI830->InitialRotation = 90;
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if(!xf86NameCmp(s, "180"))
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pI830->InitialRotation = 180;
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}
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/*
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* Let's setup the mobile systems to check the lid status
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@ -2495,19 +2485,6 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
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pScrn->displayWidth = pI830->displayWidth;
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if (I830IsPrimary(pScrn)) {
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/* Rotated Buffer */
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memset(&(pI830->RotatedMem), 0, sizeof(pI830->RotatedMem));
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pI830->RotatedMem.Key = -1;
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/* Rotated2 Buffer */
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memset(&(pI830->RotatedMem2), 0, sizeof(pI830->RotatedMem2));
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pI830->RotatedMem2.Key = -1;
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if (IS_I965G(pI830)) {
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memset(&(pI830->RotateStateMem), 0, sizeof(pI830->RotateStateMem));
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pI830->RotateStateMem.Key = -1;
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}
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}
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#ifdef HAS_MTRR_SUPPORT
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{
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int fd;
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@ -2906,29 +2883,6 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
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pI830->closing = FALSE;
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pI830->suspended = FALSE;
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switch (pI830->InitialRotation) {
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case 0:
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xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Rotating to 0 degrees\n");
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pI830->rotation = RR_Rotate_0;
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break;
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case 90:
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xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Rotating to 90 degrees\n");
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pI830->rotation = RR_Rotate_90;
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break;
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case 180:
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xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Rotating to 180 degrees\n");
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pI830->rotation = RR_Rotate_180;
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break;
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case 270:
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xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Rotating to 270 degrees\n");
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pI830->rotation = RR_Rotate_270;
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break;
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default:
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xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Bad rotation setting - defaulting to 0 degrees\n");
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pI830->rotation = RR_Rotate_0;
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break;
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}
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#ifdef XF86DRI_MM
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if (pI830->directRenderingEnabled && (pI830->mmModeFlags & I830_KERNEL_MM)) {
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unsigned long aperEnd = ROUND_DOWN_TO(pI830->FbMapSize, GTT_PAGE_SIZE)
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@ -3187,7 +3141,7 @@ I830EnterVT(int scrnIndex, int flags)
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pI830->currentMode = pScrn->currentMode;
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/* Force invarient state when rotated to be emitted */
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/* Force invarient 3D state to be emitted */
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*pI830->used3D = 1<<31;
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return TRUE;
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@ -471,156 +471,6 @@ IsTileable(ScrnInfoPtr pScrn, int pitch)
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}
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}
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Bool
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I830AllocateRotatedBuffer(ScrnInfoPtr pScrn, int flags)
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{
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I830Ptr pI830 = I830PTR(pScrn);
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unsigned long size, alloced;
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Bool dryrun = ((flags & ALLOCATE_DRY_RUN) != 0);
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int verbosity = dryrun ? 4 : 1;
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const char *s = dryrun ? "[dryrun] " : "";
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int align;
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Bool tileable;
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int lines;
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int height = (pI830->rotation & (RR_Rotate_0 | RR_Rotate_180)) ? pScrn->virtualY : pScrn->virtualX;
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/* Rotated Buffer */
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memset(&(pI830->RotatedMem), 0, sizeof(I830MemRange));
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pI830->RotatedMem.Key = -1;
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tileable = !(flags & ALLOC_NO_TILING) &&
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IsTileable(pScrn, pScrn->displayWidth * pI830->cpp);
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if (tileable) {
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/* Make the height a multiple of the tile height (16) */
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lines = (height + 15) / 16 * 16;
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} else {
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lines = height;
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}
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size = ROUND_TO_PAGE(pScrn->displayWidth * lines * pI830->cpp);
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/*
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* Try to allocate on the best tile-friendly boundaries.
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*/
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alloced = 0;
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if (tileable) {
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align = GetBestTileAlignment(size);
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for (align = GetBestTileAlignment(size); align >= (IS_I9XX(pI830) ? MB(1) : KB(512)); align >>= 1) {
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alloced = I830AllocVidMem(pScrn, &(pI830->RotatedMem),
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&(pI830->StolenPool), size, align,
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flags | FROM_ANYWHERE | ALLOCATE_AT_TOP |
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ALIGN_BOTH_ENDS);
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if (alloced >= size)
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break;
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}
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}
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if (alloced < size) {
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/* Give up on trying to tile */
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tileable = FALSE;
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size = ROUND_TO_PAGE(pScrn->displayWidth * height * pI830->cpp);
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align = GTT_PAGE_SIZE;
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alloced = I830AllocVidMem(pScrn, &(pI830->RotatedMem),
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&(pI830->StolenPool), size, align,
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flags | FROM_ANYWHERE | ALLOCATE_AT_TOP);
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}
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if (alloced < size) {
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if (!dryrun) {
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xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
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"Failed to allocate rotated buffer space.\n");
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}
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return FALSE;
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}
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xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
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"%sAllocated %ld kB for the rotated buffer at 0x%lx.\n", s,
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alloced / 1024, pI830->RotatedMem.Start);
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#define BRW_LINEAR_EXTRA (32*1024)
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if (IS_I965G(pI830)) {
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memset(&(pI830->RotateStateMem), 0, sizeof(I830MemRange));
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pI830->RotateStateMem.Key = -1;
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size = ROUND_TO_PAGE(BRW_LINEAR_EXTRA);
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align = GTT_PAGE_SIZE;
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alloced = I830AllocVidMem(pScrn, &(pI830->RotateStateMem),
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&(pI830->StolenPool), size, align,
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flags | FROM_ANYWHERE | ALLOCATE_AT_TOP);
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if (alloced < size) {
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if (!dryrun) {
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xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
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"G965: Failed to allocate rotate state buffer space.\n");
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}
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return FALSE;
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}
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xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
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"%sAllocated %ld kB for the G965 rotate state buffer at 0x%lx - 0x%lx.\n", s,
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alloced / 1024, pI830->RotateStateMem.Start, pI830->RotateStateMem.End);
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}
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return TRUE;
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}
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Bool
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I830AllocateRotated2Buffer(ScrnInfoPtr pScrn, int flags)
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{
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I830Ptr pI830 = I830PTR(pScrn);
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unsigned long size, alloced;
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Bool dryrun = ((flags & ALLOCATE_DRY_RUN) != 0);
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int verbosity = dryrun ? 4 : 1;
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const char *s = dryrun ? "[dryrun] " : "";
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int align;
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Bool tileable;
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int lines;
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I830EntPtr pI830Ent = pI830->entityPrivate;
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I830Ptr pI8302 = I830PTR(pI830Ent->pScrn_2);
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int height = (pI8302->rotation & (RR_Rotate_0 | RR_Rotate_180)) ? pI830Ent->pScrn_2->virtualY : pI830Ent->pScrn_2->virtualX;
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/* Rotated Buffer */
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memset(&(pI830->RotatedMem2), 0, sizeof(I830MemRange));
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pI830->RotatedMem2.Key = -1;
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tileable = !(flags & ALLOC_NO_TILING) &&
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IsTileable(pScrn, pI830Ent->pScrn_2->displayWidth * pI8302->cpp);
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if (tileable) {
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/* Make the height a multiple of the tile height (16) */
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lines = (height + 15) / 16 * 16;
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} else {
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lines = height;
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}
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size = ROUND_TO_PAGE(pI830Ent->pScrn_2->displayWidth * lines * pI8302->cpp);
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/*
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* Try to allocate on the best tile-friendly boundaries.
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*/
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alloced = 0;
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if (tileable) {
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align = GetBestTileAlignment(size);
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for (align = GetBestTileAlignment(size); align >= (IS_I9XX(pI830) ? MB(1) : KB(512)); align >>= 1) {
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alloced = I830AllocVidMem(pScrn, &(pI830->RotatedMem2),
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&(pI830->StolenPool), size, align,
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flags | FROM_ANYWHERE | ALLOCATE_AT_TOP |
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ALIGN_BOTH_ENDS);
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if (alloced >= size)
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break;
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}
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}
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if (alloced < size) {
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/* Give up on trying to tile */
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tileable = FALSE;
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size = ROUND_TO_PAGE(pI830Ent->pScrn_2->displayWidth * height * pI8302->cpp);
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align = GTT_PAGE_SIZE;
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alloced = I830AllocVidMem(pScrn, &(pI830->RotatedMem2),
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&(pI830->StolenPool), size, align,
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flags | FROM_ANYWHERE | ALLOCATE_AT_TOP);
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}
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if (alloced < size) {
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if (!dryrun) {
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xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
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"Failed to allocate rotated2 buffer space.\n");
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}
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return FALSE;
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}
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xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
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"%sAllocated %ld kB for the rotated2 buffer at 0x%lx.\n", s,
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alloced / 1024, pI830->RotatedMem2.Start);
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return TRUE;
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}
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static unsigned long
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GetFreeSpace(ScrnInfoPtr pScrn)
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{
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@ -1840,8 +1690,6 @@ I830SetupMemoryTiling(ScrnInfoPtr pScrn)
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pI830->front_tiled = FENCE_LINEAR;
|
||||
pI830->back_tiled = FENCE_LINEAR;
|
||||
pI830->depth_tiled = FENCE_LINEAR;
|
||||
pI830->rotated_tiled = FENCE_LINEAR;
|
||||
pI830->rotated2_tiled = FENCE_LINEAR;
|
||||
|
||||
if (pI830->allowPageFlip) {
|
||||
if (pI830->allowPageFlip && pI830->FrontBuffer.Alignment >= KB(512)) {
|
||||
|
|
@ -1888,35 +1736,7 @@ I830SetupMemoryTiling(ScrnInfoPtr pScrn)
|
|||
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
|
||||
"MakeTiles failed for the depth buffer.\n");
|
||||
}
|
||||
}
|
||||
|
||||
/* XXX tiled rotate mem not ready on G965*/
|
||||
|
||||
if(!IS_I965G(pI830)) {
|
||||
if (pI830->RotatedMem.Alignment >= KB(512)) {
|
||||
if (MakeTiles(pScrn, &(pI830->RotatedMem), FENCE_XMAJOR)) {
|
||||
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
|
||||
"Activating tiled memory for the rotated buffer.\n");
|
||||
pI830->rotated_tiled = FENCE_XMAJOR;
|
||||
} else {
|
||||
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
|
||||
"MakeTiles failed for the rotated buffer.\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
#if 0
|
||||
if (pI830->RotatedMem2.Alignment >= KB(512)) {
|
||||
if (MakeTiles(pScrn, &(pI830->RotatedMem2), FENCE_XMAJOR)) {
|
||||
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
|
||||
"Activating tiled memory for the rotated2 buffer.\n");
|
||||
pI830->rotated2_tiled = FENCE_XMAJOR;
|
||||
} else {
|
||||
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
|
||||
"MakeTiles failed for the rotated buffer.\n");
|
||||
}
|
||||
}
|
||||
#endif
|
||||
}
|
||||
}}
|
||||
#endif /* XF86DRI */
|
||||
|
||||
static Bool
|
||||
|
|
@ -1987,13 +1807,6 @@ I830BindAGPMemory(ScrnInfoPtr pScrn)
|
|||
return FALSE;
|
||||
}
|
||||
#endif
|
||||
if (pI830->RotatedMem.Start)
|
||||
if (!BindMemRange(pScrn, &(pI830->RotatedMem)))
|
||||
return FALSE;
|
||||
if (pI830->entityPrivate && pI830->entityPrivate->pScrn_2 &&
|
||||
pI830->RotatedMem2.Start)
|
||||
if (!BindMemRange(pScrn, &(pI830->RotatedMem2)))
|
||||
return FALSE;
|
||||
#ifdef XF86DRI
|
||||
if (pI830->directRenderingEnabled) {
|
||||
if (!BindMemRange(pScrn, &(pI830->ContextMem)))
|
||||
|
|
@ -2088,13 +1901,6 @@ I830UnbindAGPMemory(ScrnInfoPtr pScrn)
|
|||
return FALSE;
|
||||
}
|
||||
#endif
|
||||
if (pI830->RotatedMem.Start)
|
||||
if (!UnbindMemRange(pScrn, &(pI830->RotatedMem)))
|
||||
return FALSE;
|
||||
if (pI830->entityPrivate && pI830->entityPrivate->pScrn_2 &&
|
||||
pI830->RotatedMem2.Start)
|
||||
if (!UnbindMemRange(pScrn, &(pI830->RotatedMem2)))
|
||||
return FALSE;
|
||||
#ifdef XF86DRI
|
||||
if (pI830->directRenderingEnabled) {
|
||||
if (!UnbindMemRange(pScrn, &(pI830->ContextMem)))
|
||||
|
|
|
|||
1908
src/i830_rotate.c
1908
src/i830_rotate.c
File diff suppressed because it is too large
Load Diff
|
|
@ -280,8 +280,6 @@ CheckTiling(ScrnInfoPtr pScrn)
|
|||
if (IS_I965G(pI830)) {
|
||||
if (pI830->bufferOffset == pScrn->fbOffset && pI830->front_tiled == FENCE_XMAJOR)
|
||||
tiled = 1;
|
||||
if (pI830->bufferOffset == pI830->RotatedMem.Start && pI830->rotated_tiled == FENCE_XMAJOR)
|
||||
tiled = 1;
|
||||
if (pI830->bufferOffset == pI830->BackBuffer.Start && pI830->back_tiled == FENCE_XMAJOR)
|
||||
tiled = 1;
|
||||
/* not really supported as it's always YMajor tiled */
|
||||
|
|
|
|||
|
|
@ -1,17 +0,0 @@
|
|||
send (1) 0 g6<1>F g1.12<0,1,0>F math inv scalar mlen 1 rlen 1 { align1 };
|
||||
send (1) 0 g6.4<1>F g1.20<0,1,0>F math inv scalar mlen 1 rlen 1 { align1 };
|
||||
add (8) g7<1>F g4<8,8,1>F -g3<8,8,1>F { align1 };
|
||||
mul (1) g7<1>F g7<0,1,0>F g6<0,1,0>F { align1 };
|
||||
mul (1) g7.4<1>F g7.4<0,1,0>F g6.4<0,1,0>F { align1 };
|
||||
mov (8) m1<1>F g7<0,1,0>F { align1 };
|
||||
mov (8) m2<1>F g7.4<0,1,0>F { align1 };
|
||||
mov (8) m3<1>F g3<8,8,1>F { align1 };
|
||||
send (8) 0 null g0<8,8,1>F urb 0 transpose used complete mlen 4 rlen 0 { align1 EOT };
|
||||
nop;
|
||||
nop;
|
||||
nop;
|
||||
nop;
|
||||
nop;
|
||||
nop;
|
||||
nop;
|
||||
nop;
|
||||
|
|
@ -1,17 +0,0 @@
|
|||
send (1) 0 g6<1>F g1.20<0,1,0>F math inv scalar mlen 1 rlen 1 { align1 };
|
||||
send (1) 0 g6.4<1>F g1.12<0,1,0>F math inv scalar mlen 1 rlen 1 { align1 };
|
||||
add (8) g7<1>F g4<8,8,1>F -g3<8,8,1>F { align1 };
|
||||
mul (1) g7<1>F g7<0,1,0>F g6<0,1,0>F { align1 };
|
||||
mul (1) g7.4<1>F g7.4<0,1,0>F g6.4<0,1,0>F { align1 };
|
||||
mov (8) m1<1>F g7<0,1,0>F { align1 };
|
||||
mov (8) m2<1>F g7.4<0,1,0>F { align1 };
|
||||
mov (8) m3<1>F g3<8,8,1>F { align1 };
|
||||
send (8) 0 null g0<8,8,1>F urb 0 transpose used complete mlen 4 rlen 0 { align1 EOT };
|
||||
nop;
|
||||
nop;
|
||||
nop;
|
||||
nop;
|
||||
nop;
|
||||
nop;
|
||||
nop;
|
||||
nop;
|
||||
|
|
@ -1,17 +0,0 @@
|
|||
{ 0x00000031, 0x20c01fbd, 0x0000002c, 0x01110081 },
|
||||
{ 0x00000031, 0x20c41fbd, 0x00000034, 0x01110081 },
|
||||
{ 0x00600040, 0x20e077bd, 0x008d0080, 0x008d4060 },
|
||||
{ 0x00000041, 0x20e077bd, 0x000000e0, 0x000000c0 },
|
||||
{ 0x00000041, 0x20e477bd, 0x000000e4, 0x000000c4 },
|
||||
{ 0x00600001, 0x202003be, 0x000000e0, 0x00000000 },
|
||||
{ 0x00600001, 0x204003be, 0x000000e4, 0x00000000 },
|
||||
{ 0x00600001, 0x206003be, 0x008d0060, 0x00000000 },
|
||||
{ 0x00600031, 0x20001fbc, 0x008d0000, 0x8640c800 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
|
|
@ -1,17 +0,0 @@
|
|||
{ 0x00000031, 0x20c01fbd, 0x00000034, 0x01110081 },
|
||||
{ 0x00000031, 0x20c41fbd, 0x0000002c, 0x01110081 },
|
||||
{ 0x00600040, 0x20e077bd, 0x008d0080, 0x008d4060 },
|
||||
{ 0x00000041, 0x20e077bd, 0x000000e0, 0x000000c0 },
|
||||
{ 0x00000041, 0x20e477bd, 0x000000e4, 0x000000c4 },
|
||||
{ 0x00600001, 0x202003be, 0x000000e0, 0x00000000 },
|
||||
{ 0x00600001, 0x204003be, 0x000000e4, 0x00000000 },
|
||||
{ 0x00600001, 0x206003be, 0x008d0060, 0x00000000 },
|
||||
{ 0x00600031, 0x20001fbc, 0x008d0000, 0x8640c800 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
|
|
@ -1,123 +0,0 @@
|
|||
/* The initial payload of the thread is always g0.
|
||||
* WM_URB (incoming URB entries) is g3
|
||||
* X0_R is g4
|
||||
* X1_R is g5
|
||||
* Y0_R is g6
|
||||
* Y1_R is g7
|
||||
*/
|
||||
|
||||
/* Set up the X/Y screen coordinates of the pixels in our 4 subspans. Each
|
||||
* subspan is a 2x2 rectangle, and the screen x/y of the upper left of each
|
||||
* subspan are given in GRF register 1.2 through 1.5 (which, with the word
|
||||
* addressing below, are 1.4 through 1.11).
|
||||
*
|
||||
* The result is WM_X*_R and WM_Y*R being:
|
||||
*
|
||||
* X0: {ss0.x, ss0.x+1, ss0.x, ss0.x+1, ss1.x, ss1.x+1, ss1.x, ss1.x+y}
|
||||
* Y0: {ss0.y, ss0.y, ss0.y+1, ss0.y+1, ss1.y, ss1.y, ss1.y+1, ss1.y+1}
|
||||
* X1: {ss2.x, ss2.x+1, ss2.x, ss2.x+1, ss3.x, ss3.x+1, ss3.x, ss3.x+y}
|
||||
* Y1: {ss2.y, ss2.y, ss2.y+1, ss2.y+1, ss3.y, ss3.y, ss3.y+1, ss3.y+1}
|
||||
*/
|
||||
|
||||
/* Set up ss0.x coordinates*/
|
||||
mov (1) g4<1>F g1.8<0,1,0>UW { align1 };
|
||||
add (1) g4.4<1>F g1.8<0,1,0>UW 1UB { align1 };
|
||||
mov (1) g4.8<1>F g1.8<0,1,0>UW { align1 };
|
||||
add (1) g4.12<1>F g1.8<0,1,0>UW 1UB { align1 };
|
||||
/* Set up ss0.y coordinates */
|
||||
mov (1) g6<1>F g1.10<0,1,0>UW { align1 };
|
||||
mov (1) g6.4<1>F g1.10<0,1,0>UW { align1 };
|
||||
add (1) g6.8<1>F g1.10<0,1,0>UW 1UB { align1 };
|
||||
add (1) g6.12<1>F g1.10<0,1,0>UW 1UB { align1 };
|
||||
/* set up ss1.x coordinates */
|
||||
mov (1) g4.16<1>F g1.12<0,1,0>UW { align1 };
|
||||
add (1) g4.20<1>F g1.12<0,1,0>UW 1UB { align1 };
|
||||
mov (1) g4.24<1>F g1.12<0,1,0>UW { align1 };
|
||||
add (1) g4.28<1>F g1.12<0,1,0>UW 1UB { align1 };
|
||||
/* set up ss1.y coordinates */
|
||||
mov (1) g6.16<1>F g1.14<0,1,0>UW { align1 };
|
||||
mov (1) g6.20<1>F g1.14<0,1,0>UW { align1 };
|
||||
add (1) g6.24<1>F g1.14<0,1,0>UW 1UB { align1 };
|
||||
add (1) g6.28<1>F g1.14<0,1,0>UW 1UB { align1 };
|
||||
/* Set up ss2.x coordinates */
|
||||
mov (1) g5<1>F g1.16<0,1,0>UW { align1 };
|
||||
add (1) g5.4<1>F g1.16<0,1,0>UW 1UB { align1 };
|
||||
mov (1) g5.8<1>F g1.16<0,1,0>UW { align1 };
|
||||
add (1) g5.12<1>F g1.16<0,1,0>UW 1UB { align1 };
|
||||
/* Set up ss2.y coordinates */
|
||||
mov (1) g7<1>F g1.18<0,1,0>UW { align1 };
|
||||
mov (1) g7.4<1>F g1.18<0,1,0>UW { align1 };
|
||||
add (1) g7.8<1>F g1.18<0,1,0>UW 1UB { align1 };
|
||||
add (1) g7.12<1>F g1.18<0,1,0>UW 1UB { align1 };
|
||||
/* Set up ss3.x coordinates */
|
||||
mov (1) g5.16<1>F g1.20<0,1,0>UW { align1 };
|
||||
add (1) g5.20<1>F g1.20<0,1,0>UW 1UB { align1 };
|
||||
mov (1) g5.24<1>F g1.20<0,1,0>UW { align1 };
|
||||
add (1) g5.28<1>F g1.20<0,1,0>UW 1UB { align1 };
|
||||
/* Set up ss3.y coordinates */
|
||||
mov (1) g7.16<1>F g1.22<0,1,0>UW { align1 };
|
||||
mov (1) g7.20<1>F g1.22<0,1,0>UW { align1 };
|
||||
add (1) g7.24<1>F g1.22<0,1,0>UW 1UB { align1 };
|
||||
add (1) g7.28<1>F g1.22<0,1,0>UW 1UB { align1 };
|
||||
|
||||
/* Now, map these screen space coordinates into texture coordinates. */
|
||||
/* subtract screen-space X origin of vertex 0. */
|
||||
add (8) g4<1>F g4<8,8,1>F -g1<0,1,0>F { align1 };
|
||||
add (8) g5<1>F g5<8,8,1>F -g1<0,1,0>F { align1 };
|
||||
/* scale by texture X increment */
|
||||
mul (8) g4<1>F g4<8,8,1>F g3<0,1,0>F { align1 };
|
||||
mul (8) g5<1>F g5<8,8,1>F g3<0,1,0>F { align1 };
|
||||
/* add in texture X offset */
|
||||
add (8) g4<1>F g4<8,8,1>F g3.12<0,1,0>F { align1 };
|
||||
add (8) g5<1>F g5<8,8,1>F g3.12<0,1,0>F { align1 };
|
||||
/* subtract screen-space Y origin of vertex 0. */
|
||||
add (8) g6<1>F g6<8,8,1>F -g1.4<0,1,0>F { align1 };
|
||||
add (8) g7<1>F g7<8,8,1>F -g1.4<0,1,0>F { align1 };
|
||||
/* scale by texture Y increment */
|
||||
/* XXX: double check the fields in Cx,Cy,Co and attributes*/
|
||||
mul (8) g6<1>F g6<8,8,1>F g3.20<0,1,0>F { align1 };
|
||||
mul (8) g7<1>F g7<8,8,1>F g3.20<0,1,0>F { align1 };
|
||||
/* add in texture Y offset */
|
||||
add (8) g6<1>F g6<8,8,1>F g3.28<0,1,0>F { align1 };
|
||||
add (8) g7<1>F g7<8,8,1>F g3.28<0,1,0>F { align1 };
|
||||
/* sampler */
|
||||
mov (8) m1<1>F g4<8,8,1>F { align1 };
|
||||
mov (8) m2<1>F g5<8,8,1>F { align1 };
|
||||
mov (8) m3<1>F g6<8,8,1>F { align1 };
|
||||
mov (8) m4<1>F g7<8,8,1>F { align1 };
|
||||
|
||||
/*
|
||||
* g0 holds the PS thread payload, which (oddly) contains
|
||||
* precisely what the sampler wants to see in m0
|
||||
*/
|
||||
send (16) 0 g12<1>UW g0<8,8,1>UW sampler (1,0,F) mlen 5 rlen 8 { align1 };
|
||||
mov (8) g19<1>UD g19<8,8,1>UD { align1 };
|
||||
|
||||
mov (8) m2<1>F g12<8,8,1>F { align1 };
|
||||
mov (8) m3<1>F g14<8,8,1>F { align1 };
|
||||
mov (8) m4<1>F g16<8,8,1>F { align1 };
|
||||
mov (8) m5<1>F g18<8,8,1>F { align1 };
|
||||
mov (8) m6<1>F g13<8,8,1>F { align1 };
|
||||
mov (8) m7<1>F g15<8,8,1>F { align1 };
|
||||
mov (8) m8<1>F g17<8,8,1>F { align1 };
|
||||
mov (8) m9<1>F g19<8,8,1>F { align1 };
|
||||
|
||||
/* Pass through control information:
|
||||
*/
|
||||
mov (8) m1<1>UD g1<8,8,1>UD { align1 mask_disable };
|
||||
/* Send framebuffer write message: XXX: acc0? */
|
||||
send (16) 0 acc0<1>UW g0<8,8,1>UW write (
|
||||
0, /* binding table index 0 */
|
||||
8, /* pixel scoreboard clear */
|
||||
4, /* render target write */
|
||||
0 /* no write commit message */
|
||||
) mlen 10 rlen 0 { align1 EOT };
|
||||
/* padding */
|
||||
nop;
|
||||
nop;
|
||||
nop;
|
||||
nop;
|
||||
nop;
|
||||
nop;
|
||||
nop;
|
||||
nop;
|
||||
|
|
@ -1,127 +0,0 @@
|
|||
/* The initial payload of the thread is always g0.
|
||||
* WM_URB (incoming URB entries) is g3
|
||||
* X0_R is g4
|
||||
* X1_R is g5
|
||||
* Y0_R is g6
|
||||
* Y1_R is g7
|
||||
*/
|
||||
|
||||
/* Set up the X/Y screen coordinates of the pixels in our 4 subspans. Each
|
||||
* subspan is a 2x2 rectangle, and the screen x/y of the upper left of each
|
||||
* subspan are given in GRF register 1.2 through 1.5 (which, with the word
|
||||
* addressing below, are 1.4 through 1.11).
|
||||
*
|
||||
* The result is WM_X*_R and WM_Y*R being:
|
||||
*
|
||||
* X0: {ss0.x, ss0.x+1, ss0.x, ss0.x+1, ss1.x, ss1.x+1, ss1.x, ss1.x+y}
|
||||
* Y0: {ss0.y, ss0.y, ss0.y+1, ss0.y+1, ss1.y, ss1.y, ss1.y+1, ss1.y+1}
|
||||
* X1: {ss2.x, ss2.x+1, ss2.x, ss2.x+1, ss3.x, ss3.x+1, ss3.x, ss3.x+y}
|
||||
* Y1: {ss2.y, ss2.y, ss2.y+1, ss2.y+1, ss3.y, ss3.y, ss3.y+1, ss3.y+1}
|
||||
*/
|
||||
|
||||
/* Set up ss0.x coordinates*/
|
||||
mov (1) g4<1>F g1.8<0,1,0>UW { align1 };
|
||||
add (1) g4.4<1>F g1.8<0,1,0>UW 1UB { align1 };
|
||||
mov (1) g4.8<1>F g1.8<0,1,0>UW { align1 };
|
||||
add (1) g4.12<1>F g1.8<0,1,0>UW 1UB { align1 };
|
||||
/* Set up ss0.y coordinates */
|
||||
mov (1) g6<1>F g1.10<0,1,0>UW { align1 };
|
||||
mov (1) g6.4<1>F g1.10<0,1,0>UW { align1 };
|
||||
add (1) g6.8<1>F g1.10<0,1,0>UW 1UB { align1 };
|
||||
add (1) g6.12<1>F g1.10<0,1,0>UW 1UB { align1 };
|
||||
/* set up ss1.x coordinates */
|
||||
mov (1) g4.16<1>F g1.12<0,1,0>UW { align1 };
|
||||
add (1) g4.20<1>F g1.12<0,1,0>UW 1UB { align1 };
|
||||
mov (1) g4.24<1>F g1.12<0,1,0>UW { align1 };
|
||||
add (1) g4.28<1>F g1.12<0,1,0>UW 1UB { align1 };
|
||||
/* set up ss1.y coordinates */
|
||||
mov (1) g6.16<1>F g1.14<0,1,0>UW { align1 };
|
||||
mov (1) g6.20<1>F g1.14<0,1,0>UW { align1 };
|
||||
add (1) g6.24<1>F g1.14<0,1,0>UW 1UB { align1 };
|
||||
add (1) g6.28<1>F g1.14<0,1,0>UW 1UB { align1 };
|
||||
/* Set up ss2.x coordinates */
|
||||
mov (1) g5<1>F g1.16<0,1,0>UW { align1 };
|
||||
add (1) g5.4<1>F g1.16<0,1,0>UW 1UB { align1 };
|
||||
mov (1) g5.8<1>F g1.16<0,1,0>UW { align1 };
|
||||
add (1) g5.12<1>F g1.16<0,1,0>UW 1UB { align1 };
|
||||
/* Set up ss2.y coordinates */
|
||||
mov (1) g7<1>F g1.18<0,1,0>UW { align1 };
|
||||
mov (1) g7.4<1>F g1.18<0,1,0>UW { align1 };
|
||||
add (1) g7.8<1>F g1.18<0,1,0>UW 1UB { align1 };
|
||||
add (1) g7.12<1>F g1.18<0,1,0>UW 1UB { align1 };
|
||||
/* Set up ss3.x coordinates */
|
||||
mov (1) g5.16<1>F g1.20<0,1,0>UW { align1 };
|
||||
add (1) g5.20<1>F g1.20<0,1,0>UW 1UB { align1 };
|
||||
mov (1) g5.24<1>F g1.20<0,1,0>UW { align1 };
|
||||
add (1) g5.28<1>F g1.20<0,1,0>UW 1UB { align1 };
|
||||
/* Set up ss3.y coordinates */
|
||||
mov (1) g7.16<1>F g1.22<0,1,0>UW { align1 };
|
||||
mov (1) g7.20<1>F g1.22<0,1,0>UW { align1 };
|
||||
add (1) g7.24<1>F g1.22<0,1,0>UW 1UB { align1 };
|
||||
add (1) g7.28<1>F g1.22<0,1,0>UW 1UB { align1 };
|
||||
|
||||
/* Now, map these screen space coordinates into texture coordinates. */
|
||||
/* XXX: convert it to calculate (u,v) in 90 and 270 case */
|
||||
/* subtract screen-space Y origin of vertex 0. */
|
||||
add (8) g6<1>F g6<8,8,1>F -g1.4<0,1,0>F { align1 };
|
||||
add (8) g7<1>F g7<8,8,1>F -g1.4<0,1,0>F { align1 };
|
||||
|
||||
/* (Yp - Ystart) * Cx */
|
||||
mul (8) g6<1>F g6<8,8,1>F g3<0,1,0>F { align1 };
|
||||
mul (8) g7<1>F g7<8,8,1>F g3<0,1,0>F { align1 };
|
||||
|
||||
/* scale by texture Y increment */
|
||||
add (8) g6<1>F g6<8,8,1>F g3.12<0,1,0>F { align1 };
|
||||
add (8) g7<1>F g7<8,8,1>F g3.12<0,1,0>F { align1 };
|
||||
|
||||
/* subtract screen-space X origin of vertex 0. */
|
||||
add (8) g4<1>F g4<8,8,1>F -g1<0,1,0>F { align1 };
|
||||
add (8) g5<1>F g5<8,8,1>F -g1<0,1,0>F { align1 };
|
||||
/* scale by texture X increment */
|
||||
mul (8) g4<1>F g4<8,8,1>F g3.20<0,1,0>F { align1 };
|
||||
mul (8) g5<1>F g5<8,8,1>F g3.20<0,1,0>F { align1 };
|
||||
/* add in texture X offset */
|
||||
add (8) g4<1>F g4<8,8,1>F g3.28<0,1,0>F { align1 };
|
||||
add (8) g5<1>F g5<8,8,1>F g3.28<0,1,0>F { align1 };
|
||||
|
||||
/* sampler */
|
||||
mov (8) m1<1>F g6<8,8,1>F { align1 };
|
||||
mov (8) m2<1>F g7<8,8,1>F { align1 };
|
||||
mov (8) m3<1>F g4<8,8,1>F { align1 };
|
||||
mov (8) m4<1>F g5<8,8,1>F { align1 };
|
||||
|
||||
/*
|
||||
* g0 holds the PS thread payload, which (oddly) contains
|
||||
* precisely what the sampler wants to see in m0
|
||||
*/
|
||||
send (16) 0 g12<1>UW g0<8,8,1>UW sampler (1,0,F) mlen 5 rlen 8 { align1 };
|
||||
mov (8) g19<1>UD g19<8,8,1>UD { align1 };
|
||||
|
||||
mov (8) m2<1>F g12<8,8,1>F { align1 };
|
||||
mov (8) m3<1>F g14<8,8,1>F { align1 };
|
||||
mov (8) m4<1>F g16<8,8,1>F { align1 };
|
||||
mov (8) m5<1>F g18<8,8,1>F { align1 };
|
||||
mov (8) m6<1>F g13<8,8,1>F { align1 };
|
||||
mov (8) m7<1>F g15<8,8,1>F { align1 };
|
||||
mov (8) m8<1>F g17<8,8,1>F { align1 };
|
||||
mov (8) m9<1>F g19<8,8,1>F { align1 };
|
||||
|
||||
/* Pass through control information:
|
||||
*/
|
||||
mov (8) m1<1>UD g1<8,8,1>UD { align1 mask_disable };
|
||||
/* Send framebuffer write message: XXX: acc0? */
|
||||
send (16) 0 acc0<1>UW g0<8,8,1>UW write (
|
||||
0, /* binding table index 0 */
|
||||
8, /* pixel scoreboard clear */
|
||||
4, /* render target write */
|
||||
0 /* no write commit message */
|
||||
) mlen 10 rlen 0 { align1 EOT };
|
||||
/* padding */
|
||||
nop;
|
||||
nop;
|
||||
nop;
|
||||
nop;
|
||||
nop;
|
||||
nop;
|
||||
nop;
|
||||
nop;
|
||||
|
|
@ -1,68 +0,0 @@
|
|||
{ 0x00000001, 0x2080013d, 0x00000028, 0x00000000 },
|
||||
{ 0x00000040, 0x20840d3d, 0x00000028, 0x00000001 },
|
||||
{ 0x00000001, 0x2088013d, 0x00000028, 0x00000000 },
|
||||
{ 0x00000040, 0x208c0d3d, 0x00000028, 0x00000001 },
|
||||
{ 0x00000001, 0x20c0013d, 0x0000002a, 0x00000000 },
|
||||
{ 0x00000001, 0x20c4013d, 0x0000002a, 0x00000000 },
|
||||
{ 0x00000040, 0x20c80d3d, 0x0000002a, 0x00000001 },
|
||||
{ 0x00000040, 0x20cc0d3d, 0x0000002a, 0x00000001 },
|
||||
{ 0x00000001, 0x2090013d, 0x0000002c, 0x00000000 },
|
||||
{ 0x00000040, 0x20940d3d, 0x0000002c, 0x00000001 },
|
||||
{ 0x00000001, 0x2098013d, 0x0000002c, 0x00000000 },
|
||||
{ 0x00000040, 0x209c0d3d, 0x0000002c, 0x00000001 },
|
||||
{ 0x00000001, 0x20d0013d, 0x0000002e, 0x00000000 },
|
||||
{ 0x00000001, 0x20d4013d, 0x0000002e, 0x00000000 },
|
||||
{ 0x00000040, 0x20d80d3d, 0x0000002e, 0x00000001 },
|
||||
{ 0x00000040, 0x20dc0d3d, 0x0000002e, 0x00000001 },
|
||||
{ 0x00000001, 0x20a0013d, 0x00000030, 0x00000000 },
|
||||
{ 0x00000040, 0x20a40d3d, 0x00000030, 0x00000001 },
|
||||
{ 0x00000001, 0x20a8013d, 0x00000030, 0x00000000 },
|
||||
{ 0x00000040, 0x20ac0d3d, 0x00000030, 0x00000001 },
|
||||
{ 0x00000001, 0x20e0013d, 0x00000032, 0x00000000 },
|
||||
{ 0x00000001, 0x20e4013d, 0x00000032, 0x00000000 },
|
||||
{ 0x00000040, 0x20e80d3d, 0x00000032, 0x00000001 },
|
||||
{ 0x00000040, 0x20ec0d3d, 0x00000032, 0x00000001 },
|
||||
{ 0x00000001, 0x20b0013d, 0x00000034, 0x00000000 },
|
||||
{ 0x00000040, 0x20b40d3d, 0x00000034, 0x00000001 },
|
||||
{ 0x00000001, 0x20b8013d, 0x00000034, 0x00000000 },
|
||||
{ 0x00000040, 0x20bc0d3d, 0x00000034, 0x00000001 },
|
||||
{ 0x00000001, 0x20f0013d, 0x00000036, 0x00000000 },
|
||||
{ 0x00000001, 0x20f4013d, 0x00000036, 0x00000000 },
|
||||
{ 0x00000040, 0x20f80d3d, 0x00000036, 0x00000001 },
|
||||
{ 0x00000040, 0x20fc0d3d, 0x00000036, 0x00000001 },
|
||||
{ 0x00600040, 0x208077bd, 0x008d0080, 0x00004020 },
|
||||
{ 0x00600040, 0x20a077bd, 0x008d00a0, 0x00004020 },
|
||||
{ 0x00600041, 0x208077bd, 0x008d0080, 0x00000060 },
|
||||
{ 0x00600041, 0x20a077bd, 0x008d00a0, 0x00000060 },
|
||||
{ 0x00600040, 0x208077bd, 0x008d0080, 0x0000006c },
|
||||
{ 0x00600040, 0x20a077bd, 0x008d00a0, 0x0000006c },
|
||||
{ 0x00600040, 0x20c077bd, 0x008d00c0, 0x00004024 },
|
||||
{ 0x00600040, 0x20e077bd, 0x008d00e0, 0x00004024 },
|
||||
{ 0x00600041, 0x20c077bd, 0x008d00c0, 0x00000074 },
|
||||
{ 0x00600041, 0x20e077bd, 0x008d00e0, 0x00000074 },
|
||||
{ 0x00600040, 0x20c077bd, 0x008d00c0, 0x0000007c },
|
||||
{ 0x00600040, 0x20e077bd, 0x008d00e0, 0x0000007c },
|
||||
{ 0x00600001, 0x202003be, 0x008d0080, 0x00000000 },
|
||||
{ 0x00600001, 0x204003be, 0x008d00a0, 0x00000000 },
|
||||
{ 0x00600001, 0x206003be, 0x008d00c0, 0x00000000 },
|
||||
{ 0x00600001, 0x208003be, 0x008d00e0, 0x00000000 },
|
||||
{ 0x00800031, 0x21801d29, 0x008d0000, 0x02580001 },
|
||||
{ 0x00600001, 0x22600021, 0x008d0260, 0x00000000 },
|
||||
{ 0x00600001, 0x204003be, 0x008d0180, 0x00000000 },
|
||||
{ 0x00600001, 0x206003be, 0x008d01c0, 0x00000000 },
|
||||
{ 0x00600001, 0x208003be, 0x008d0200, 0x00000000 },
|
||||
{ 0x00600001, 0x20a003be, 0x008d0240, 0x00000000 },
|
||||
{ 0x00600001, 0x20c003be, 0x008d01a0, 0x00000000 },
|
||||
{ 0x00600001, 0x20e003be, 0x008d01e0, 0x00000000 },
|
||||
{ 0x00600001, 0x210003be, 0x008d0220, 0x00000000 },
|
||||
{ 0x00600001, 0x212003be, 0x008d0260, 0x00000000 },
|
||||
{ 0x00600201, 0x20200022, 0x008d0020, 0x00000000 },
|
||||
{ 0x00800031, 0x24001d28, 0x008d0000, 0x85a04800 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
|
|
@ -1,68 +0,0 @@
|
|||
{ 0x00000001, 0x2080013d, 0x00000028, 0x00000000 },
|
||||
{ 0x00000040, 0x20840d3d, 0x00000028, 0x00000001 },
|
||||
{ 0x00000001, 0x2088013d, 0x00000028, 0x00000000 },
|
||||
{ 0x00000040, 0x208c0d3d, 0x00000028, 0x00000001 },
|
||||
{ 0x00000001, 0x20c0013d, 0x0000002a, 0x00000000 },
|
||||
{ 0x00000001, 0x20c4013d, 0x0000002a, 0x00000000 },
|
||||
{ 0x00000040, 0x20c80d3d, 0x0000002a, 0x00000001 },
|
||||
{ 0x00000040, 0x20cc0d3d, 0x0000002a, 0x00000001 },
|
||||
{ 0x00000001, 0x2090013d, 0x0000002c, 0x00000000 },
|
||||
{ 0x00000040, 0x20940d3d, 0x0000002c, 0x00000001 },
|
||||
{ 0x00000001, 0x2098013d, 0x0000002c, 0x00000000 },
|
||||
{ 0x00000040, 0x209c0d3d, 0x0000002c, 0x00000001 },
|
||||
{ 0x00000001, 0x20d0013d, 0x0000002e, 0x00000000 },
|
||||
{ 0x00000001, 0x20d4013d, 0x0000002e, 0x00000000 },
|
||||
{ 0x00000040, 0x20d80d3d, 0x0000002e, 0x00000001 },
|
||||
{ 0x00000040, 0x20dc0d3d, 0x0000002e, 0x00000001 },
|
||||
{ 0x00000001, 0x20a0013d, 0x00000030, 0x00000000 },
|
||||
{ 0x00000040, 0x20a40d3d, 0x00000030, 0x00000001 },
|
||||
{ 0x00000001, 0x20a8013d, 0x00000030, 0x00000000 },
|
||||
{ 0x00000040, 0x20ac0d3d, 0x00000030, 0x00000001 },
|
||||
{ 0x00000001, 0x20e0013d, 0x00000032, 0x00000000 },
|
||||
{ 0x00000001, 0x20e4013d, 0x00000032, 0x00000000 },
|
||||
{ 0x00000040, 0x20e80d3d, 0x00000032, 0x00000001 },
|
||||
{ 0x00000040, 0x20ec0d3d, 0x00000032, 0x00000001 },
|
||||
{ 0x00000001, 0x20b0013d, 0x00000034, 0x00000000 },
|
||||
{ 0x00000040, 0x20b40d3d, 0x00000034, 0x00000001 },
|
||||
{ 0x00000001, 0x20b8013d, 0x00000034, 0x00000000 },
|
||||
{ 0x00000040, 0x20bc0d3d, 0x00000034, 0x00000001 },
|
||||
{ 0x00000001, 0x20f0013d, 0x00000036, 0x00000000 },
|
||||
{ 0x00000001, 0x20f4013d, 0x00000036, 0x00000000 },
|
||||
{ 0x00000040, 0x20f80d3d, 0x00000036, 0x00000001 },
|
||||
{ 0x00000040, 0x20fc0d3d, 0x00000036, 0x00000001 },
|
||||
{ 0x00600040, 0x20c077bd, 0x008d00c0, 0x00004024 },
|
||||
{ 0x00600040, 0x20e077bd, 0x008d00e0, 0x00004024 },
|
||||
{ 0x00600041, 0x20c077bd, 0x008d00c0, 0x00000060 },
|
||||
{ 0x00600041, 0x20e077bd, 0x008d00e0, 0x00000060 },
|
||||
{ 0x00600040, 0x20c077bd, 0x008d00c0, 0x0000006c },
|
||||
{ 0x00600040, 0x20e077bd, 0x008d00e0, 0x0000006c },
|
||||
{ 0x00600040, 0x208077bd, 0x008d0080, 0x00004020 },
|
||||
{ 0x00600040, 0x20a077bd, 0x008d00a0, 0x00004020 },
|
||||
{ 0x00600041, 0x208077bd, 0x008d0080, 0x00000074 },
|
||||
{ 0x00600041, 0x20a077bd, 0x008d00a0, 0x00000074 },
|
||||
{ 0x00600040, 0x208077bd, 0x008d0080, 0x0000007c },
|
||||
{ 0x00600040, 0x20a077bd, 0x008d00a0, 0x0000007c },
|
||||
{ 0x00600001, 0x202003be, 0x008d00c0, 0x00000000 },
|
||||
{ 0x00600001, 0x204003be, 0x008d00e0, 0x00000000 },
|
||||
{ 0x00600001, 0x206003be, 0x008d0080, 0x00000000 },
|
||||
{ 0x00600001, 0x208003be, 0x008d00a0, 0x00000000 },
|
||||
{ 0x00800031, 0x21801d29, 0x008d0000, 0x02580001 },
|
||||
{ 0x00600001, 0x22600021, 0x008d0260, 0x00000000 },
|
||||
{ 0x00600001, 0x204003be, 0x008d0180, 0x00000000 },
|
||||
{ 0x00600001, 0x206003be, 0x008d01c0, 0x00000000 },
|
||||
{ 0x00600001, 0x208003be, 0x008d0200, 0x00000000 },
|
||||
{ 0x00600001, 0x20a003be, 0x008d0240, 0x00000000 },
|
||||
{ 0x00600001, 0x20c003be, 0x008d01a0, 0x00000000 },
|
||||
{ 0x00600001, 0x20e003be, 0x008d01e0, 0x00000000 },
|
||||
{ 0x00600001, 0x210003be, 0x008d0220, 0x00000000 },
|
||||
{ 0x00600001, 0x212003be, 0x008d0260, 0x00000000 },
|
||||
{ 0x00600201, 0x20200022, 0x008d0020, 0x00000000 },
|
||||
{ 0x00800031, 0x24001d28, 0x008d0000, 0x85a04800 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
Loading…
Reference in New Issue