From 770a953ff03bb8328c3f29e274d225528840f30c Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Sat, 31 Dec 2011 17:19:08 +0000 Subject: [PATCH] uxa/video: Clear all state structures before uploading A regression from eb859f644633e left some of the state uninitialised before uploading to the GPU leading to undefined behaviour. Reported-by: Alexey Shumitsky Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44338 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44252 Signed-off-by: Chris Wilson --- src/i965_video.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/i965_video.c b/src/i965_video.c index d14fb669..c94f5305 100644 --- a/src/i965_video.c +++ b/src/i965_video.c @@ -588,6 +588,7 @@ static drm_intel_bo *gen7_create_sampler_state(ScrnInfoPtr scrn) intel_screen_private *intel = intel_get_screen_private(scrn); struct gen7_sampler_state sampler_state; + memset(&sampler_state, 0, sizeof(sampler_state)); sampler_state.ss0.min_filter = BRW_MAPFILTER_LINEAR; sampler_state.ss0.mag_filter = BRW_MAPFILTER_LINEAR; sampler_state.ss3.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP; @@ -605,6 +606,7 @@ static drm_intel_bo *i965_create_vs_state(ScrnInfoPtr scrn) struct brw_vs_unit_state vs_state; /* Set up the vertex shader to be disabled (passthrough) */ + memset(&vs_state, 0, sizeof(vs_state)); if (IS_GEN5(intel)) vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES >> 2; else @@ -794,6 +796,7 @@ static drm_intel_bo *i965_create_cc_vp_state(ScrnInfoPtr scrn) intel_screen_private *intel = intel_get_screen_private(scrn); struct brw_cc_viewport cc_viewport; + memset(&cc_viewport, 0, sizeof(cc_viewport)); cc_viewport.min_depth = -1.e35; cc_viewport.max_depth = 1.e35; @@ -1360,6 +1363,7 @@ gen6_create_cc_state(ScrnInfoPtr scrn) intel_screen_private *intel = intel_get_screen_private(scrn); struct gen6_color_calc_state cc_state; + memset(&cc_state, 0, sizeof(cc_state)); cc_state.constant_r = 1.0; cc_state.constant_g = 0.0; cc_state.constant_b = 1.0; @@ -1376,6 +1380,7 @@ gen6_create_blend_state(ScrnInfoPtr scrn) intel_screen_private *intel = intel_get_screen_private(scrn); struct gen6_blend_state blend_state; + memset(&blend_state, 0, sizeof(blend_state)); blend_state.blend1.logic_op_enable = 1; blend_state.blend1.logic_op_func = 0xc; blend_state.blend1.pre_blend_clamp_enable = 1;