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Merge branch 'modesetting-origin' into modesetting

This commit is contained in:
Keith Packard 2007-03-03 23:13:03 -08:00
parent dd24d2a082 435d35558d
commit 7d08f720a9
21 changed files with 2397 additions and 2459 deletions
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4
configure.ac
View File

@ -87,6 +87,9 @@ XORG_DRIVER_CHECK_EXT(DPMSExtension, xextproto)
PKG_CHECK_MODULES(XORG, [xorg-server xproto xvmc fontsproto $REQUIRED_MODULES])
sdkdir=$(pkg-config --variable=sdkdir xorg-server)
PKG_CHECK_MODULES([PCIACCESS], [pciaccess >= 0.5.0], have_pciaccess=yes, have_pciaccess=no)
AM_CONDITIONAL(HAVE_PCIACCESS, test "x$have_pciaccess" = xyes)
# Checks for libraries.
# Checks for header files.
@ -200,6 +203,7 @@ AC_OUTPUT([
src/ch7017/Makefile
src/ch7xxx/Makefile
src/ivch/Makefile
src/reg_dumper/Makefile
src/sil164/Makefile
man/Makefile
])

6
src/Makefile.am
View File

@ -18,7 +18,11 @@
# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
SUBDIRS = xvmc bios_reader ch7017 ch7xxx ivch sil164
if HAVE_PCIACCESS
REGDUMPER = reg_dumper
endif
SUBDIRS = xvmc bios_reader ch7017 ch7xxx ivch sil164 $(REGDUMPER)
# this is obnoxious:
# -module lets us name the module exactly how we want

39
src/common.h
View File

@ -72,6 +72,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define DELAY(x) do {;} while (0)
#endif
#ifndef REG_DUMPER
/* I830 hooks for the I810 driver setup/probe. */
extern const OptionInfoRec *I830AvailableOptions(int chipid, int busid);
extern void I830InitpScrn(ScrnInfoPtr pScrn);
@ -130,6 +131,43 @@ extern void I830DPRINTF_stub(const char *filename, int line,
outring &= ringmask; \
} while (0)
static inline void memset_volatile(volatile void *b, int c, size_t len)
{
int i;
for (i = 0; i < len; i++)
((volatile char *)b)[i] = c;
}
static inline void memcpy_volatile(volatile void *dst, const void *src,
size_t len)
{
int i;
for (i = 0; i < len; i++)
((volatile char *)dst)[i] = ((volatile char *)src)[i];
}
/** Copies a given number of bytes to the ring */
#define OUT_RING_COPY(n, ptr) do { \
if (I810_DEBUG & DEBUG_VERBOSE_RING) \
ErrorF("OUT_RING_DATA %d bytes\n", n); \
memcpy_volatile(virt + outring, ptr, n); \
outring += n; \
ringused += n; \
outring &= ringmask; \
} while (0)
/** Pads the ring with a given number of zero bytes */
#define OUT_RING_PAD(n) do { \
if (I810_DEBUG & DEBUG_VERBOSE_RING) \
ErrorF("OUT_RING_PAD %d bytes\n", n); \
memset_volatile(virt + outring, 0, n); \
outring += n; \
ringused += n; \
outring &= ringmask; \
} while (0)
union intfloat {
float f;
unsigned int ui;
@ -242,6 +280,7 @@ extern int I810_DEBUG;
#define DEBUG_ALWAYS_SYNC 0x80
#define DEBUG_VERBOSE_DRI 0x100
#define DEBUG_VERBOSE_BIOS 0x200
#endif /* !REG_DUMPER */
/* Size of the mmio region.
*/

29
src/i810_reg.h
View File

@ -299,6 +299,20 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define VCLK_DIVISOR_VGA0 0x6000
#define VCLK_DIVISOR_VGA1 0x6004
#define VCLK_POST_DIV 0x6010
/** Selects a post divisor of 4 instead of 2. */
# define VGA1_PD_P2_DIV_4 (1 << 15)
/** Overrides the p2 post divisor field */
# define VGA1_PD_P1_DIV_2 (1 << 13)
# define VGA1_PD_P1_SHIFT 8
/** P1 value is 2 greater than this field */
# define VGA1_PD_P1_MASK (0x1f << 8)
/** Selects a post divisor of 4 instead of 2. */
# define VGA0_PD_P2_DIV_4 (1 << 7)
/** Overrides the p2 post divisor field */
# define VGA0_PD_P1_DIV_2 (1 << 5)
# define VGA0_PD_P1_SHIFT 0
/** P1 value is 2 greater than this field */
# define VGA0_PD_P1_MASK (0x1f << 0)
#define POST_DIV_SELECT 0x70
#define POST_DIV_1 0x00
@ -488,6 +502,8 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define I915G_FENCE_SIZE_32M 0x00000500
#define I915G_FENCE_SIZE_64M 0x00000600
#define I915G_FENCE_SIZE_128M 0x00000700
#define I965_FENCE_X_MAJOR 0x00000000
#define I965_FENCE_Y_MAJOR 0x00000002
#define FENCE_PITCH_1 0x00000000
#define FENCE_PITCH_2 0x00000010
#define FENCE_PITCH_4 0x00000020
@ -845,9 +861,18 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
# define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */
# define DPLL_P2_CLOCK_DIV_MASK 0x03000000 /* i915 */
# define DPLL_FPA01_P1_POST_DIV_MASK 0x00ff0000 /* i915 */
/**
* The i830 generation, in DAC/serial mode, defines p1 as two plus this
* bitfield, or just 2 if PLL_P1_DIVIDE_BY_TWO is set.
*/
# define DPLL_FPA01_P1_POST_DIV_MASK_I830 0x001f0000
/**
* The i830 generation, in LVDS mode, defines P1 as the bit number set within
* this field (only one bit may be set).
*/
# define DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS 0x003f0000
# define DPLL_FPA01_P1_POST_DIV_SHIFT 16
# define PLL_P2_DIVIDE_BY_4 (1 << 23) /* i830, required in DVO non-gang */
# define DPLL_FPA01_P1_POS_DIV_MASK_I830 0x001f0000 /* i830 */
# define PLL_P1_DIVIDE_BY_TWO (1 << 21) /* i830 */
# define PLL_REF_INPUT_DREFCLK (0 << 13)
# define PLL_REF_INPUT_TVCLKINA (1 << 13) /* i830 */
@ -1881,6 +1906,8 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define SRC_COPY_BLT_WRITE_ALPHA (1<<21)
#define SRC_COPY_BLT_WRITE_RGB (1<<20)
#define XY_PAT_BLT_IMMEDIATE ((2<<29)|(0x72<<22))
#define XY_MONO_PAT_BLT_CMD ((0x2<<29)|(0x52<<22)|0x7)
#define XY_MONO_PAT_VERT_SEED ((1<<10)|(1<<9)|(1<<8))
#define XY_MONO_PAT_HORT_SEED ((1<<14)|(1<<13)|(1<<12))

179
src/i830.h
View File

@ -113,40 +113,58 @@ typedef CARD8(*I830ReadIndexedByteFunc)(I830Ptr pI830, IOADDRESS addr,
typedef void (*I830WriteByteFunc)(I830Ptr pI830, IOADDRESS addr, CARD8 value);
typedef CARD8(*I830ReadByteFunc)(I830Ptr pI830, IOADDRESS addr);
/* Linear region allocated in framebuffer. */
typedef struct _I830MemPool *I830MemPoolPtr;
typedef struct _I830MemRange *I830MemRangePtr;
typedef struct _I830MemRange {
long Start;
long End;
long Size;
unsigned long Physical;
unsigned long Offset; /* Offset of AGP-allocated portion */
unsigned long Alignment;
int Key;
I830MemPoolPtr Pool;
} I830MemRange;
/** Record of a linear allocation in the aperture. */
typedef struct _i830_memory i830_memory;
struct _i830_memory {
/** Offset of the allocation in card VM */
unsigned long offset;
/** End of the allocation in card VM */
unsigned long end;
/**
* Requested size of the allocation: doesn't count padding.
*
* Any bound memory will cover offset to (offset + size).
*/
unsigned long size;
/**
* Physical (or more properly, bus) address of the allocation.
* Only set if requested during allocation.
*/
unsigned long bus_addr;
/** AGP memory handle */
int key;
/**
* Whether or not the AGP memory (if any) is currently bound.
*/
Bool bound;
/**
* Offset that the AGP-allocated memory (if any) is to be bound to.
*
* This is either @offset or pI830->stolen_size
*/
unsigned long agp_offset;
typedef struct _I830MemPool {
I830MemRange Total;
I830MemRange Free;
I830MemRange Fixed;
I830MemRange Allocated;
} I830MemPool;
/** Description of the allocation, for logging */
char *name;
/** @{
* Memory allocator linked list pointers
*/
i830_memory *next;
i830_memory *prev;
/** @} */
};
typedef struct {
int tail_mask;
I830MemRange mem;
i830_memory *mem;
unsigned char *virtual_start;
int head;
int tail;
int space;
} I830RingBuffer;
typedef struct {
unsigned int Fence[FENCE_NEW_NR * 2];
} I830RegRec, *I830RegPtr;
typedef struct {
int lastInstance;
int refCount;
@ -206,8 +224,8 @@ typedef struct _I830CrtcPrivateRec {
ExaOffscreenArea *rotate_mem_exa;
#endif
I830MemRange cursor_mem;
I830MemRange cursor_mem_argb;
i830_memory *cursor_mem;
i830_memory *cursor_mem_argb;
} I830CrtcPrivateRec, *I830CrtcPrivatePtr;
#define I830CrtcPrivate(c) ((I830CrtcPrivatePtr) (c)->driver_private)
@ -249,50 +267,41 @@ typedef struct _I830Rec {
/* These are set in PreInit and never changed. */
long FbMapSize;
long TotalVideoRam;
I830MemRange StolenMemory; /* pre-allocated memory */
/* These change according to what has been allocated. */
long FreeMemory;
I830MemRange MemoryAperture;
I830MemPool StolenPool;
long allocatedMemory;
i830_memory *memory_list; /**< Linked list of video memory allocations */
long stolen_size; /**< bytes of pre-bound stolen memory */
int gtt_acquired; /**< whether we currently own the AGP */
/* Regions allocated either from the above pools, or from agpgart. */
/* for single and dual head configurations */
I830MemRange FrontBuffer;
I830MemRange FrontBuffer2;
I830MemRange Scratch;
I830MemRange Scratch2;
i830_memory *front_buffer;
i830_memory *front_buffer_2;
i830_memory *xaa_scratch;
i830_memory *xaa_scratch_2;
#ifdef I830_USE_EXA
I830MemRange Offscreen;
I830MemRange EXAStateMem; /* specific exa state for G965 */
i830_memory *exa_offscreen;
i830_memory *exa_965_state;
#endif
/* Regions allocated either from the above pools, or from agpgart. */
I830RingBuffer *LpRing;
#if REMAP_RESERVED
I830MemRange Dummy;
#endif
#ifdef I830_XV
/* For Xvideo */
I830MemRange *OverlayMem;
I830MemRange LinearMem;
i830_memory *overlay_regs;
i830_memory *xaa_linear;
#endif
unsigned long LinearAlloc;
XF86ModReqInfo shadowReq; /* to test for later libshadow */
Rotation rotation;
int displayWidth;
void (*PointerMoved)(int, int, int);
CreateScreenResourcesProcPtr CreateScreenResources;
int *used3D;
I830MemRange ContextMem;
i830_memory *logical_context;
#ifdef XF86DRI
I830MemRange BackBuffer;
I830MemRange DepthBuffer;
I830MemRange TexMem;
i830_memory *back_buffer;
i830_memory *depth_buffer;
i830_memory *textures; /**< Compatibility texture memory */
i830_memory *memory_manager; /**< DRI memory manager aperture */
int TexGranularity;
int drmMinor;
Bool have3DWindows;
@ -330,13 +339,21 @@ typedef struct _I830Rec {
unsigned int BR[20];
int GttBound;
unsigned char **ScanlineColorExpandBuffers;
int NumScanlineColorExpandBuffers;
int nextColorExpandBuf;
I830RegRec ModeReg;
/**
* Values to be programmed into the fence registers.
*
* Pre-965, this is a list of FENCE_NR (8) CARD32 registers that
* contain their start, size, and pitch. On the 965, it is a list of
* FENCE_NEW_NR CARD32s for the start and pitch fields (low 32 bits) of
* the fence registers followed by FENCE_NEW_NR CARD32s for the end fields
* (high 32 bits) of the fence registers.
*/
unsigned int fence[FENCE_NEW_NR * 2];
unsigned int next_fence;
Bool useEXA;
Bool noAccel;
@ -407,7 +424,6 @@ typedef struct _I830Rec {
/* Broken-out options. */
OptionInfoPtr Options;
/* Stolen memory support */
Bool StolenOnly;
Bool swfSaved;
@ -499,7 +515,6 @@ typedef struct _I830Rec {
} I830Rec;
#define I830PTR(p) ((I830Ptr)((p)->driverPrivate))
#define I830REGPTR(p) (&(I830PTR(p)->ModeReg))
#define I830_SELECT_FRONT 0
#define I830_SELECT_BACK 1
@ -528,9 +543,6 @@ extern void i830_crtc_dpms_video(xf86CrtcPtr crtc, Bool on);
#ifdef XF86DRI
extern Bool I830Allocate3DMemory(ScrnInfoPtr pScrn, const int flags);
extern Bool I830AllocateBackBuffer(ScrnInfoPtr pScrn, const int flags);
extern Bool I830AllocateDepthBuffer(ScrnInfoPtr pScrn, const int flags);
extern Bool I830AllocateTextureMemory(ScrnInfoPtr pScrn, const int flags);
extern void I830SetupMemoryTiling(ScrnInfoPtr pScrn);
extern Bool I830DRIScreenInit(ScreenPtr pScreen);
extern Bool I830CheckDRIAvailable(ScrnInfoPtr pScrn);
@ -561,26 +573,19 @@ extern void I830SetupForSolidFill(ScrnInfoPtr pScrn, int color, int rop,
extern void I830SubsequentSolidFillRect(ScrnInfoPtr pScrn, int x, int y,
int w, int h);
extern void I830ResetAllocations(ScrnInfoPtr pScrn, const int flags);
Bool i830_allocator_init(ScrnInfoPtr pScrn, unsigned long offset,
unsigned long size);
void i830_describe_allocations(ScrnInfoPtr pScrn, int verbosity,
const char *prefix);
void i830_reset_allocations(ScrnInfoPtr pScrn);
void i830_free_3d_memory(ScrnInfoPtr pScrn);
void i830_free_memory(ScrnInfoPtr pScrn, i830_memory *mem);
extern long I830CheckAvailableMemory(ScrnInfoPtr pScrn);
extern long I830GetExcessMemoryAllocations(ScrnInfoPtr pScrn);
extern Bool I830Allocate2DMemory(ScrnInfoPtr pScrn, const int flags);
extern Bool I830DoPoolAllocation(ScrnInfoPtr pScrn, I830MemPool *pool);
extern Bool I830FixupOffsets(ScrnInfoPtr pScrn);
extern Bool I830BindAGPMemory(ScrnInfoPtr pScrn);
extern Bool I830UnbindAGPMemory(ScrnInfoPtr pScrn);
extern unsigned long I830AllocVidMem(ScrnInfoPtr pScrn, I830MemRange *result,
I830MemPool *pool, long size,
unsigned long alignment, int flags);
extern void I830FreeVidMem(ScrnInfoPtr pScrn, I830MemRange *range);
Bool i830_allocate_2d_memory(ScrnInfoPtr pScrn);
Bool i830_allocate_3d_memory(ScrnInfoPtr pScrn);
extern void I830PrintAllRegisters(I830RegPtr i830Reg);
extern void I830ReadAllRegisters(I830Ptr pI830, I830RegPtr i830Reg);
extern void I830ChangeFrontbuffer(ScrnInfoPtr pScrn,int buffer);
extern Bool I830IsPrimary(ScrnInfoPtr pScrn);
extern Bool I830FixOffset(ScrnInfoPtr pScrn, I830MemRange *mem);
extern Bool I830I2CInit(ScrnInfoPtr pScrn, I2CBusPtr *bus_ptr, int i2c_reg,
char *name);
@ -607,6 +612,9 @@ extern void i830MarkSync(ScrnInfoPtr pScrn);
extern void i830WaitSync(ScrnInfoPtr pScrn);
/* i830_memory.c */
Bool i830_bind_all_memory(ScrnInfoPtr pScrn);
Bool i830_unbind_all_memory(ScrnInfoPtr pScrn);
Bool I830BindAGPMemory(ScrnInfoPtr pScrn);
Bool I830UnbindAGPMemory(ScrnInfoPtr pScrn);
#ifdef I830_USE_XAA
@ -656,23 +664,8 @@ extern const int I830PatternROP[16];
extern const int I830CopyROP[16];
/* Flags for memory allocation function */
#define FROM_ANYWHERE 0x00000000
#define FROM_POOL_ONLY 0x00000001
#define FROM_NEW_ONLY 0x00000002
#define FROM_MASK 0x0000000f
#define ALLOCATE_AT_TOP 0x00000010
#define ALLOCATE_AT_BOTTOM 0x00000020
#define FORCE_GAPS 0x00000040
#define NEED_PHYSICAL_ADDR 0x00000100
#define ALIGN_BOTH_ENDS 0x00000200
#define FORCE_LOW 0x00000400
#define ALLOC_NO_TILING 0x00001000
#define ALLOC_INITIAL 0x00002000
#define ALLOCATE_DRY_RUN 0x80000000
#define NEED_PHYSICAL_ADDR 0x00000001
#define ALIGN_BOTH_ENDS 0x00000002
/* Chipset registers for VIDEO BIOS memory RW access */
#define _855_DRAM_RW_CONTROL 0x58

12
src/i830_accel.c
View File

@ -117,7 +117,7 @@ I830WaitLpRing(ScrnInfoPtr pScrn, int n, int timeout_millis)
ring->space = ring->head - (ring->tail + 8);
if (ring->space < 0)
ring->space += ring->mem.Size;
ring->space += ring->mem->size;
iters++;
now = GetTimeInMillis();
@ -195,9 +195,9 @@ I830Sync(ScrnInfoPtr pScrn)
ADVANCE_LP_RING();
}
I830WaitLpRing(pScrn, pI830->LpRing->mem.Size - 8, 0);
I830WaitLpRing(pScrn, pI830->LpRing->mem->size - 8, 0);
pI830->LpRing->space = pI830->LpRing->mem.Size - 8;
pI830->LpRing->space = pI830->LpRing->mem->size - 8;
pI830->nextColorExpandBuf = 0;
}
@ -226,10 +226,10 @@ I830SelectBuffer(ScrnInfoPtr pScrn, int buffer)
switch (buffer) {
#ifdef XF86DRI
case I830_SELECT_BACK:
pI830->bufferOffset = pI830->BackBuffer.Start;
pI830->bufferOffset = pI830->back_buffer->offset;
break;
case I830_SELECT_DEPTH:
pI830->bufferOffset = pI830->DepthBuffer.Start;
pI830->bufferOffset = pI830->depth_buffer->offset;
break;
#endif
default:
@ -252,7 +252,7 @@ I830RefreshRing(ScrnInfoPtr pScrn)
pI830->LpRing->tail = INREG(LP_RING + RING_TAIL);
pI830->LpRing->space = pI830->LpRing->head - (pI830->LpRing->tail + 8);
if (pI830->LpRing->space < 0)
pI830->LpRing->space += pI830->LpRing->mem.Size;
pI830->LpRing->space += pI830->LpRing->mem->size;
i830MarkSync(pScrn);
}

17
src/i830_cursor.c
View File

@ -88,20 +88,20 @@ I830SetPipeCursorBase (xf86CrtcPtr crtc)
I830Ptr pI830 = I830PTR(pScrn);
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
int cursor_base = (pipe == 0 ? CURSOR_A_BASE : CURSOR_B_BASE);
I830MemRange *cursor_mem;
i830_memory *cursor_mem;
if (pipe >= xf86_config->num_crtc)
FatalError("Bad pipe number for cursor base setting\n");
if (pI830->CursorIsARGB)
cursor_mem = &intel_crtc->cursor_mem_argb;
cursor_mem = intel_crtc->cursor_mem_argb;
else
cursor_mem = &intel_crtc->cursor_mem;
cursor_mem = intel_crtc->cursor_mem;
if (pI830->CursorNeedsPhysical) {
OUTREG(cursor_base, cursor_mem->Physical);
OUTREG(cursor_base, cursor_mem->bus_addr);
} else {
OUTREG(cursor_base, cursor_mem->Start);
OUTREG(cursor_base, cursor_mem->offset);
}
}
@ -281,7 +281,7 @@ I830CRTCLoadCursorImage(xf86CrtcPtr crtc, unsigned char *src)
ScrnInfoPtr pScrn = crtc->scrn;
I830Ptr pI830 = I830PTR(pScrn);
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
CARD8 *pcurs = (CARD8 *) (pI830->FbBase + intel_crtc->cursor_mem.Start);
CARD8 *pcurs = (CARD8 *) (pI830->FbBase + intel_crtc->cursor_mem->offset);
int x, y;
DPRINTF(PFX, "I830LoadCursorImage\n");
@ -372,7 +372,7 @@ static Bool I830UseHWCursorARGB (ScreenPtr pScreen, CursorPtr pCurs)
for (i = 0; i < xf86_config->num_crtc; i++) {
I830CrtcPrivatePtr intel_crtc = xf86_config->crtc[i]->driver_private;
if (!intel_crtc->cursor_mem_argb.Start)
if (intel_crtc->cursor_mem_argb == NULL)
return FALSE;
}
@ -389,7 +389,8 @@ static void I830CRTCLoadCursorARGB (xf86CrtcPtr crtc, CursorPtr pCurs)
{
I830Ptr pI830 = I830PTR(crtc->scrn);
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
CARD32 *dst = (CARD32 *) (pI830->FbBase + intel_crtc->cursor_mem_argb.Start);
CARD32 *dst = (CARD32 *) (pI830->FbBase +
intel_crtc->cursor_mem_argb->offset);
CARD32 *image = (CARD32 *)pCurs->bits->argb;
int x, y, w, h;

98
src/i830_debug.c
View File

@ -25,6 +25,11 @@
*
*/
#ifdef REG_DUMPER
#include "reg_dumper/reg_dumper.h"
#else
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
@ -34,6 +39,10 @@
#include "i830_debug.h"
#include <strings.h>
#endif
#include "i810_reg.h"
#define DEBUGSTRING(func) static char *func(I830Ptr pI830, int reg, CARD32 val)
DEBUGSTRING(i830_debug_xyminus1)
@ -102,6 +111,28 @@ DEBUGSTRING(i830_debug_fp)
((val & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT));
}
DEBUGSTRING(i830_debug_vga_pd)
{
int vga0_p1, vga0_p2, vga1_p1, vga1_p2;
/* XXX: i9xx version */
if (val & VGA0_PD_P1_DIV_2)
vga0_p1 = 2;
else
vga0_p1 = ((val & VGA0_PD_P1_MASK) >> VGA0_PD_P1_SHIFT) + 2;
vga0_p2 = (val & VGA0_PD_P2_DIV_4) ? 4 : 2;
if (val & VGA1_PD_P1_DIV_2)
vga1_p1 = 2;
else
vga1_p1 = ((val & VGA1_PD_P1_MASK) >> VGA1_PD_P1_SHIFT) + 2;
vga1_p2 = (val & VGA1_PD_P2_DIV_4) ? 4 : 2;
return XNFprintf("vga0 p1 = %d, p2 = %d, vga1 p1 = %d, p2 = %d",
vga0_p1, vga0_p2, vga1_p1, vga1_p2);
}
DEBUGSTRING(i830_debug_pp_status)
{
char *status = val & PP_ON ? "on" : "off";
@ -140,18 +171,44 @@ DEBUGSTRING(i830_debug_dpll)
char sdvoextra[20];
int p1, p2 = 0;
p1 = ffs((val & DPLL_FPA01_P1_POST_DIV_MASK) >>
DPLL_FPA01_P1_POST_DIV_SHIFT);
switch (val & DPLL_MODE_MASK) {
case DPLLB_MODE_DAC_SERIAL:
mode = "dac/serial";
p2 = val & DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 ? 5 : 10;
break;
case DPLLB_MODE_LVDS:
mode = "LVDS";
p2 = val & DPLLB_LVDS_P2_CLOCK_DIV_7 ? 7 : 14;
break;
if (IS_I9XX(pI830)) {
p1 = ffs((val & DPLL_FPA01_P1_POST_DIV_MASK) >>
DPLL_FPA01_P1_POST_DIV_SHIFT);
switch (val & DPLL_MODE_MASK) {
case DPLLB_MODE_DAC_SERIAL:
mode = "DAC/serial";
p2 = val & DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 ? 5 : 10;
break;
case DPLLB_MODE_LVDS:
mode = "LVDS";
p2 = val & DPLLB_LVDS_P2_CLOCK_DIV_7 ? 7 : 14;
break;
}
} else {
Bool is_lvds = (INREG(LVDS) & LVDS_PORT_EN) && (reg == DPLL_B);
if (val & PLL_P2_DIVIDE_BY_4)
p2 = 4;
else
p2 = 2;
if (is_lvds) {
mode = "LVDS";
/* Map the bit number set from (1, 6) to (-1, 4). */
p1 = ffs((val & DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS) >>
DPLL_FPA01_P1_POST_DIV_SHIFT);
} else {
mode = "DAC/serial";
if (val & PLL_P1_DIVIDE_BY_TWO) {
p1 = 2;
} else {
/* Map the number in the field to (1, 31) */
p1 = ((val & DPLL_FPA01_P1_POST_DIV_MASK_I830) >>
DPLL_FPA01_P1_POST_DIV_SHIFT) + 2;
}
}
}
switch (val & PLL_REF_INPUT_MASK) {
case PLL_REF_INPUT_DREFCLK:
clock = "default";
@ -162,7 +219,12 @@ DEBUGSTRING(i830_debug_dpll)
case PLL_REF_INPUT_TVCLKINBC:
clock = "TV B/C";
break;
case PLLB_REF_INPUT_SPREADSPECTRUMIN:
if (reg == DPLL_B)
clock = "spread spectrum";
break;
}
if (IS_I945G(pI830) || IS_I945GM(pI830)) {
sprintf(sdvoextra, ", SDVO mult %d",
(int)((val & SDVO_MULTIPLIER_MASK) >>
@ -171,9 +233,9 @@ DEBUGSTRING(i830_debug_dpll)
sdvoextra[0] = '\0';
}
return XNFprintf("%s, %s%s, %s mode, %s clock, p1 = %d, "
return XNFprintf("%s, %s%s, %s clock, %s mode, p1 = %d, "
"p2 = %d%s%s",
enabled, dvomode, vgamode, mode, clock, p1, p2,
enabled, dvomode, vgamode, clock, mode, p1, p2,
fpextra, sdvoextra);
}
@ -233,9 +295,9 @@ static struct i830SnapshotRec {
char *(*debug_output)(I830Ptr pI830, int reg, CARD32 val);
CARD32 val;
} i830_snapshot[] = {
DEFINEREG(VCLK_DIVISOR_VGA0),
DEFINEREG(VCLK_DIVISOR_VGA1),
DEFINEREG(VCLK_POST_DIV),
DEFINEREG2(VCLK_DIVISOR_VGA0, i830_debug_fp),
DEFINEREG2(VCLK_DIVISOR_VGA1, i830_debug_fp),
DEFINEREG2(VCLK_POST_DIV, i830_debug_vga_pd),
DEFINEREG2(DPLL_TEST, i830_debug_dpll_test),
DEFINEREG(D_STATE),
DEFINEREG(DSPCLK_GATE_D),
@ -357,6 +419,7 @@ static struct i830SnapshotRec {
#undef DEFINEREG
#define NUM_I830_SNAPSHOTREGS (sizeof(i830_snapshot) / sizeof(i830_snapshot[0]))
#ifndef REG_DUMPER
void i830TakeRegSnapshot(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
@ -401,6 +464,7 @@ void i830CompareRegsToSnapshot(ScrnInfoPtr pScrn, char *where)
}
}
}
#endif /* !REG_DUMPER */
static void i830DumpIndexed (ScrnInfoPtr pScrn, char *name, int id, int val, int min, int max)
{
@ -534,6 +598,7 @@ void i830DumpRegs (ScrnInfoPtr pScrn)
xf86DrvMsg (pScrn->scrnIndex, X_INFO, "DumpRegsEnd\n");
}
#ifndef REG_DUMPER
/* Famous last words
*/
void
@ -746,3 +811,4 @@ i830_check_error_state(ScrnInfoPtr pScrn)
return (errors != 0);
}
#endif /* !REG_DUMPER */

153
src/i830_display.c
View File

@ -85,10 +85,15 @@ typedef struct {
#define I8XX_M2_MAX 16
#define I8XX_P_MIN 4
#define I8XX_P_MAX 128
/* LVDS p1 value can go from 1 to 6, while DAC goes from 2 to 33. These
* values below get 2 added in the clock calculations.
*/
#define I8XX_P1_MIN 0
#define I8XX_P1_MAX 30
#define I8XX_P2_SLOW 1
#define I8XX_P2_FAST 0
#define I8XX_P1_MAX 31
#define I8XX_P1_LVDS_MIN -1
#define I8XX_P1_LVDS_MAX 4
#define I8XX_P2_SLOW 1 /* this is a bit shift amount */
#define I8XX_P2_FAST 0 /* this is a bit shift amount */
#define I8XX_P2_SLOW_LIMIT 165000
#define I9XX_DOT_MIN 20000
@ -116,12 +121,13 @@ typedef struct {
#define I9XX_P2_LVDS_FAST 7
#define I9XX_P2_LVDS_SLOW_LIMIT 112000
#define INTEL_LIMIT_I8XX 0
#define INTEL_LIMIT_I9XX_SDVO_DAC 1
#define INTEL_LIMIT_I9XX_LVDS 2
#define INTEL_LIMIT_I8XX_DVO_DAC 0
#define INTEL_LIMIT_I8XX_LVDS 1
#define INTEL_LIMIT_I9XX_SDVO_DAC 2
#define INTEL_LIMIT_I9XX_LVDS 3
static const intel_limit_t intel_limits[] = {
{
{ /* INTEL_LIMIT_I8XX_DVO_DAC */
.dot = { .min = I8XX_DOT_MIN, .max = I8XX_DOT_MAX },
.vco = { .min = I8XX_VCO_MIN, .max = I8XX_VCO_MAX },
.n = { .min = I8XX_N_MIN, .max = I8XX_N_MAX },
@ -133,7 +139,19 @@ static const intel_limit_t intel_limits[] = {
.p2 = { .dot_limit = I8XX_P2_SLOW_LIMIT,
.p2_slow = I8XX_P2_SLOW, .p2_fast = I8XX_P2_FAST },
},
{
{ /* INTEL_LIMIT_I8XX_LVDS */
.dot = { .min = I8XX_DOT_MIN, .max = I8XX_DOT_MAX },
.vco = { .min = I8XX_VCO_MIN, .max = I8XX_VCO_MAX },
.n = { .min = I8XX_N_MIN, .max = I8XX_N_MAX },
.m = { .min = I8XX_M_MIN, .max = I8XX_M_MAX },
.m1 = { .min = I8XX_M1_MIN, .max = I8XX_M1_MAX },
.m2 = { .min = I8XX_M2_MIN, .max = I8XX_M2_MAX },
.p = { .min = I8XX_P_MIN, .max = I8XX_P_MAX },
.p1 = { .min = I8XX_P1_LVDS_MIN, .max = I8XX_P1_LVDS_MAX },
.p2 = { .dot_limit = I8XX_P2_SLOW_LIMIT,
.p2_slow = I8XX_P2_FAST, .p2_fast = I8XX_P2_FAST },
},
{ /* INTEL_LIMIT_I9XX_SDVO_DAC */
.dot = { .min = I9XX_DOT_MIN, .max = I9XX_DOT_MAX },
.vco = { .min = I9XX_VCO_MIN, .max = I9XX_VCO_MAX },
.n = { .min = I9XX_N_MIN, .max = I9XX_N_MAX },
@ -145,7 +163,7 @@ static const intel_limit_t intel_limits[] = {
.p2 = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT,
.p2_slow = I9XX_P2_SDVO_DAC_SLOW, .p2_fast = I9XX_P2_SDVO_DAC_FAST },
},
{
{ /* INTEL_LIMIT_I9XX_LVDS */
.dot = { .min = I9XX_DOT_MIN, .max = I9XX_DOT_MAX },
.vco = { .min = I9XX_VCO_MIN, .max = I9XX_VCO_MAX },
.n = { .min = I9XX_N_MIN, .max = I9XX_N_MAX },
@ -168,15 +186,18 @@ static const intel_limit_t *intel_limit (xf86CrtcPtr crtc)
I830Ptr pI830 = I830PTR(pScrn);
const intel_limit_t *limit;
if (IS_I9XX(pI830))
{
if (IS_I9XX(pI830)) {
if (i830PipeHasType (crtc, I830_OUTPUT_LVDS))
limit = &intel_limits[INTEL_LIMIT_I9XX_LVDS];
else
limit = &intel_limits[INTEL_LIMIT_I9XX_SDVO_DAC];
} else {
if (i830PipeHasType (crtc, I830_OUTPUT_LVDS))
limit = &intel_limits[INTEL_LIMIT_I8XX_LVDS];
else
limit = &intel_limits[INTEL_LIMIT_I8XX_DVO_DAC];
}
else
limit = &intel_limits[INTEL_LIMIT_I8XX];
return limit;
}
@ -342,13 +363,19 @@ i830PipeSetBase(xf86CrtcPtr crtc, int x, int y)
int dspbase = (pipe == 0 ? DSPABASE : DSPBBASE);
int dspsurf = (pipe == 0 ? DSPASURF : DSPBSURF);
if (crtc->rotatedData != NULL) {
if (pI830->front_buffer == NULL) {
/* During startup we may be called as part of monitor detection while
* there is no memory allocation done, so just supply a dummy base
* address.
*/
Start = 0;
} else if (crtc->rotatedData != NULL) {
Start = (char *)crtc->rotatedData - (char *)pI830->FbBase;
} else if (I830IsPrimary(pScrn)) {
Start = pI830->FrontBuffer.Start;
Start = pI830->front_buffer->offset;
} else {
I830Ptr pI8301 = I830PTR(pI830->entityPrivate->pScrn_1);
Start = pI8301->FrontBuffer2.Start;
Start = pI8301->front_buffer_2->offset;
}
if (IS_I965G(pI830)) {
@ -786,7 +813,15 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
if (IS_I965G(pI830))
dpll |= (6 << PLL_LOAD_PULSE_PHASE_SHIFT);
} else {
dpll |= clock.p1 << 16;
if (is_lvds) {
/* map (-1 to 4) to ((1 << 0) to (1 << 5)). */
dpll |= (1 << (clock.p1 + 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT;
} else {
if (clock.p1 == 0)
dpll |= PLL_P1_DIVIDE_BY_TWO;
else
dpll |= clock.p1 << DPLL_FPA01_P1_POST_DIV_SHIFT;
}
dpll |= clock.p2 << 23;
}
@ -972,7 +1007,7 @@ i830_crtc_shadow_allocate (xf86CrtcPtr crtc, int width, int height)
unsigned long rotate_offset;
int align = KB(4), size;
rotate_pitch = pI830->displayWidth * pI830->cpp;
rotate_pitch = pScrn->displayWidth * pI830->cpp;
size = rotate_pitch * height;
#ifdef I830_USE_EXA
@ -1012,7 +1047,7 @@ i830_crtc_shadow_allocate (xf86CrtcPtr crtc, int width, int height)
"Couldn't allocate shadow memory for rotated CRTC\n");
return NULL;
}
rotate_offset = pI830->FrontBuffer.Start +
rotate_offset = pI830->front_buffer->offset +
intel_crtc->rotate_mem_xaa->offset * pI830->cpp;
}
#endif /* I830_USE_XAA */
@ -1034,7 +1069,7 @@ i830_crtc_shadow_create(xf86CrtcPtr crtc, void *data, int width, int height)
if (!data)
data = i830_crtc_shadow_allocate (crtc, width, height);
rotate_pitch = pI830->displayWidth * pI830->cpp;
rotate_pitch = pScrn->displayWidth * pI830->cpp;
rotate_pixmap = GetScratchPixmapHeader(pScrn->pScreen,
width, height,
@ -1244,35 +1279,59 @@ i830_crtc_clock_get(ScrnInfoPtr pScrn, xf86CrtcPtr crtc)
clock.m1 = (fp & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT;
clock.m2 = (fp & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT;
clock.n = (fp & FP_N_DIV_MASK) >> FP_N_DIV_SHIFT;
clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK) >>
DPLL_FPA01_P1_POST_DIV_SHIFT);
switch (dpll & DPLL_MODE_MASK) {
case DPLLB_MODE_DAC_SERIAL:
clock.p2 = dpll & DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 ? 5 : 10;
break;
case DPLLB_MODE_LVDS:
clock.p2 = dpll & DPLLB_LVDS_P2_CLOCK_DIV_7 ? 7 : 14;
break;
default:
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Unknown DPLL mode %08x in programmed mode\n",
(int)(dpll & DPLL_MODE_MASK));
return 0;
}
/* XXX: Handle the 100Mhz refclk */
if (IS_I9XX(pI830))
i9xx_clock(96000, &clock);
else
i9xx_clock(48000, &clock);
if (IS_I9XX(pI830)) {
clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK) >>
DPLL_FPA01_P1_POST_DIV_SHIFT);
if (!i830PllIsValid(crtc, &clock)) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Bad clock found programmed in pipe %c\n",
pipe == 0 ? 'A' : 'B');
i830PrintPll("", &clock);
switch (dpll & DPLL_MODE_MASK) {
case DPLLB_MODE_DAC_SERIAL:
clock.p2 = dpll & DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 ? 5 : 10;
break;
case DPLLB_MODE_LVDS:
clock.p2 = dpll & DPLLB_LVDS_P2_CLOCK_DIV_7 ? 7 : 14;
break;
default:
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Unknown DPLL mode %08x in programmed mode\n",
(int)(dpll & DPLL_MODE_MASK));
return 0;
}
/* XXX: Handle the 100Mhz refclk */
i9xx_clock(96000, &clock);
} else {
Bool is_lvds = (pipe == 1) && (INREG(LVDS) & LVDS_PORT_EN);
if (is_lvds) {
/* Map the bit number set from (1, 6) to (-1, 4). */
clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS) >>
DPLL_FPA01_P1_POST_DIV_SHIFT) - 2;
clock.p2 = 0;
} else {
if (dpll & PLL_P1_DIVIDE_BY_TWO) {
clock.p1 = 0;
} else {
/* Map the number in the field to (1, 31) */
clock.p1 = ((dpll & DPLL_FPA01_P1_POST_DIV_MASK_I830) >>
DPLL_FPA01_P1_POST_DIV_SHIFT);
}
if (dpll & PLL_P2_DIVIDE_BY_4)
clock.p2 = 1;
else
clock.p2 = 0;
}
/* XXX: Deal with other refclocks */
i8xx_clock(48000, &clock);
}
/* XXX: It would be nice to validate the clocks, but we can't reuse
* i830PllIsValid() because it relies on the xf86_config output
* configuration being accurate, which it isn't necessarily.
*/
if (0)
i830PrintPll("probed", &clock);
return clock.dot;
}
@ -1293,8 +1352,6 @@ i830_crtc_mode_get(ScrnInfoPtr pScrn, xf86CrtcPtr crtc)
if (mode == NULL)
return NULL;
memset(mode, 0, sizeof(*mode));
mode->Clock = i830_crtc_clock_get(pScrn, crtc);
mode->HDisplay = (htot & 0xffff) + 1;
mode->HTotal = ((htot & 0xffff0000) >> 16) + 1;

85
src/i830_dri.c
View File

@ -145,22 +145,22 @@ I830InitDma(ScrnInfoPtr pScrn)
memset(&info, 0, sizeof(drmI830Init));
info.func = I830_INIT_DMA;
info.ring_start = ring->mem.Start + pI830->LinearAddr;
info.ring_end = ring->mem.End + pI830->LinearAddr;
info.ring_size = ring->mem.Size;
info.ring_start = ring->mem->offset + pI830->LinearAddr;
info.ring_end = ring->mem->end + pI830->LinearAddr;
info.ring_size = ring->mem->size;
info.mmio_offset = (unsigned int)pI830DRI->regs;
info.sarea_priv_offset = sizeof(XF86DRISAREARec);
info.front_offset = pI830->FrontBuffer.Start;
info.back_offset = pI830->BackBuffer.Start;
info.depth_offset = pI830->DepthBuffer.Start;
info.front_offset = pI830->front_buffer->offset;
info.back_offset = pI830->back_buffer->offset;
info.depth_offset = pI830->depth_buffer->offset;
info.w = pScrn->virtualX;
info.h = pScrn->virtualY;
info.pitch = pI830->displayWidth;
info.back_pitch = pI830->displayWidth;
info.depth_pitch = pI830->displayWidth;
info.pitch = pScrn->displayWidth;
info.back_pitch = pScrn->displayWidth;
info.depth_pitch = pScrn->displayWidth;
info.cpp = pI830->cpp;
if (drmCommandWrite(pI830->drmSubFD, DRM_I830_INIT,
@ -509,7 +509,7 @@ I830DRIScreenInit(ScreenPtr pScreen)
pDRIInfo->ddxDriverPatchVersion = I830_PATCHLEVEL;
#if 1 /* Remove this soon - see bug 5714 */
pDRIInfo->frameBufferPhysicalAddress = (char *) pI830->LinearAddr +
pI830->FrontBuffer.Start;
pI830->front_buffer->offset;
pDRIInfo->frameBufferSize = ROUND_TO_PAGE(pScrn->displayWidth *
pScrn->virtualY * pI830->cpp);
#else
@ -654,21 +654,18 @@ I830DRIScreenInit(ScreenPtr pScreen)
return FALSE;
}
pI830->drmMinor = version->version_minor;
if (!(pI830->mmModeFlags & I830_KERNEL_TEX)) {
#ifdef XF86DRI_MM
if ((version->version_major > 1) ||
((version->version_minor >= 7) &&
(version->version_major == 1))) {
pI830->mmModeFlags |= I830_KERNEL_MM;
} else
#endif
{
pI830->mmModeFlags |= I830_KERNEL_TEX;
}
} else {
xf86DrvMsg(pScreen->myNum, X_INFO,
"Not enabling the DRM memory manager.\n");
}
if (version->version_minor < 7) {
if (pI830->mmModeFlags & I830_KERNEL_MM) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"DRM version %d.%d older than required 1.7 for "
"DRM memory manager. Disabling.\n",
version->version_major, version->version_minor);
pI830->mmModeFlags &= ~I830_KERNEL_MM;
i830_free_memory(pScrn, pI830->memory_manager);
pI830->memory_manager = NULL;
}
}
drmFreeVersion(version);
}
}
@ -829,8 +826,8 @@ I830DRIDoMappings(ScreenPtr pScreen)
(int)pI830DRI->regs);
if (drmAddMap(pI830->drmSubFD,
(drm_handle_t)pI830->LpRing->mem.Start + pI830->LinearAddr,
pI830->LpRing->mem.Size, DRM_AGP, 0,
(drm_handle_t)pI830->LpRing->mem->offset + pI830->LinearAddr,
pI830->LpRing->mem->size, DRM_AGP, 0,
(drmAddress) &pI830->ring_map) < 0) {
xf86DrvMsg(pScreen->myNum, X_ERROR,
"[drm] drmAddMap(ring_map) failed. Disabling DRI\n");
@ -1325,10 +1322,10 @@ I830DRIShadowUpdate (ScreenPtr pScreen, shadowBufPtr pBuf)
OUT_RING(br13);
OUT_RING((pbox->y1 << 16) | pbox->x1);
OUT_RING((pbox->y2 << 16) | pbox->x2);
OUT_RING(pI830->BackBuffer.Start);
OUT_RING(pI830->back_buffer->offset);
OUT_RING((pbox->y1 << 16) | pbox->x1);
OUT_RING(br13 & 0xffff);
OUT_RING(pI830->FrontBuffer.Start);
OUT_RING(pI830->front_buffer->offset);
ADVANCE_LP_RING();
}
}
@ -1360,10 +1357,10 @@ I830EnablePageFlip(ScreenPtr pScreen)
OUT_RING(br13);
OUT_RING(0);
OUT_RING((pScrn->virtualY << 16) | pScrn->virtualX);
OUT_RING(pI830->BackBuffer.Start);
OUT_RING(pI830->back_buffer->offset);
OUT_RING(0);
OUT_RING(br13 & 0xffff);
OUT_RING(pI830->FrontBuffer.Start);
OUT_RING(pI830->front_buffer->offset);
ADVANCE_LP_RING();
pSAREAPriv->pf_active = 1;
@ -1448,11 +1445,12 @@ I830UpdateDRIBuffers(ScrnInfoPtr pScrn, drmI830Sarea *sarea)
sarea->depth_tiled = pI830->depth_tiled;
sarea->rotated_tiled = FALSE;
sarea->front_offset = pI830->FrontBuffer.Start;
/* Don't use FrontBuffer.Size here as it includes the pixmap cache area
sarea->front_offset = pI830->front_buffer->offset;
/* Don't use front_buffer->size here as it includes the pixmap cache area
* Instead, calculate the entire framebuffer.
*/
sarea->front_size = pI830->displayWidth * pScrn->virtualY * pI830->cpp;
sarea->front_size = ROUND_TO_PAGE(pScrn->displayWidth * pScrn->virtualY *
pI830->cpp);
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"[drm] init sarea width,height = %d x %d (pitch %d)\n",
@ -1460,12 +1458,17 @@ I830UpdateDRIBuffers(ScrnInfoPtr pScrn, drmI830Sarea *sarea)
sarea->width = pScreen->width;
sarea->height = pScreen->height;
sarea->back_offset = pI830->BackBuffer.Start;
sarea->back_size = pI830->BackBuffer.Size;
sarea->depth_offset = pI830->DepthBuffer.Start;
sarea->depth_size = pI830->DepthBuffer.Size;
sarea->tex_offset = pI830->TexMem.Start;
sarea->tex_size = pI830->TexMem.Size;
sarea->back_offset = pI830->back_buffer->offset;
sarea->back_size = pI830->back_buffer->size;
sarea->depth_offset = pI830->depth_buffer->offset;
sarea->depth_size = pI830->depth_buffer->size;
if (pI830->textures != NULL) {
sarea->tex_offset = pI830->textures->offset;
sarea->tex_size = pI830->textures->size;
} else {
sarea->tex_offset = 0;
sarea->tex_size = 0;
}
sarea->log_tex_granularity = pI830->TexGranularity;
sarea->pitch = pScrn->displayWidth;
sarea->virtualX = pScrn->virtualX;
@ -1477,7 +1480,7 @@ I830UpdateDRIBuffers(ScrnInfoPtr pScrn, drmI830Sarea *sarea)
sarea->rotation = 0;
sarea->rotated_offset = -1;
sarea->rotated_size = 0;
sarea->rotated_pitch = pI830->displayWidth;
sarea->rotated_pitch = pScrn->displayWidth;
success = I830DRIMapScreenRegions(pScrn, sarea);

825
src/i830_driver.c
View File

File diff suppressed because it is too large Load Diff

96
src/i830_exa.c
View File

@ -297,6 +297,93 @@ i830_get_transformed_coordinates(int x, int y, PictTransformPtr transform,
}
}
/**
* Uploads data from system memory to the framebuffer using a series of
* 8x8 pattern blits.
*/
static Bool
i830_upload_to_screen(PixmapPtr pDst, int x, int y, int w, int h, char *src,
int src_pitch)
{
ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
I830Ptr pI830 = I830PTR(pScrn);
const int uts_width_max = 16, uts_height_max = 16;
int cpp = pDst->drawable.bitsPerPixel / 8;
int sub_x, sub_y;
CARD32 br13;
CARD32 offset;
if (w > uts_width_max || h > uts_height_max)
I830FALLBACK("too large for upload to screen (%d,%d)", w, h);
offset = exaGetPixmapOffset(pDst);
br13 = exaGetPixmapPitch(pDst);
br13 |= ((I830PatternROP[GXcopy] & 0xff) << 16);
switch (pDst->drawable.bitsPerPixel) {
case 16:
br13 |= 1 << 24;
break;
case 32:
br13 |= 3 << 24;
break;
}
for (sub_y = 0; sub_y < uts_height_max && sub_y < h; sub_y += 8) {
int sub_height;
if (sub_y + 8 > h)
sub_height = h - sub_y;
else
sub_height = 8;
for (sub_x = 0; sub_x < uts_width_max && sub_x < w; sub_x += 8) {
int sub_width, line;
char *src_line = src + sub_y * src_pitch + sub_x * cpp;
if (sub_x + 8 > w)
sub_width = w - sub_x;
else
sub_width = 8;
BEGIN_LP_RING(6 + (cpp * 8 * 8 / 4));
/* XXX We may need a pattern offset here for {x,y} % 8 != 0*/
OUT_RING(XY_PAT_BLT_IMMEDIATE |
XY_SRC_COPY_BLT_WRITE_ALPHA |
XY_SRC_COPY_BLT_WRITE_RGB |
(3 + cpp * 8 * 8 / 4));
OUT_RING(br13);
OUT_RING(((y + sub_y) << 16) | (x + sub_x));
OUT_RING(((y + sub_y + sub_height) << 16) |
(x + sub_x + sub_width));
OUT_RING(offset);
/* Write out the lines with valid data, followed by any needed
* padding
*/
for (line = 0; line < sub_height; line++) {
OUT_RING_COPY(sub_width * cpp, src_line);
src_line += src_pitch;
if (sub_width != 8)
OUT_RING_PAD((8 - sub_width) * cpp);
}
/* Write out any full padding lines to follow */
if (sub_height != 8)
OUT_RING_PAD(8 * cpp * (8 - sub_height));
OUT_RING(MI_NOOP);
ADVANCE_LP_RING();
}
}
exaMarkSync(pDst->drawable.pScreen);
/* exaWaitSync(pDst->drawable.pScreen); */
return TRUE;
}
/*
* TODO:
* - Dual head?
@ -318,8 +405,9 @@ I830EXAInit(ScreenPtr pScreen)
pI830->EXADriverPtr->exa_major = 2;
pI830->EXADriverPtr->exa_minor = 1;
pI830->EXADriverPtr->memoryBase = pI830->FbBase;
pI830->EXADriverPtr->offScreenBase = pI830->Offscreen.Start;
pI830->EXADriverPtr->memorySize = pI830->Offscreen.End;
pI830->EXADriverPtr->offScreenBase = pI830->exa_offscreen->offset;
pI830->EXADriverPtr->memorySize = pI830->exa_offscreen->offset +
pI830->exa_offscreen->size;
DPRINTF(PFX, "EXA Mem: memoryBase 0x%x, end 0x%x, offscreen base 0x%x, memorySize 0x%x\n",
pI830->EXADriverPtr->memoryBase,
@ -420,6 +508,10 @@ I830EXAInit(ScreenPtr pScreen)
pI830->EXADriverPtr->DoneComposite = i830_done_composite;
}
/* UploadToScreen/DownloadFromScreen */
if (0)
pI830->EXADriverPtr->UploadToScreen = i830_upload_to_screen;
if(!exaDriverInit(pScreen, pI830->EXADriverPtr)) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"EXA initialization failed; trying older version\n");

2979
src/i830_memory.c
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File diff suppressed because it is too large Load Diff

37
src/i830_video.c
View File

@ -184,9 +184,9 @@ void exaMoveInPixmap (PixmapPtr pPixmap);
OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_FLIP_CONTINUE); \
} \
if (IS_I965G(pI830)) \
OUT_RING(pI830->OverlayMem->Start | OFC_UPDATE); \
OUT_RING(pI830->overlay_regs->offset | OFC_UPDATE); \
else \
OUT_RING(pI830->OverlayMem->Physical | OFC_UPDATE); \
OUT_RING(pI830->overlay_regs->bus_addr | OFC_UPDATE); \
OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); \
OUT_RING(MI_NOOP); \
ADVANCE_LP_RING(); \
@ -202,9 +202,9 @@ void exaMoveInPixmap (PixmapPtr pPixmap);
OUT_RING(MI_NOOP); \
OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_FLIP_OFF); \
if (IS_I965G(pI830)) \
OUT_RING(pI830->OverlayMem->Start | OFC_UPDATE); \
OUT_RING(pI830->overlay_regs->offset | OFC_UPDATE); \
else \
OUT_RING(pI830->OverlayMem->Physical | OFC_UPDATE); \
OUT_RING(pI830->overlay_regs->bus_addr | OFC_UPDATE); \
OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); \
OUT_RING(MI_NOOP); \
ADVANCE_LP_RING(); \
@ -472,7 +472,9 @@ I830InitVideo(ScreenPtr pScreen)
}
/* Set up overlay video if we can do it at this depth. */
if (!IS_I965G(pI830) && pScrn->bitsPerPixel != 8) {
if (!IS_I965G(pI830) && pScrn->bitsPerPixel != 8 &&
pI830->overlay_regs != NULL)
{
overlayAdaptor = I830SetupImageVideoOverlay(pScreen);
if (overlayAdaptor != NULL) {
adaptors[num_adaptors++] = overlayAdaptor;
@ -496,10 +498,10 @@ I830ResetVideo(ScrnInfoPtr pScrn)
I830Ptr pI830 = I830PTR(pScrn);
I830PortPrivPtr pPriv = pI830->adaptor->pPortPrivates[0].ptr;
I830OverlayRegPtr overlay =
(I830OverlayRegPtr) (pI830->FbBase + pI830->OverlayMem->Start);
(I830OverlayRegPtr) (pI830->FbBase + pI830->overlay_regs->offset);
OVERLAY_DEBUG("I830ResetVideo: base: %p, offset: 0x%lx, obase: %p\n",
pI830->FbBase, pI830->OverlayMem->Start, overlay);
pI830->FbBase, pI830->overlay_regs->offset, overlay);
/*
* Default to maximum image size in YV12
*/
@ -925,8 +927,7 @@ I830SetPortAttribute(ScrnInfoPtr pScrn,
{
I830PortPrivPtr pPriv = (I830PortPrivPtr) data;
I830Ptr pI830 = I830PTR(pScrn);
I830OverlayRegPtr overlay =
(I830OverlayRegPtr) (pI830->FbBase + pI830->OverlayMem->Start);
I830OverlayRegPtr overlay;
if (pPriv->textured) {
/* XXX: Currently the brightness/saturation attributes aren't hooked up.
@ -936,6 +937,8 @@ I830SetPortAttribute(ScrnInfoPtr pScrn,
return Success;
}
overlay = (I830OverlayRegPtr) (pI830->FbBase + pI830->overlay_regs->offset);
if (attribute == xvBrightness) {
if ((value < -128) || (value > 127))
return BadValue;
@ -1553,7 +1556,7 @@ I830DisplayVideo(ScrnInfoPtr pScrn, int id, short width, short height,
I830Ptr pI830 = I830PTR(pScrn);
I830PortPrivPtr pPriv = pI830->adaptor->pPortPrivates[0].ptr;
I830OverlayRegPtr overlay =
(I830OverlayRegPtr) (pI830->FbBase + pI830->OverlayMem->Start);
(I830OverlayRegPtr) (pI830->FbBase + pI830->overlay_regs->offset);
unsigned int swidth;
unsigned int mask, shift, offsety, offsetu;
int tmp;
@ -2076,7 +2079,8 @@ I830AllocateMemory(ScrnInfoPtr pScrn, struct linear_alloc *linear, int size,
/* Converts an offset from XAA's linear allocator to an offset from the
* start of fb.
*/
#define XAA_OFFSET_TO_OFFSET(x) (pI830->FrontBuffer.Start + (x * pI830->cpp))
#define XAA_OFFSET_TO_OFFSET(x) \
(pI830->front_buffer->offset + (x * pI830->cpp))
/* The XFree86 linear allocator operates in units of screen pixels,
* sadly.
@ -2159,8 +2163,7 @@ I830PutImage(ScrnInfoPtr pScrn,
I830Ptr pI830 = I830PTR(pScrn);
I830PortPrivPtr pPriv = (I830PortPrivPtr) data;
ScreenPtr pScreen = screenInfo.screens[pScrn->scrnIndex];
I830OverlayRegPtr overlay =
(I830OverlayRegPtr) (pI830->FbBase + pI830->OverlayMem->Start);
I830OverlayRegPtr overlay;
PixmapPtr pPixmap;
INT32 x1, x2, y1, y2;
int srcPitch, srcPitch2 = 0, dstPitch, destId;
@ -2169,6 +2172,12 @@ I830PutImage(ScrnInfoPtr pScrn,
int pitchAlignMask;
int extraLinear;
if (pPriv->textured)
overlay = NULL;
else
overlay = (I830OverlayRegPtr) (pI830->FbBase +
pI830->overlay_regs->offset);
#if 0
ErrorF("I830PutImage: src: (%d,%d)(%d,%d), dst: (%d,%d)(%d,%d)\n"
"width %d, height %d\n", src_x, src_y, src_w, src_h, drw_x, drw_y,
@ -2700,7 +2709,7 @@ I830DisplaySurface(XF86SurfacePtr surface,
I830Ptr pI830 = I830PTR(pScrn);
I830PortPrivPtr pI830Priv = GET_PORT_PRIVATE(pScrn);
I830OverlayRegPtr overlay =
(I830OverlayRegPtr) (pI830->FbBase + pI830->OverlayMem->Start);
(I830OverlayRegPtr) (pI830->FbBase + pI830->overlay_regs->offset);
INT32 x1, y1, x2, y2;
INT32 loops = 0;
BoxRec dstBox;

26
src/i830_xaa.c
View File

@ -162,20 +162,20 @@ I830XAAInit(ScreenPtr pScreen)
/* On the primary screen */
if (pI830->init == 0) {
if (pI830->Scratch.Size != 0) {
if (pI830->xaa_scratch->size != 0) {
width = ((pScrn->displayWidth + 31) & ~31) / 8;
nr_buffers = pI830->Scratch.Size / width;
ptr = pI830->FbBase + pI830->Scratch.Start;
nr_buffers = pI830->xaa_scratch->size / width;
ptr = pI830->FbBase + pI830->xaa_scratch->offset;
}
} else {
/* On the secondary screen */
I830Ptr pI8301 = I830PTR(pI830->entityPrivate->pScrn_1);
if (pI8301->Scratch2.Size != 0) {
if (pI8301->xaa_scratch_2->size != 0) {
width = ((pScrn->displayWidth + 31) & ~31) / 8;
nr_buffers = pI8301->Scratch2.Size / width;
nr_buffers = pI8301->xaa_scratch_2->size / width;
/* We have to use the primary screen's FbBase, as that's where
* we allocated Scratch2, so we get the correct pointer */
ptr = pI8301->FbBase + pI8301->Scratch2.Start;
* we allocated xaa_scratch_2, so we get the correct pointer */
ptr = pI8301->FbBase + pI8301->xaa_scratch_2->offset;
}
}
@ -279,11 +279,15 @@ CheckTiling(ScrnInfoPtr pScrn)
if (IS_I965G(pI830)) {
if (pI830->bufferOffset == pScrn->fbOffset && pI830->front_tiled == FENCE_XMAJOR)
tiled = 1;
if (pI830->bufferOffset == pI830->BackBuffer.Start && pI830->back_tiled == FENCE_XMAJOR)
if (pI830->bufferOffset == pI830->back_buffer->offset &&
pI830->back_tiled == FENCE_XMAJOR) {
tiled = 1;
}
/* not really supported as it's always YMajor tiled */
if (pI830->bufferOffset == pI830->DepthBuffer.Start && pI830->depth_tiled == FENCE_XMAJOR)
if (pI830->bufferOffset == pI830->depth_buffer->offset &&
pI830->depth_tiled == FENCE_XMAJOR) {
tiled = 1;
}
}
return tiled;
@ -600,7 +604,7 @@ I830SubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno)
I830Ptr pI8301 = I830PTR(pI830->entityPrivate->pScrn_1);
/* We have to use the primary screen's FbBase, as that's where
* we allocated Scratch2, so we get the correct pointer */
* we allocated xaa_scratch_2, so we get the correct pointer */
pI830->BR[12] = (pI830->AccelInfoRec->ScanlineColorExpandBuffers[0] -
pI8301->FbBase);
}
@ -700,7 +704,7 @@ I830SubsequentImageWriteScanline(ScrnInfoPtr pScrn, int bufno)
I830Ptr pI8301 = I830PTR(pI830->entityPrivate->pScrn_1);
/* We have to use the primary screen's FbBase, as that's where
* we allocated Scratch2, so we get the correct pointer */
* we allocated xaa_scratch_2, so we get the correct pointer */
pI830->BR[12] = (pI830->AccelInfoRec->ScanlineColorExpandBuffers[0] -
pI8301->FbBase);
}

4
src/i965_render.c
View File

@ -501,9 +501,9 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
next_offset = default_color_offset + sizeof(*default_color_state);
total_state_size = next_offset;
assert(total_state_size < EXA_LINEAR_EXTRA);
assert(total_state_size < pI830->exa_965_state->size);
state_base_offset = pI830->EXAStateMem.Start;
state_base_offset = pI830->exa_965_state->offset;
state_base_offset = ALIGN(state_base_offset, 64);
state_base = (char *)(pI830->FbBase + state_base_offset);

1
src/reg_dumper/.gitignore vendored Normal file
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@ -0,0 +1 @@
intel_reg_dumper

12
src/reg_dumper/Makefile.am Normal file
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@ -0,0 +1,12 @@
noinst_PROGRAMS = intel_reg_dumper
intel_reg_dumper_SOURCES = \
main.c \
reg_dumper.h \
xprintf.c \
../i830_debug.c
intel_reg_dumper_LDADD = $(PCIACCESS_LIBS)
intel_reg_dumper_CFLAGS = $(PCIACCESS_CFLAGS) $(WARN_CFLAGS) \
-I$(srcdir)/.. -DREG_DUMPER

105
src/reg_dumper/main.c Normal file
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@ -0,0 +1,105 @@
/*
* Copyright © 2007 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
* Authors:
* Eric Anholt <eric@anholt.net>
*
*/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdarg.h>
#include <pciaccess.h>
#include <err.h>
#include "reg_dumper.h"
int main(int argc, char **argv)
{
struct pci_device *dev;
I830Rec i830;
ScrnInfoRec scrn;
int err, mmio_bar;
err = pci_system_init();
if (err != 0) {
fprintf(stderr, "Couldn't initialize PCI system: %s\n", strerror(err));
exit(1);
}
/* Grab the graphics card */
dev = pci_device_find_by_slot(0, 0, 2, 0);
if (dev == NULL)
errx(1, "Couldn't find graphics card");
if (dev->vendor_id != 0x8086)
errx(1, "Graphics card is non-intel");
err = pci_device_probe(dev);
if (err != 0) {
fprintf(stderr, "Couldn't probe graphics card: %s\n", strerror(err));
exit(1);
}
i830.PciInfo = &i830.pci_info_rec;
i830.PciInfo->chipType = dev->device_id;
i830.pci_dev = dev;
mmio_bar = IS_I9XX((&i830)) ? 0 : 1;
err = pci_device_map_region(dev, mmio_bar, 1);
if (err != 0) {
fprintf(stderr, "Couldn't map MMIO region: %s\n", strerror(err));
exit(1);
}
i830.mmio = i830.pci_dev->regions[mmio_bar].memory;
scrn.scrnIndex = 0;
scrn.pI830 = &i830;
i830DumpRegs(&scrn);
return 0;
}
void xf86DrvMsg(int scrnIndex, int severity, const char *format, ...)
{
va_list va;
switch (severity) {
case X_INFO:
printf("(II): ");
break;
case X_WARNING:
printf("(WW): ");
break;
case X_ERROR:
printf("(EE): ");
break;
}
va_start(va, format);
vprintf(format, va);
va_end(va);
}

89
src/reg_dumper/reg_dumper.h Normal file
View File

@ -0,0 +1,89 @@
/*
* Copyright © 2007 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
* Authors:
* Eric Anholt <eric@anholt.net>
*
*/
#include <sys/types.h>
#include <string.h>
#include <stdlib.h>
#include <stdio.h>
#include "common.h"
/** @file
* This file defines the typedefs and stub structures necessary for us to
* use i830_debug.c mostly unmodified.
*/
typedef uint32_t CARD32;
typedef char Bool;
#define FALSE 0
#define TRUE 1
#define X_INFO 0
#define X_WARNING 1
#define X_ERROR 2
struct pci_info_rec {
uint16_t chipType;
};
typedef struct _i830 {
/* Fields in common with the real pI830 */
struct pci_info_rec *PciInfo;
/* Fields used for setting up reg_dumper */
struct pci_device *pci_dev;
struct pci_info_rec pci_info_rec;
volatile unsigned char *mmio;
} I830Rec, *I830Ptr;
typedef struct _scrn {
/* Fields in common with the real pScrn */
int scrnIndex;
/* Fields used for setting up reg_dumper */
I830Ptr pI830;
} ScrnInfoRec, *ScrnInfoPtr;
#define I830PTR(pScrn) (pScrn->pI830)
#define INREG8(reg) (*(volatile uint8_t *)((pI830)->mmio + (reg)))
#define INREG16(reg) (*(volatile uint16_t *)((pI830)->mmio + (reg)))
#define INREG(reg) (*(volatile uint32_t *)((pI830)->mmio + (reg)))
#define OUTREG8(reg, val) \
*(volatile uint8_t *)((pI830)->mmio + (reg)) = (val)
#define OUTREG16(reg, val) \
*(volatile uint16_t *)((pI830)->mmio + (reg)) = (val)
#define OUTREG(reg, val) \
*(volatile uint32_t *)((pI830)->mmio + (reg)) = (val)
#define xalloc malloc
#define xfree free
#define ErrorF printf
char *XNFprintf(const char *format, ...);
void xf86DrvMsg(int scrnIndex, int severity, const char *format, ...);
void i830DumpRegs(ScrnInfoPtr pScrn);

60
src/reg_dumper/xprintf.c Normal file
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@ -0,0 +1,60 @@
/*
* Copyright (c) 2004 Alexander Gottwald
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE ABOVE LISTED COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
* Except as contained in this notice, the name(s) of the above copyright
* holders shall not be used in advertising or otherwise to promote the sale,
* use or other dealings in this Software without prior written authorization.
*/
#include <string.h>
#include <stdarg.h>
#include "reg_dumper.h"
static char *
XNFvprintf(const char *format, va_list va)
{
char *ret;
int size;
va_list va2;
va_copy(va2, va);
size = vsnprintf(NULL, 0, format, va2);
va_end(va2);
ret = (char *)malloc(size + 1);
if (ret == NULL)
return NULL;
vsnprintf(ret, size + 1, format, va);
ret[size] = 0;
return ret;
}
char *
XNFprintf(const char *format, ...)
{
char *ret;
va_list va;
va_start(va, format);
ret = XNFvprintf(format, va);
va_end(va);
return ret;
}