Remove rotation sf and wm progs
This commit is contained in:
Keith Packard
parent
492ff1494f
commit
949d73271d
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@ -1,55 +0,0 @@
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/*
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* Copyright © 2007 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Wang Zhenyu <zhenyu.z.wang@intel.com>
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*/
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/* 1/dx */
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send (1) 0 g6<1>F g1.12<0,1,0>F math inv scalar mlen 1 rlen 1 { align1 };
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/* 1/dy */
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send (1) 0 g6.4<1>F g1.20<0,1,0>F math inv scalar mlen 1 rlen 1 { align1 };
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/* du, dv */
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mul (1) g7<1>F g3<0,1,0>F -1.0F { align1 };
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mul (1) g7.4<1>F g3.4<0,1,0>F -1.0F { align1 };
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add (1) g7<1>F g4<0,1,0>F g7<0,1,0>F { align1 };
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add (1) g7.4<1>F g4.4<0,1,0>F g7.4<0,1,0>F { align1 };
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/* du/dy */
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mul (1) g7<1>F g7<0,1,0>F g6.4<0,1,0>F { align1 };
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/* dv/dx */
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mul (1) g7.4<1>F g7.4<0,1,0>F g6<0,1,0>F { align1 };
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/* Cx */
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mov (8) m1<1>F g7<0,1,0>F { align1 };
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/* Cy */
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mov (8) m2<1>F g7.4<0,1,0>F { align1 };
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/* Co */
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mov (8) m3<1>F g3<8,8,1>F { align1 };
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send (8) 0 null g0<8,8,1>F urb 0 transpose used complete mlen 4 rlen 0 { align1 EOT };
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nop;
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nop;
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nop;
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nop;
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nop;
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nop;
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nop;
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nop;
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@ -1,20 +0,0 @@
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{ 0x00000031, 0x20c01fbd, 0x0000002c, 0x01110081 },
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{ 0x00000031, 0x20c41fbd, 0x00000034, 0x01110081 },
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{ 0x00000041, 0x20e07fbd, 0x00000060, 0xbf800000 },
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{ 0x00000041, 0x20e47fbd, 0x00000064, 0xbf800000 },
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{ 0x00000040, 0x20e077bd, 0x00000080, 0x000000e0 },
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{ 0x00000040, 0x20e477bd, 0x00000084, 0x000000e4 },
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{ 0x00000041, 0x20e077bd, 0x000000e0, 0x000000c4 },
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{ 0x00000041, 0x20e477bd, 0x000000e4, 0x000000c0 },
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{ 0x00600001, 0x202003be, 0x000000e0, 0x00000000 },
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{ 0x00600001, 0x204003be, 0x000000e4, 0x00000000 },
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{ 0x00600001, 0x206003be, 0x008d0060, 0x00000000 },
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{ 0x00600031, 0x20001fbc, 0x008d0000, 0x8640c800 },
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{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
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{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
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{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
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{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
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{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
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{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
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{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
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{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
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@ -1,184 +0,0 @@
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/*
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* Copyright © 2007 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Wang Zhenyu <zhenyu.z.wang@intel.com>
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*/
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/*
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* This's for exa composite operation in no mask picture case.
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* The simplest case is just sending what src picture has to dst picture.
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*/
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/* I think this should be same as in g4a program for texture video,
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as we also use 16-pixel dispatch. and SF scale in g3 is useful for us. */
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/* The initial payload of the thread is always g0.
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* WM_URB (incoming URB entries) is g3
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* X0_R is g4
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* X1_R is g5
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* Y0_R is g6
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* Y1_R is g7
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*/
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/* Set up the X/Y screen coordinates of the pixels in our 4 subspans. Each
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* subspan is a 2x2 rectangle, and the screen x/y of the upper left of each
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* subspan are given in GRF register 1.2 through 1.5 (which, with the word
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* addressing below, are 1.4 through 1.11).
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*
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* The result is WM_X*_R and WM_Y*R being:
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*
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* X0: {ss0.x, ss0.x+1, ss0.x, ss0.x+1, ss1.x, ss1.x+1, ss1.x, ss1.x+y}
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* Y0: {ss0.y, ss0.y, ss0.y+1, ss0.y+1, ss1.y, ss1.y, ss1.y+1, ss1.y+1}
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* X1: {ss2.x, ss2.x+1, ss2.x, ss2.x+1, ss3.x, ss3.x+1, ss3.x, ss3.x+y}
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* Y1: {ss2.y, ss2.y, ss2.y+1, ss2.y+1, ss3.y, ss3.y, ss3.y+1, ss3.y+1}
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*/
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/* Set up ss0.x coordinates*/
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mov (1) g4<1>F g1.8<0,1,0>UW { align1 };
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add (1) g4.4<1>F g1.8<0,1,0>UW 1UB { align1 };
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mov (1) g4.8<1>F g1.8<0,1,0>UW { align1 };
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add (1) g4.12<1>F g1.8<0,1,0>UW 1UB { align1 };
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/* Set up ss0.y coordinates */
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mov (1) g6<1>F g1.10<0,1,0>UW { align1 };
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mov (1) g6.4<1>F g1.10<0,1,0>UW { align1 };
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add (1) g6.8<1>F g1.10<0,1,0>UW 1UB { align1 };
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add (1) g6.12<1>F g1.10<0,1,0>UW 1UB { align1 };
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/* set up ss1.x coordinates */
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mov (1) g4.16<1>F g1.12<0,1,0>UW { align1 };
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add (1) g4.20<1>F g1.12<0,1,0>UW 1UB { align1 };
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mov (1) g4.24<1>F g1.12<0,1,0>UW { align1 };
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add (1) g4.28<1>F g1.12<0,1,0>UW 1UB { align1 };
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/* set up ss1.y coordinates */
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mov (1) g6.16<1>F g1.14<0,1,0>UW { align1 };
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mov (1) g6.20<1>F g1.14<0,1,0>UW { align1 };
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add (1) g6.24<1>F g1.14<0,1,0>UW 1UB { align1 };
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add (1) g6.28<1>F g1.14<0,1,0>UW 1UB { align1 };
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/* Set up ss2.x coordinates */
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mov (1) g5<1>F g1.16<0,1,0>UW { align1 };
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add (1) g5.4<1>F g1.16<0,1,0>UW 1UB { align1 };
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mov (1) g5.8<1>F g1.16<0,1,0>UW { align1 };
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add (1) g5.12<1>F g1.16<0,1,0>UW 1UB { align1 };
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/* Set up ss2.y coordinates */
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mov (1) g7<1>F g1.18<0,1,0>UW { align1 };
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mov (1) g7.4<1>F g1.18<0,1,0>UW { align1 };
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add (1) g7.8<1>F g1.18<0,1,0>UW 1UB { align1 };
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add (1) g7.12<1>F g1.18<0,1,0>UW 1UB { align1 };
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/* Set up ss3.x coordinates */
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mov (1) g5.16<1>F g1.20<0,1,0>UW { align1 };
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add (1) g5.20<1>F g1.20<0,1,0>UW 1UB { align1 };
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mov (1) g5.24<1>F g1.20<0,1,0>UW { align1 };
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add (1) g5.28<1>F g1.20<0,1,0>UW 1UB { align1 };
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/* Set up ss3.y coordinates */
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mov (1) g7.16<1>F g1.22<0,1,0>UW { align1 };
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mov (1) g7.20<1>F g1.22<0,1,0>UW { align1 };
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add (1) g7.24<1>F g1.22<0,1,0>UW 1UB { align1 };
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add (1) g7.28<1>F g1.22<0,1,0>UW 1UB { align1 };
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/* Now, map these screen space coordinates into texture coordinates. */
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/* subtract screen-space X origin of vertex 0. */
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/* for rotation, texture y is from ssX.x, so g4,g5 will be Y */
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add (8) g4<1>F g4<8,8,1>F -g1<0,1,0>F { align1 };
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add (8) g5<1>F g5<8,8,1>F -g1<0,1,0>F { align1 };
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/* scale by texture X increment */
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mul (8) g4<1>F g4<8,8,1>F g3.20<0,1,0>F { align1 };
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mul (8) g5<1>F g5<8,8,1>F g3.20<0,1,0>F { align1 };
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/* add in texture X offset */
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add (8) g4<1>F g4<8,8,1>F g3.28<0,1,0>F { align1 };
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add (8) g5<1>F g5<8,8,1>F g3.28<0,1,0>F { align1 };
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/* texture Y is from ssX.x */
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/* subtract screen-space Y origin of vertex 0. */
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add (8) g6<1>F g6<8,8,1>F -g1.4<0,1,0>F { align1 };
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add (8) g7<1>F g7<8,8,1>F -g1.4<0,1,0>F { align1 };
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/* scale by texture Y increment */
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mul (8) g6<1>F g6<8,8,1>F g3.16<0,1,0>F { align1 };
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mul (8) g7<1>F g7<8,8,1>F g3.16<0,1,0>F { align1 };
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/* add in texture Y offset */
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add (8) g6<1>F g6<8,8,1>F g3.12<0,1,0>F { align1 };
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add (8) g7<1>F g7<8,8,1>F g3.12<0,1,0>F { align1 };
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/* prepare sampler read back gX register, which would be written back to output */
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/* use simd16 sampler, param 0 is u, param 1 is v. */
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/* 'payload' loading, assuming tex coord start from g4 */
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mov (8) m1<1>F g6<8,8,1>F { align1 };
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mov (8) m2<1>F g7<8,8,1>F { align1 };
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mov (8) m3<1>F g4<8,8,1>F { align1 };
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mov (8) m4<1>F g5<8,8,1>F { align1 };
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/* m0 will be copied with g0, as it contains send desc */
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/* emit sampler 'send' cmd */
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send (16) 0 /* msg reg index */
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g12<1>UW /* readback */
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g0<8,8,1>UW /* copy to msg start reg*/
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sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype)
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/* here(src->dst) we should use src_sampler and src_surface */
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mlen 5 rlen 8 { align1 }; /* required message len 5, readback len 8 */
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mov (8) g19<1>UD g19<8,8,1>UD { align1 }; /* wait sampler return */
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/* if we set up read-back reg correctly, emit dataport write 'send' cmd with EOT */
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/* m0, m1 are all direct passed by PS thread payload */
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mov (8) m1<1>F g1<8,8,1>F { align1 };
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/* prepare data in m2-m5 for subspan(1,0), m6-m9 for subspan(3,2), then it's ready to write */
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/* g12 -> m2
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g13 -> m6
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g14 -> m3
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g15 -> m7
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g16 -> m4
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g17 -> m8
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g18 -> m5
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g19 -> m9
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*/
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mov (8) m2<1>F g12<8,8,1>F { align1 };
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mov (8) m3<1>F g14<8,8,1>F { align1 };
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mov (8) m4<1>F g16<8,8,1>F { align1 };
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mov (8) m5<1>F g18<8,8,1>F { align1 };
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mov (8) m6<1>F g13<8,8,1>F { align1 };
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mov (8) m7<1>F g15<8,8,1>F { align1 };
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mov (8) m8<1>F g17<8,8,1>F { align1 };
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mov (8) m9<1>F g19<8,8,1>F { align1 };
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/* m0, m1 are all direct passed by PS thread payload */
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mov (8) m1<1>UD g1<8,8,1>UD { align1 mask_disable };
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/* write */
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send (16) 0 acc0<1>UW g0<8,8,1>UW write (
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0, /* binding_table */
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8, /* pixel scordboard clear, msg type simd16 single source */
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4, /* render target write */
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0 /* no write commit message */
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)
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mlen 10
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rlen 0
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{ align1 EOT };
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nop;
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nop;
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nop;
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nop;
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nop;
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nop;
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nop;
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nop;
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nop;
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@ -1,70 +0,0 @@
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{ 0x00000001, 0x2080013d, 0x00000028, 0x00000000 },
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{ 0x00000040, 0x20840d3d, 0x00000028, 0x00000001 },
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{ 0x00000001, 0x2088013d, 0x00000028, 0x00000000 },
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{ 0x00000040, 0x208c0d3d, 0x00000028, 0x00000001 },
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{ 0x00000001, 0x20c0013d, 0x0000002a, 0x00000000 },
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{ 0x00000001, 0x20c4013d, 0x0000002a, 0x00000000 },
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{ 0x00000040, 0x20c80d3d, 0x0000002a, 0x00000001 },
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{ 0x00000040, 0x20cc0d3d, 0x0000002a, 0x00000001 },
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{ 0x00000001, 0x2090013d, 0x0000002c, 0x00000000 },
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{ 0x00000040, 0x20940d3d, 0x0000002c, 0x00000001 },
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{ 0x00000001, 0x2098013d, 0x0000002c, 0x00000000 },
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{ 0x00000040, 0x209c0d3d, 0x0000002c, 0x00000001 },
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{ 0x00000001, 0x20d0013d, 0x0000002e, 0x00000000 },
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{ 0x00000001, 0x20d4013d, 0x0000002e, 0x00000000 },
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{ 0x00000040, 0x20d80d3d, 0x0000002e, 0x00000001 },
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{ 0x00000040, 0x20dc0d3d, 0x0000002e, 0x00000001 },
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{ 0x00000001, 0x20a0013d, 0x00000030, 0x00000000 },
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{ 0x00000040, 0x20a40d3d, 0x00000030, 0x00000001 },
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{ 0x00000001, 0x20a8013d, 0x00000030, 0x00000000 },
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{ 0x00000040, 0x20ac0d3d, 0x00000030, 0x00000001 },
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{ 0x00000001, 0x20e0013d, 0x00000032, 0x00000000 },
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{ 0x00000001, 0x20e4013d, 0x00000032, 0x00000000 },
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{ 0x00000040, 0x20e80d3d, 0x00000032, 0x00000001 },
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{ 0x00000040, 0x20ec0d3d, 0x00000032, 0x00000001 },
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{ 0x00000001, 0x20b0013d, 0x00000034, 0x00000000 },
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{ 0x00000040, 0x20b40d3d, 0x00000034, 0x00000001 },
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{ 0x00000001, 0x20b8013d, 0x00000034, 0x00000000 },
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{ 0x00000040, 0x20bc0d3d, 0x00000034, 0x00000001 },
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{ 0x00000001, 0x20f0013d, 0x00000036, 0x00000000 },
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{ 0x00000001, 0x20f4013d, 0x00000036, 0x00000000 },
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{ 0x00000040, 0x20f80d3d, 0x00000036, 0x00000001 },
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{ 0x00000040, 0x20fc0d3d, 0x00000036, 0x00000001 },
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{ 0x00600040, 0x208077bd, 0x008d0080, 0x00004020 },
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{ 0x00600040, 0x20a077bd, 0x008d00a0, 0x00004020 },
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{ 0x00600041, 0x208077bd, 0x008d0080, 0x00000074 },
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{ 0x00600041, 0x20a077bd, 0x008d00a0, 0x00000074 },
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{ 0x00600040, 0x208077bd, 0x008d0080, 0x0000007c },
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{ 0x00600040, 0x20a077bd, 0x008d00a0, 0x0000007c },
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{ 0x00600040, 0x20c077bd, 0x008d00c0, 0x00004024 },
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{ 0x00600040, 0x20e077bd, 0x008d00e0, 0x00004024 },
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{ 0x00600041, 0x20c077bd, 0x008d00c0, 0x00000070 },
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{ 0x00600041, 0x20e077bd, 0x008d00e0, 0x00000070 },
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{ 0x00600040, 0x20c077bd, 0x008d00c0, 0x0000006c },
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{ 0x00600040, 0x20e077bd, 0x008d00e0, 0x0000006c },
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{ 0x00600001, 0x202003be, 0x008d00c0, 0x00000000 },
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{ 0x00600001, 0x204003be, 0x008d00e0, 0x00000000 },
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{ 0x00600001, 0x206003be, 0x008d0080, 0x00000000 },
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{ 0x00600001, 0x208003be, 0x008d00a0, 0x00000000 },
|
||||
{ 0x00800031, 0x21801d29, 0x008d0000, 0x02580001 },
|
||||
{ 0x00600001, 0x22600021, 0x008d0260, 0x00000000 },
|
||||
{ 0x00600001, 0x202003be, 0x008d0020, 0x00000000 },
|
||||
{ 0x00600001, 0x204003be, 0x008d0180, 0x00000000 },
|
||||
{ 0x00600001, 0x206003be, 0x008d01c0, 0x00000000 },
|
||||
{ 0x00600001, 0x208003be, 0x008d0200, 0x00000000 },
|
||||
{ 0x00600001, 0x20a003be, 0x008d0240, 0x00000000 },
|
||||
{ 0x00600001, 0x20c003be, 0x008d01a0, 0x00000000 },
|
||||
{ 0x00600001, 0x20e003be, 0x008d01e0, 0x00000000 },
|
||||
{ 0x00600001, 0x210003be, 0x008d0220, 0x00000000 },
|
||||
{ 0x00600001, 0x212003be, 0x008d0260, 0x00000000 },
|
||||
{ 0x00600201, 0x20200022, 0x008d0020, 0x00000000 },
|
||||
{ 0x00800031, 0x24001d28, 0x008d0000, 0x85a04800 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
Loading…
Reference in New Issue