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Remove i830+ driver's use of CARD*/INT* types for great justice. 

Several uses are actually left, which are determined by the X Server
interfaces we're implementing.
This commit is contained in:
Eric Anholt 2008-03-11 12:07:52 -07:00
parent 15f17aa682
commit 9a62d3b598
28 changed files with 559 additions and 563 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/bios_reader/bios_reader.c
View File

@ -38,7 +38,7 @@
/* Make a fake pI830 so we can easily pull i830_bios.c code in here. */
struct _fake_i830 {
CARD8 *VBIOS;
uint8_t *VBIOS;
};
struct _fake_i830 I830;
struct _fake_i830 *pI830 = &I830;
@ -93,7 +93,7 @@ int main(int argc, char **argv)
struct lvds_bdb_2 *lvds2;
struct lvds_bdb_2_fp_params *fpparam;
struct lvds_bdb_2_fp_edid_dtd *fptiming;
CARD8 *timing_ptr;
uint8_t *timing_ptr;
id = INTEL_BIOS_8(start);
block_size = INTEL_BIOS_16(start + 1) + 3;

14
src/common.h
View File

@ -230,14 +230,14 @@ union intfloat {
/* Memory mapped register access macros */
#define INREG8(addr) *(volatile CARD8 *)(RecPtr->MMIOBase + (addr))
#define INREG16(addr) *(volatile CARD16 *)(RecPtr->MMIOBase + (addr))
#define INREG(addr) *(volatile CARD32 *)(RecPtr->MMIOBase + (addr))
#define INGTT(addr) *(volatile CARD32 *)(RecPtr->GTTBase + (addr))
#define INREG8(addr) *(volatile uint8_t *)(RecPtr->MMIOBase + (addr))
#define INREG16(addr) *(volatile uint16_t *)(RecPtr->MMIOBase + (addr))
#define INREG(addr) *(volatile uint32_t *)(RecPtr->MMIOBase + (addr))
#define INGTT(addr) *(volatile uint32_t *)(RecPtr->GTTBase + (addr))
#define POSTING_READ(addr) (void)INREG(addr)
#define OUTREG8(addr, val) do { \
*(volatile CARD8 *)(RecPtr->MMIOBase + (addr)) = (val); \
*(volatile uint8_t *)(RecPtr->MMIOBase + (addr)) = (val); \
if (I810_DEBUG&DEBUG_VERBOSE_OUTREG) { \
ErrorF("OUTREG8(0x%lx, 0x%lx) in %s\n", (unsigned long)(addr), \
(unsigned long)(val), FUNCTION_NAME); \
@ -245,7 +245,7 @@ union intfloat {
} while (0)
#define OUTREG16(addr, val) do { \
*(volatile CARD16 *)(RecPtr->MMIOBase + (addr)) = (val); \
*(volatile uint16_t *)(RecPtr->MMIOBase + (addr)) = (val); \
if (I810_DEBUG&DEBUG_VERBOSE_OUTREG) { \
ErrorF("OUTREG16(0x%lx, 0x%lx) in %s\n", (unsigned long)(addr), \
(unsigned long)(val), FUNCTION_NAME); \
@ -253,7 +253,7 @@ union intfloat {
} while (0)
#define OUTREG(addr, val) do { \
*(volatile CARD32 *)(RecPtr->MMIOBase + (addr)) = (val); \
*(volatile uint32_t *)(RecPtr->MMIOBase + (addr)) = (val); \
if (I810_DEBUG&DEBUG_VERBOSE_OUTREG) { \
ErrorF("OUTREG(0x%lx, 0x%lx) in %s\n", (unsigned long)(addr), \
(unsigned long)(val), FUNCTION_NAME); \

147
src/i830.h
View File

@ -259,7 +259,7 @@ typedef struct _I830CrtcPrivateRec {
int dpms_mode;
/* Lookup table values to be set when the CRTC is enabled */
CARD8 lut_r[256], lut_g[256], lut_b[256];
uint8_t lut_r[256], lut_g[256], lut_b[256];
i830_memory *rotate_mem;
/* Card virtual address of the cursor */
@ -450,7 +450,7 @@ typedef struct _I830Rec {
pciVideoPtr PciInfo;
PCITAG PciTag;
#endif
CARD8 variant;
uint8_t variant;
unsigned int BR[20];
@ -505,8 +505,8 @@ typedef struct _I830Rec {
/** Transform pointers for src/mask, or NULL if identity */
PictTransform *transform[2];
/* i915 EXA render state */
CARD32 mapstate[6];
CARD32 samplerstate[6];
uint32_t mapstate[6];
uint32_t samplerstate[6];
Bool directRenderingDisabled; /* DRI disabled in PreInit. */
Bool directRenderingEnabled; /* DRI enabled this generation. */
@ -529,8 +529,8 @@ typedef struct _I830Rec {
Bool StolenOnly;
Bool swfSaved;
CARD32 saveSWF0;
CARD32 saveSWF4;
uint32_t saveSWF0;
uint32_t saveSWF4;
Bool checkDevices;
@ -553,70 +553,70 @@ typedef struct _I830Rec {
enum backlight_control backlight_control_method;
CARD32 saveDSPACNTR;
CARD32 saveDSPBCNTR;
CARD32 savePIPEACONF;
CARD32 savePIPEBCONF;
CARD32 savePIPEASRC;
CARD32 savePIPEBSRC;
CARD32 saveFPA0;
CARD32 saveFPA1;
CARD32 saveDPLL_A;
CARD32 saveDPLL_A_MD;
CARD32 saveHTOTAL_A;
CARD32 saveHBLANK_A;
CARD32 saveHSYNC_A;
CARD32 saveVTOTAL_A;
CARD32 saveVBLANK_A;
CARD32 saveVSYNC_A;
CARD32 saveBCLRPAT_A;
CARD32 saveDSPASTRIDE;
CARD32 saveDSPASIZE;
CARD32 saveDSPAPOS;
CARD32 saveDSPABASE;
CARD32 saveDSPASURF;
CARD32 saveDSPATILEOFF;
CARD32 saveFPB0;
CARD32 saveFPB1;
CARD32 saveDPLL_B;
CARD32 saveDPLL_B_MD;
CARD32 saveHTOTAL_B;
CARD32 saveHBLANK_B;
CARD32 saveHSYNC_B;
CARD32 saveVTOTAL_B;
CARD32 saveVBLANK_B;
CARD32 saveVSYNC_B;
CARD32 saveBCLRPAT_B;
CARD32 saveDSPBSTRIDE;
CARD32 saveDSPBSIZE;
CARD32 saveDSPBPOS;
CARD32 saveDSPBBASE;
CARD32 saveDSPBSURF;
CARD32 saveDSPBTILEOFF;
CARD32 saveVCLK_DIVISOR_VGA0;
CARD32 saveVCLK_DIVISOR_VGA1;
CARD32 saveVCLK_POST_DIV;
CARD32 saveVGACNTRL;
CARD32 saveADPA;
CARD32 saveLVDS;
CARD32 saveDVOA;
CARD32 saveDVOB;
CARD32 saveDVOC;
CARD32 savePP_ON;
CARD32 savePP_OFF;
CARD32 savePP_CONTROL;
CARD32 savePP_CYCLE;
CARD32 savePFIT_CONTROL;
CARD32 savePaletteA[256];
CARD32 savePaletteB[256];
CARD32 saveSWF[17];
CARD32 saveBLC_PWM_CTL;
CARD32 saveBLC_PWM_CTL2;
CARD32 saveFBC_CFB_BASE;
CARD32 saveFBC_LL_BASE;
CARD32 saveFBC_CONTROL2;
CARD32 saveFBC_CONTROL;
CARD32 saveFBC_FENCE_OFF;
uint32_t saveDSPACNTR;
uint32_t saveDSPBCNTR;
uint32_t savePIPEACONF;
uint32_t savePIPEBCONF;
uint32_t savePIPEASRC;
uint32_t savePIPEBSRC;
uint32_t saveFPA0;
uint32_t saveFPA1;
uint32_t saveDPLL_A;
uint32_t saveDPLL_A_MD;
uint32_t saveHTOTAL_A;
uint32_t saveHBLANK_A;
uint32_t saveHSYNC_A;
uint32_t saveVTOTAL_A;
uint32_t saveVBLANK_A;
uint32_t saveVSYNC_A;
uint32_t saveBCLRPAT_A;
uint32_t saveDSPASTRIDE;
uint32_t saveDSPASIZE;
uint32_t saveDSPAPOS;
uint32_t saveDSPABASE;
uint32_t saveDSPASURF;
uint32_t saveDSPATILEOFF;
uint32_t saveFPB0;
uint32_t saveFPB1;
uint32_t saveDPLL_B;
uint32_t saveDPLL_B_MD;
uint32_t saveHTOTAL_B;
uint32_t saveHBLANK_B;
uint32_t saveHSYNC_B;
uint32_t saveVTOTAL_B;
uint32_t saveVBLANK_B;
uint32_t saveVSYNC_B;
uint32_t saveBCLRPAT_B;
uint32_t saveDSPBSTRIDE;
uint32_t saveDSPBSIZE;
uint32_t saveDSPBPOS;
uint32_t saveDSPBBASE;
uint32_t saveDSPBSURF;
uint32_t saveDSPBTILEOFF;
uint32_t saveVCLK_DIVISOR_VGA0;
uint32_t saveVCLK_DIVISOR_VGA1;
uint32_t saveVCLK_POST_DIV;
uint32_t saveVGACNTRL;
uint32_t saveADPA;
uint32_t saveLVDS;
uint32_t saveDVOA;
uint32_t saveDVOB;
uint32_t saveDVOC;
uint32_t savePP_ON;
uint32_t savePP_OFF;
uint32_t savePP_CONTROL;
uint32_t savePP_CYCLE;
uint32_t savePFIT_CONTROL;
uint32_t savePaletteA[256];
uint32_t savePaletteB[256];
uint32_t saveSWF[17];
uint32_t saveBLC_PWM_CTL;
uint32_t saveBLC_PWM_CTL2;
uint32_t saveFBC_CFB_BASE;
uint32_t saveFBC_LL_BASE;
uint32_t saveFBC_CONTROL2;
uint32_t saveFBC_CONTROL;
uint32_t saveFBC_FENCE_OFF;
enum last_3d *last_3d;
@ -843,11 +843,4 @@ extern const int I830CopyROP[16];
#define QUIRK_IVCH_NEED_DVOB 0x00000010
extern void i830_fixup_devices(ScrnInfoPtr);
/* Mirrors CARD32 definition in Xmd.h */
#ifdef LONG64
#define CARD32_HEX "x"
#else
#define CARD32_HEX "lx"
#endif
#endif /* _I830_H_ */

2
src/i830_bios.c
View File

@ -171,7 +171,7 @@ i830_bios_get_panel_mode(ScrnInfoPtr pScrn, Bool *wants_dither)
struct lvds_bdb_2_fp_params *fpparam;
struct lvds_bdb_2_fp_edid_dtd *fptiming;
DisplayModePtr fixed_mode;
CARD8 *timing_ptr;
uint8_t *timing_ptr;
id = INTEL_BIOS_8(start);
block_size = INTEL_BIOS_16(start + 1) + 3;

134
src/i830_bios.h
View File

@ -32,20 +32,20 @@
struct vbt_header {
char signature[20]; /**< Always starts with 'VBT$' */
CARD16 version; /**< decimal */
CARD16 header_size; /**< in bytes */
CARD16 vbt_size; /**< in bytes */
CARD8 vbt_checksum;
CARD8 reserved0;
CARD32 bdb_offset; /**< from beginning of VBT */
CARD32 aim_offset[4]; /**< from beginning of VBT */
uint16_t version; /**< decimal */
uint16_t header_size; /**< in bytes */
uint16_t vbt_size; /**< in bytes */
uint8_t vbt_checksum;
uint8_t reserved0;
uint32_t bdb_offset; /**< from beginning of VBT */
uint32_t aim_offset[4]; /**< from beginning of VBT */
} __attribute__((packed));
struct bdb_header {
char signature[16]; /**< Always 'BIOS_DATA_BLOCK' */
CARD16 version; /**< decimal */
CARD16 header_size; /**< in bytes */
CARD16 bdb_size; /**< in bytes */
uint16_t version; /**< decimal */
uint16_t header_size; /**< in bytes */
uint16_t bdb_size; /**< in bytes */
} __attribute__((packed));
#define LVDS_CAP_EDID (1 << 6)
@ -56,89 +56,89 @@ struct bdb_header {
#define LVDS_CAP_PFIT_GRAPHICS (1 << 1)
#define LVDS_CAP_PFIT_TEXT (1 << 0)
struct lvds_bdb_1 {
CARD8 id; /**< 40 */
CARD16 size;
CARD8 panel_type;
CARD8 reserved0;
CARD16 caps;
uint8_t id; /**< 40 */
uint16_t size;
uint8_t panel_type;
uint8_t reserved0;
uint16_t caps;
} __attribute__((packed));
struct lvds_bdb_2_fp_params {
CARD16 x_res;
CARD16 y_res;
CARD32 lvds_reg;
CARD32 lvds_reg_val;
CARD32 pp_on_reg;
CARD32 pp_on_reg_val;
CARD32 pp_off_reg;
CARD32 pp_off_reg_val;
CARD32 pp_cycle_reg;
CARD32 pp_cycle_reg_val;
CARD32 pfit_reg;
CARD32 pfit_reg_val;
CARD16 terminator;
uint16_t x_res;
uint16_t y_res;
uint32_t lvds_reg;
uint32_t lvds_reg_val;
uint32_t pp_on_reg;
uint32_t pp_on_reg_val;
uint32_t pp_off_reg;
uint32_t pp_off_reg_val;
uint32_t pp_cycle_reg;
uint32_t pp_cycle_reg_val;
uint32_t pfit_reg;
uint32_t pfit_reg_val;
uint16_t terminator;
} __attribute__((packed));
struct lvds_bdb_2_fp_edid_dtd {
CARD16 dclk; /**< In 10khz */
CARD8 hactive;
CARD8 hblank;
CARD8 high_h; /**< 7:4 = hactive 11:8, 3:0 = hblank 11:8 */
CARD8 vactive;
CARD8 vblank;
CARD8 high_v; /**< 7:4 = vactive 11:8, 3:0 = vblank 11:8 */
CARD8 hsync_off;
CARD8 hsync_pulse_width;
CARD8 vsync_off;
CARD8 high_hsync_off; /**< 7:6 = hsync off 9:8 */
CARD8 h_image;
CARD8 v_image;
CARD8 max_hv;
CARD8 h_border;
CARD8 v_border;
CARD8 flags;
uint16_t dclk; /**< In 10khz */
uint8_t hactive;
uint8_t hblank;
uint8_t high_h; /**< 7:4 = hactive 11:8, 3:0 = hblank 11:8 */
uint8_t vactive;
uint8_t vblank;
uint8_t high_v; /**< 7:4 = vactive 11:8, 3:0 = vblank 11:8 */
uint8_t hsync_off;
uint8_t hsync_pulse_width;
uint8_t vsync_off;
uint8_t high_hsync_off; /**< 7:6 = hsync off 9:8 */
uint8_t h_image;
uint8_t v_image;
uint8_t max_hv;
uint8_t h_border;
uint8_t v_border;
uint8_t flags;
#define FP_EDID_FLAG_VSYNC_POSITIVE (1 << 2)
#define FP_EDID_FLAG_HSYNC_POSITIVE (1 << 1)
} __attribute__((packed));
struct lvds_bdb_2_entry {
CARD16 fp_params_offset; /**< From beginning of BDB */
CARD8 fp_params_size;
CARD16 fp_edid_dtd_offset;
CARD8 fp_edid_dtd_size;
CARD16 fp_edid_pid_offset;
CARD8 fp_edid_pid_size;
uint16_t fp_params_offset; /**< From beginning of BDB */
uint8_t fp_params_size;
uint16_t fp_edid_dtd_offset;
uint8_t fp_edid_dtd_size;
uint16_t fp_edid_pid_offset;
uint8_t fp_edid_pid_size;
} __attribute__((packed));
struct lvds_bdb_2 {
CARD8 id; /**< 41 */
CARD16 size;
CARD8 table_size; /* not sure on this one */
uint8_t id; /**< 41 */
uint16_t size;
uint8_t table_size; /* not sure on this one */
struct lvds_bdb_2_entry panels[16];
} __attribute__((packed));
struct aimdb_header {
char signature[16];
char oem_device[20];
CARD16 aimdb_version;
CARD16 aimdb_header_size;
CARD16 aimdb_size;
uint16_t aimdb_version;
uint16_t aimdb_header_size;
uint16_t aimdb_size;
} __attribute__((packed));
struct aimdb_block {
CARD8 aimdb_id;
CARD16 aimdb_size;
uint8_t aimdb_id;
uint16_t aimdb_size;
} __attribute__((packed));
struct vch_panel_data {
CARD16 fp_timing_offset;
CARD8 fp_timing_size;
CARD16 dvo_timing_offset;
CARD8 dvo_timing_size;
CARD16 text_fitting_offset;
CARD8 text_fitting_size;
CARD16 graphics_fitting_offset;
CARD8 graphics_fitting_size;
uint16_t fp_timing_offset;
uint8_t fp_timing_size;
uint16_t dvo_timing_offset;
uint8_t dvo_timing_size;
uint16_t text_fitting_offset;
uint8_t text_fitting_size;
uint16_t graphics_fitting_offset;
uint8_t graphics_fitting_size;
} __attribute__((packed));
struct vch_bdb_22 {

26
src/i830_crt.c
View File

@ -39,7 +39,7 @@ i830_crt_dpms(xf86OutputPtr output, int mode)
{
ScrnInfoPtr pScrn = output->scrn;
I830Ptr pI830 = I830PTR(pScrn);
CARD32 temp;
uint32_t temp;
temp = INREG(ADPA);
temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
@ -109,7 +109,7 @@ i830_crt_mode_set(xf86OutputPtr output, DisplayModePtr mode,
xf86CrtcPtr crtc = output->crtc;
I830CrtcPrivatePtr i830_crtc = crtc->driver_private;
int dpll_md_reg;
CARD32 adpa, dpll_md;
uint32_t adpa, dpll_md;
if (i830_crtc->pipe == 0)
dpll_md_reg = DPLL_A_MD;
@ -158,7 +158,7 @@ i830_crt_detect_hotplug(xf86OutputPtr output)
{
ScrnInfoPtr pScrn = output->scrn;
I830Ptr pI830 = I830PTR(pScrn);
CARD32 temp;
uint32_t temp;
const int timeout_ms = 1000;
int starttime, curtime;
@ -199,13 +199,13 @@ i830_crt_detect_load (xf86CrtcPtr crtc,
ScrnInfoPtr pScrn = output->scrn;
I830Ptr pI830 = I830PTR(pScrn);
I830CrtcPrivatePtr i830_crtc = I830CrtcPrivate(crtc);
CARD32 save_bclrpat;
CARD32 save_vtotal;
CARD32 vtotal, vactive;
CARD32 vsample;
CARD32 vblank, vblank_start, vblank_end;
CARD32 dsl;
CARD8 st00;
uint32_t save_bclrpat;
uint32_t save_vtotal;
uint32_t vtotal, vactive;
uint32_t vsample;
uint32_t vblank, vblank_start, vblank_end;
uint32_t dsl;
uint8_t st00;
int bclrpat_reg, pipeconf_reg, pipe_dsl_reg;
int vtotal_reg, vblank_reg, vsync_reg;
int pipe = i830_crtc->pipe;
@ -245,7 +245,7 @@ i830_crt_detect_load (xf86CrtcPtr crtc,
if (IS_I9XX (pI830))
{
CARD32 pipeconf = INREG(pipeconf_reg);
uint32_t pipeconf = INREG(pipeconf_reg);
OUTREG(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
st00 = pI830->readStandard (pI830, 0x3c2);
@ -263,8 +263,8 @@ i830_crt_detect_load (xf86CrtcPtr crtc,
*/
if (vblank_start <= vactive && vblank_end >= vtotal)
{
CARD32 vsync = INREG(vsync_reg);
CARD32 vsync_start = (vsync & 0xffff) + 1;
uint32_t vsync = INREG(vsync_reg);
uint32_t vsync_start = (vsync & 0xffff) + 1;
vblank_start = vsync_start;
OUTREG(vblank_reg, (vblank_start - 1) | ((vblank_end - 1) << 16));

14
src/i830_cursor.c
View File

@ -90,7 +90,7 @@ I830InitHWCursor(ScrnInfoPtr pScrn)
{
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
I830Ptr pI830 = I830PTR(pScrn);
CARD32 temp;
uint32_t temp;
int i;
DPRINTF(PFX, "I830InitHWCursor\n");
@ -141,7 +141,7 @@ i830_crtc_load_cursor_image (xf86CrtcPtr crtc, unsigned char *src)
{
I830Ptr pI830 = I830PTR(crtc->scrn);
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
CARD8 *pcurs;
uint8_t *pcurs;
pcurs = pI830->FbBase + intel_crtc->cursor_offset;
@ -155,9 +155,9 @@ i830_crtc_load_cursor_argb (xf86CrtcPtr crtc, CARD32 *image)
{
I830Ptr pI830 = I830PTR(crtc->scrn);
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
CARD32 *pcurs;
uint32_t *pcurs;
pcurs = (CARD32 *) (pI830->FbBase + intel_crtc->cursor_argb_offset);
pcurs = (uint32_t *) (pI830->FbBase + intel_crtc->cursor_argb_offset);
intel_crtc->cursor_is_argb = TRUE;
memcpy (pcurs, image, I810_CURSOR_Y * I810_CURSOR_X * 4);
@ -170,7 +170,7 @@ i830_crtc_set_cursor_position (xf86CrtcPtr crtc, int x, int y)
ScrnInfoPtr scrn = crtc->scrn;
I830Ptr pI830 = I830PTR(scrn);
I830CrtcPrivatePtr intel_crtc = I830CrtcPrivate(crtc);
CARD32 temp;
uint32_t temp;
temp = 0;
if (x < 0) {
@ -204,7 +204,7 @@ i830_crtc_show_cursor (xf86CrtcPtr crtc)
I830Ptr pI830 = I830PTR(scrn);
I830CrtcPrivatePtr intel_crtc = I830CrtcPrivate(crtc);
int pipe = intel_crtc->pipe;
CARD32 temp;
uint32_t temp;
int cursor_control = (pipe == 0 ? CURSOR_A_CONTROL :
CURSOR_B_CONTROL);
@ -242,7 +242,7 @@ i830_crtc_hide_cursor (xf86CrtcPtr crtc)
I830Ptr pI830 = I830PTR(scrn);
I830CrtcPrivatePtr intel_crtc = I830CrtcPrivate(crtc);
int pipe = intel_crtc->pipe;
CARD32 temp;
uint32_t temp;
int cursor_control = (pipe == 0 ? CURSOR_A_CONTROL :
CURSOR_B_CONTROL);

136
src/i830_debug.c
View File

@ -45,7 +45,8 @@
#include "i810_reg.h"
#define DEBUGSTRING(func) static char *func(I830Ptr pI830, int reg, CARD32 val)
#define DEBUGSTRING(func) static char *func(I830Ptr pI830, int reg, \
uint32_t val)
DEBUGSTRING(i830_debug_xyminus1)
{
@ -486,8 +487,8 @@ DEBUGSTRING(i810_debug_fence_new)
static struct i830SnapshotRec {
int reg;
char *name;
char *(*debug_output)(I830Ptr pI830, int reg, CARD32 val);
CARD32 val;
char *(*debug_output)(I830Ptr pI830, int reg, uint32_t val);
uint32_t val;
} i830_snapshot[] = {
DEFINEREG2(VCLK_DIVISOR_VGA0, i830_debug_fp),
DEFINEREG2(VCLK_DIVISOR_VGA1, i830_debug_fp),
@ -668,7 +669,7 @@ void i830CompareRegsToSnapshot(ScrnInfoPtr pScrn, char *where)
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Comparing regs from server start up to %s\n", where);
for (i = 0; i < NUM_I830_SNAPSHOTREGS; i++) {
CARD32 val = INREG(i830_snapshot[i].reg);
uint32_t val = INREG(i830_snapshot[i].reg);
if (i830_snapshot[i].val == val)
continue;
@ -752,7 +753,7 @@ void i830DumpRegs (ScrnInfoPtr pScrn)
xf86DrvMsg (pScrn->scrnIndex, X_INFO, "DumpRegsBegin\n");
for (i = 0; i < NUM_I830_SNAPSHOTREGS; i++) {
CARD32 val = INREG(i830_snapshot[i].reg);
uint32_t val = INREG(i830_snapshot[i].reg);
if (i830_snapshot[i].debug_output != NULL) {
char *debug = i830_snapshot[i].debug_output(pI830,
@ -783,7 +784,7 @@ void i830DumpRegs (ScrnInfoPtr pScrn)
dpll = INREG(pipe == 0 ? DPLL_A : DPLL_B);
if (IS_I9XX(pI830))
{
CARD32 lvds = INREG(LVDS);
uint32_t lvds = INREG(LVDS);
if ((lvds & LVDS_PORT_EN) &&
(lvds & LVDS_PIPEB_SELECT) == (pipe << 30))
{
@ -845,7 +846,7 @@ void i830DumpRegs (ScrnInfoPtr pScrn)
}
else
{
CARD32 lvds = INREG(LVDS);
uint32_t lvds = INREG(LVDS);
if (IS_I85X (pI830) &&
(lvds & LVDS_PORT_EN) &&
(lvds & LVDS_PIPEB_SELECT) == (pipe << 30))
@ -957,28 +958,27 @@ i830_dump_error_state(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
ErrorF("pgetbl_ctl: 0x%" CARD32_HEX "getbl_err: 0x%" CARD32_HEX "\n",
ErrorF("pgetbl_ctl: 0x%08x getbl_err: 0x%08x\n",
INREG(PGETBL_CTL), INREG(PGE_ERR));
ErrorF("ipeir: %" CARD32_HEX " iphdr: %" CARD32_HEX "\n", INREG(IPEIR),
INREG(IPEHR));
ErrorF("ipeir: 0x%08x iphdr: 0x%08x\n", INREG(IPEIR), INREG(IPEHR));
ErrorF("LP ring tail: %" CARD32_HEX " head: %" CARD32_HEX
" len: %" CARD32_HEX " start %" CARD32_HEX "\n",
ErrorF("LP ring tail: 0x%08x head: 0x%08x len: 0x%08x start 0x%08x\n",
INREG(LP_RING + RING_TAIL),
INREG(LP_RING + RING_HEAD) & HEAD_ADDR,
INREG(LP_RING + RING_LEN),
INREG(LP_RING + RING_START));
ErrorF("eir: %x esr: %x emr: %x\n",
ErrorF("eir: 0x%04x esr: 0x%04x emr: 0x%04x\n",
INREG16(EIR), INREG16(ESR), INREG16(EMR));
ErrorF("instdone: %x instpm: %x\n", INREG16(INST_DONE), INREG8(INST_PM));
ErrorF("instdone: 0x%04x instpm: 0x%04x\n",
INREG16(INST_DONE), INREG8(INST_PM));
ErrorF("memmode: %" CARD32_HEX " instps: %" CARD32_HEX "\n",
ErrorF("memmode: 0x%08x instps: 0x%08x\n",
INREG(MEMMODE), INREG(INST_PS));
ErrorF("hwstam: %x ier: %x imr: %x iir: %x\n",
ErrorF("hwstam: 0x%04x ier: 0x%04x imr: 0x%04x iir: 0x%04x\n",
INREG16(HWSTAM), INREG16(IER), INREG16(IMR), INREG16(IIR));
i830_dump_ring (pScrn);
}
@ -988,78 +988,80 @@ i965_dump_error_state(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
ErrorF("pgetbl_ctl: 0x%" CARD32_HEX " pgetbl_err: 0x%" CARD32_HEX "\n",
ErrorF("pgetbl_ctl: 0x%08x pgetbl_err: 0x%08x\n",
INREG(PGETBL_CTL), INREG(PGE_ERR));
ErrorF("ipeir: %" CARD32_HEX " iphdr: %" CARD32_HEX "\n",
ErrorF("ipeir: 0x%08x iphdr: 0x%08x\n",
INREG(IPEIR_I965), INREG(IPEHR_I965));
ErrorF("LP ring tail: %" CARD32_HEX " head: %" CARD32_HEX
" len: %" CARD32_HEX " start %" CARD32_HEX "\n",
ErrorF("LP ring tail: 0x%08x head: %x len: 0x%08x start 0x%08x\n",
INREG(LP_RING + RING_TAIL),
INREG(LP_RING + RING_HEAD) & HEAD_ADDR,
INREG(LP_RING + RING_LEN), INREG(LP_RING + RING_START));
INREG(LP_RING + RING_LEN),
INREG(LP_RING + RING_START));
ErrorF("Err ID (eir): %x Err Status (esr): %x Err Mask (emr): %x\n",
(int)INREG(EIR), (int)INREG(ESR), (int)INREG(EMR));
ErrorF("Err ID (eir): 0x%08x\n"
"Err Status (esr): 0x%08x\n"
"Err Mask (emr): 0x%08x\n",
INREG(EIR), INREG(ESR), INREG(EMR));
ErrorF("instdone: %x instdone_1: %x\n", (int)INREG(INST_DONE_I965),
(int)INREG(INST_DONE_1));
ErrorF("instpm: %x\n", (int)INREG(INST_PM));
ErrorF("instdone: 0x%08x instdone_1: 0x%08x\n",
INREG(INST_DONE_I965), INREG(INST_DONE_1));
ErrorF("instpm: 0x%08x\n", INREG(INST_PM));
ErrorF("memmode: %" CARD32_HEX " instps: %" CARD32_HEX "\n",
ErrorF("memmode: 0x%08x instps: 0x%08x\n",
INREG(MEMMODE), INREG(INST_PS_I965));
ErrorF("HW Status mask (hwstam): %x\nIRQ enable (ier): %x "
"imr: %x iir: %x\n",
(int)INREG(HWSTAM), (int)INREG(IER), (int)INREG(IMR),
(int)INREG(IIR));
ErrorF("HW Status mask (hwstam): 0x%08x\nIRQ enable (ier): 0x%08x "
"imr: 0x%08x iir: 0x%08x\n",
INREG(HWSTAM), INREG(IER), INREG(IMR), INREG(IIR));
ErrorF("acthd: %" CARD32_HEX " dma_fadd_p: %" CARD32_HEX "\n",
ErrorF("acthd: 0x%08x dma_fadd_p: 0x%08x\n",
INREG(ACTHD), INREG(DMA_FADD_P));
ErrorF("ecoskpd: %" CARD32_HEX " excc: %" CARD32_HEX "\n",
ErrorF("ecoskpd: 0x%08x excc: 0x%08x\n",
INREG(ECOSKPD), INREG(EXCC));
ErrorF("cache_mode: %x/%x\n", (int)INREG(CACHE_MODE_0),
(int)INREG(CACHE_MODE_1));
ErrorF("mi_arb_state: %x\n", (int)INREG(MI_ARB_STATE));
ErrorF("cache_mode: 0x%08x/0x%08x\n", INREG(CACHE_MODE_0),
INREG(CACHE_MODE_1));
ErrorF("mi_arb_state: 0x%08x\n", INREG(MI_ARB_STATE));
ErrorF("IA_VERTICES_COUNT_QW %x/%x\n",
(int)INREG(IA_VERTICES_COUNT_QW),
(int)INREG(IA_VERTICES_COUNT_QW+4));
ErrorF("IA_PRIMITIVES_COUNT_QW %x/%x\n",
(int)INREG(IA_PRIMITIVES_COUNT_QW),
(int)INREG(IA_PRIMITIVES_COUNT_QW+4));
ErrorF("IA_VERTICES_COUNT_QW 0x%08x/0x%08x\n",
INREG(IA_VERTICES_COUNT_QW),
INREG(IA_VERTICES_COUNT_QW+4));
ErrorF("IA_PRIMITIVES_COUNT_QW 0x%08x/0x%08x\n",
INREG(IA_PRIMITIVES_COUNT_QW),
INREG(IA_PRIMITIVES_COUNT_QW+4));
ErrorF("VS_INVOCATION_COUNT_QW %x/%x\n",
(int)INREG(VS_INVOCATION_COUNT_QW),
(int)INREG(VS_INVOCATION_COUNT_QW+4));
ErrorF("VS_INVOCATION_COUNT_QW 0x%08x/0x%08x\n",
INREG(VS_INVOCATION_COUNT_QW),
INREG(VS_INVOCATION_COUNT_QW+4));
ErrorF("GS_INVOCATION_COUNT_QW %x/%x\n",
(int)INREG(GS_INVOCATION_COUNT_QW),
(int)INREG(GS_INVOCATION_COUNT_QW+4));
ErrorF("GS_PRIMITIVES_COUNT_QW %x/%x\n",
(int)INREG(GS_PRIMITIVES_COUNT_QW),
(int)INREG(GS_PRIMITIVES_COUNT_QW+4));
ErrorF("GS_INVOCATION_COUNT_QW 0x%08x/0x%08x\n",
INREG(GS_INVOCATION_COUNT_QW),
INREG(GS_INVOCATION_COUNT_QW+4));
ErrorF("GS_PRIMITIVES_COUNT_QW 0x%08x/0x%08x\n",
INREG(GS_PRIMITIVES_COUNT_QW),
INREG(GS_PRIMITIVES_COUNT_QW+4));
ErrorF("CL_INVOCATION_COUNT_QW %x/%x\n",
(int)INREG(CL_INVOCATION_COUNT_QW),
(int)INREG(CL_INVOCATION_COUNT_QW+4));
ErrorF("CL_PRIMITIVES_COUNT_QW %x/%x\n",
(int)INREG(CL_PRIMITIVES_COUNT_QW),
(int)INREG(CL_PRIMITIVES_COUNT_QW+4));
ErrorF("CL_INVOCATION_COUNT_QW 0x%08x/0x%08x\n",
INREG(CL_INVOCATION_COUNT_QW),
INREG(CL_INVOCATION_COUNT_QW+4));
ErrorF("CL_PRIMITIVES_COUNT_QW 0x%08x/0x%08x\n",
INREG(CL_PRIMITIVES_COUNT_QW),
INREG(CL_PRIMITIVES_COUNT_QW+4));
ErrorF("PS_INVOCATION_COUNT_QW %x/%x\n",
(int)INREG(PS_INVOCATION_COUNT_QW),
(int)INREG(PS_INVOCATION_COUNT_QW+4));
ErrorF("PS_DEPTH_COUNT_QW %x/%x\n",
(int)INREG(PS_DEPTH_COUNT_QW),
(int)INREG(PS_DEPTH_COUNT_QW+4));
ErrorF("PS_INVOCATION_COUNT_QW 0x%08x/0x%08x\n",
INREG(PS_INVOCATION_COUNT_QW),
INREG(PS_INVOCATION_COUNT_QW+4));
ErrorF("PS_DEPTH_COUNT_QW 0x%08x/0x%08x\n",
INREG(PS_DEPTH_COUNT_QW),
INREG(PS_DEPTH_COUNT_QW+4));
ErrorF("WIZ_CTL %x\n", (int)INREG(WIZ_CTL));
ErrorF("TS_CTL %x TS_DEBUG_DATA %x\n", (int)INREG(TS_CTL),
(int)INREG(TS_DEBUG_DATA));
ErrorF("TD_CTL %x / %x\n", (int)INREG(TD_CTL), (int)INREG(TD_CTL2));
ErrorF("WIZ_CTL 0x%08x\n", INREG(WIZ_CTL));
ErrorF("TS_CTL 0x%08x TS_DEBUG_DATA 0x%08x\n", INREG(TS_CTL),
INREG(TS_DEBUG_DATA));
ErrorF("TD_CTL 0x%08x / 0x%08x\n",
INREG(TD_CTL), INREG(TD_CTL2));
}
/**

18
src/i830_display.c
View File

@ -767,7 +767,7 @@ i830_crtc_dpms(xf86CrtcPtr crtc, int mode)
int pipeconf_reg = (pipe == 0) ? PIPEACONF : PIPEBCONF;
int dspcntr_reg = (plane == 0) ? DSPACNTR : DSPBCNTR;
int dspbase_reg = (plane == 0) ? DSPABASE : DSPBBASE;
CARD32 temp;
uint32_t temp;
/* XXX: When our outputs are all unaware of DPMS modes other than off and
* on, we should map those modes to DPMSModeOff in the CRTC.
@ -1012,7 +1012,7 @@ i830_get_core_clock_speed(ScrnInfoPtr pScrn)
pci_device_cfg_read_u16 (bridge, &hpllcc, I855_HPLLCC);
#else
PCITAG bridge = pciTag(0, 0, 0); /* This is always the host bridge */
CARD16 hpllcc = pciReadWord(bridge, I855_HPLLCC);
uint16_t hpllcc = pciReadWord(bridge, I855_HPLLCC);
#endif
/* Assume that the hardware is in the high speed state. This
@ -1040,7 +1040,7 @@ i830_get_core_clock_speed(ScrnInfoPtr pScrn)
static int
i830_panel_fitter_pipe(I830Ptr pI830)
{
CARD32 pfit_control;
uint32_t pfit_control;
/* i830 doesn't have a panel fitter */
if (IS_I830(pI830))
@ -1097,7 +1097,7 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
int i;
int refclk;
intel_clock_t clock;
CARD32 dpll = 0, fp = 0, dspcntr, pipeconf;
uint32_t dpll = 0, fp = 0, dspcntr, pipeconf;
Bool ok, is_sdvo = FALSE, is_dvo = FALSE;
Bool is_crt = FALSE, is_lvds = FALSE, is_tv = FALSE;
@ -1295,7 +1295,7 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
*/
if (is_lvds)
{
CARD32 lvds = INREG(LVDS);
uint32_t lvds = INREG(LVDS);
lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP | LVDS_PIPEB_SELECT;
/* Set the B0-B3 data pairs corresponding to whether we're going to
@ -1508,9 +1508,9 @@ i830DescribeOutputConfiguration(ScrnInfoPtr pScrn)
for (i = 0; i < xf86_config->num_crtc; i++) {
xf86CrtcPtr crtc = xf86_config->crtc[i];
I830CrtcPrivatePtr intel_crtc = crtc ? crtc->driver_private : NULL;
CARD32 dspcntr = intel_crtc->plane == 0 ? INREG(DSPACNTR) :
uint32_t dspcntr = intel_crtc->plane == 0 ? INREG(DSPACNTR) :
INREG(DSPBCNTR);
CARD32 pipeconf = i == 0 ? INREG(PIPEACONF) :
uint32_t pipeconf = i == 0 ? INREG(PIPEACONF) :
INREG(PIPEBCONF);
Bool hw_plane_enable = (dspcntr & DISPLAY_PLANE_ENABLE) != 0;
Bool hw_pipe_enable = (pipeconf & PIPEACONF_ENABLE) != 0;
@ -1686,8 +1686,8 @@ i830_crtc_clock_get(ScrnInfoPtr pScrn, xf86CrtcPtr crtc)
I830Ptr pI830 = I830PTR(pScrn);
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
int pipe = intel_crtc->pipe;
CARD32 dpll = INREG((pipe == 0) ? DPLL_A : DPLL_B);
CARD32 fp;
uint32_t dpll = INREG((pipe == 0) ? DPLL_A : DPLL_B);
uint32_t fp;
intel_clock_t clock;
if ((dpll & DISPLAY_RATE_SELECT_FPA1) == 0)

2
src/i830_dri.c
View File

@ -993,7 +993,7 @@ I830DRIFinishScreenInit(ScreenPtr pScreen)
* Otherwise will have to sync again???
*/
static void
I830DRIDoRefreshArea (ScrnInfoPtr pScrn, int num, BoxPtr pbox, CARD32 dst)
I830DRIDoRefreshArea (ScrnInfoPtr pScrn, int num, BoxPtr pbox, uint32_t dst)
{
I830Ptr pI830 = I830PTR(pScrn);
int i, cmd, br13 = (pScrn->displayWidth * pI830->cpp) | (0xcc << 16);

12
src/i830_driver.c
View File

@ -606,8 +606,8 @@ I830MapMMIO(ScrnInfoPtr pScrn)
* time.
*/
if (IS_I9XX(pI830)) {
CARD32 gttaddr;
uint32_t gttaddr;
if (IS_I965G(pI830))
{
if (IS_IGD_GM(pI830)) {
@ -744,7 +744,7 @@ I830LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices,
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
int i,j, index;
int p;
CARD16 lut_r[256], lut_g[256], lut_b[256];
uint16_t lut_r[256], lut_g[256], lut_b[256];
DPRINTF(PFX, "I830LoadPalette: numColors: %d\n", numColors);
@ -1026,7 +1026,7 @@ static void
i830SetHotkeyControl(ScrnInfoPtr pScrn, int mode)
{
I830Ptr pI830 = I830PTR(pScrn);
CARD8 gr18;
uint8_t gr18;
gr18 = pI830->readControl(pI830, GRX, 0x18);
if (mode == HOTKEY_BIOS_SWITCH)
@ -1214,7 +1214,7 @@ i830_detect_chipset(ScrnInfoPtr pScrn)
pci_device_cfg_read_u16 (bridge, &gmch_ctrl, I830_GMCH_CTRL);
#else
PCITAG bridge;
CARD16 gmch_ctrl;
uint16_t gmch_ctrl;
bridge = pciTag(0, 0, 0); /* This is always the host bridge */
gmch_ctrl = pciReadWord(bridge, I830_GMCH_CTRL);
@ -2317,7 +2317,7 @@ void
IntelEmitInvarientState(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
CARD32 ctx_addr;
uint32_t ctx_addr;
if (pI830->noAccel)
return;

4
src/i830_dvo.c
View File

@ -226,7 +226,7 @@ i830_dvo_mode_set(xf86OutputPtr output, DisplayModePtr mode,
I830OutputPrivatePtr intel_output = output->driver_private;
struct _I830DVODriver *drv = intel_output->i2c_drv;
int pipe = intel_crtc->pipe;
CARD32 dvo;
uint32_t dvo;
unsigned int dvo_reg = drv->dvo_reg, dvo_srcdim_reg;
int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;
@ -358,7 +358,7 @@ i830_dvo_get_current_mode (xf86OutputPtr output)
I830Ptr pI830 = I830PTR(pScrn);
struct _I830DVODriver *drv = intel_output->i2c_drv;
unsigned int dvo_reg = drv->dvo_reg;
CARD32 dvo = INREG(dvo_reg);
uint32_t dvo = INREG(dvo_reg);
DisplayModePtr mode = NULL;
/* If the DVO port is active, that'll be the LVDS, so we can pull out

4
src/i830_exa.c
View File

@ -376,8 +376,8 @@ i830_upload_to_screen(PixmapPtr pDst, int x, int y, int w, int h, char *src,
const int uts_width_max = 16, uts_height_max = 16;
int cpp = pDst->drawable.bitsPerPixel / 8;
int sub_x, sub_y;
CARD32 br13;
CARD32 offset;
uint32_t br13;
uint32_t offset;
if (w > uts_width_max || h > uts_height_max)
I830FALLBACK("too large for upload to screen (%d,%d)", w, h);

14
src/i830_i2c.c
View File

@ -59,7 +59,7 @@ static void i830_setscl(I2CBusPtr b, int state)
{
ScrnInfoPtr pScrn = xf86Screens[b->scrnIndex];
I830Ptr pI830 = I830PTR(pScrn);
CARD32 val;
uint32_t val;
OUTREG(b->DriverPrivate.uval,
(state ? GPIO_CLOCK_VAL_OUT : 0) | GPIO_CLOCK_DIR_OUT |
@ -71,7 +71,7 @@ static void i830_setsda(I2CBusPtr b, int state)
{
ScrnInfoPtr pScrn = xf86Screens[b->scrnIndex];
I830Ptr pI830 = I830PTR(pScrn);
CARD32 val;
uint32_t val;
OUTREG(b->DriverPrivate.uval,
(state ? GPIO_DATA_VAL_OUT : 0) | GPIO_DATA_DIR_OUT |
@ -83,7 +83,7 @@ static void i830_getscl(I2CBusPtr b, int *state)
{
ScrnInfoPtr pScrn = xf86Screens[b->scrnIndex];
I830Ptr pI830 = I830PTR(pScrn);
CARD32 val;
uint32_t val;
OUTREG(b->DriverPrivate.uval, GPIO_CLOCK_DIR_IN | GPIO_CLOCK_DIR_MASK);
OUTREG(b->DriverPrivate.uval, 0);
@ -95,7 +95,7 @@ static int i830_getsda(I2CBusPtr b)
{
ScrnInfoPtr pScrn = xf86Screens[b->scrnIndex];
I830Ptr pI830 = I830PTR(pScrn);
CARD32 val;
uint32_t val;
OUTREG(b->DriverPrivate.uval, GPIO_DATA_DIR_IN | GPIO_DATA_DIR_MASK);
OUTREG(b->DriverPrivate.uval, 0);
@ -272,7 +272,7 @@ i830I2CGetBits(I2CBusPtr b, int *clock, int *data)
{
ScrnInfoPtr pScrn = xf86Screens[b->scrnIndex];
I830Ptr pI830 = I830PTR(pScrn);
CARD32 val;
uint32_t val;
val = INREG(b->DriverPrivate.uval);
@ -295,8 +295,8 @@ i830I2CGetBits(I2CBusPtr b, int *clock, int *data)
static void
i830I2CPutBits(I2CBusPtr b, int clock, int data)
{
CARD32 reserved = 0;
CARD32 data_bits, clock_bits;
uint32_t reserved = 0;
uint32_t data_bits, clock_bits;
#if I2C_DEBUG
int cur_clock, cur_data;

22
src/i830_lvds.c
View File

@ -108,7 +108,7 @@ i830_set_lvds_backlight_method(xf86OutputPtr output)
{
ScrnInfoPtr pScrn = output->scrn;
I830Ptr pI830 = I830PTR(pScrn);
CARD32 blc_pwm_ctl, blc_pwm_ctl2;
uint32_t blc_pwm_ctl, blc_pwm_ctl2;
enum backlight_control method = BCM_NATIVE; /* Default to native */
if (i830_kernel_backlight_available(output)) {
@ -134,7 +134,7 @@ i830_lvds_set_backlight_native(xf86OutputPtr output, int level)
{
ScrnInfoPtr pScrn = output->scrn;
I830Ptr pI830 = I830PTR(pScrn);
CARD32 blc_pwm_ctl;
uint32_t blc_pwm_ctl;
blc_pwm_ctl = INREG(BLC_PWM_CTL);
blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
@ -146,7 +146,7 @@ i830_lvds_get_backlight_native(xf86OutputPtr output)
{
ScrnInfoPtr pScrn = output->scrn;
I830Ptr pI830 = I830PTR(pScrn);
CARD32 blc_pwm_ctl;
uint32_t blc_pwm_ctl;
blc_pwm_ctl = INREG(BLC_PWM_CTL);
blc_pwm_ctl &= BACKLIGHT_DUTY_CYCLE_MASK;
@ -158,7 +158,7 @@ i830_lvds_get_backlight_max_native(xf86OutputPtr output)
{
ScrnInfoPtr pScrn = output->scrn;
I830Ptr pI830 = I830PTR(pScrn);
CARD32 pwm_ctl = INREG(BLC_PWM_CTL);
uint32_t pwm_ctl = INREG(BLC_PWM_CTL);
int val;
if (IS_I965GM(pI830) || IS_IGD_GM(pI830)) {
@ -194,7 +194,7 @@ i830_lvds_get_backlight_legacy(xf86OutputPtr output)
{
ScrnInfoPtr pScrn = output->scrn;
I830Ptr pI830 = I830PTR(pScrn);
CARD8 lbb;
uint8_t lbb;
#if XSERVER_LIBPCIACCESS
pci_device_cfg_read_u8(pI830->PciInfo, &lbb, LEGACY_BACKLIGHT_BRIGHTNESS);
@ -213,8 +213,8 @@ i830_lvds_set_backlight_combo(xf86OutputPtr output, int level)
{
ScrnInfoPtr pScrn = output->scrn;
I830Ptr pI830 = I830PTR(pScrn);
CARD32 blc_pwm_ctl;
CARD8 lbb;
uint32_t blc_pwm_ctl;
uint8_t lbb;
#if XSERVER_LIBPCIACCESS
pci_device_cfg_read_u8(pI830->PciInfo, &lbb, LEGACY_BACKLIGHT_BRIGHTNESS);
@ -250,7 +250,7 @@ i830_lvds_get_backlight_combo(xf86OutputPtr output)
{
ScrnInfoPtr pScrn = output->scrn;
I830Ptr pI830 = I830PTR(pScrn);
CARD32 blc_pwm_ctl;
uint32_t blc_pwm_ctl;
blc_pwm_ctl = INREG(BLC_PWM_CTL);
blc_pwm_ctl &= BACKLIGHT_DUTY_CYCLE_MASK;
@ -369,7 +369,7 @@ i830SetLVDSPanelPower(xf86OutputPtr output, Bool on)
struct i830_lvds_priv *dev_priv = intel_output->dev_priv;
ScrnInfoPtr pScrn = output->scrn;
I830Ptr pI830 = I830PTR(pScrn);
CARD32 pp_status;
uint32_t pp_status;
if (on) {
/*
@ -534,7 +534,7 @@ i830_lvds_mode_set(xf86OutputPtr output, DisplayModePtr mode,
ScrnInfoPtr pScrn = output->scrn;
I830Ptr pI830 = I830PTR(pScrn);
I830CrtcPrivatePtr intel_crtc = output->crtc->driver_private;
CARD32 pfit_control;
uint32_t pfit_control;
/* The LVDS pin pair will already have been turned on in
* i830_crtc_mode_set since it has a large impact on the DPLL settings.
@ -964,7 +964,7 @@ i830_lvds_init(ScrnInfoPtr pScrn)
* If so, assume that whatever is currently programmed is the correct mode.
*/
if (dev_priv->panel_fixed_mode == NULL) {
CARD32 lvds = INREG(LVDS);
uint32_t lvds = INREG(LVDS);
int pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
xf86CrtcPtr crtc = xf86_config->crtc[pipe];

6
src/i830_memory.c
View File

@ -543,7 +543,7 @@ static uint64_t
i830_get_gtt_physical(ScrnInfoPtr pScrn, unsigned long offset)
{
I830Ptr pI830 = I830PTR(pScrn);
CARD32 gttentry;
uint32_t gttentry;
/* We don't have GTTBase set up on i830 yet. */
if (pI830->GTTBase == NULL)
@ -1712,8 +1712,8 @@ i830_set_tiling(ScrnInfoPtr pScrn, unsigned int offset,
enum tile_format tile_format)
{
I830Ptr pI830 = I830PTR(pScrn);
CARD32 val;
CARD32 fence_mask = 0;
uint32_t val;
uint32_t fence_mask = 0;
unsigned int fence_pitch;
unsigned int max_fence;
unsigned int fence_nr;

25
src/i830_render.c
View File

@ -54,13 +54,13 @@ do { \
struct blendinfo {
Bool dst_alpha;
Bool src_alpha;
CARD32 src_blend;
CARD32 dst_blend;
uint32_t src_blend;
uint32_t dst_blend;
};
struct formatinfo {
int fmt;
CARD32 card_fmt;
uint32_t card_fmt;
};
#define TB0C_LAST_STAGE (1 << 31)
@ -154,7 +154,7 @@ static struct formatinfo i830_tex_formats[] = {
{PICT_a8, MT_8BIT_A8 },
};
static Bool i830_get_dest_format(PicturePtr pDstPicture, CARD32 *dst_format)
static Bool i830_get_dest_format(PicturePtr pDstPicture, uint32_t *dst_format)
{
switch (pDstPicture->format) {
case PICT_a8r8g8b8:
@ -186,9 +186,10 @@ static Bool i830_get_dest_format(PicturePtr pDstPicture, CARD32 *dst_format)
}
static CARD32 i830_get_blend_cntl(int op, PicturePtr pMask, CARD32 dst_format)
static uint32_t i830_get_blend_cntl(int op, PicturePtr pMask,
uint32_t dst_format)
{
CARD32 sblend, dblend;
uint32_t sblend, dblend;
sblend = i830_blend_op[op].src_blend;
dblend = i830_blend_op[op].dst_blend;
@ -260,7 +261,7 @@ static Bool i830_check_composite_texture(PicturePtr pPict, int unit)
return TRUE;
}
static CARD32
static uint32_t
i8xx_get_card_format(PicturePtr pPict)
{
int i;
@ -279,8 +280,8 @@ i830_texture_setup(PicturePtr pPict, PixmapPtr pPix, int unit)
ScrnInfoPtr pScrn = xf86Screens[pPict->pDrawable->pScreen->myNum];
I830Ptr pI830 = I830PTR(pScrn);
CARD32 format, offset, pitch, filter;
CARD32 wrap_mode = TEXCOORDMODE_CLAMP_BORDER;
uint32_t format, offset, pitch, filter;
uint32_t wrap_mode = TEXCOORDMODE_CLAMP_BORDER;
offset = intel_get_pixmap_offset(pPix);
pitch = intel_get_pixmap_pitch(pPix);
@ -362,7 +363,7 @@ Bool
i830_check_composite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
PicturePtr pDstPicture)
{
CARD32 tmp1;
uint32_t tmp1;
/* Check for unsupported compositing operations. */
if (op >= sizeof(i830_blend_op) / sizeof(i830_blend_op[0]))
@ -398,7 +399,7 @@ i830_prepare_composite(int op, PicturePtr pSrcPicture,
{
ScrnInfoPtr pScrn = xf86Screens[pSrcPicture->pDrawable->pScreen->myNum];
I830Ptr pI830 = I830PTR(pScrn);
CARD32 dst_format, dst_offset, dst_pitch;
uint32_t dst_format, dst_offset, dst_pitch;
IntelEmitInvarientState(pScrn);
*pI830->last_3d = LAST_3D_RENDER;
@ -420,7 +421,7 @@ i830_prepare_composite(int op, PicturePtr pSrcPicture,
}
{
CARD32 cblend, ablend, blendctl, vf2;
uint32_t cblend, ablend, blendctl, vf2;
BEGIN_LP_RING(30);

102
src/i830_sdvo.c
View File

@ -59,7 +59,7 @@ struct i830_sdvo_priv {
int output_device;
/** Active outputs controlled by this SDVO output */
CARD16 active_outputs;
uint16_t active_outputs;
/**
* Capabilities of the SDVO device returned by i830_sdvo_get_capabilities()
@ -72,10 +72,10 @@ struct i830_sdvo_priv {
/** State for save/restore */
/** @{ */
int save_sdvo_mult;
CARD16 save_active_outputs;
uint16_t save_active_outputs;
struct i830_sdvo_dtd save_input_dtd_1, save_input_dtd_2;
struct i830_sdvo_dtd save_output_dtd[16];
CARD32 save_SDVOX;
uint32_t save_SDVOX;
/** @} */
};
@ -84,13 +84,13 @@ struct i830_sdvo_priv {
* SDVOB and SDVOC to work around apparent hardware issues (according to
* comments in the BIOS).
*/
static void i830_sdvo_write_sdvox(xf86OutputPtr output, CARD32 val)
static void i830_sdvo_write_sdvox(xf86OutputPtr output, uint32_t val)
{
ScrnInfoPtr pScrn = output->scrn;
I830OutputPrivatePtr intel_output = output->driver_private;
struct i830_sdvo_priv *dev_priv = intel_output->dev_priv;
I830Ptr pI830 = I830PTR(pScrn);
CARD32 bval = val, cval = val;
uint32_t bval = val, cval = val;
int i;
if (dev_priv->output_device == SDVOB)
@ -158,7 +158,7 @@ static Bool i830_sdvo_write_byte(xf86OutputPtr output,
#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
/** Mapping of command numbers to names, for debug output */
const static struct _sdvo_cmd_name {
CARD8 cmd;
uint8_t cmd;
char *name;
} sdvo_cmd_names[] = {
SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
@ -212,7 +212,8 @@ static I2CSlaveAddr slaveAddr;
* Writes out the data given in args (up to 8 bytes), followed by the opcode.
*/
static void
i830_sdvo_write_cmd(xf86OutputPtr output, CARD8 cmd, void *args, int args_len)
i830_sdvo_write_cmd(xf86OutputPtr output, uint8_t cmd, void *args,
int args_len)
{
I830Ptr pI830 = I830PTR(output->scrn);
I830OutputPrivatePtr intel_output = output->driver_private;
@ -227,7 +228,7 @@ i830_sdvo_write_cmd(xf86OutputPtr output, CARD8 cmd, void *args, int args_len)
xf86DrvMsg(intel_output->pI2CBus->scrnIndex, X_INFO, "%s: W: %02X ",
SDVO_NAME(dev_priv), cmd);
for (i = 0; i < args_len; i++)
LogWrite(1, "%02X ", ((CARD8 *)args)[i]);
LogWrite(1, "%02X ", ((uint8_t *)args)[i]);
for (; i < 8; i++)
LogWrite(1, " ");
for (i = 0; i < sizeof(sdvo_cmd_names) / sizeof(sdvo_cmd_names[0]);
@ -245,7 +246,7 @@ i830_sdvo_write_cmd(xf86OutputPtr output, CARD8 cmd, void *args, int args_len)
/* send the output regs */
for (i = 0; i < args_len; i++) {
i830_sdvo_write_byte(output, SDVO_I2C_ARG_0 - i, ((CARD8 *)args)[i]);
i830_sdvo_write_byte(output, SDVO_I2C_ARG_0 - i, ((uint8_t *)args)[i]);
}
/* blast the command reg */
i830_sdvo_write_byte(output, SDVO_I2C_OPCODE, cmd);
@ -264,20 +265,20 @@ static const char *cmd_status_names[] = {
/**
* Reads back response_len bytes from the SDVO device, and returns the status.
*/
static CARD8
static uint8_t
i830_sdvo_read_response(xf86OutputPtr output, void *response, int response_len)
{
I830Ptr pI830 = I830PTR(output->scrn);
I830OutputPrivatePtr intel_output = output->driver_private;
int i;
CARD8 status;
CARD8 retry = 50;
uint8_t status;
uint8_t retry = 50;
while (retry--) {
/* Read the command response */
for (i = 0; i < response_len; i++) {
i830_sdvo_read_byte(output, SDVO_I2C_RETURN_0 + i,
&((CARD8 *)response)[i]);
&((uint8_t *)response)[i]);
}
/* Read the return status */
@ -288,7 +289,7 @@ i830_sdvo_read_response(xf86OutputPtr output, void *response, int response_len)
xf86DrvMsg(intel_output->pI2CBus->scrnIndex, X_INFO,
"%s: R: ", SDVO_NAME(SDVO_PRIV(intel_output)));
for (i = 0; i < response_len; i++)
LogWrite(1, "%02X ", ((CARD8 *)response)[i]);
LogWrite(1, "%02X ", ((uint8_t *)response)[i]);
for (; i < 8; i++)
LogWrite(1, " ");
if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP) {
@ -324,7 +325,7 @@ i830_sdvo_get_pixel_multiplier(DisplayModePtr pMode)
* STOP. PROM access is terminated by accessing an internal register.
*/
static void
i830_sdvo_set_control_bus_switch(xf86OutputPtr output, CARD8 target)
i830_sdvo_set_control_bus_switch(xf86OutputPtr output, uint8_t target)
{
i830_sdvo_write_cmd(output, SDVO_CMD_SET_CONTROL_BUS_SWITCH, &target, 1);
}
@ -333,7 +334,7 @@ static Bool
i830_sdvo_set_target_input(xf86OutputPtr output, Bool target_0, Bool target_1)
{
struct i830_sdvo_set_target_input_args targets = {0};
CARD8 status;
uint8_t status;
if (target_0 && target_1)
return SDVO_CMD_STATUS_NOTSUPP;
@ -359,7 +360,7 @@ static Bool
i830_sdvo_get_trained_inputs(xf86OutputPtr output, Bool *input_1, Bool *input_2)
{
struct i830_sdvo_get_trained_inputs_response response;
CARD8 status;
uint8_t status;
i830_sdvo_write_cmd(output, SDVO_CMD_GET_TRAINED_INPUTS, NULL, 0);
@ -375,9 +376,9 @@ i830_sdvo_get_trained_inputs(xf86OutputPtr output, Bool *input_1, Bool *input_2)
static Bool
i830_sdvo_get_active_outputs(xf86OutputPtr output,
CARD16 *outputs)
uint16_t *outputs)
{
CARD8 status;
uint8_t status;
i830_sdvo_write_cmd(output, SDVO_CMD_GET_ACTIVE_OUTPUTS, NULL, 0);
status = i830_sdvo_read_response(output, outputs, sizeof(*outputs));
@ -387,9 +388,9 @@ i830_sdvo_get_active_outputs(xf86OutputPtr output,
static Bool
i830_sdvo_set_active_outputs(xf86OutputPtr output,
CARD16 outputs)
uint16_t outputs)
{
CARD8 status;
uint8_t status;
i830_sdvo_write_cmd(output, SDVO_CMD_SET_ACTIVE_OUTPUTS, &outputs,
sizeof(outputs));
@ -401,8 +402,8 @@ i830_sdvo_set_active_outputs(xf86OutputPtr output,
static Bool
i830_sdvo_set_encoder_power_state(xf86OutputPtr output, int mode)
{
CARD8 status;
CARD8 state;
uint8_t status;
uint8_t state;
switch (mode) {
case DPMSModeOn:
@ -434,7 +435,7 @@ i830_sdvo_get_input_pixel_clock_range(xf86OutputPtr output, int *clock_min,
int *clock_max)
{
struct i830_sdvo_pixel_clock_range clocks;
CARD8 status;
uint8_t status;
i830_sdvo_write_cmd(output, SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, NULL, 0);
@ -451,9 +452,9 @@ i830_sdvo_get_input_pixel_clock_range(xf86OutputPtr output, int *clock_min,
}
static Bool
i830_sdvo_set_target_output(xf86OutputPtr output, CARD16 outputs)
i830_sdvo_set_target_output(xf86OutputPtr output, uint16_t outputs)
{
CARD8 status;
uint8_t status;
i830_sdvo_write_cmd(output, SDVO_CMD_SET_TARGET_OUTPUT, &outputs,
sizeof(outputs));
@ -465,9 +466,9 @@ i830_sdvo_set_target_output(xf86OutputPtr output, CARD16 outputs)
/** Fetches either input or output timings to *dtd, depending on cmd. */
static Bool
i830_sdvo_get_timing(xf86OutputPtr output, CARD8 cmd, struct i830_sdvo_dtd *dtd)
i830_sdvo_get_timing(xf86OutputPtr output, uint8_t cmd, struct i830_sdvo_dtd *dtd)
{
CARD8 status;
uint8_t status;
i830_sdvo_write_cmd(output, cmd, NULL, 0);
@ -498,9 +499,10 @@ i830_sdvo_get_output_timing(xf86OutputPtr output, struct i830_sdvo_dtd *dtd)
/** Sets either input or output timings from *dtd, depending on cmd. */
static Bool
i830_sdvo_set_timing(xf86OutputPtr output, CARD8 cmd, struct i830_sdvo_dtd *dtd)
i830_sdvo_set_timing(xf86OutputPtr output, uint8_t cmd,
struct i830_sdvo_dtd *dtd)
{
CARD8 status;
uint8_t status;
i830_sdvo_write_cmd(output, cmd, &dtd->part1, sizeof(dtd->part1));
status = i830_sdvo_read_response(output, NULL, 0);
@ -529,8 +531,8 @@ i830_sdvo_set_output_timing(xf86OutputPtr output, struct i830_sdvo_dtd *dtd)
#if 0
static Bool
i830_sdvo_create_preferred_input_timing(xf86OutputPtr output, CARD16 clock,
CARD16 width, CARD16 height)
i830_sdvo_create_preferred_input_timing(xf86OutputPtr output, uint16_t clock,
uint16_t width, uint16_t height)
{
struct i830_sdvo_priv *dev_priv = output->dev_priv;
struct i830_sdvo_preferred_input_timing_args args;
@ -577,8 +579,8 @@ i830_sdvo_get_clock_rate_mult(xf86OutputPtr output)
{
I830OutputPrivatePtr intel_output = output->driver_private;
struct i830_sdvo_priv *dev_priv = intel_output->dev_priv;
CARD8 response;
CARD8 status;
uint8_t response;
uint8_t status;
i830_sdvo_write_cmd(output, SDVO_CMD_GET_CLOCK_RATE_MULT, NULL, 0);
status = i830_sdvo_read_response(output, &response, 1);
@ -602,9 +604,9 @@ i830_sdvo_get_clock_rate_mult(xf86OutputPtr output)
* is actually turned on.
*/
static Bool
i830_sdvo_set_clock_rate_mult(xf86OutputPtr output, CARD8 val)
i830_sdvo_set_clock_rate_mult(xf86OutputPtr output, uint8_t val)
{
CARD8 status;
uint8_t status;
i830_sdvo_write_cmd(output, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
status = i830_sdvo_read_response(output, NULL, 0);
@ -636,13 +638,13 @@ i830_sdvo_mode_set(xf86OutputPtr output, DisplayModePtr mode,
struct i830_sdvo_priv *dev_priv = intel_output->dev_priv;
xf86CrtcPtr crtc = output->crtc;
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
CARD32 sdvox;
uint32_t sdvox;
int sdvo_pixel_multiply;
CARD16 width, height;
CARD16 h_blank_len, h_sync_len, v_blank_len, v_sync_len;
CARD16 h_sync_offset, v_sync_offset;
uint16_t width, height;
uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
uint16_t h_sync_offset, v_sync_offset;
struct i830_sdvo_dtd output_dtd;
CARD16 no_outputs;
uint16_t no_outputs;
no_outputs = 0;
@ -763,7 +765,7 @@ i830_sdvo_dpms(xf86OutputPtr output, int mode)
I830OutputPrivatePtr intel_output = output->driver_private;
struct i830_sdvo_priv *dev_priv = intel_output->dev_priv;
I830Ptr pI830 = I830PTR(pScrn);
CARD32 temp;
uint32_t temp;
if (mode != DPMSModeOn) {
i830_sdvo_set_active_outputs(output, 0);
@ -779,7 +781,7 @@ i830_sdvo_dpms(xf86OutputPtr output, int mode)
} else {
Bool input1, input2;
int i;
CARD8 status;
uint8_t status;
temp = INREG(dev_priv->output_device);
if ((temp & SDVO_ENABLE) == 0)
@ -828,7 +830,7 @@ i830_sdvo_save(xf86OutputPtr output)
for (o = SDVO_OUTPUT_FIRST; o <= SDVO_OUTPUT_LAST; o++)
{
CARD16 this_output = (1 << o);
uint16_t this_output = (1 << o);
if (dev_priv->caps.output_flags & this_output)
{
i830_sdvo_set_target_output(output, this_output);
@ -848,13 +850,13 @@ i830_sdvo_restore(xf86OutputPtr output)
int o;
int i;
Bool input1, input2;
CARD8 status;
uint8_t status;
i830_sdvo_set_active_outputs(output, 0);
for (o = SDVO_OUTPUT_FIRST; o <= SDVO_OUTPUT_LAST; o++)
{
CARD16 this_output = (1 << o);
uint16_t this_output = (1 << o);
if (dev_priv->caps.output_flags & this_output)
{
i830_sdvo_set_target_output(output, this_output);
@ -911,7 +913,7 @@ i830_sdvo_mode_valid(xf86OutputPtr output, DisplayModePtr pMode)
static Bool
i830_sdvo_get_capabilities(xf86OutputPtr output, struct i830_sdvo_caps *caps)
{
CARD8 status;
uint8_t status;
i830_sdvo_write_cmd(output, SDVO_CMD_GET_DEVICE_CAPS, NULL, 0);
status = i830_sdvo_read_response(output, caps, sizeof(*caps));
@ -1016,7 +1018,7 @@ i830_sdvo_ddc_i2c_address(I2CDevPtr d, I2CSlaveAddr addr)
static void
i830_sdvo_dump_cmd(xf86OutputPtr output, int opcode)
{
CARD8 response[8];
uint8_t response[8];
i830_sdvo_write_cmd(output, opcode, NULL, 0);
i830_sdvo_read_response(output, response, 8);
@ -1080,8 +1082,8 @@ i830_sdvo_dump(ScrnInfoPtr pScrn)
static xf86OutputStatus
i830_sdvo_detect(xf86OutputPtr output)
{
CARD8 response[2];
CARD8 status;
uint8_t response[2];
uint8_t status;
i830_sdvo_write_cmd(output, SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0);
status = i830_sdvo_read_response(output, &response, 2);

54
src/i830_sdvo_regs.h
View File

@ -47,11 +47,11 @@
#define SDVO_OUTPUT_LAST (14)
struct i830_sdvo_caps {
CARD8 vendor_id;
CARD8 device_id;
CARD8 device_rev_id;
CARD8 sdvo_version_major;
CARD8 sdvo_version_minor;
uint8_t vendor_id;
uint8_t device_id;
uint8_t device_rev_id;
uint8_t sdvo_version_major;
uint8_t sdvo_version_minor;
unsigned int sdvo_inputs_mask:2;
unsigned int smooth_scaling:1;
unsigned int sharp_scaling:1;
@ -59,48 +59,48 @@ struct i830_sdvo_caps {
unsigned int down_scaling:1;
unsigned int stall_support:1;
unsigned int pad:1;
CARD16 output_flags;
uint16_t output_flags;
} __attribute__((packed));
/** This matches the EDID DTD structure, more or less */
struct i830_sdvo_dtd {
struct {
CARD16 clock; /**< pixel clock, in 10kHz units */
CARD8 h_active; /**< lower 8 bits (pixels) */
CARD8 h_blank; /**< lower 8 bits (pixels) */
CARD8 h_high; /**< upper 4 bits each h_active, h_blank */
CARD8 v_active; /**< lower 8 bits (lines) */
CARD8 v_blank; /**< lower 8 bits (lines) */
CARD8 v_high; /**< upper 4 bits each v_active, v_blank */
uint16_t clock; /**< pixel clock, in 10kHz units */
uint8_t h_active; /**< lower 8 bits (pixels) */
uint8_t h_blank; /**< lower 8 bits (pixels) */
uint8_t h_high; /**< upper 4 bits each h_active, h_blank */
uint8_t v_active; /**< lower 8 bits (lines) */
uint8_t v_blank; /**< lower 8 bits (lines) */
uint8_t v_high; /**< upper 4 bits each v_active, v_blank */
} part1;
struct {
CARD8 h_sync_off; /**< lower 8 bits, from hblank start */
CARD8 h_sync_width; /**< lower 8 bits (pixels) */
uint8_t h_sync_off; /**< lower 8 bits, from hblank start */
uint8_t h_sync_width; /**< lower 8 bits (pixels) */
/** lower 4 bits each vsync offset, vsync width */
CARD8 v_sync_off_width;
uint8_t v_sync_off_width;
/**
* 2 high bits of hsync offset, 2 high bits of hsync width,
* bits 4-5 of vsync offset, and 2 high bits of vsync width.
*/
CARD8 sync_off_width_high;
CARD8 dtd_flags;
CARD8 sdvo_flags;
uint8_t sync_off_width_high;
uint8_t dtd_flags;
uint8_t sdvo_flags;
/** bits 6-7 of vsync offset at bits 6-7 */
CARD8 v_sync_off_high;
CARD8 reserved;
uint8_t v_sync_off_high;
uint8_t reserved;
} part2;
} __attribute__((packed));
struct i830_sdvo_pixel_clock_range {
CARD16 min; /**< pixel clock, in 10kHz units */
CARD16 max; /**< pixel clock, in 10kHz units */
uint16_t min; /**< pixel clock, in 10kHz units */
uint16_t max; /**< pixel clock, in 10kHz units */
} __attribute__((packed));
struct i830_sdvo_preferred_input_timing_args {
CARD16 clock;
CARD16 width;
CARD16 height;
uint16_t clock;
uint16_t width;
uint16_t height;
} __attribute__((packed));
/* I2C registers for SDVO */
@ -205,7 +205,7 @@ struct i830_sdvo_get_trained_inputs_response {
#define SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE 0x0f
struct i830_sdvo_get_interrupt_event_source_response {
CARD16 interrupt_status;
uint16_t interrupt_status;
unsigned int ambient_light_interrupt:1;
unsigned int pad:7;
} __attribute__((packed));

96
src/i830_tv.c
View File

@ -57,39 +57,39 @@ struct i830_tv_priv {
int type;
char *tv_format;
int margin[4];
CARD32 save_TV_H_CTL_1;
CARD32 save_TV_H_CTL_2;
CARD32 save_TV_H_CTL_3;
CARD32 save_TV_V_CTL_1;
CARD32 save_TV_V_CTL_2;
CARD32 save_TV_V_CTL_3;
CARD32 save_TV_V_CTL_4;
CARD32 save_TV_V_CTL_5;
CARD32 save_TV_V_CTL_6;
CARD32 save_TV_V_CTL_7;
CARD32 save_TV_SC_CTL_1, save_TV_SC_CTL_2, save_TV_SC_CTL_3;
uint32_t save_TV_H_CTL_1;
uint32_t save_TV_H_CTL_2;
uint32_t save_TV_H_CTL_3;
uint32_t save_TV_V_CTL_1;
uint32_t save_TV_V_CTL_2;
uint32_t save_TV_V_CTL_3;
uint32_t save_TV_V_CTL_4;
uint32_t save_TV_V_CTL_5;
uint32_t save_TV_V_CTL_6;
uint32_t save_TV_V_CTL_7;
uint32_t save_TV_SC_CTL_1, save_TV_SC_CTL_2, save_TV_SC_CTL_3;
CARD32 save_TV_CSC_Y;
CARD32 save_TV_CSC_Y2;
CARD32 save_TV_CSC_U;
CARD32 save_TV_CSC_U2;
CARD32 save_TV_CSC_V;
CARD32 save_TV_CSC_V2;
CARD32 save_TV_CLR_KNOBS;
CARD32 save_TV_CLR_LEVEL;
CARD32 save_TV_WIN_POS;
CARD32 save_TV_WIN_SIZE;
CARD32 save_TV_FILTER_CTL_1;
CARD32 save_TV_FILTER_CTL_2;
CARD32 save_TV_FILTER_CTL_3;
uint32_t save_TV_CSC_Y;
uint32_t save_TV_CSC_Y2;
uint32_t save_TV_CSC_U;
uint32_t save_TV_CSC_U2;
uint32_t save_TV_CSC_V;
uint32_t save_TV_CSC_V2;
uint32_t save_TV_CLR_KNOBS;
uint32_t save_TV_CLR_LEVEL;
uint32_t save_TV_WIN_POS;
uint32_t save_TV_WIN_SIZE;
uint32_t save_TV_FILTER_CTL_1;
uint32_t save_TV_FILTER_CTL_2;
uint32_t save_TV_FILTER_CTL_3;
CARD32 save_TV_H_LUMA[60];
CARD32 save_TV_H_CHROMA[60];
CARD32 save_TV_V_LUMA[43];
CARD32 save_TV_V_CHROMA[43];
uint32_t save_TV_H_LUMA[60];
uint32_t save_TV_H_CHROMA[60];
uint32_t save_TV_V_LUMA[43];
uint32_t save_TV_V_CHROMA[43];
CARD32 save_TV_DAC;
CARD32 save_TV_CTL;
uint32_t save_TV_DAC;
uint32_t save_TV_CTL;
};
typedef struct {
@ -102,7 +102,7 @@ typedef struct {
float rv, gv, bv, av;
} color_conversion_t;
static const CARD32 filter_table[] = {
static const uint32_t filter_table[] = {
0xB1403000, 0x2E203500, 0x35002E20, 0x3000B140,
0x35A0B160, 0x2DC02E80, 0xB1403480, 0xB1603000,
0x2EA03640, 0x34002D80, 0x3000B120, 0x36E0B160,
@ -161,7 +161,7 @@ typedef struct {
char *name;
int clock;
double refresh;
CARD32 oversample;
uint32_t oversample;
int hsync_end, hblank_start, hblank_end, htotal;
Bool progressive, trilevel_sync, component_only;
int vsync_start_f1, vsync_start_f2, vsync_len;
@ -178,14 +178,14 @@ typedef struct {
* subcarrier programming
*/
int dda2_size, dda3_size, dda1_inc, dda2_inc, dda3_inc;
CARD32 sc_reset;
uint32_t sc_reset;
Bool pal_burst;
/*
* blank/black levels
*/
video_levels_t composite_levels, svideo_levels;
color_conversion_t composite_color, svideo_color;
const CARD32 *filter_table;
const uint32_t *filter_table;
int max_srcw;
} tv_mode_t;
@ -981,13 +981,13 @@ i830_tv_mode_fixup(xf86OutputPtr output, DisplayModePtr mode,
return TRUE;
}
static CARD32
static uint32_t
i830_float_to_csc (float fin)
{
CARD32 exp;
CARD32 mant;
CARD32 ret;
float f = fin;
uint32_t exp;
uint32_t mant;
uint32_t ret;
float f = fin;
/* somehow the color conversion knows the signs of all the values */
if (f < 0) f = -f;
@ -1009,10 +1009,10 @@ i830_float_to_csc (float fin)
return ret;
}
static CARD16
static uint16_t
i830_float_to_luma (float f)
{
CARD16 ret;
uint16_t ret;
ret = (f * (1 << 9));
return ret;
@ -1029,10 +1029,10 @@ i830_tv_mode_set(xf86OutputPtr output, DisplayModePtr mode,
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
struct i830_tv_priv *dev_priv = intel_output->dev_priv;
const tv_mode_t *tv_mode = i830_tv_mode_find (output);
CARD32 tv_ctl;
CARD32 hctl1, hctl2, hctl3;
CARD32 vctl1, vctl2, vctl3, vctl4, vctl5, vctl6, vctl7;
CARD32 scctl1, scctl2, scctl3;
uint32_t tv_ctl;
uint32_t hctl1, hctl2, hctl3;
uint32_t vctl1, vctl2, vctl3, vctl4, vctl5, vctl6, vctl7;
uint32_t scctl1, scctl2, scctl3;
int i, j;
const video_levels_t *video_levels;
const color_conversion_t *color_conversion;
@ -1271,8 +1271,8 @@ i830_tv_detect_type (xf86CrtcPtr crtc,
ScrnInfoPtr pScrn = output->scrn;
I830Ptr pI830 = I830PTR(pScrn);
I830OutputPrivatePtr intel_output = output->driver_private;
CARD32 tv_ctl, save_tv_ctl;
CARD32 tv_dac, save_tv_dac;
uint32_t tv_ctl, save_tv_ctl;
uint32_t tv_dac, save_tv_dac;
int type = TV_TYPE_UNKNOWN;
tv_dac = INREG(TV_DAC);
@ -1665,7 +1665,7 @@ i830_tv_init(ScrnInfoPtr pScrn)
xf86OutputPtr output;
I830OutputPrivatePtr intel_output;
struct i830_tv_priv *dev_priv;
CARD32 tv_dac_on, tv_dac_off, save_tv_dac;
uint32_t tv_dac_on, tv_dac_off, save_tv_dac;
if (pI830->quirk_flag & QUIRK_IGNORE_TV)
return;

166
src/i830_video.c
View File

@ -264,58 +264,58 @@ static XF86ImageRec Images[NUM_IMAGES] = {
};
typedef struct {
CARD32 OBUF_0Y;
CARD32 OBUF_1Y;
CARD32 OBUF_0U;
CARD32 OBUF_0V;
CARD32 OBUF_1U;
CARD32 OBUF_1V;
CARD32 OSTRIDE;
CARD32 YRGB_VPH;
CARD32 UV_VPH;
CARD32 HORZ_PH;
CARD32 INIT_PHS;
CARD32 DWINPOS;
CARD32 DWINSZ;
CARD32 SWIDTH;
CARD32 SWIDTHSW;
CARD32 SHEIGHT;
CARD32 YRGBSCALE;
CARD32 UVSCALE;
CARD32 OCLRC0;
CARD32 OCLRC1;
CARD32 DCLRKV;
CARD32 DCLRKM;
CARD32 SCLRKVH;
CARD32 SCLRKVL;
CARD32 SCLRKEN;
CARD32 OCONFIG;
CARD32 OCMD;
CARD32 RESERVED1; /* 0x6C */
CARD32 OSTART_0Y; /* for i965 */
CARD32 OSTART_1Y; /* for i965 */
CARD32 OSTART_0U;
CARD32 OSTART_0V;
CARD32 OSTART_1U;
CARD32 OSTART_1V;
CARD32 OTILEOFF_0Y;
CARD32 OTILEOFF_1Y;
CARD32 OTILEOFF_0U;
CARD32 OTILEOFF_0V;
CARD32 OTILEOFF_1U;
CARD32 OTILEOFF_1V;
CARD32 FASTHSCALE; /* 0xA0 */
CARD32 UVSCALEV; /* 0xA4 */
uint32_t OBUF_0Y;
uint32_t OBUF_1Y;
uint32_t OBUF_0U;
uint32_t OBUF_0V;
uint32_t OBUF_1U;
uint32_t OBUF_1V;
uint32_t OSTRIDE;
uint32_t YRGB_VPH;
uint32_t UV_VPH;
uint32_t HORZ_PH;
uint32_t INIT_PHS;
uint32_t DWINPOS;
uint32_t DWINSZ;
uint32_t SWIDTH;
uint32_t SWIDTHSW;
uint32_t SHEIGHT;
uint32_t YRGBSCALE;
uint32_t UVSCALE;
uint32_t OCLRC0;
uint32_t OCLRC1;
uint32_t DCLRKV;
uint32_t DCLRKM;
uint32_t SCLRKVH;
uint32_t SCLRKVL;
uint32_t SCLRKEN;
uint32_t OCONFIG;
uint32_t OCMD;
uint32_t RESERVED1; /* 0x6C */
uint32_t OSTART_0Y; /* for i965 */
uint32_t OSTART_1Y; /* for i965 */
uint32_t OSTART_0U;
uint32_t OSTART_0V;
uint32_t OSTART_1U;
uint32_t OSTART_1V;
uint32_t OTILEOFF_0Y;
uint32_t OTILEOFF_1Y;
uint32_t OTILEOFF_0U;
uint32_t OTILEOFF_0V;
uint32_t OTILEOFF_1U;
uint32_t OTILEOFF_1V;
uint32_t FASTHSCALE; /* 0xA0 */
uint32_t UVSCALEV; /* 0xA4 */
CARD32 RESERVEDC[(0x200 - 0xA8) / 4]; /* 0xA8 - 0x1FC */
CARD16 Y_VCOEFS[N_VERT_Y_TAPS * N_PHASES]; /* 0x200 */
CARD16 RESERVEDD[0x100 / 2 - N_VERT_Y_TAPS * N_PHASES];
CARD16 Y_HCOEFS[N_HORIZ_Y_TAPS * N_PHASES]; /* 0x300 */
CARD16 RESERVEDE[0x200 / 2 - N_HORIZ_Y_TAPS * N_PHASES];
CARD16 UV_VCOEFS[N_VERT_UV_TAPS * N_PHASES]; /* 0x500 */
CARD16 RESERVEDF[0x100 / 2 - N_VERT_UV_TAPS * N_PHASES];
CARD16 UV_HCOEFS[N_HORIZ_UV_TAPS * N_PHASES]; /* 0x600 */
CARD16 RESERVEDG[0x100 / 2 - N_HORIZ_UV_TAPS * N_PHASES];
uint32_t RESERVEDC[(0x200 - 0xA8) / 4]; /* 0xA8 - 0x1FC */
uint16_t Y_VCOEFS[N_VERT_Y_TAPS * N_PHASES]; /* 0x200 */
uint16_t RESERVEDD[0x100 / 2 - N_VERT_Y_TAPS * N_PHASES];
uint16_t Y_HCOEFS[N_HORIZ_Y_TAPS * N_PHASES]; /* 0x300 */
uint16_t RESERVEDE[0x200 / 2 - N_HORIZ_Y_TAPS * N_PHASES];
uint16_t UV_VCOEFS[N_VERT_UV_TAPS * N_PHASES]; /* 0x500 */
uint16_t RESERVEDF[0x100 / 2 - N_VERT_UV_TAPS * N_PHASES];
uint16_t UV_HCOEFS[N_HORIZ_UV_TAPS * N_PHASES]; /* 0x600 */
uint16_t RESERVEDG[0x100 / 2 - N_HORIZ_UV_TAPS * N_PHASES];
} I830OverlayRegRec, *I830OverlayRegPtr;
#define I830OVERLAYREG(pI830) ((I830OverlayRegPtr)\
@ -323,10 +323,10 @@ typedef struct {
(pI830)->overlay_regs->offset))
#if VIDEO_DEBUG
static void
CompareOverlay(I830Ptr pI830, CARD32 * overlay, int size)
CompareOverlay(I830Ptr pI830, uint32_t * overlay, int size)
{
int i;
CARD32 val;
uint32_t val;
int bad = 0;
for (i = 0; i < size; i += 4) {
@ -366,9 +366,9 @@ i830_overlay_switch_to_crtc (ScrnInfoPtr pScrn, xf86CrtcPtr crtc)
{
int vtotal_reg = intel_crtc->pipe == 0 ? VTOTAL_A : VTOTAL_B;
CARD32 size = intel_crtc->pipe ? INREG(PIPEBSRC) : INREG(PIPEASRC);
CARD32 active;
CARD32 hsize, vsize;
uint32_t size = intel_crtc->pipe ? INREG(PIPEBSRC) : INREG(PIPEASRC);
uint32_t active;
uint32_t hsize, vsize;
hsize = (size >> 16) & 0x7FF;
vsize = size & 0x7FF;
@ -452,7 +452,7 @@ static void
i830_overlay_continue(ScrnInfoPtr pScrn, Bool update_filter)
{
I830Ptr pI830 = I830PTR(pScrn);
CARD32 flip_addr;
uint32_t flip_addr;
I830OverlayRegPtr overlay = I830OVERLAYREG(pI830);
if (!*pI830->overlayOn)
@ -464,8 +464,7 @@ i830_overlay_continue(ScrnInfoPtr pScrn, Bool update_filter)
flip_addr = pI830->overlay_regs->bus_addr;
if (update_filter)
flip_addr |= OFC_UPDATE;
OVERLAY_DEBUG ("overlay_continue cmd 0x%08" CARD32_HEX
" -> 0x%08" CARD32_HEX " sta 0x%08" CARD32_HEX "\n",
OVERLAY_DEBUG ("overlay_continue cmd 0x%08x -> 0x%08x sta 0x%08x\n",
overlay->OCMD, INREG(OCMD_REGISTER), INREG(DOVSTA));
BEGIN_LP_RING(4);
OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE);
@ -505,8 +504,7 @@ i830_overlay_off(ScrnInfoPtr pScrn)
*/
{
overlay->OCMD &= ~OVERLAY_ENABLE;
OVERLAY_DEBUG ("overlay_off cmd 0x%08" CARD32_HEX
" -> 0x%08" CARD32_HEX " sta 0x%08" CARD32_HEX "\n",
OVERLAY_DEBUG ("overlay_off cmd 0x%08x -> 0x%08x sta 0x%08x\n",
overlay->OCMD, INREG(OCMD_REGISTER), INREG(DOVSTA));
BEGIN_LP_RING(6);
OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE);
@ -693,7 +691,7 @@ I830SetOneLineModeRatio(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
I830PortPrivPtr pPriv = pI830->adaptor->pPortPrivates[0].ptr;
CARD32 panelFitControl = INREG(PFIT_CONTROLS);
uint32_t panelFitControl = INREG(PFIT_CONTROLS);
int vertScale;
pPriv->scaleRatio = 0x10000;
@ -717,7 +715,7 @@ I830SetOneLineModeRatio(ScrnInfoPtr pScrn)
pPriv->oneLineMode = FALSE;
}
static CARD32 I830BoundGammaElt (CARD32 elt, CARD32 eltPrev)
static uint32_t I830BoundGammaElt (uint32_t elt, uint32_t eltPrev)
{
elt &= 0xff;
eltPrev &= 0xff;
@ -728,7 +726,7 @@ static CARD32 I830BoundGammaElt (CARD32 elt, CARD32 eltPrev)
return elt;
}
static CARD32 I830BoundGamma (CARD32 gamma, CARD32 gammaPrev)
static uint32_t I830BoundGamma (uint32_t gamma, uint32_t gammaPrev)
{
return (I830BoundGammaElt (gamma >> 24, gammaPrev >> 24) << 24 |
I830BoundGammaElt (gamma >> 16, gammaPrev >> 16) << 16 |
@ -741,12 +739,12 @@ I830UpdateGamma(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
I830PortPrivPtr pPriv = pI830->adaptor->pPortPrivates[0].ptr;
CARD32 gamma0 = pPriv->gamma0;
CARD32 gamma1 = pPriv->gamma1;
CARD32 gamma2 = pPriv->gamma2;
CARD32 gamma3 = pPriv->gamma3;
CARD32 gamma4 = pPriv->gamma4;
CARD32 gamma5 = pPriv->gamma5;
uint32_t gamma0 = pPriv->gamma0;
uint32_t gamma1 = pPriv->gamma1;
uint32_t gamma2 = pPriv->gamma2;
uint32_t gamma3 = pPriv->gamma3;
uint32_t gamma4 = pPriv->gamma4;
uint32_t gamma5 = pPriv->gamma5;
#if 0
ErrorF ("Original gamma: 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx\n",
@ -1308,7 +1306,7 @@ I830CopyPlanarToPackedData(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv,
int top, int left, int h, int w, int id)
{
I830Ptr pI830 = I830PTR(pScrn);
CARD8 *dst1, *srcy, *srcu, *srcv;
uint8_t *dst1, *srcy, *srcu, *srcv;
int y;
if (pPriv->currentBuf == 0)
@ -1328,10 +1326,10 @@ I830CopyPlanarToPackedData(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv,
}
for (y = 0; y < h; y++) {
CARD32 *dst = (CARD32 *)dst1;
CARD8 *sy = srcy;
CARD8 *su = srcu;
CARD8 *sv = srcv;
uint32_t *dst = (uint32_t *)dst1;
uint8_t *sy = srcy;
uint8_t *su = srcu;
uint8_t *sv = srcv;
int i;
i = w / 2;
@ -1538,9 +1536,9 @@ I830CopyPlanarData(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv,
}
typedef struct {
CARD8 sign;
CARD16 mantissa;
CARD8 exponent;
uint8_t sign;
uint16_t mantissa;
uint8_t exponent;
} coeffRec, *coeffPtr;
static Bool
@ -1766,14 +1764,14 @@ i830_display_video(ScrnInfoPtr pScrn, xf86CrtcPtr crtc,
unsigned int swidth, swidthy, swidthuv;
unsigned int mask, shift, offsety, offsetu;
int tmp;
CARD32 OCMD;
uint32_t OCMD;
Bool scaleChanged = FALSE;
OVERLAY_DEBUG("I830DisplayVideo: %dx%d (pitch %d)\n", width, height,
dstPitch);
#if VIDEO_DEBUG
CompareOverlay(pI830, (CARD32 *) overlay, 0x100);
CompareOverlay(pI830, (uint32_t *) overlay, 0x100);
#endif
/*
@ -1928,7 +1926,7 @@ i830_display_video(ScrnInfoPtr pScrn, xf86CrtcPtr crtc,
overlay->OBUF_1V = pPriv->VBuf1offset;
}
OVERLAY_DEBUG("pos: 0x%" CARD32_HEX ", size: 0x%" CARD32_HEX "\n",
OVERLAY_DEBUG("pos: 0x%x, size: 0x%x\n",
overlay->DWINPOS, overlay->DWINSZ);
OVERLAY_DEBUG("dst: %d x %d, src: %d x %d\n", drw_w, drw_h, src_w, src_h);
@ -1943,7 +1941,7 @@ i830_display_video(ScrnInfoPtr pScrn, xf86CrtcPtr crtc,
int yscaleIntUV, yscaleFractUV;
/* UV is half the size of Y -- YUV420 */
int uvratio = 2;
CARD32 newval;
uint32_t newval;
coeffRec xcoeffY[N_HORIZ_Y_TAPS * N_PHASES];
coeffRec xcoeffUV[N_HORIZ_UV_TAPS * N_PHASES];
int i, j, pos;
@ -2090,7 +2088,7 @@ i830_display_video(ScrnInfoPtr pScrn, xf86CrtcPtr crtc,
OCMD |= BUFFER1;
overlay->OCMD = OCMD;
OVERLAY_DEBUG("OCMD is 0x%" CARD32_HEX "\n", OCMD);
OVERLAY_DEBUG("OCMD is 0x%x\n", OCMD);
/* make sure the overlay is on */
i830_overlay_on (pScrn);
@ -2143,7 +2141,7 @@ i830_clip_video_helper (ScrnInfoPtr pScrn,
}
static void
i830_fill_colorkey (ScreenPtr pScreen, CARD32 key, RegionPtr clipboxes)
i830_fill_colorkey (ScreenPtr pScreen, uint32_t key, RegionPtr clipboxes)
{
DrawablePtr root = &WindowTable[pScreen->myNum]->drawable;
XID pval[2];

28
src/i830_video.h
View File

@ -28,13 +28,13 @@ THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "xf86_OSproc.h"
typedef struct {
CARD32 YBuf0offset;
CARD32 UBuf0offset;
CARD32 VBuf0offset;
uint32_t YBuf0offset;
uint32_t UBuf0offset;
uint32_t VBuf0offset;
CARD32 YBuf1offset;
CARD32 UBuf1offset;
CARD32 VBuf1offset;
uint32_t YBuf1offset;
uint32_t UBuf1offset;
uint32_t VBuf1offset;
unsigned char currentBuf;
@ -46,16 +46,16 @@ typedef struct {
int doubleBuffer;
RegionRec clip;
CARD32 colorKey;
uint32_t colorKey;
CARD32 gamma0;
CARD32 gamma1;
CARD32 gamma2;
CARD32 gamma3;
CARD32 gamma4;
CARD32 gamma5;
uint32_t gamma0;
uint32_t gamma1;
uint32_t gamma2;
uint32_t gamma3;
uint32_t gamma4;
uint32_t gamma5;
CARD32 videoStatus;
uint32_t videoStatus;
Time offTime;
Time freeTime;
i830_memory *buf; /** YUV data buffer */

4
src/i915_3d.h
View File

@ -88,7 +88,7 @@
#define REG_NR(reg) ((reg) & 0xff)
struct i915_fs_op {
CARD32 ui[3];
uint32_t ui[3];
};
#define X_CHANNEL_VAL 1
@ -419,7 +419,7 @@ do { \
* a FS_START and FS_END
*/
#define FS_LOCALS(x) \
CARD32 _shader_buf[(x) * 3]; \
uint32_t _shader_buf[(x) * 3]; \
int _max_shader_commands = x; \
int _cur_shader_commands

25
src/i915_render.c
View File

@ -54,14 +54,14 @@ do { \
struct formatinfo {
int fmt;
CARD32 card_fmt;
uint32_t card_fmt;
};
struct blendinfo {
Bool dst_alpha;
Bool src_alpha;
CARD32 src_blend;
CARD32 dst_blend;
uint32_t src_blend;
uint32_t dst_blend;
};
static struct blendinfo i915_blend_op[] = {
@ -106,9 +106,10 @@ static struct formatinfo i915_tex_formats[] = {
{PICT_a8, MAPSURF_8BIT | MT_8BIT_A8 },
};
static CARD32 i915_get_blend_cntl(int op, PicturePtr pMask, CARD32 dst_format)
static uint32_t i915_get_blend_cntl(int op, PicturePtr pMask,
uint32_t dst_format)
{
CARD32 sblend, dblend;
uint32_t sblend, dblend;
sblend = i915_blend_op[op].src_blend;
dblend = i915_blend_op[op].dst_blend;
@ -152,7 +153,7 @@ static CARD32 i915_get_blend_cntl(int op, PicturePtr pMask, CARD32 dst_format)
(dblend << S6_CBUF_DST_BLEND_FACT_SHIFT);
}
static Bool i915_get_dest_format(PicturePtr pDstPicture, CARD32 *dst_format)
static Bool i915_get_dest_format(PicturePtr pDstPicture, uint32_t *dst_format)
{
switch (pDstPicture->format) {
case PICT_a8r8g8b8:
@ -215,7 +216,7 @@ Bool
i915_check_composite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
PicturePtr pDstPicture)
{
CARD32 tmp1;
uint32_t tmp1;
/* Check for unsupported compositing operations. */
if (op >= sizeof(i915_blend_op) / sizeof(i915_blend_op[0]))
@ -249,9 +250,9 @@ i915_texture_setup(PicturePtr pPict, PixmapPtr pPix, int unit)
{
ScrnInfoPtr pScrn = xf86Screens[pPict->pDrawable->pScreen->myNum];
I830Ptr pI830 = I830PTR(pScrn);
CARD32 format, offset, pitch, filter;
uint32_t format, offset, pitch, filter;
int w, h, i;
CARD32 wrap_mode = TEXCOORDMODE_CLAMP_BORDER;
uint32_t wrap_mode = TEXCOORDMODE_CLAMP_BORDER;
offset = intel_get_pixmap_offset(pPix);
pitch = intel_get_pixmap_pitch(pPix);
@ -315,8 +316,8 @@ i915_prepare_composite(int op, PicturePtr pSrcPicture,
{
ScrnInfoPtr pScrn = xf86Screens[pSrcPicture->pDrawable->pScreen->myNum];
I830Ptr pI830 = I830PTR(pScrn);
CARD32 dst_format, dst_offset, dst_pitch;
CARD32 blendctl;
uint32_t dst_format, dst_offset, dst_pitch;
uint32_t blendctl;
int out_reg = FS_OC;
IntelEmitInvarientState(pScrn);
@ -375,7 +376,7 @@ i915_prepare_composite(int op, PicturePtr pSrcPicture,
ADVANCE_LP_RING();
}
{
CARD32 ss2;
uint32_t ss2;
BEGIN_LP_RING(16);
OUT_RING(_3DSTATE_BUF_INFO_CMD);

2
src/i915_video.c
View File

@ -48,7 +48,7 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
PixmapPtr pPixmap)
{
I830Ptr pI830 = I830PTR(pScrn);
CARD32 format, ms3, s5;
uint32_t format, ms3, s5;
BoxPtr pbox;
int nbox, dxo, dyo, pix_xoff, pix_yoff;
Bool planar;

44
src/i965_render.c
View File

@ -59,13 +59,13 @@ do { \
struct blendinfo {
Bool dst_alpha;
Bool src_alpha;
CARD32 src_blend;
CARD32 dst_blend;
uint32_t src_blend;
uint32_t dst_blend;
};
struct formatinfo {
int fmt;
CARD32 card_fmt;
uint32_t card_fmt;
};
// refer vol2, 3d rasterization 3.8.1
@ -113,8 +113,8 @@ static struct formatinfo i965_tex_formats[] = {
{PICT_a8, BRW_SURFACEFORMAT_A8_UNORM },
};
static void i965_get_blend_cntl(int op, PicturePtr pMask, CARD32 dst_format,
CARD32 *sblend, CARD32 *dblend)
static void i965_get_blend_cntl(int op, PicturePtr pMask, uint32_t dst_format,
uint32_t *sblend, uint32_t *dblend)
{
*sblend = i965_blend_op[op].src_blend;
@ -145,7 +145,7 @@ static void i965_get_blend_cntl(int op, PicturePtr pMask, CARD32 dst_format,
}
static Bool i965_get_dest_format(PicturePtr pDstPicture, CARD32 *dst_format)
static Bool i965_get_dest_format(PicturePtr pDstPicture, uint32_t *dst_format)
{
switch (pDstPicture->format) {
case PICT_a8r8g8b8:
@ -212,7 +212,7 @@ Bool
i965_check_composite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
PicturePtr pDstPicture)
{
CARD32 tmp1;
uint32_t tmp1;
/* Check for unsupported compositing operations. */
if (op >= sizeof(i965_blend_op) / sizeof(i965_blend_op[0]))
@ -271,7 +271,7 @@ static struct brw_instruction *sf_kernel;
static struct brw_instruction *ps_kernel;
static struct brw_instruction *sip_kernel;
static CARD32 *binding_table;
static uint32_t *binding_table;
static int binding_table_entries;
static int dest_surf_offset, src_surf_offset, mask_surf_offset;
@ -287,9 +287,9 @@ static int state_base_offset;
static float *vb;
static int vb_size = (6 * 4) * 4 ; /* 6 DWORDS per vertex - and mask*/
static CARD32 src_blend, dst_blend;
static uint32_t src_blend, dst_blend;
static const CARD32 sip_kernel_static[][4] = {
static const uint32_t sip_kernel_static[][4] = {
/* wait (1) a0<1>UW a145<0,1,0>UW { align1 + } */
{ 0x00000030, 0x20000108, 0x00001220, 0x00000000 },
/* nop (4) g0<1>UD { align1 + } */
@ -320,15 +320,15 @@ static const CARD32 sip_kernel_static[][4] = {
#define SF_KERNEL_NUM_GRF 16
#define SF_MAX_THREADS 1
static const CARD32 sf_kernel_static[][4] = {
static const uint32_t sf_kernel_static[][4] = {
#include "exa_sf_prog.h"
};
static const CARD32 sf_kernel_static_mask[][4] = {
static const uint32_t sf_kernel_static_mask[][4] = {
#include "exa_sf_mask_prog.h"
};
static const CARD32 sf_kernel_static_rotation[][4] = {
static const uint32_t sf_kernel_static_rotation[][4] = {
#include "exa_sf_rotation_prog.h"
};
@ -336,27 +336,27 @@ static const CARD32 sf_kernel_static_rotation[][4] = {
#define PS_KERNEL_NUM_GRF 32
#define PS_MAX_THREADS 32
static const CARD32 ps_kernel_static_nomask [][4] = {
static const uint32_t ps_kernel_static_nomask [][4] = {
#include "exa_wm_nomask_prog.h"
};
static const CARD32 ps_kernel_static_maskca [][4] = {
static const uint32_t ps_kernel_static_maskca [][4] = {
#include "exa_wm_maskca_prog.h"
};
static const CARD32 ps_kernel_static_maskca_srcalpha [][4] = {
static const uint32_t ps_kernel_static_maskca_srcalpha [][4] = {
#include "exa_wm_maskca_srcalpha_prog.h"
};
static const CARD32 ps_kernel_static_masknoca [][4] = {
static const uint32_t ps_kernel_static_masknoca [][4] = {
#include "exa_wm_masknoca_prog.h"
};
static const CARD32 ps_kernel_static_rotation [][4] = {
static const uint32_t ps_kernel_static_rotation [][4] = {
#include "exa_wm_rotation_prog.h"
};
static CARD32
static uint32_t
i965_get_card_format(PicturePtr pPict)
{
int i;
@ -392,10 +392,10 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
{
ScrnInfoPtr pScrn = xf86Screens[pSrcPicture->pDrawable->pScreen->myNum];
I830Ptr pI830 = I830PTR(pScrn);
CARD32 src_offset, src_pitch, src_tile_format = 0, src_tiled = 0;
CARD32 mask_offset = 0, mask_pitch = 0, mask_tile_format = 0,
uint32_t src_offset, src_pitch, src_tile_format = 0, src_tiled = 0;
uint32_t mask_offset = 0, mask_pitch = 0, mask_tile_format = 0,
mask_tiled = 0;
CARD32 dst_format, dst_offset, dst_pitch, dst_tile_format = 0,
uint32_t dst_format, dst_offset, dst_pitch, dst_tile_format = 0,
dst_tiled = 0;
Bool rotation_program = FALSE;

16
src/i965_video.c
View File

@ -45,7 +45,7 @@
#undef NDEBUG
#include <assert.h>
static const CARD32 sip_kernel_static[][4] = {
static const uint32_t sip_kernel_static[][4] = {
/* wait (1) a0<1>UW a145<0,1,0>UW { align1 + } */
{ 0x00000030, 0x20000108, 0x00001220, 0x00000000 },
/* nop (4) g0<1>UD { align1 + } */
@ -77,7 +77,7 @@ static const CARD32 sip_kernel_static[][4] = {
#define SF_KERNEL_NUM_GRF 16
#define SF_MAX_THREADS 1
static const CARD32 sf_kernel_static[][4] = {
static const uint32_t sf_kernel_static[][4] = {
#include "sf_prog.h"
};
@ -93,7 +93,7 @@ static const CARD32 sf_kernel_static[][4] = {
#define BRW_GRF_BLOCKS(nreg) ((nreg + 15) / 16 - 1)
static const CARD32 ps_kernel_static[][4] = {
static const uint32_t ps_kernel_static[][4] = {
#include "wm_prog.h"
};
@ -102,15 +102,15 @@ static const CARD32 ps_kernel_static[][4] = {
#define WM_BINDING_TABLE_ENTRIES 2
static CARD32 float_to_uint (float f) {
union {CARD32 i; float f;} x;
static uint32_t float_to_uint (float f) {
union {uint32_t i; float f;} x;
x.f = f;
return x.i;
}
#if 0
static struct {
CARD32 svg_ctl;
uint32_t svg_ctl;
char *name;
} svg_ctl_bits[] = {
{ BRW_SVG_CTL_GS_BA, "General State Base Address" },
@ -127,7 +127,7 @@ brw_debug (ScrnInfoPtr pScrn, char *when)
{
I830Ptr pI830 = I830PTR(pScrn);
int i;
CARD32 v;
uint32_t v;
I830Sync (pScrn);
ErrorF("brw_debug: %s\n", when);
@ -173,7 +173,7 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
struct brw_instruction *sip_kernel;
float *vb;
float src_scale_x, src_scale_y;
CARD32 *binding_table;
uint32_t *binding_table;
Bool first_output = TRUE;
int dest_surf_offset, src_surf_offset, src_sampler_offset, vs_offset;
int sf_offset, wm_offset, cc_offset, vb_offset, cc_viewport_offset;

1
src/reg_dumper/reg_dumper.h
View File

@ -36,7 +36,6 @@
* use i830_debug.c mostly unmodified.
*/
typedef uint32_t CARD32;
typedef char Bool;
#define FALSE 0