Aurelien
/
xf86-video-intel
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Xv: fragments for xv on Sandybridge. 

Need to update intel-gen4asm to build these fragments

Signed--off-by: Xiang, Haihao <haihao.xiang@intel.com>
This commit is contained in:
Xiang, Haihao 2010-10-21 16:10:14 +08:00
parent e34b3f6ef5
commit 9e4dd27aa8
12 changed files with 198 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
configure.ac
View File

@ -44,7 +44,7 @@ XORG_DEFAULT_OPTIONS
AC_DISABLE_STATIC
AC_PROG_LIBTOOL
PKG_CHECK_MODULES(GEN4ASM, [intel-gen4asm >= 1.0], [gen4asm=yes], [gen4asm=no])
PKG_CHECK_MODULES(GEN4ASM, [intel-gen4asm >= 1.1], [gen4asm=yes], [gen4asm=no])
AM_CONDITIONAL(HAVE_GEN4ASM, test x$gen4asm = xyes)
PKG_CHECK_MODULES(UDEV, [libudev], [udev=yes], [udev=no])

29
src/render_program/Makefile.am
View File

@ -61,22 +61,43 @@ INTEL_G4B_GEN5 = \
exa_wm_yuv_rgb.g4b.gen5 \
exa_wm_xy.g4b.gen5
INTEL_G6A = \
exa_wm_src_affine.g6a \
exa_wm_src_sample_argb.g6a \
exa_wm_src_sample_planar.g6a \
exa_wm_write.g6a \
exa_wm_yuv_rgb.g6a
INTEL_G6B = \
exa_wm_src_affine.g6b \
exa_wm_src_sample_argb.g6b \
exa_wm_src_sample_planar.g6b \
exa_wm_write.g6b \
exa_wm_yuv_rgb.g6b
EXTRA_DIST = \
$(INTEL_G4A) \
$(INTEL_G4I) \
$(INTEL_G4B) \
$(INTEL_G4B_GEN5)
$(INTEL_G4B_GEN5)\
$(INTEL_G6A) \
$(INTEL_G6B)
if HAVE_GEN4ASM
SUFFIXES = .g4a .g4b
SUFFIXES = .g4a .g4b .g6a .g6b
.g4a.g4b:
m4 -I$(srcdir) -s $< > $*.g4m && intel-gen4asm -o $@ $*.g4m && intel-gen4asm -g 5 -o $@.gen5 $*.g4m && rm $*.g4m
$(INTEL_G4B): $(INTEL_G4I)
.g6a.g6b:
m4 -I$(srcdir) -s $< > $*.g6m && intel-gen4asm -g 6 -o $@ $*.g6m && rm $*.g6m
BUILT_SOURCES= $(INTEL_G4B)
$(INTEL_G4B): $(INTEL_G4I)
$(INTEL_G6B): $(INTEL_G4I)
BUILT_SOURCES= $(INTEL_G4B) $(INTEL_G6B)
clean-local:
-rm -f $(INTEL_G4B) $(INTEL_G4B_GEN5)
-rm -f $(INTEL_G6B)
endif

47
src/render_program/exa_wm_src_affine.g6a Normal file
View File

@ -0,0 +1,47 @@
/*
* Copyright © 2010 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*
*/
/*
* Fragment to compute src u/v values
*/
include(`exa_wm.g4i')
define(`ul', `src_u')
define(`uh', `m3')
define(`vl', `src_v')
define(`vh', `m5')
define(`bl', `g2.0<8,8,1>F')
define(`bh', `g4.0<8,8,1>F')
define(`a0_a_x',`g6.0<0,1,0>F')
define(`a0_a_y',`g6.16<0,1,0>F')
/* U */
pln (8) ul<1>F a0_a_x bl { align1 }; /* pixel 0-7 */
pln (8) uh<1>F a0_a_x bh { align1 }; /* pixel 8-15 */
/* V */
pln (8) vl<1>F a0_a_y bl { align1 }; /* pixel 0-7 */
pln (8) vh<1>F a0_a_y bh { align1 }; /* pixel 8-15 */

4
src/render_program/exa_wm_src_affine.g6b Normal file
View File

@ -0,0 +1,4 @@
{ 0x0060005a, 0x204077be, 0x000000c0, 0x008d0040 },
{ 0x0060005a, 0x206077be, 0x000000c0, 0x008d0080 },
{ 0x0060005a, 0x208077be, 0x000000d0, 0x008d0040 },
{ 0x0060005a, 0x20a077be, 0x000000d0, 0x008d0080 },

1
src/render_program/exa_wm_src_sample_argb.g6a Symbolic link
View File

@ -0,0 +1 @@
exa_wm_src_sample_argb.g4a

3
src/render_program/exa_wm_src_sample_argb.g6b Normal file
View File

@ -0,0 +1,3 @@
{ 0x00000201, 0x20080061, 0x00000000, 0x00000000 },
{ 0x00600001, 0x20200022, 0x008d0000, 0x00000000 },
{ 0x02800031, 0x21c01cc9, 0x00000020, 0x0a8a0001 },

1
src/render_program/exa_wm_src_sample_planar.g6a Symbolic link
View File

@ -0,0 +1 @@
exa_wm_src_sample_planar.g4a

5
src/render_program/exa_wm_src_sample_planar.g6b Normal file
View File

@ -0,0 +1,5 @@
{ 0x00000201, 0x20080061, 0x00000000, 0x0000e000 },
{ 0x00600001, 0x20200022, 0x008d0000, 0x00000000 },
{ 0x02800031, 0x22001cc9, 0x00000020, 0x0a2a0001 },
{ 0x02800031, 0x21c01cc9, 0x00000020, 0x0a2a0003 },
{ 0x02800031, 0x22401cc9, 0x00000020, 0x0a2a0005 },

79
src/render_program/exa_wm_write.g6a Normal file
View File

@ -0,0 +1,79 @@
/*
* Copyright © 2010 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*
*/
include(`exa_wm.g4i')
/*
* Prepare data in m2-m3 for Red channel, m4-m5 for Green channel,
* m6-m7 for Blue and m8-m9 for Alpha channel
*/
define(`slot_r_00', `m2')
define(`slot_r_01', `m3')
define(`slot_g_00', `m4')
define(`slot_g_01', `m5')
define(`slot_b_00', `m6')
define(`slot_b_01', `m7')
define(`slot_a_00', `m8')
define(`slot_a_01', `m9')
mov (8) slot_r_00<1>F src_sample_r_01<8,8,1>F { align1 };
mov (8) slot_r_01<1>F src_sample_r_23<8,8,1>F { align1 };
mov (8) slot_g_00<1>F src_sample_g_01<8,8,1>F { align1 };
mov (8) slot_g_01<1>F src_sample_g_23<8,8,1>F { align1 };
mov (8) slot_b_00<1>F src_sample_b_01<8,8,1>F { align1 };
mov (8) slot_b_01<1>F src_sample_b_23<8,8,1>F { align1 };
mov (8) slot_a_00<1>F src_sample_a_01<8,8,1>F { align1 };
mov (8) slot_a_01<1>F src_sample_a_23<8,8,1>F { align1 };
/* pass payload in m0-m1 */
mov (8) data_port_msg_0<1>UD g0<8,8,1>UD { align1 };
mov (8) data_port_msg_1<1>UD g1<8,8,1>UD { align1 };
/* write */
send (16)
data_port_msg_0_ind
acc0<1>UW
null
write (
0, /* binding_table */
16, /* pixel scordboard clear, msg type simd16 single source */
12, /* render target write */
0 /* no write commit message */
)
mlen 10
rlen 0
{ align1 EOT };
nop;
nop;
nop;
nop;
nop;
nop;
nop;
nop;

19
src/render_program/exa_wm_write.g6b Normal file
View File

@ -0,0 +1,19 @@
{ 0x00600001, 0x204003be, 0x008d01c0, 0x00000000 },
{ 0x00600001, 0x206003be, 0x008d01e0, 0x00000000 },
{ 0x00600001, 0x208003be, 0x008d0200, 0x00000000 },
{ 0x00600001, 0x20a003be, 0x008d0220, 0x00000000 },
{ 0x00600001, 0x20c003be, 0x008d0240, 0x00000000 },
{ 0x00600001, 0x20e003be, 0x008d0260, 0x00000000 },
{ 0x00600001, 0x210003be, 0x008d0280, 0x00000000 },
{ 0x00600001, 0x212003be, 0x008d02a0, 0x00000000 },
{ 0x00600001, 0x20000022, 0x008d0000, 0x00000000 },
{ 0x00600001, 0x20200022, 0x008d0020, 0x00000000 },
{ 0x05800031, 0x24001cc8, 0x00000000, 0x94099000 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },

1
src/render_program/exa_wm_yuv_rgb.g6a Symbolic link
View File

@ -0,0 +1 @@
exa_wm_yuv_rgb.g4a

12
src/render_program/exa_wm_yuv_rgb.g6b Normal file
View File

@ -0,0 +1,12 @@
{ 0x00800040, 0x23007fbd, 0x008d0200, 0xbd808081 },
{ 0x00800041, 0x23007fbd, 0x008d0300, 0x3f94fdf4 },
{ 0x00800040, 0x22c07fbd, 0x008d01c0, 0xbf008084 },
{ 0x00800040, 0x23407fbd, 0x008d0240, 0xbf008084 },
{ 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 },
{ 0x80800048, 0x21c07fbd, 0x008d02c0, 0x3fcc49ba },
{ 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 },
{ 0x00800048, 0x24007fbc, 0x008d02c0, 0xbf5020c5 },
{ 0x80800048, 0x22007fbd, 0x008d0340, 0xbec8b439 },
{ 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 },
{ 0x80800048, 0x22407fbd, 0x008d0340, 0x40011687 },
{ 0x00800001, 0x228003fd, 0x00000000, 0x3f800000 },