[PATCH] Add mask sampler state
Signed-off-by: Keith Packard <keithp@neko.keithp.com>
This commit is contained in:
Wang Zhenyu
Keith Packard
parent
926d7fb09a
commit
acdc2da77b
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@ -282,7 +282,7 @@ struct brw_surface_state *dest_surf_state;
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struct brw_surface_state *src_surf_state;
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struct brw_surface_state *mask_surf_state;
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struct brw_sampler_state *src_sampler_state;
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struct brw_sampler_state *mask_sampler_state; // could just use one sampler?
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struct brw_sampler_state *mask_sampler_state;
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struct brw_vs_unit_state *vs_state;
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struct brw_sf_unit_state *sf_state;
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@ -297,7 +297,8 @@ struct brw_instruction *sip_kernel;
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CARD32 *binding_table;
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int binding_table_entries;
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int dest_surf_offset, src_surf_offset, src_sampler_offset, vs_offset;
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int dest_surf_offset, src_surf_offset;
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int src_sampler_offset, mask_sampler_offset,vs_offset;
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int sf_offset, wm_offset, cc_offset, vb_offset, cc_viewport_offset;
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int sf_kernel_offset, ps_kernel_offset, sip_kernel_offset;
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int binding_table_offset;
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@ -381,17 +382,17 @@ static const CARD32 sf_kernel_static[][4] = {
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/* ps kernels */
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/* 1: no mask */
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static const CARD32 ps_kernel_static_nomask [][4] = {
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#include "i965_composite_ps_nomask.h"
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#include "i965_composite_wm_nomask.h"
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};
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/* 2: mask with componentAlpha, src * mask color, XXX: later */
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static const CARD32 ps_kernel_static_maskca [][4] = {
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#include "i965_composite_ps_maskca.h"
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#include "i965_composite_wm_maskca.h"
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};
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/* 3: mask without componentAlpha, src * mask alpha */
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static const CARD32 ps_kernel_static_masknoca [][4] = {
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#include "i965_composite_ps_masknoca.h"
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#include "i965_composite_wm_masknoca.h"
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};
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Bool
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@ -478,11 +479,14 @@ ErrorF("i965 prepareComposite\n");
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cc_viewport_offset = ALIGN(next_offset, 32);
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next_offset = cc_viewport_offset + sizeof(*cc_viewport);
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// : fix for texture sampler
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// XXX: -> use only one sampler
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// for texture sampler
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src_sampler_offset = ALIGN(next_offset, 32);
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next_offset = src_sampler_offset + sizeof(*src_sampler_state);
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if (pMask) {
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mask_sampler_offset = ALIGN(next_offset, 32);
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next_offset = mask_sampler_offset + sizeof(*mask_sampler_state);
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}
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/* Align VB to native size of elements, for safety */
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vb_offset = ALIGN(next_offset, 8);
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next_offset = vb_offset + vb_size;
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@ -536,6 +540,9 @@ ErrorF("i965 prepareComposite\n");
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mask_surf_state = (void *)(state_base + mask_surf_offset);
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src_sampler_state = (void *)(state_base + src_sampler_offset);
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if (pMask)
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mask_sampler_state = (void *)(state_base + mask_sampler_offset);
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binding_table = (void *)(state_base + binding_table_offset);
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vb = (void *)(state_base + vb_offset);
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@ -724,6 +731,37 @@ ErrorF("i965 prepareComposite\n");
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and just a single texel tex map, with R32G32B32A32_FLOAT */
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src_sampler_state->ss3.chroma_key_enable = 0; /* disable chromakey */
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if (pMask) {
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memset(mask_sampler_state, 0, sizeof(*mask_sampler_state));
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mask_sampler_state->ss0.lod_peclamp = 1; /* GL mode */
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switch(pMaskPicture->filter) {
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case PictFilterNearest:
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mask_sampler_state->ss0.min_filter = BRW_MAPFILTER_NEAREST;
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mask_sampler_state->ss0.mag_filter = BRW_MAPFILTER_NEAREST;
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break;
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case PictFilterBilinear:
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mask_sampler_state->ss0.min_filter = BRW_MAPFILTER_LINEAR;
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mask_sampler_state->ss0.mag_filter = BRW_MAPFILTER_LINEAR;
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break;
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default:
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I830FALLBACK("Bad filter 0x%x\n", pMaskPicture->filter);
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}
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if (!pMaskPicture->repeat) {
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/* XXX: clamp_border and set border to 0 */
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mask_sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
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mask_sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
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mask_sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
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} else {
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mask_sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_WRAP;
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mask_sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_WRAP;
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mask_sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_WRAP;
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}
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/* XXX: ss2 has border color pointer, which should be in general state address,
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and just a single texel tex map, with R32G32B32A32_FLOAT */
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mask_sampler_state->ss3.chroma_key_enable = 0; /* disable chromakey */
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}
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/* Set up the vertex shader to be disabled (passthrough) */
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memset(vs_state, 0, sizeof(*vs_state));
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// XXX: vs URB should be defined for VF vertex URB store. done already?
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@ -783,26 +821,26 @@ ErrorF("i965 prepareComposite\n");
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wm_state->thread0.grf_reg_count = ((PS_KERNEL_NUM_GRF & ~15) / 16);
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wm_state->thread1.single_program_flow = 1;
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if (!pMask)
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wm_state->thread1.binding_table_entry_count = 2; /* tex and fb */
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wm_state->thread1.binding_table_entry_count = 2; /* 1 tex and fb */
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else
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wm_state->thread1.binding_table_entry_count = 3; /* tex and fb */
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wm_state->thread1.binding_table_entry_count = 3; /* 2 tex and fb */
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wm_state->thread2.scratch_space_base_pointer = 0;
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wm_state->thread2.per_thread_scratch_space = 0;
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// XXX: urb allocation
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wm_state->thread3.dispatch_grf_start_reg = 3; /* must match kernel */
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// wm kernel use urb from 3, see wm_program in compiler module
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wm_state->thread3.urb_entry_read_length = 1; /* one per pair of attrib */
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wm_state->thread3.const_urb_entry_read_length = 0;
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wm_state->thread3.const_urb_entry_read_offset = 0;
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wm_state->thread3.urb_entry_read_length = 1; /* one per pair of attrib */
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wm_state->thread3.urb_entry_read_offset = 0;
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// wm kernel use urb from 3, see wm_program in compiler module
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wm_state->thread3.dispatch_grf_start_reg = 3; /* must match kernel */
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wm_state->wm4.stats_enable = 1;
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wm_state->wm4.sampler_state_pointer = (state_base_offset + src_sampler_offset) >> 5;
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wm_state->wm4.stats_enable = 1; /* statistic */
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wm_state->wm4.sampler_state_pointer = (state_base_offset + src_sampler_offset) >> 5;
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wm_state->wm4.sampler_count = 1; /* 1-4 samplers used */
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wm_state->wm5.max_threads = PS_MAX_THREADS - 1;
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wm_state->wm5.thread_dispatch_enable = 1;
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//just use 16-pixel dispatch, don't need to change kernel start point
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//just use 16-pixel dispatch (4 subspans), don't need to change kernel start point
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wm_state->wm5.enable_16_pix = 1;
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wm_state->wm5.enable_8_pix = 0;
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wm_state->wm5.early_depth_test = 1;
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