From b21fc65b23fcbb2b9a04eb92e3719d88e2d026dc Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Thu, 15 May 2014 11:23:16 +0100 Subject: [PATCH] intel: Update PCI IDs for Cherryview MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Copied from kernel commit 7d87a7f709650bde4d7d63117f25ee1c095da5dd Author: Ville Syrjälä Date: Wed Apr 9 18:19:04 2014 +0300 srm/i915/chv: Add Cherryview PCI IDs and also includes non-functional changes from commit fd3c269f8ff940cc0fbb3b7f7e84c0572f6f759a Author: Zhao Yakui Date: Thu Apr 17 10:37:35 2014 +0800 drm/i915: Split the BDW device definition to prepare for dual BSD rings on BDW GT3 Signed-off-by: Chris Wilson --- src/i915_pciids.h | 32 +++++++++++++++++++++++++------- src/intel_module.c | 6 ++++++ 2 files changed, 31 insertions(+), 7 deletions(-) diff --git a/src/i915_pciids.h b/src/i915_pciids.h index 940ece49..05720356 100644 --- a/src/i915_pciids.h +++ b/src/i915_pciids.h @@ -191,8 +191,8 @@ INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \ INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */ \ INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \ - INTEL_VGA_DEVICE(0x0A0E, info), /* ULT GT1 reserved */ \ - INTEL_VGA_DEVICE(0x0A1E, info), /* ULT GT2 reserved */ \ + INTEL_VGA_DEVICE(0x0A0E, info), /* ULX GT1 mobile */ \ + INTEL_VGA_DEVICE(0x0A1E, info), /* ULX GT2 mobile */ \ INTEL_VGA_DEVICE(0x0A2E, info), /* ULT GT3 reserved */ \ INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */ \ INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \ @@ -223,14 +223,32 @@ _INTEL_BDW_D(gt, 0x160A, info), /* Server */ \ _INTEL_BDW_D(gt, 0x160D, info) /* Workstation */ -#define INTEL_BDW_M_IDS(info) \ +#define INTEL_BDW_GT12M_IDS(info) \ _INTEL_BDW_M_IDS(1, info), \ - _INTEL_BDW_M_IDS(2, info), \ + _INTEL_BDW_M_IDS(2, info) + +#define INTEL_BDW_GT12D_IDS(info) \ + _INTEL_BDW_D_IDS(1, info), \ + _INTEL_BDW_D_IDS(2, info) + +#define INTEL_BDW_GT3M_IDS(info) \ _INTEL_BDW_M_IDS(3, info) -#define INTEL_BDW_D_IDS(info) \ - _INTEL_BDW_D_IDS(1, info), \ - _INTEL_BDW_D_IDS(2, info), \ +#define INTEL_BDW_GT3D_IDS(info) \ _INTEL_BDW_D_IDS(3, info) +#define INTEL_BDW_M_IDS(info) \ + INTEL_BDW_GT12M_IDS(info), \ + INTEL_BDW_GT3M_IDS(info) + +#define INTEL_BDW_D_IDS(info) \ + INTEL_BDW_GT12D_IDS(info), \ + INTEL_BDW_GT3D_IDS(info) + +#define INTEL_CHV_IDS(info) \ + INTEL_VGA_DEVICE(0x22b0, info), \ + INTEL_VGA_DEVICE(0x22b1, info), \ + INTEL_VGA_DEVICE(0x22b2, info), \ + INTEL_VGA_DEVICE(0x22b3, info) + #endif /* _I915_PCIIDS_H */ diff --git a/src/intel_module.c b/src/intel_module.c index 7f31a948..223ea81e 100644 --- a/src/intel_module.c +++ b/src/intel_module.c @@ -114,6 +114,10 @@ static const struct intel_device_info intel_broadwell_info = { .gen = 0100, }; +static const struct intel_device_info intel_cherryview_info = { + .gen = 0101, +}; + static const SymTabRec intel_chipsets[] = { {PCI_CHIP_I810, "i810"}, {PCI_CHIP_I810_DC100, "i810-dc100"}, @@ -269,6 +273,8 @@ static const struct pci_id_match intel_device_match[] = { INTEL_BDW_D_IDS(&intel_broadwell_info), INTEL_BDW_M_IDS(&intel_broadwell_info), + INTEL_CHV_IDS(&intel_cherryview_info), + INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info), #endif