Keep static copies of the 965 render programs in video memory.
This reduces the CPU overhead of memcpying them in every time, for a speedup in aa24text of around 30%. This is based on work by Carl Worth which is in the intel-batchbuffer branch.
This commit is contained in:
Eric Anholt
parent
bd41d2bb85
commit
b606278db8
10
src/i830.h
10
src/i830.h
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@ -85,7 +85,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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#ifdef I830_USE_EXA
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#include "exa.h"
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Bool I830EXAInit(ScreenPtr pScreen);
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#define EXA_LINEAR_EXTRA (64*1024)
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unsigned long long I830TexOffsetStart(PixmapPtr pPix);
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#endif
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@ -398,7 +397,7 @@ typedef struct _I830Rec {
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i830_memory *xaa_scratch_2;
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#ifdef I830_USE_EXA
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i830_memory *exa_offscreen;
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i830_memory *exa_965_state;
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i830_memory *gen4_render_state_mem;
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#endif
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/* Regions allocated either from the above pools, or from agpgart. */
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I830RingBuffer *LpRing;
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@ -531,6 +530,9 @@ typedef struct _I830Rec {
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uint32_t mapstate[6];
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uint32_t samplerstate[6];
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/* 965 render acceleration state */
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struct gen4_render_state *gen4_render_state;
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Bool directRenderingDisabled; /* DRI disabled in PreInit. */
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Bool directRenderingEnabled; /* DRI enabled this generation. */
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@ -824,6 +826,10 @@ Bool i915_prepare_composite(int op, PicturePtr pSrc, PicturePtr pMask,
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PicturePtr pDst, PixmapPtr pSrcPixmap,
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PixmapPtr pMaskPixmap, PixmapPtr pDstPixmap);
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/* i965_render.c */
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unsigned int gen4_render_state_size(ScrnInfoPtr pScrn);
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void gen4_render_state_init(ScrnInfoPtr pScrn);
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void gen4_render_state_cleanup(ScrnInfoPtr pScrn);
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void gen4_render_state_reset(ScrnInfoPtr pScrn);
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Bool i965_check_composite(int op, PicturePtr pSrc, PicturePtr pMask,
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PicturePtr pDst);
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Bool i965_prepare_composite(int op, PicturePtr pSrc, PicturePtr pMask,
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@ -205,6 +205,9 @@ I830Sync(ScrnInfoPtr pScrn)
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pI830->LpRing->space = pI830->LpRing->mem->size - 8;
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pI830->nextColorExpandBuf = 0;
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if (IS_I965G(pI830))
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gen4_render_state_reset(pScrn);
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}
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void
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@ -3190,6 +3190,9 @@ I830LeaveVT(int scrnIndex, int flags)
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}
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#endif /* XF86DRI_MM */
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if (IS_I965G(pI830))
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gen4_render_state_cleanup(pScrn);
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if (pI830->AccelInfoRec)
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pI830->AccelInfoRec->NeedToSync = FALSE;
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}
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@ -3236,6 +3239,9 @@ I830EnterVT(int scrnIndex, int flags)
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/* Update the screen pixmap in case the buffer moved */
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i830_update_front_offset(pScrn);
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if (IS_I965G(pI830))
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gen4_render_state_init(pScrn);
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if (i830_check_error_state(pScrn)) {
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xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
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"Existing errors found in hardware state.\n");
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@ -334,7 +334,7 @@ i830_reset_allocations(ScrnInfoPtr pScrn)
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pI830->xaa_scratch = NULL;
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pI830->xaa_scratch_2 = NULL;
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pI830->exa_offscreen = NULL;
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pI830->exa_965_state = NULL;
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pI830->gen4_render_state_mem = NULL;
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pI830->overlay_regs = NULL;
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pI830->logical_context = NULL;
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#ifdef XF86DRI
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@ -1370,11 +1370,14 @@ i830_allocate_2d_memory(ScrnInfoPtr pScrn)
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}
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/* even in XAA, 965G needs state mem buffer for rendering */
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if (IS_I965G(pI830) && !pI830->noAccel && pI830->exa_965_state == NULL) {
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pI830->exa_965_state =
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if (IS_I965G(pI830) && !pI830->noAccel &&
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pI830->gen4_render_state_mem == NULL)
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{
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pI830->gen4_render_state_mem =
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i830_allocate_memory(pScrn, "exa G965 state buffer",
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EXA_LINEAR_EXTRA, GTT_PAGE_SIZE, 0);
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if (pI830->exa_965_state == NULL) {
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gen4_render_state_size(pScrn),
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GTT_PAGE_SIZE, 0);
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if (pI830->gen4_render_state_mem == NULL) {
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xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
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"Failed to allocate exa state buffer for 965.\n");
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return FALSE;
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@ -113,6 +113,12 @@ static struct formatinfo i965_tex_formats[] = {
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{PICT_a8, BRW_SURFACEFORMAT_A8_UNORM },
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};
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/** Private data for gen4 render accel implementation. */
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struct gen4_render_state {
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unsigned char *state_addr;
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unsigned int state_offset;
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};
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static void i965_get_blend_cntl(int op, PicturePtr pMask, uint32_t dst_format,
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uint32_t *sblend, uint32_t *dblend)
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{
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@ -267,17 +273,12 @@ static struct brw_wm_unit_state *wm_state, wm_state_local;
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static struct brw_cc_unit_state *cc_state, cc_state_local;
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static struct brw_cc_viewport *cc_viewport;
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static struct brw_instruction *sf_kernel;
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static struct brw_instruction *ps_kernel;
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static struct brw_instruction *sip_kernel;
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static uint32_t *binding_table;
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static int binding_table_entries;
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static int dest_surf_offset, src_surf_offset, mask_surf_offset;
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static int src_sampler_offset, mask_sampler_offset,vs_offset;
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static int sf_offset, wm_offset, cc_offset, vb_offset, cc_viewport_offset;
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static int sf_kernel_offset, ps_kernel_offset, sip_kernel_offset;
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static int wm_scratch_offset;
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static int binding_table_offset;
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static int default_color_offset;
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@ -324,7 +325,7 @@ static const uint32_t sf_kernel_static[][4] = {
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#include "exa_sf.g4b"
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};
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static const uint32_t sf_kernel_static_mask[][4] = {
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static const uint32_t sf_kernel_mask_static[][4] = {
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#include "exa_sf_mask.g4b"
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};
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@ -334,21 +335,21 @@ static const uint32_t sf_kernel_static_mask[][4] = {
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#define PS_SCRATCH_SPACE 1024
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#define PS_SCRATCH_SPACE_LOG 0 /* log2 (PS_SCRATCH_SPACE) - 10 (1024 is 0, 2048 is 1) */
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static const uint32_t ps_kernel_static_nomask_affine [][4] = {
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static const uint32_t ps_kernel_nomask_affine_static [][4] = {
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#include "exa_wm_xy.g4b"
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#include "exa_wm_src_affine.g4b"
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#include "exa_wm_src_sample_argb.g4b"
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#include "exa_wm_write.g4b"
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};
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static const uint32_t ps_kernel_static_nomask_projective [][4] = {
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static const uint32_t ps_kernel_nomask_projective_static [][4] = {
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#include "exa_wm_xy.g4b"
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#include "exa_wm_src_projective.g4b"
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#include "exa_wm_src_sample_argb.g4b"
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#include "exa_wm_write.g4b"
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};
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static const uint32_t ps_kernel_static_maskca_affine [][4] = {
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static const uint32_t ps_kernel_maskca_affine_static [][4] = {
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#include "exa_wm_xy.g4b"
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#include "exa_wm_src_affine.g4b"
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#include "exa_wm_src_sample_argb.g4b"
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@ -358,7 +359,7 @@ static const uint32_t ps_kernel_static_maskca_affine [][4] = {
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#include "exa_wm_write.g4b"
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};
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static const uint32_t ps_kernel_static_maskca_projective [][4] = {
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static const uint32_t ps_kernel_maskca_projective_static [][4] = {
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#include "exa_wm_xy.g4b"
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#include "exa_wm_src_projective.g4b"
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#include "exa_wm_src_sample_argb.g4b"
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@ -368,7 +369,7 @@ static const uint32_t ps_kernel_static_maskca_projective [][4] = {
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#include "exa_wm_write.g4b"
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};
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static const uint32_t ps_kernel_static_maskca_srcalpha_affine [][4] = {
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static const uint32_t ps_kernel_maskca_srcalpha_affine_static [][4] = {
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#include "exa_wm_xy.g4b"
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#include "exa_wm_src_affine.g4b"
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#include "exa_wm_src_sample_a.g4b"
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@ -378,7 +379,7 @@ static const uint32_t ps_kernel_static_maskca_srcalpha_affine [][4] = {
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#include "exa_wm_write.g4b"
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};
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static const uint32_t ps_kernel_static_maskca_srcalpha_projective [][4] = {
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static const uint32_t ps_kernel_maskca_srcalpha_projective_static [][4] = {
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#include "exa_wm_xy.g4b"
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#include "exa_wm_src_projective.g4b"
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#include "exa_wm_src_sample_a.g4b"
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@ -388,7 +389,7 @@ static const uint32_t ps_kernel_static_maskca_srcalpha_projective [][4] = {
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#include "exa_wm_write.g4b"
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};
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static const uint32_t ps_kernel_static_masknoca_affine [][4] = {
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static const uint32_t ps_kernel_masknoca_affine_static [][4] = {
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#include "exa_wm_xy.g4b"
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#include "exa_wm_src_affine.g4b"
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#include "exa_wm_src_sample_argb.g4b"
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@ -398,7 +399,7 @@ static const uint32_t ps_kernel_static_masknoca_affine [][4] = {
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#include "exa_wm_write.g4b"
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};
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static const uint32_t ps_kernel_static_masknoca_projective [][4] = {
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static const uint32_t ps_kernel_masknoca_projective_static [][4] = {
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#include "exa_wm_xy.g4b"
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#include "exa_wm_src_projective.g4b"
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#include "exa_wm_src_sample_argb.g4b"
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@ -408,6 +409,62 @@ static const uint32_t ps_kernel_static_masknoca_projective [][4] = {
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#include "exa_wm_write.g4b"
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};
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/**
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* Storage for the static kernel data with template name, rounded to 64 bytes.
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*/
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#define KERNEL_DECL(template) \
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uint32_t template [((sizeof (template ## _static) + 63) & ~63) / 16][4];
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/**
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* Gen4 rendering state buffer structure.
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*
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* Ideally this structure would contain static data for all of the
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* combinations of state that we use for Render acceleration, and another
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* buffer would be the use-and-throw-away surface and vertex data. See the
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* intel-batchbuffer branch for an implementation of that. For now, it
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* has the static program data, and then a changing buffer containing all
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* the rest.
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*/
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typedef struct _gen4_state {
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KERNEL_DECL (sip_kernel);
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KERNEL_DECL (sf_kernel);
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KERNEL_DECL (sf_kernel_mask);
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KERNEL_DECL (ps_kernel_nomask_affine);
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KERNEL_DECL (ps_kernel_nomask_projective);
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KERNEL_DECL (ps_kernel_maskca_affine);
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KERNEL_DECL (ps_kernel_maskca_projective);
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KERNEL_DECL (ps_kernel_maskca_srcalpha_affine);
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KERNEL_DECL (ps_kernel_maskca_srcalpha_projective);
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KERNEL_DECL (ps_kernel_masknoca_affine);
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KERNEL_DECL (ps_kernel_masknoca_projective);
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uint8_t other_state[65536];
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} gen4_state_t;
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/**
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* Called at EnterVT to fill in our state buffer with any static information.
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*/
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static void
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gen4_state_init (gen4_state_t *state)
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{
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#define KERNEL_COPY(kernel) \
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memcpy(state->kernel, kernel ## _static, sizeof(kernel ## _static))
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KERNEL_COPY (sip_kernel);
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KERNEL_COPY (sf_kernel);
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KERNEL_COPY (sf_kernel_mask);
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KERNEL_COPY (ps_kernel_nomask_affine);
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KERNEL_COPY (ps_kernel_nomask_projective);
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KERNEL_COPY (ps_kernel_maskca_affine);
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KERNEL_COPY (ps_kernel_maskca_projective);
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KERNEL_COPY (ps_kernel_maskca_srcalpha_affine);
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KERNEL_COPY (ps_kernel_maskca_srcalpha_projective);
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KERNEL_COPY (ps_kernel_masknoca_affine);
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KERNEL_COPY (ps_kernel_masknoca_projective);
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#undef KERNEL_COPY
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}
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static uint32_t
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i965_get_card_format(PicturePtr pPict)
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{
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@ -484,7 +541,7 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
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binding_table_entries = 2; /* default no mask */
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/* Set up our layout of state in framebuffer. First the general state: */
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next_offset = 0;
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next_offset = offsetof(gen4_state_t, other_state);
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vs_offset = ALIGN(next_offset, 64);
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next_offset = vs_offset + sizeof(*vs_state);
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@ -500,46 +557,6 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
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cc_offset = ALIGN(next_offset, 32);
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next_offset = cc_offset + sizeof(*cc_state);
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/* keep current sf_kernel, which will send one setup urb entry to
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* PS kernel
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*/
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sf_kernel_offset = ALIGN(next_offset, 64);
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if (pMask)
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next_offset = sf_kernel_offset + sizeof (sf_kernel_static_mask);
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else
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next_offset = sf_kernel_offset + sizeof (sf_kernel_static);
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ps_kernel_offset = ALIGN(next_offset, 64);
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if (pMask) {
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if (pMaskPicture->componentAlpha &&
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PICT_FORMAT_RGB(pMaskPicture->format)) {
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if (i965_blend_op[op].src_alpha) {
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if (is_affine)
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next_offset = ps_kernel_offset + sizeof(ps_kernel_static_maskca_srcalpha_affine);
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else
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next_offset = ps_kernel_offset + sizeof(ps_kernel_static_maskca_srcalpha_projective);
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} else {
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if (is_affine)
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next_offset = ps_kernel_offset + sizeof(ps_kernel_static_maskca_affine);
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else
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next_offset = ps_kernel_offset + sizeof(ps_kernel_static_maskca_projective);
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}
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} else {
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if (is_affine)
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next_offset = ps_kernel_offset + sizeof(ps_kernel_static_masknoca_affine);
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else
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next_offset = ps_kernel_offset + sizeof(ps_kernel_static_masknoca_projective);
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}
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} else {
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if (is_affine)
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next_offset = ps_kernel_offset + sizeof (ps_kernel_static_nomask_affine);
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else
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next_offset = ps_kernel_offset + sizeof (ps_kernel_static_nomask_projective);
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}
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sip_kernel_offset = ALIGN(next_offset, 64);
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next_offset = sip_kernel_offset + sizeof (sip_kernel_static);
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/* needed? */
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cc_viewport_offset = ALIGN(next_offset, 32);
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next_offset = cc_viewport_offset + sizeof(*cc_viewport);
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@ -576,16 +593,12 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
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next_offset = default_color_offset + sizeof(*default_color_state);
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total_state_size = next_offset;
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assert(total_state_size < pI830->exa_965_state->size);
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assert(total_state_size < sizeof(gen4_state_t));
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state_base_offset = pI830->exa_965_state->offset;
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state_base_offset = ALIGN(state_base_offset, 64);
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state_base_offset = pI830->gen4_render_state_mem->offset;
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assert((state_base_offset & 63) == 0);
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state_base = (char *)(pI830->FbBase + state_base_offset);
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sf_kernel = (void *)(state_base + sf_kernel_offset);
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ps_kernel = (void *)(state_base + ps_kernel_offset);
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sip_kernel = (void *)(state_base + sip_kernel_offset);
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cc_viewport = (void *)(state_base + cc_viewport_offset);
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binding_table = (void *)(state_base + binding_table_offset);
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@ -664,9 +677,6 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
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cc_state = (void *)(state_base + cc_offset);
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memcpy (cc_state, &cc_state_local, sizeof (cc_state_local));
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/* Upload system kernel */
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memcpy (sip_kernel, sip_kernel_static, sizeof (sip_kernel_static));
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/* Set up the state buffer for the destination surface */
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dest_surf_state = &dest_surf_state_local;
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memset(dest_surf_state, 0, sizeof(*dest_surf_state));
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@ -857,16 +867,15 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
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* calculate dA/dx and dA/dy. Hand these interpolation coefficients
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* back to SF which then hands pixels off to WM.
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*/
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if (pMask)
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memcpy(sf_kernel, sf_kernel_static_mask,
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sizeof (sf_kernel_static_mask));
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else
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memcpy(sf_kernel, sf_kernel_static, sizeof (sf_kernel_static));
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sf_state = &sf_state_local;
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memset(sf_state, 0, sizeof(*sf_state));
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sf_state->thread0.kernel_start_pointer =
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(state_base_offset + sf_kernel_offset) >> 6;
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if (pMask) {
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sf_state->thread0.kernel_start_pointer = (state_base_offset +
|
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offsetof(gen4_state_t, sf_kernel_mask)) >> 6;
|
||||
} else {
|
||||
sf_state->thread0.kernel_start_pointer = (state_base_offset +
|
||||
offsetof(gen4_state_t, sf_kernel)) >> 6;
|
||||
}
|
||||
sf_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(SF_KERNEL_NUM_GRF);
|
||||
sf_state->sf1.single_program_flow = 1;
|
||||
sf_state->sf1.binding_table_entry_count = 0;
|
||||
|
|
@ -899,37 +908,64 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
|
|||
memcpy (sf_state, &sf_state_local, sizeof (sf_state_local));
|
||||
|
||||
/* Set up the PS kernel (dispatched by WM) */
|
||||
if (pMask) {
|
||||
if (pMaskPicture->componentAlpha &&
|
||||
PICT_FORMAT_RGB(pMaskPicture->format)) {
|
||||
if (i965_blend_op[op].src_alpha) {
|
||||
if (is_affine)
|
||||
memcpy(ps_kernel, ps_kernel_static_maskca_srcalpha_affine, sizeof (ps_kernel_static_maskca_srcalpha_affine));
|
||||
else
|
||||
memcpy(ps_kernel, ps_kernel_static_maskca_srcalpha_projective, sizeof (ps_kernel_static_maskca_srcalpha_projective));
|
||||
} else {
|
||||
if (is_affine)
|
||||
memcpy(ps_kernel, ps_kernel_static_maskca_affine, sizeof (ps_kernel_static_maskca_affine));
|
||||
else
|
||||
memcpy(ps_kernel, ps_kernel_static_maskca_projective, sizeof (ps_kernel_static_maskca_projective));
|
||||
}
|
||||
} else {
|
||||
if (is_affine)
|
||||
memcpy(ps_kernel, ps_kernel_static_masknoca_affine, sizeof (ps_kernel_static_masknoca_affine));
|
||||
else
|
||||
memcpy(ps_kernel, ps_kernel_static_masknoca_projective, sizeof (ps_kernel_static_masknoca_projective));
|
||||
}
|
||||
} else {
|
||||
if (is_affine)
|
||||
memcpy(ps_kernel, ps_kernel_static_nomask_affine, sizeof (ps_kernel_static_nomask_affine));
|
||||
else
|
||||
memcpy(ps_kernel, ps_kernel_static_nomask_projective, sizeof (ps_kernel_static_nomask_projective));
|
||||
}
|
||||
|
||||
wm_state = &wm_state_local;
|
||||
memset(wm_state, 0, sizeof (*wm_state));
|
||||
wm_state->thread0.kernel_start_pointer =
|
||||
(state_base_offset + ps_kernel_offset) >> 6;
|
||||
if (pMask) {
|
||||
if (pMaskPicture->componentAlpha &&
|
||||
PICT_FORMAT_RGB(pMaskPicture->format))
|
||||
{
|
||||
if (i965_blend_op[op].src_alpha) {
|
||||
if (is_affine) {
|
||||
wm_state->thread0.kernel_start_pointer =
|
||||
(state_base_offset +
|
||||
offsetof(gen4_state_t,
|
||||
ps_kernel_maskca_srcalpha_affine)) >> 6;
|
||||
} else {
|
||||
wm_state->thread0.kernel_start_pointer =
|
||||
(state_base_offset +
|
||||
offsetof(gen4_state_t,
|
||||
ps_kernel_maskca_srcalpha_projective)) >> 6;
|
||||
}
|
||||
} else {
|
||||
if (is_affine) {
|
||||
wm_state->thread0.kernel_start_pointer =
|
||||
(state_base_offset +
|
||||
offsetof(gen4_state_t,
|
||||
ps_kernel_maskca_affine)) >> 6;
|
||||
} else {
|
||||
wm_state->thread0.kernel_start_pointer =
|
||||
(state_base_offset +
|
||||
offsetof(gen4_state_t,
|
||||
ps_kernel_maskca_projective)) >> 6;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
if (is_affine) {
|
||||
wm_state->thread0.kernel_start_pointer =
|
||||
(state_base_offset +
|
||||
offsetof(gen4_state_t,
|
||||
ps_kernel_masknoca_affine)) >> 6;
|
||||
} else {
|
||||
wm_state->thread0.kernel_start_pointer =
|
||||
(state_base_offset +
|
||||
offsetof(gen4_state_t,
|
||||
ps_kernel_masknoca_projective)) >> 6;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
if (is_affine) {
|
||||
wm_state->thread0.kernel_start_pointer =
|
||||
(state_base_offset +
|
||||
offsetof(gen4_state_t,
|
||||
ps_kernel_nomask_affine)) >> 6;
|
||||
} else {
|
||||
wm_state->thread0.kernel_start_pointer =
|
||||
(state_base_offset +
|
||||
offsetof(gen4_state_t,
|
||||
ps_kernel_nomask_projective)) >> 6;
|
||||
}
|
||||
}
|
||||
|
||||
wm_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(PS_KERNEL_NUM_GRF);
|
||||
wm_state->thread1.single_program_flow = 0;
|
||||
if (!pMask)
|
||||
|
|
@ -1006,7 +1042,7 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
|
|||
|
||||
/* Set system instruction pointer */
|
||||
OUT_BATCH(BRW_STATE_SIP | 0);
|
||||
OUT_BATCH(state_base_offset + sip_kernel_offset);
|
||||
OUT_BATCH(state_base_offset + offsetof(gen4_state_t, sip_kernel));
|
||||
OUT_BATCH(MI_NOOP);
|
||||
ADVANCE_BATCH();
|
||||
}
|
||||
|
|
@ -1328,3 +1364,49 @@ i965_composite(PixmapPtr pDst, int srcX, int srcY, int maskX, int maskY,
|
|||
*/
|
||||
i830MarkSync(pScrn);
|
||||
}
|
||||
|
||||
/**
|
||||
* Called at EnterVT so we can set up our offsets into the state buffer.
|
||||
*/
|
||||
void
|
||||
gen4_render_state_init(ScrnInfoPtr pScrn)
|
||||
{
|
||||
I830Ptr pI830 = I830PTR(pScrn);
|
||||
struct gen4_render_state *state;
|
||||
|
||||
if (pI830->gen4_render_state == NULL)
|
||||
pI830->gen4_render_state = calloc(sizeof(*state), 1);
|
||||
|
||||
state = pI830->gen4_render_state;
|
||||
|
||||
state->state_offset = pI830->gen4_render_state_mem->offset;
|
||||
state->state_addr = pI830->FbBase + pI830->gen4_render_state_mem->offset;
|
||||
|
||||
gen4_state_init((gen4_state_t *)state->state_addr);
|
||||
}
|
||||
|
||||
/**
|
||||
* Called at LeaveVT.
|
||||
*/
|
||||
void
|
||||
gen4_render_state_cleanup(ScrnInfoPtr pScrn)
|
||||
{
|
||||
I830Ptr pI830 = I830PTR(pScrn);
|
||||
|
||||
pI830->gen4_render_state->state_addr = NULL;
|
||||
}
|
||||
|
||||
/**
|
||||
* Called when the hardware is idled and flushed, so we know we can
|
||||
* reuse the buffer contents.
|
||||
*/
|
||||
void
|
||||
gen4_render_state_reset(ScrnInfoPtr pScrn)
|
||||
{
|
||||
}
|
||||
|
||||
unsigned int
|
||||
gen4_render_state_size(ScrnInfoPtr pScrn)
|
||||
{
|
||||
return sizeof(gen4_state_t);
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue