diff --git a/src/i830_batchbuffer.c b/src/i830_batchbuffer.c
index 82758a2d..976a405c 100644
--- a/src/i830_batchbuffer.c
+++ b/src/i830_batchbuffer.c
@@ -100,18 +100,35 @@ intel_batch_flush(ScrnInfoPtr pScrn)
 
     dri_process_relocs(pI830->batch_bo);
 
-    if (!IS_I830(pI830) && !IS_845G(pI830)) {
-	BEGIN_LP_RING(2);
-	OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
-	OUT_RING(pI830->batch_bo->offset);
-	ADVANCE_LP_RING();
+    if (pI830->directRenderingEnabled) {
+	struct drm_i915_batchbuffer batch;
+	int ret;
+
+	batch.start = pI830->batch_bo->offset;
+	batch.used = pI830->batch_used;
+	batch.cliprects = NULL;
+	batch.num_cliprects = 0;
+	batch.DR1 = 0;
+	batch.DR4 = 0xffffffff;
+
+	ret = drmCommandWrite(pI830->drmSubFD, DRM_I915_BATCHBUFFER,
+			      &batch, sizeof(batch));
+	if (ret != 0)
+	    FatalError("Failed to submit batchbuffer: %s\n", strerror(errno));
     } else {
-	BEGIN_LP_RING(4);
-	OUT_RING(MI_BATCH_BUFFER);
-	OUT_RING(pI830->batch_bo->offset);
-	OUT_RING(pI830->batch_bo->offset + pI830->batch_used - 4);
-	OUT_RING(MI_NOOP);
-	ADVANCE_LP_RING();
+	if (!IS_I830(pI830) && !IS_845G(pI830)) {
+	    BEGIN_LP_RING(2);
+	    OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
+	    OUT_RING(pI830->batch_bo->offset);
+	    ADVANCE_LP_RING();
+	} else {
+	    BEGIN_LP_RING(4);
+	    OUT_RING(MI_BATCH_BUFFER);
+	    OUT_RING(pI830->batch_bo->offset);
+	    OUT_RING(pI830->batch_bo->offset + pI830->batch_used - 4);
+	    OUT_RING(MI_NOOP);
+	    ADVANCE_LP_RING();
+	}
     }
 
     dri_post_submit(pI830->batch_bo);