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xf86-video-intel
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Allow interlaced modes. 

This may not the best method, but it should be a good base on which to
build...

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Krzysztof Halasa 2010-09-21 22:56:26 +01:00 committed by Chris Wilson
parent f63c7df686
commit bfba6d6148
3 changed files with 15 additions and 2 deletions
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1
src/intel_display.c
View File

@ -1299,6 +1299,7 @@ intel_output_init(ScrnInfoPtr scrn, struct intel_mode *mode, int num)
output->possible_crtcs = kencoder->possible_crtcs;
output->possible_clones = kencoder->possible_clones;
output->interlaceAllowed = TRUE;
intel_output->output = output;
list_add(&intel_output->link, &mode->outputs);

6
src/intel_dri.c
View File

@ -367,6 +367,12 @@ I830DRI2CopyRegion(DrawablePtr drawable, RegionPtr pRegion,
event = MI_WAIT_FOR_PIPEB_SVBLANK;
}
if (scrn->currentMode->Flags & V_INTERLACE) {
/* DSL count field lines */
y1 /= 2;
y2 /= 2;
}
BEGIN_BATCH(5);
/*
* The documentation says that the LOAD_SCAN_LINES

10
src/intel_video.c
View File

@ -1348,13 +1348,19 @@ intel_wait_for_scanline(ScrnInfoPtr scrn, PixmapPtr pixmap,
event = MI_WAIT_FOR_PIPEB_SVBLANK;
}
if (scrn->currentMode->Flags & V_INTERLACE) {
/* DSL count field lines */
y1 /= 2;
y2 /= 2;
}
BEGIN_BATCH(5);
/* The documentation says that the LOAD_SCAN_LINES command
* always comes in pairs. Don't ask me why. */
OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | pipe);
OUT_BATCH((box.y1 << 16) | box.y2);
OUT_BATCH((y1 << 16) | y2);
OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | pipe);
OUT_BATCH((box.y1 << 16) | box.y2);
OUT_BATCH((y1 << 16) | y2);
OUT_BATCH(MI_WAIT_FOR_EVENT | event);
ADVANCE_BATCH();
}