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DRI2: more WaitMSC fixes 

A couple more niggles: make sure we return a target_msc that at least
matches the current count; this is a little more friendly to clients
that missed an event.  Also check for >= when calculating the remainder
so we'll catch the *next* vblank event when the calculation is
satisfied, rather than the current one as might happen at times.

Reported-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
This commit is contained in:
Jesse Barnes 2010-03-08 15:26:24 -08:00
parent 7845c6ade8
commit c66d57080d
1 changed files with 9 additions and 1 deletions
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10
src/i830_dri.c
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@ -885,6 +885,14 @@ I830DRI2ScheduleWaitMSC(ClientPtr client, DrawablePtr draw, CARD64 target_msc,
* client.
*/
if (divisor == 0 || current_msc < target_msc) {
/* If target_msc already reached or passed, set it to
* current_msc to ensure we return a reasonable value back
* to the caller. This keeps the client from continually
* sending us MSC targets from the past by forcibly updating
* their count on this call.
*/
if (current_msc >= target_msc)
target_msc = current_msc;
vbl.request.type = DRM_VBLANK_ABSOLUTE | DRM_VBLANK_EVENT;
if (pipe > 0)
vbl.request.type |= DRM_VBLANK_SECONDARY;
@ -919,7 +927,7 @@ I830DRI2ScheduleWaitMSC(ClientPtr client, DrawablePtr draw, CARD64 target_msc,
* seq % divisor == remainder, so we need to wait for the next time
* that will happen.
*/
if ((current_msc % divisor) > remainder)
if ((current_msc % divisor) >= remainder)
vbl.request.sequence += divisor;
vbl.request.signal = (unsigned long)wait_info;