Fix DSPARB change on 965G
From the spec, only 965GM and IGD_GM have 128 FIFO entries. With DSPARB change introduced by commit bd137a, I've got PIPE B underrun when dual-headed on G35 platform.
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@ -1964,12 +1964,12 @@ SetHWOperatingState(ScrnInfoPtr pScrn)
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* FIFO RAM entries equally between planes A and B.
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*/
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if (IS_I9XX(pI830)) {
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if (IS_I915GM(pI830) || IS_I915G(pI830))
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OUTREG(DSPARB, (95 << DSPARB_CSTART_SHIFT) |
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(48 << DSPARB_BSTART_SHIFT));
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else
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if (IS_I965GM(pI830) || IS_IGD_GM(pI830))
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OUTREG(DSPARB, (127 << DSPARB_CSTART_SHIFT) |
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(64 << DSPARB_BSTART_SHIFT));
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else
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OUTREG(DSPARB, (95 << DSPARB_CSTART_SHIFT) |
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(48 << DSPARB_BSTART_SHIFT));
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} else {
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OUTREG(DSPARB, 254 << DSPARB_BEND_SHIFT | 128 << DSPARB_AEND_SHIFT);
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}
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