Fix DSPARB change on 965G

From the spec, only 965GM and IGD_GM have 128 FIFO entries.
With DSPARB change introduced by commit bd137a, I've got PIPE B
underrun when dual-headed on G35 platform.
This commit is contained in:
Hong Liu 2008-06-04 16:56:50 +08:00 committed by Zhenyu Wang
parent 64ccc8a036
commit c7fee208fd
1 changed files with 4 additions and 4 deletions

View File

@ -1964,12 +1964,12 @@ SetHWOperatingState(ScrnInfoPtr pScrn)
* FIFO RAM entries equally between planes A and B.
*/
if (IS_I9XX(pI830)) {
if (IS_I915GM(pI830) || IS_I915G(pI830))
OUTREG(DSPARB, (95 << DSPARB_CSTART_SHIFT) |
(48 << DSPARB_BSTART_SHIFT));
else
if (IS_I965GM(pI830) || IS_IGD_GM(pI830))
OUTREG(DSPARB, (127 << DSPARB_CSTART_SHIFT) |
(64 << DSPARB_BSTART_SHIFT));
else
OUTREG(DSPARB, (95 << DSPARB_CSTART_SHIFT) |
(48 << DSPARB_BSTART_SHIFT));
} else {
OUTREG(DSPARB, 254 << DSPARB_BEND_SHIFT | 128 << DSPARB_AEND_SHIFT);
}