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Program FBC fence offset register 

Just a partial fix for some of the FBC issues people have been seeing.  The
other half is to disable FBC if both pipes are running.
This commit is contained in:
Jesse Barnes 2008-02-05 11:36:24 -08:00
parent 332587081f
commit cabed67b6a
3 changed files with 4 additions and 0 deletions
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1
src/i830.h
View File

@ -616,6 +616,7 @@ typedef struct _I830Rec {
CARD32 saveFBC_LL_BASE;
CARD32 saveFBC_CONTROL2;
CARD32 saveFBC_CONTROL;
CARD32 saveFBC_FENCE_OFF;
enum last_3d *last_3d;

1
src/i830_display.c
View File

@ -612,6 +612,7 @@ i830_enable_fb_compression_8xx(xf86CrtcPtr crtc)
OUTREG(FBC_LL_BASE, pI830->compressed_ll_buffer->bus_addr + 6);
OUTREG(FBC_CONTROL2, FBC_CTL_FENCE_DBL | FBC_CTL_IDLE_FULL |
FBC_CTL_CPU_FENCE | plane);
OUTREG(FBC_FENCE_OFF, crtc->y);
/* Zero buffers */
memset(pI830->FbBase + pI830->compressed_front_buffer->offset, 0,

2
src/i830_driver.c
View File

@ -1932,6 +1932,7 @@ SaveHWState(ScrnInfoPtr pScrn)
pI830->saveFBC_LL_BASE = INREG(FBC_LL_BASE);
pI830->saveFBC_CONTROL2 = INREG(FBC_CONTROL2);
pI830->saveFBC_CONTROL = INREG(FBC_CONTROL);
pI830->saveFBC_FENCE_OFF = INREG(FBC_FENCE_OFF);
}
/* Save video mode information for native mode-setting. */
@ -2212,6 +2213,7 @@ RestoreHWState(ScrnInfoPtr pScrn)
if (pI830->fb_compression) {
OUTREG(FBC_CFB_BASE, pI830->saveFBC_CFB_BASE);
OUTREG(FBC_LL_BASE, pI830->saveFBC_LL_BASE);
OUTREG(FBC_FENCE_OFF, pI830->saveFBC_FENCE_OFF);
OUTREG(FBC_CONTROL2, pI830->saveFBC_CONTROL2);
OUTREG(FBC_CONTROL, pI830->saveFBC_CONTROL);
}