Attempt to fix several front buffer tiling failure cases.
Front buffer tiling is now disabled with G965 and XAA. Some of the acceleration that i830_xaa.c does can't be supported on tiled buffers. Adds a tiling field to struct i830_memory, and uses it instead of separate variables for each potential tiled buffer.
This commit is contained in:
Eric Anholt
parent
ed1b106fab
commit
cb36635a05
14
src/i830.h
14
src/i830.h
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@ -117,6 +117,12 @@ typedef CARD8(*I830ReadIndexedByteFunc)(I830Ptr pI830, IOADDRESS addr,
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typedef void (*I830WriteByteFunc)(I830Ptr pI830, IOADDRESS addr, CARD8 value);
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typedef CARD8(*I830ReadByteFunc)(I830Ptr pI830, IOADDRESS addr);
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enum tile_format {
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TILE_NONE,
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TILE_XMAJOR,
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TILE_YMAJOR
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};
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/** Record of a linear allocation in the aperture. */
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typedef struct _i830_memory i830_memory;
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struct _i830_memory {
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@ -148,6 +154,8 @@ struct _i830_memory {
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*/
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unsigned long agp_offset;
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enum tile_format tiling;
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/** Description of the allocation, for logging */
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char *name;
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@ -316,8 +324,6 @@ typedef struct _I830Rec {
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i830_memory *logical_context;
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unsigned int front_tiled;
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#ifdef XF86DRI
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i830_memory *back_buffer;
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i830_memory *third_buffer;
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@ -331,10 +337,6 @@ typedef struct _I830Rec {
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int mmModeFlags;
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int mmSize;
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unsigned int back_tiled;
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unsigned int third_tiled;
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unsigned int depth_tiled;
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Bool want_vblank_interrupts;
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#ifdef DAMAGE
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DamagePtr pDamage;
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@ -505,14 +505,14 @@ i830_display_tiled(xf86CrtcPtr crtc)
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ScrnInfoPtr pScrn = crtc->scrn;
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I830Ptr pI830 = I830PTR(pScrn);
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if (!pI830->tiling)
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return FALSE;
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/* Rotated data is currently linear, allocated either via XAA or EXA */
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if (crtc->rotatedData)
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return FALSE;
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return TRUE;
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if (pI830->front_buffer->tiling != TILE_NONE)
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return TRUE;
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return FALSE;
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}
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static Bool
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@ -1658,10 +1658,13 @@ I830UpdateDRIBuffers(ScrnInfoPtr pScrn, drmI830Sarea *sarea)
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I830DRIUnmapScreenRegions(pScrn, sarea);
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sarea->front_tiled = pI830->front_tiled;
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sarea->back_tiled = pI830->back_tiled;
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sarea->third_tiled = pI830->third_tiled;
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sarea->depth_tiled = pI830->depth_tiled;
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sarea->front_tiled = (pI830->front_buffer->tiling != TILE_NONE);
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sarea->back_tiled = (pI830->back_buffer->tiling != TILE_NONE);
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if (pI830->third_buffer != NULL)
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sarea->third_tiled = (pI830->third_buffer->tiling != TILE_NONE);
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else
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sarea->third_tiled = FALSE;
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sarea->depth_tiled = (pI830->depth_buffer->tiling != TILE_NONE);
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sarea->rotated_tiled = FALSE;
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sarea->front_offset = pI830->front_buffer->offset;
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@ -97,19 +97,30 @@ const int I830PatternROP[16] =
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ROP_1
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};
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/* FIXME: use pixmap private instead */
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/**
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* Returns whether a given pixmap is tiled or not.
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*
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* Currently, we only have one pixmap that might be tiled, which is the front
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* buffer. At the point where we are tiling some pixmaps managed by the
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* general allocator, we should move this to using pixmap privates.
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*/
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Bool
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i830_pixmap_tiled(PixmapPtr p)
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i830_pixmap_tiled(PixmapPtr pPixmap)
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{
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ScreenPtr pScreen = p->drawable.pScreen;
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ScreenPtr pScreen = pPixmap->drawable.pScreen;
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ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
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I830Ptr pI830 = I830PTR(pScrn);
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unsigned long offset;
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if (!pI830->tiling)
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return FALSE;
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if (p == pScreen->GetScreenPixmap(pScreen))
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/* Don't use exaGetPixmapOffset becuase we might be called from XAA code. */
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offset = (long)pPixmap->devPrivate.ptr -
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(long)pI830->FbBase;
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if (offset == pI830->front_buffer->offset &&
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pI830->front_buffer->tiling != TILE_NONE)
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{
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return TRUE;
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}
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return FALSE;
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}
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@ -108,12 +108,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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#define ALIGN(i,m) (((i) + (m) - 1) & ~((m) - 1))
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enum tile_format {
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TILING_NONE,
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TILING_XMAJOR,
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TILING_YMAJOR
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};
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static void i830_set_fence(ScrnInfoPtr pScrn, int nr, unsigned int offset,
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unsigned int pitch, unsigned int size,
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enum tile_format tile_format);
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@ -536,6 +530,8 @@ i830_allocate_memory(ScrnInfoPtr pScrn, const char *name,
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return NULL;
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}
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mem->tiling = TILE_NONE;
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return mem;
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}
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@ -560,7 +556,7 @@ i830_allocate_memory_tiled(ScrnInfoPtr pScrn, const char *name,
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i830_memory *mem;
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int fence_divide, i;
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if (tile_format == TILING_NONE)
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if (tile_format == TILE_NONE)
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return i830_allocate_memory(pScrn, name, size, alignment, flags);
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/* Only allocate page-sized increments. */
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@ -637,19 +633,11 @@ i830_allocate_memory_tiled(ScrnInfoPtr pScrn, const char *name,
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}
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mem->size = size;
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mem->tiling = tile_format;
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return mem;
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}
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static void
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i830_describe_tiling(ScrnInfoPtr pScrn, int verbosity, const char *prefix,
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i830_memory *mem, unsigned int tiling_mode)
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{
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xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
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"%s%s is %stiled\n", prefix, mem->name,
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(tiling_mode == FENCE_LINEAR) ? "not " : "");
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}
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void
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i830_describe_allocations(ScrnInfoPtr pScrn, int verbosity, const char *prefix)
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{
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@ -672,6 +660,8 @@ i830_describe_allocations(ScrnInfoPtr pScrn, int verbosity, const char *prefix)
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"%sMemory allocation layout:\n", prefix);
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for (mem = pI830->memory_list->next; mem->next != NULL; mem = mem->next) {
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char phys_suffix[30] = "";
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char *tile_suffix = "";
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if (mem->offset >= pI830->stolen_size &&
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mem->prev->offset < pI830->stolen_size)
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@ -681,42 +671,21 @@ i830_describe_allocations(ScrnInfoPtr pScrn, int verbosity, const char *prefix)
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prefix, pI830->stolen_size);
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}
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if (mem->bus_addr == 0) {
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xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
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"%s0x%08lx-0x%08lx: %s (%ld kB)\n", prefix,
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mem->offset, mem->end - 1, mem->name,
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mem->size / 1024);
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} else {
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xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
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"%s0x%08lx-0x%08lx: %s "
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"(%ld kB, 0x%16llx physical)\n",
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prefix,
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mem->offset, mem->end - 1, mem->name,
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mem->size / 1024, mem->bus_addr);
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}
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if (mem->bus_addr != 0)
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sprintf(phys_suffix, ", 0x%16llx physical\n", mem->bus_addr);
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if (mem->tiling == TILE_XMAJOR)
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tile_suffix = " X tiled";
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else if (mem->tiling == TILE_YMAJOR)
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tile_suffix = " Y tiled";
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xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
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"%s0x%08lx-0x%08lx: %s (%ld kB%s)%s\n", prefix,
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mem->offset, mem->end - 1, mem->name,
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mem->size / 1024, phys_suffix, tile_suffix);
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}
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xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
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"%s0x%08lx: end of aperture\n",
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prefix, pI830->FbMapSize);
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if (pI830->front_buffer != NULL) {
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i830_describe_tiling(pScrn, verbosity, prefix, pI830->front_buffer,
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pI830->front_tiled);
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}
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#ifdef XF86DRI
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if (pI830->back_buffer != NULL) {
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i830_describe_tiling(pScrn, verbosity, prefix, pI830->back_buffer,
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pI830->back_tiled);
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}
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if (pI830->third_buffer != NULL) {
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i830_describe_tiling(pScrn, verbosity, prefix, pI830->third_buffer,
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pI830->third_tiled);
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}
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if (pI830->depth_buffer != NULL) {
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i830_describe_tiling(pScrn, verbosity, prefix, pI830->depth_buffer,
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pI830->depth_tiled);
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}
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#endif
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}
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static Bool
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@ -835,6 +804,7 @@ i830_allocate_framebuffer(ScrnInfoPtr pScrn, I830Ptr pI830, BoxPtr FbMemBox,
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long size, fb_height;
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char *name;
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i830_memory *front_buffer = NULL;
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Bool tiling;
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/* Clear everything first. */
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memset(FbMemBox, 0, sizeof(*FbMemBox));
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@ -903,8 +873,17 @@ i830_allocate_framebuffer(ScrnInfoPtr pScrn, I830Ptr pI830, BoxPtr FbMemBox,
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name = secondary ? "secondary front buffer" : "front buffer";
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/* Front buffer tiling has to be disabled with G965 XAA because some of the
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* acceleration operations (non-XY COLOR_BLT) can't be done to tiled
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* buffers.
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*/
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if (!pI830->useEXA && IS_I965G(pI830))
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tiling = FALSE;
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else
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tiling = pI830->tiling;
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/* Attempt to allocate it tiled first if we have page flipping on. */
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if (pI830->tiling && IsTileable(pScrn, pitch)) {
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if (tiling && IsTileable(pScrn, pitch)) {
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/* XXX: probably not the case on 965 */
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if (IS_I9XX(pI830))
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align = MB(1);
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@ -912,14 +891,12 @@ i830_allocate_framebuffer(ScrnInfoPtr pScrn, I830Ptr pI830, BoxPtr FbMemBox,
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align = KB(512);
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front_buffer = i830_allocate_memory_tiled(pScrn, name, size,
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pitch, align,
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0, TILING_XMAJOR);
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pI830->front_tiled = FENCE_XMAJOR;
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0, TILE_XMAJOR);
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}
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/* If not, attempt it linear */
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if (front_buffer == NULL) {
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front_buffer = i830_allocate_memory(pScrn, name, size, KB(64), flags);
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pI830->front_tiled = FENCE_LINEAR;
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}
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if (front_buffer == NULL) {
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@ -1240,7 +1217,7 @@ myLog2(unsigned int n)
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static Bool
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i830_allocate_backbuffer(ScrnInfoPtr pScrn, i830_memory **buffer,
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unsigned int *tiled, const char *name)
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const char *name)
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{
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I830Ptr pI830 = I830PTR(pScrn);
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unsigned int pitch = pScrn->displayWidth * pI830->cpp;
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@ -1258,8 +1235,7 @@ i830_allocate_backbuffer(ScrnInfoPtr pScrn, i830_memory **buffer,
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size = ROUND_TO_PAGE(pitch * ALIGN(height, 16));
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*buffer = i830_allocate_memory_tiled(pScrn, name, size, pitch,
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GTT_PAGE_SIZE, ALIGN_BOTH_ENDS,
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TILING_XMAJOR);
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*tiled = FENCE_XMAJOR;
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TILE_XMAJOR);
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}
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/* Otherwise, just allocate it linear */
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@ -1267,7 +1243,6 @@ i830_allocate_backbuffer(ScrnInfoPtr pScrn, i830_memory **buffer,
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size = ROUND_TO_PAGE(pitch * height);
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*buffer = i830_allocate_memory(pScrn, name, size, GTT_PAGE_SIZE,
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ALIGN_BOTH_ENDS);
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*tiled = FENCE_LINEAR;
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}
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if (*buffer == NULL) {
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@ -1303,14 +1278,12 @@ i830_allocate_depthbuffer(ScrnInfoPtr pScrn)
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/* The 965 requires that the depth buffer be in Y Major format, while
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* the rest appear to fail when handed that format.
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*/
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tile_format = IS_I965G(pI830) ? TILING_YMAJOR: TILING_XMAJOR;
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tile_format = IS_I965G(pI830) ? TILE_YMAJOR: TILE_XMAJOR;
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pI830->depth_buffer =
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i830_allocate_memory_tiled(pScrn, "depth buffer", size, pitch,
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GTT_PAGE_SIZE, ALIGN_BOTH_ENDS,
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tile_format);
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pI830->depth_tiled = (tile_format == TILING_YMAJOR) ? FENCE_YMAJOR :
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FENCE_XMAJOR;
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}
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/* Otherwise, allocate it linear. */
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@ -1319,7 +1292,6 @@ i830_allocate_depthbuffer(ScrnInfoPtr pScrn)
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pI830->depth_buffer =
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i830_allocate_memory(pScrn, "depth buffer", size, GTT_PAGE_SIZE,
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0);
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pI830->depth_tiled = FENCE_LINEAR;
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}
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if (pI830->depth_buffer == NULL) {
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@ -1405,13 +1377,11 @@ i830_allocate_3d_memory(ScrnInfoPtr pScrn)
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return FALSE;
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}
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if (!i830_allocate_backbuffer(pScrn, &pI830->back_buffer,
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&pI830->back_tiled, "back buffer"))
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if (!i830_allocate_backbuffer(pScrn, &pI830->back_buffer, "back buffer"))
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return FALSE;
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if (pI830->TripleBuffer && !i830_allocate_backbuffer(pScrn,
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&pI830->third_buffer,
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&pI830->third_tiled,
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"third buffer")) {
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xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
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"Failed to allocate third buffer, triple buffering "
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@ -1447,7 +1417,7 @@ i830_set_fence(ScrnInfoPtr pScrn, int nr, unsigned int offset,
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DPRINTF(PFX, "i830_set_fence(): %d, 0x%08x, %d, %d kByte\n",
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nr, offset, pitch, size / 1024);
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assert(tile_format != TILING_NONE);
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assert(tile_format != TILE_NONE);
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if (IS_I965G(pI830)) {
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if (nr < 0 || nr >= FENCE_NEW_NR) {
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@ -1457,18 +1427,18 @@ i830_set_fence(ScrnInfoPtr pScrn, int nr, unsigned int offset,
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}
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switch (tile_format) {
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case TILING_XMAJOR:
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case TILE_XMAJOR:
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pI830->fence[nr] = (((pitch / 128) - 1) << 2) | offset | 1;
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pI830->fence[nr] |= I965_FENCE_X_MAJOR;
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break;
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case TILING_YMAJOR:
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case TILE_YMAJOR:
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/* YMajor can be 128B aligned but the current code dictates
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* otherwise. This isn't a problem apart from memory waste.
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* FIXME */
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pI830->fence[nr] = (((pitch / 128) - 1) << 2) | offset | 1;
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pI830->fence[nr] |= I965_FENCE_Y_MAJOR;
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break;
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case TILING_NONE:
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case TILE_NONE:
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break;
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}
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@ -1516,13 +1486,13 @@ i830_set_fence(ScrnInfoPtr pScrn, int nr, unsigned int offset,
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val = offset | FENCE_VALID;
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switch (tile_format) {
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case TILING_XMAJOR:
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case TILE_XMAJOR:
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val |= FENCE_X_MAJOR;
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break;
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case TILING_YMAJOR:
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case TILE_YMAJOR:
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val |= FENCE_Y_MAJOR;
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break;
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case TILING_NONE:
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case TILE_NONE:
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break;
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}
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@ -1590,7 +1560,7 @@ i830_set_fence(ScrnInfoPtr pScrn, int nr, unsigned int offset,
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}
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if ((IS_I945G(pI830) || IS_I945GM(pI830) || IS_G33CLASS(pI830))
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&& tile_format == TILING_YMAJOR)
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&& tile_format == TILE_YMAJOR)
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fence_pitch = pitch / 128;
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else if (IS_I9XX(pI830))
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fence_pitch = pitch / 512;
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112
src/i830_xaa.c
112
src/i830_xaa.c
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@ -269,41 +269,40 @@ I830XAAInit(ScreenPtr pScreen)
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return TRUE;
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}
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#ifdef XF86DRI
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static unsigned int
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CheckTiling(ScrnInfoPtr pScrn)
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I830CheckTiling(ScrnInfoPtr pScrn)
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{
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I830Ptr pI830 = I830PTR(pScrn);
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unsigned int tiled = 0;
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/* Check tiling */
|
||||
if (IS_I965G(pI830)) {
|
||||
if (pI830->bufferOffset == pScrn->fbOffset && pI830->front_tiled == FENCE_XMAJOR)
|
||||
tiled = 1;
|
||||
if (pI830->back_buffer != NULL &&
|
||||
pI830->bufferOffset == pI830->back_buffer->offset &&
|
||||
pI830->back_tiled == FENCE_XMAJOR) {
|
||||
tiled = 1;
|
||||
}
|
||||
if (pI830->third_buffer != NULL &&
|
||||
pI830->bufferOffset == pI830->third_buffer->offset &&
|
||||
pI830->third_tiled == FENCE_XMAJOR) {
|
||||
tiled = 1;
|
||||
}
|
||||
/* not really supported as it's always YMajor tiled */
|
||||
if (pI830->depth_buffer != NULL &&
|
||||
pI830->bufferOffset == pI830->depth_buffer->offset &&
|
||||
pI830->depth_tiled == FENCE_XMAJOR) {
|
||||
tiled = 1;
|
||||
}
|
||||
if (pI830->bufferOffset == pI830->front_buffer->offset &&
|
||||
pI830->front_buffer->tiling != TILE_NONE)
|
||||
{
|
||||
return TRUE;
|
||||
}
|
||||
#ifdef XF86DRI
|
||||
if (pI830->back_buffer != NULL &&
|
||||
pI830->bufferOffset == pI830->back_buffer->offset &&
|
||||
pI830->back_buffer->tiling != TILE_NONE)
|
||||
{
|
||||
return TRUE;
|
||||
}
|
||||
if (pI830->depth_buffer != NULL &&
|
||||
pI830->bufferOffset == pI830->depth_buffer->offset &&
|
||||
pI830->depth_buffer->tiling != TILE_NONE)
|
||||
{
|
||||
return TRUE;
|
||||
}
|
||||
if (pI830->third_buffer != NULL &&
|
||||
pI830->bufferOffset == pI830->third_buffer->offset &&
|
||||
pI830->third_buffer->tiling != TILE_NONE)
|
||||
{
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
return tiled;
|
||||
}
|
||||
#else
|
||||
#define CheckTiling(pScrn) 0
|
||||
#endif
|
||||
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
void
|
||||
I830SetupForSolidFill(ScrnInfoPtr pScrn, int color, int rop,
|
||||
unsigned int planemask)
|
||||
|
|
@ -314,16 +313,20 @@ I830SetupForSolidFill(ScrnInfoPtr pScrn, int color, int rop,
|
|||
ErrorF("I830SetupForFillRectSolid color: %x rop: %x mask: %x\n",
|
||||
color, rop, planemask);
|
||||
|
||||
if (IS_I965G(pI830) && I830CheckTiling(pScrn)) {
|
||||
pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 4;
|
||||
} else {
|
||||
pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
|
||||
}
|
||||
|
||||
#ifdef I830_USE_EXA
|
||||
/* This function gets used by I830DRIInitBuffers(), and we might not have
|
||||
* XAAGetPatternROP() available. So just use the ROPs from our EXA code
|
||||
* if available.
|
||||
*/
|
||||
pI830->BR[13] = ((I830PatternROP[rop] << 16) |
|
||||
(pScrn->displayWidth * pI830->cpp));
|
||||
pI830->BR[13] |= (I830PatternROP[rop] << 16);
|
||||
#else
|
||||
pI830->BR[13] = ((XAAGetPatternROP(rop) << 16) |
|
||||
(pScrn->displayWidth * pI830->cpp));
|
||||
pI830->BR[13] |= ((XAAGetPatternROP(rop) << 16);
|
||||
#endif
|
||||
|
||||
pI830->BR[16] = color;
|
||||
|
|
@ -381,7 +384,12 @@ I830SetupForScreenToScreenCopy(ScrnInfoPtr pScrn, int xdir, int ydir, int rop,
|
|||
ErrorF("I830SetupForScreenToScreenCopy %d %d %x %x %d\n",
|
||||
xdir, ydir, rop, planemask, transparency_color);
|
||||
|
||||
pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
|
||||
if (IS_I965G(pI830) && I830CheckTiling(pScrn)) {
|
||||
pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 4;
|
||||
} else {
|
||||
pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
|
||||
}
|
||||
|
||||
#ifdef I830_USE_EXA
|
||||
/* This function gets used by I830DRIInitBuffers(), and we might not have
|
||||
* XAAGetCopyROP() available. So just use the ROPs from our EXA code
|
||||
|
|
@ -411,7 +419,7 @@ I830SubsequentScreenToScreenCopy(ScrnInfoPtr pScrn, int src_x1, int src_y1,
|
|||
{
|
||||
I830Ptr pI830 = I830PTR(pScrn);
|
||||
int dst_x2, dst_y2;
|
||||
unsigned int tiled = CheckTiling(pScrn);
|
||||
unsigned int tiled = I830CheckTiling(pScrn);
|
||||
|
||||
if (I810_DEBUG & DEBUG_VERBOSE_ACCEL)
|
||||
ErrorF("I830SubsequentScreenToScreenCopy %d,%d - %d,%d %dx%d\n",
|
||||
|
|
@ -420,10 +428,6 @@ I830SubsequentScreenToScreenCopy(ScrnInfoPtr pScrn, int src_x1, int src_y1,
|
|||
dst_x2 = dst_x1 + w;
|
||||
dst_y2 = dst_y1 + h;
|
||||
|
||||
if (tiled)
|
||||
pI830->BR[13] = ((pI830->BR[13] & 0xFFFF) >> 2) |
|
||||
(pI830->BR[13] & 0xFFFF0000);
|
||||
|
||||
{
|
||||
BEGIN_LP_RING(8);
|
||||
|
||||
|
|
@ -463,7 +467,11 @@ I830SetupForMono8x8PatternFill(ScrnInfoPtr pScrn, int pattx, int patty,
|
|||
pI830->BR[18] = bg;
|
||||
pI830->BR[19] = fg;
|
||||
|
||||
pI830->BR[13] = (pScrn->displayWidth * pI830->cpp); /* In bytes */
|
||||
if (IS_I965G(pI830) && I830CheckTiling(pScrn)) {
|
||||
pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 4;
|
||||
} else {
|
||||
pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
|
||||
}
|
||||
pI830->BR[13] |= XAAGetPatternROP(rop) << 16;
|
||||
if (bg == -1)
|
||||
pI830->BR[13] |= (1 << 28);
|
||||
|
|
@ -487,7 +495,7 @@ I830SubsequentMono8x8PatternFillRect(ScrnInfoPtr pScrn, int pattx, int patty,
|
|||
{
|
||||
I830Ptr pI830 = I830PTR(pScrn);
|
||||
int x1, x2, y1, y2;
|
||||
unsigned int tiled = CheckTiling(pScrn);
|
||||
unsigned int tiled = I830CheckTiling(pScrn);
|
||||
|
||||
x1 = x;
|
||||
x2 = x + w;
|
||||
|
|
@ -497,10 +505,6 @@ I830SubsequentMono8x8PatternFillRect(ScrnInfoPtr pScrn, int pattx, int patty,
|
|||
if (I810_DEBUG & DEBUG_VERBOSE_ACCEL)
|
||||
ErrorF("I830SubsequentMono8x8PatternFillRect\n");
|
||||
|
||||
if (tiled)
|
||||
pI830->BR[13] = ((pI830->BR[13] & 0xFFFF) >> 2) |
|
||||
(pI830->BR[13] & 0xFFFF0000);
|
||||
|
||||
{
|
||||
BEGIN_LP_RING(10);
|
||||
|
||||
|
|
@ -560,7 +564,11 @@ I830SetupForScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
|
|||
fg, bg, rop, planemask);
|
||||
|
||||
/* Fill out register values */
|
||||
pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
|
||||
if (IS_I965G(pI830) && I830CheckTiling(pScrn)) {
|
||||
pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 4;
|
||||
} else {
|
||||
pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
|
||||
}
|
||||
pI830->BR[13] |= XAAGetCopyROP(rop) << 16;
|
||||
if (bg == -1)
|
||||
pI830->BR[13] |= (1 << 29);
|
||||
|
|
@ -603,7 +611,7 @@ static void
|
|||
I830SubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno)
|
||||
{
|
||||
I830Ptr pI830 = I830PTR(pScrn);
|
||||
unsigned int tiled = CheckTiling(pScrn);
|
||||
unsigned int tiled = I830CheckTiling(pScrn);
|
||||
|
||||
if (pI830->init == 0) {
|
||||
pI830->BR[12] = (pI830->AccelInfoRec->ScanlineColorExpandBuffers[0] -
|
||||
|
|
@ -621,10 +629,6 @@ I830SubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno)
|
|||
ErrorF("I830SubsequentColorExpandScanline %d (addr %x)\n",
|
||||
bufno, pI830->BR[12]);
|
||||
|
||||
if (tiled)
|
||||
pI830->BR[13] = ((pI830->BR[13] & 0xFFFF) >> 2) |
|
||||
(pI830->BR[13] & 0xFFFF0000);
|
||||
|
||||
{
|
||||
BEGIN_LP_RING(8);
|
||||
|
||||
|
|
@ -666,7 +670,11 @@ I830SetupForScanlineImageWrite(ScrnInfoPtr pScrn, int rop,
|
|||
ErrorF("I830SetupForScanlineImageWrite %x %x\n", rop, planemask);
|
||||
|
||||
/* Fill out register values */
|
||||
pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
|
||||
if (IS_I965G(pI830) && I830CheckTiling(pScrn)) {
|
||||
pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 4;
|
||||
} else {
|
||||
pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
|
||||
}
|
||||
pI830->BR[13] |= XAAGetCopyROP(rop) << 16;
|
||||
|
||||
switch (pScrn->bitsPerPixel) {
|
||||
|
|
@ -703,7 +711,7 @@ static void
|
|||
I830SubsequentImageWriteScanline(ScrnInfoPtr pScrn, int bufno)
|
||||
{
|
||||
I830Ptr pI830 = I830PTR(pScrn);
|
||||
unsigned int tiled = CheckTiling(pScrn);
|
||||
unsigned int tiled = I830CheckTiling(pScrn);
|
||||
|
||||
if (pI830->init == 0) {
|
||||
pI830->BR[12] = (pI830->AccelInfoRec->ScanlineColorExpandBuffers[0] -
|
||||
|
|
|
|||
|
|
@ -285,10 +285,9 @@ i915_texture_setup(PicturePtr pPict, PixmapPtr pPix, int unit)
|
|||
|
||||
pI830->mapstate[unit * 3 + 0] = offset;
|
||||
pI830->mapstate[unit * 3 + 1] = format |
|
||||
MS3_USE_FENCE_REGS |
|
||||
((pPix->drawable.height - 1) << MS3_HEIGHT_SHIFT) |
|
||||
((pPix->drawable.width - 1) << MS3_WIDTH_SHIFT);
|
||||
if (pI830->tiling)
|
||||
pI830->mapstate[unit * 3 + 1] |= MS3_USE_FENCE_REGS;
|
||||
pI830->mapstate[unit * 3 + 2] = ((pitch / 4) - 1) << MS4_PITCH_SHIFT;
|
||||
|
||||
pI830->samplerstate[unit * 3 + 0] = (MIPFILTER_NONE <<
|
||||
|
|
|
|||
|
|
@ -149,7 +149,7 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
|
|||
OUT_RING(_3DSTATE_MAP_STATE | 3);
|
||||
OUT_RING(0x00000001); /* texture map #1 */
|
||||
OUT_RING(pPriv->YBuf0offset);
|
||||
ms3 = MAPSURF_422;
|
||||
ms3 = MAPSURF_422 | MS3_USE_FENCE_REGS;
|
||||
switch (id) {
|
||||
case FOURCC_YUY2:
|
||||
ms3 |= MT_422_YCRCB_NORMAL;
|
||||
|
|
@ -160,8 +160,6 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
|
|||
}
|
||||
ms3 |= (height - 1) << MS3_HEIGHT_SHIFT;
|
||||
ms3 |= (width - 1) << MS3_WIDTH_SHIFT;
|
||||
if (pI830->tiling)
|
||||
ms3 |= MS3_USE_FENCE_REGS;
|
||||
OUT_RING(ms3);
|
||||
OUT_RING(((video_pitch / 4) - 1) << MS4_PITCH_SHIFT);
|
||||
ADVANCE_LP_RING();
|
||||
|
|
@ -248,29 +246,23 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
|
|||
OUT_RING(0x00000007);
|
||||
|
||||
OUT_RING(pPriv->YBuf0offset);
|
||||
ms3 = MAPSURF_8BIT | MT_8BIT_I8;
|
||||
ms3 = MAPSURF_8BIT | MT_8BIT_I8 | MS3_USE_FENCE_REGS;
|
||||
ms3 |= (height - 1) << MS3_HEIGHT_SHIFT;
|
||||
ms3 |= (width - 1) << MS3_WIDTH_SHIFT;
|
||||
if (pI830->tiling)
|
||||
ms3 |= MS3_USE_FENCE_REGS;
|
||||
OUT_RING(ms3);
|
||||
OUT_RING(((video_pitch * 2 / 4) - 1) << MS4_PITCH_SHIFT);
|
||||
|
||||
OUT_RING(pPriv->UBuf0offset);
|
||||
ms3 = MAPSURF_8BIT | MT_8BIT_I8;
|
||||
ms3 = MAPSURF_8BIT | MT_8BIT_I8 | MS3_USE_FENCE_REGS;
|
||||
ms3 |= (height / 2 - 1) << MS3_HEIGHT_SHIFT;
|
||||
ms3 |= (width / 2 - 1) << MS3_WIDTH_SHIFT;
|
||||
if (pI830->tiling)
|
||||
ms3 |= MS3_USE_FENCE_REGS;
|
||||
OUT_RING(ms3);
|
||||
OUT_RING(((video_pitch / 4) - 1) << MS4_PITCH_SHIFT);
|
||||
|
||||
OUT_RING(pPriv->VBuf0offset);
|
||||
ms3 = MAPSURF_8BIT | MT_8BIT_I8;
|
||||
ms3 = MAPSURF_8BIT | MT_8BIT_I8 | MS3_USE_FENCE_REGS;
|
||||
ms3 |= (height / 2 - 1) << MS3_HEIGHT_SHIFT;
|
||||
ms3 |= (width / 2 - 1) << MS3_WIDTH_SHIFT;
|
||||
if (pI830->tiling)
|
||||
ms3 |= MS3_USE_FENCE_REGS;
|
||||
OUT_RING(ms3);
|
||||
OUT_RING(((video_pitch / 4) - 1) << MS4_PITCH_SHIFT);
|
||||
ADVANCE_LP_RING();
|
||||
|
|
|
|||
Loading…
Reference in New Issue