Merge branch 'master' into drm-gem
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commit
d0fda9d24c
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@ -655,6 +655,7 @@ typedef struct _I830Rec {
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uint32_t saveRENCLK_GATE_D2;
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uint32_t saveDSPCLK_GATE_D;
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uint32_t saveRAMCLK_GATE_D;
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uint32_t savePWRCTXA;
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enum last_3d *last_3d;
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@ -2099,6 +2099,9 @@ SaveHWState(ScrnInfoPtr pScrn)
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pI830->saveRAMCLK_GATE_D = INREG(RAMCLK_GATE_D);
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}
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if (IS_I965GM(pI830) || IS_IGD_GM(pI830))
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pI830->savePWRCTXA = INREG(PWRCTXA);
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if (IS_MOBILE(pI830) && !IS_I830(pI830))
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pI830->saveLVDS = INREG(LVDS);
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pI830->savePFIT_CONTROL = INREG(PFIT_CONTROL);
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@ -2165,6 +2168,10 @@ RestoreHWState(ScrnInfoPtr pScrn)
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OUTREG(RENCLK_GATE_D2, pI830->saveRENCLK_GATE_D2);
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OUTREG(RAMCLK_GATE_D, pI830->saveRAMCLK_GATE_D);
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}
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if (IS_I965GM(pI830) || IS_IGD_GM(pI830))
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OUTREG(PWRCTXA, pI830->savePWRCTXA);
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/*
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* Pipe regs
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* To restore the saved state, we first need to program the PLL regs,
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@ -2896,9 +2903,6 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
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return FALSE;
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}
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if (pI830->power_context)
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OUTREG(PWRCTXA, pI830->power_context->offset | PWRCTX_EN);
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I830UnmapMMIO(pScrn);
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i830_fixup_mtrrs(pScrn);
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@ -3370,6 +3374,9 @@ I830EnterVT(int scrnIndex, int flags)
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i830_init_clock_gating(pScrn);
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if (pI830->power_context)
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OUTREG(PWRCTXA, pI830->power_context->offset | PWRCTX_EN);
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/* Clear the framebuffer */
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memset(pI830->FbBase + pScrn->fbOffset, 0,
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pScrn->virtualY * pScrn->displayWidth * pI830->cpp);
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@ -3517,9 +3524,6 @@ I830CloseScreen(int scrnIndex, ScreenPtr pScreen)
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}
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#endif
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if (IS_I965GM(pI830) || IS_IGD_GM(pI830))
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OUTREG(PWRCTXA, 0);
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if (I830IsPrimary(pScrn)) {
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xf86GARTCloseScreen(scrnIndex);
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@ -237,6 +237,8 @@ static i830_quirk i830_quirk_list[] = {
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{ PCI_CHIP_I965_GM, 0x1028, 0x0256, quirk_ignore_tv },
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/* Dell Inspiron 1318 */
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{ PCI_CHIP_I965_GM, 0x1028, 0x0286, quirk_ignore_tv },
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/* Dell Vostro A840 (LP: #235155) */
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{ PCI_CHIP_I965_GM, 0x1028, 0x0298, quirk_ignore_tv },
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/* Lenovo Napa TV (use dmi)*/
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{ PCI_CHIP_I945_GM, 0x17aa, SUBSYS_ANY, quirk_lenovo_tv_dmi },
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@ -272,6 +274,8 @@ static i830_quirk i830_quirk_list[] = {
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{ PCI_CHIP_I855_GM, 0x1028, 0x0139, quirk_pipea_force },
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/* Dell Latitude D500 needs pipe A force quirk */
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{ PCI_CHIP_I855_GM, 0x1028, 0x0152, quirk_pipea_force },
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/* Dell Latitude D505 needs pipe A force quirk (LP: #235643) */
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{ PCI_CHIP_I855_GM, 0x1028, 0x0163, quirk_pipea_force },
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/* Dell Latitude X300 needs pipe A force quirk */
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{ PCI_CHIP_I855_GM, 0x1028, 0x014f, quirk_pipea_force },
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/* Dell Inspiron 510m needs pipe A force quirk */
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@ -788,6 +788,7 @@ i830_tv_dpms(xf86OutputPtr output, int mode)
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OUTREG(TV_CTL, INREG(TV_CTL) & ~TV_ENC_ENABLE);
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break;
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}
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i830WaitForVblank(pScrn);
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}
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static void
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@ -920,6 +921,7 @@ i830_tv_restore(xf86OutputPtr output)
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OUTREG(TV_DAC, dev_priv->save_TV_DAC);
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OUTREG(TV_CTL, dev_priv->save_TV_CTL);
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i830WaitForVblank(pScrn);
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}
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static const tv_mode_t *
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@ -1237,6 +1239,7 @@ i830_tv_mode_set(xf86OutputPtr output, DisplayModePtr mode,
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OUTREG(TV_V_CHROMA_0 + (i<<2), tv_mode->filter_table[j++]);
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OUTREG(TV_DAC, 0);
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OUTREG(TV_CTL, tv_ctl);
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i830WaitForVblank(pScrn);
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}
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static const DisplayModeRec reported_modes[] = {
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@ -1303,6 +1306,7 @@ i830_tv_detect_type (xf86CrtcPtr crtc,
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tv_dac = INREG(TV_DAC);
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OUTREG(TV_DAC, save_tv_dac);
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OUTREG(TV_CTL, save_tv_ctl);
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i830WaitForVblank(pScrn);
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}
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/*
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* A B C
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