From af2432322ba1d561057c34ab185561a8e799e8cd Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Fri, 12 May 2006 13:32:38 -0700 Subject: [PATCH 01/70] First pass of integrating the Tungsten Graphics driver for Broadwater. This patch is based off of diffing from the branchpoint to the supplied code, but with many chunks containing reversions of commits removed. Won't work yet. --- src/common.h | 8 +- src/i810_driver.c | 17 +- src/i810_reg.h | 79 +++++++- src/i830.h | 31 +++- src/i830_accel.c | 25 ++- src/i830_agp.c | 364 +++++++++++++++++++++++++++++++++++++ src/i830_common.h | 6 + src/i830_cursor.c | 106 +++++++---- src/i830_dri.c | 85 +++++++-- src/i830_dri.h | 32 +--- src/i830_driver.c | 453 +++++++++++++++++++++++++++++++++++++++------- src/i830_memory.c | 155 ++++++++++++---- src/i830_rotate.c | 79 ++++---- src/i830_video.c | 131 +++++++++----- src/intel_acpi.c | 231 +++++++++++++++++++++++ src/intel_randr.c | 424 +++++++++++++++++++++++++++++++++++++++++++ 16 files changed, 1946 insertions(+), 280 deletions(-) create mode 100644 src/i830_agp.c create mode 100644 src/intel_acpi.c create mode 100644 src/intel_randr.c diff --git a/src/common.h b/src/common.h index a6e4ca3e..70f58a94 100644 --- a/src/common.h +++ b/src/common.h @@ -272,6 +272,11 @@ extern int I810_DEBUG; #define PCI_CHIP_I945_GM_BRIDGE 0x27A0 #endif +#ifndef PCI_CHIP_BROADWATER +#define PCI_CHIP_BROADWATER 0x2982 +#define PCI_CHIP_BROADWATER_BRIDGE 0x2980 +#endif + #define IS_I810(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I810 || \ pI810->PciInfo->chipType == PCI_CHIP_I810_DC100 || \ pI810->PciInfo->chipType == PCI_CHIP_I810_E) @@ -287,7 +292,8 @@ extern int I810_DEBUG; #define IS_I915GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I915_GM) #define IS_I945G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I945_G) #define IS_I945GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I945_GM) -#define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810)) +#define IS_BROADWATER(pI810) (pI810->PciInfo->chipType == PCI_CHIP_BROADWATER) +#define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810) || IS_BROADWATER(pI810)) #define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || IS_I915GM(pI810) || IS_I945GM(pI810)) diff --git a/src/i810_driver.c b/src/i810_driver.c index 7d854df2..cf3725a9 100644 --- a/src/i810_driver.c +++ b/src/i810_driver.c @@ -140,6 +140,7 @@ static SymTabRec I810Chipsets[] = { {PCI_CHIP_I915_GM, "915GM"}, {PCI_CHIP_I945_G, "945G"}, {PCI_CHIP_I945_GM, "945GM"}, + {PCI_CHIP_BROADWATER, "Broadwater"}, {-1, NULL} }; @@ -159,6 +160,7 @@ static PciChipsets I810PciChipsets[] = { {PCI_CHIP_I915_GM, PCI_CHIP_I915_GM, RES_SHARED_VGA}, {PCI_CHIP_I945_G, PCI_CHIP_I945_G, RES_SHARED_VGA}, {PCI_CHIP_I945_GM, PCI_CHIP_I945_GM, RES_SHARED_VGA}, + {PCI_CHIP_BROADWATER, PCI_CHIP_BROADWATER, RES_SHARED_VGA}, {-1, -1, RES_UNDEFINED } }; @@ -324,17 +326,25 @@ const char *I810driSymbols[] = { "DRICreatePCIBusID", NULL }; -#endif + +#ifdef XF86DRI + +const char *I810shadowFBSymbols[] = { + "ShadowFBInit", + NULL +}; const char *I810shadowSymbols[] = { "shadowInit", "shadowSetup", "shadowAdd", - "shadowRemove", - "shadowUpdateRotatePacked", NULL }; +#endif + +#endif /* I830_ONLY */ + #ifndef I810_DEBUG int I810_DEBUG = (0 /* | DEBUG_ALWAYS_SYNC */ @@ -578,6 +588,7 @@ I810Probe(DriverPtr drv, int flags) case PCI_CHIP_I915_GM: case PCI_CHIP_I945_G: case PCI_CHIP_I945_GM: + case PCI_CHIP_BROADWATER: xf86SetEntitySharable(usedChips[i]); /* Allocate an entity private if necessary */ diff --git a/src/i810_reg.h b/src/i810_reg.h index e52375f8..6acdda95 100644 --- a/src/i810_reg.h +++ b/src/i810_reg.h @@ -293,16 +293,78 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define STATE_VAR_UPDATE_DISABLE 0x02 #define PAL_STIP_DISABLE 0x01 -#define INST_DONE 0x2090 -#define INST_PS 0x20c4 #define MEMMODE 0x20dc /* Instruction parser error register. p279 */ +#if 0 #define IPEIR 0x2088 #define IPEHR 0x208C +#define INST_DONE 0x2090 +#define INST_PS 0x20c4 +#else +#define IPEIR 0x2064 /* brw */ +#define IPEHR 0x2068 /* brw */ +#define INST_DONE 0x206c +#define INST_PS 0x2070 +#define ACTHD 0x2074 +#define DMA_FADD_P 0x2078 +#define INST_DONE_1 0x207c + +#define CACHE_MODE_0 0x2120 +#define CACHE_MODE_1 0x2124 +#define MI_ARB_STATE 0x20e4 + +#define WIZ_CTL 0x7c00 +#define WIZ_CTL_SINGLE_SUBSPAN (1<<6) +#define WIZ_CTL_IGNORE_STALLS (1<<5) + +#define SVG_WORK_CTL 0x7408 + +#define TS_CTL 0x7e00 +#define TS_MUX_ERR_CODE (0<<8) +#define TS_MUX_URB_0 (1<<8) +#define TS_MUX_DISPATCH_ID_0 (10<<8) +#define TS_MUX_ERR_CODE_VALID (15<<8) +#define TS_MUX_TID_0 (16<<8) +#define TS_MUX_EUID_0 (18<<8) +#define TS_MUX_FFID_0 (22<<8) +#define TS_MUX_EOT (26<<8) +#define TS_MUX_SIDEBAND_0 (27<<8) +#define TS_SNAP_ALL_CHILD (1<<2) +#define TS_SNAP_ALL_ROOT (1<<1) +#define TS_SNAP_ENABLE (1<<0) + +#define TS_DEBUG_DATA 0x7e0c + +#define TD_CTL 0x8000 +#define TD_CTL2 0x8004 + + +#define ECOSKPD 0x21d0 +#define EXCC 0x2028 + +#endif + +/* Broadwater debug regs: + */ +#define IA_VERTICES_COUNT_QW 0x2310 +#define IA_PRIMITIVES_COUNT_QW 0x2318 +#define VS_INVOCATION_COUNT_QW 0x2320 +#define GS_INVOCATION_COUNT_QW 0x2328 +#define GS_PRIMITIVES_COUNT_QW 0x2330 +#define CL_INVOCATION_COUNT_QW 0x2338 +#define CL_PRIMITIVES_COUNT_QW 0x2340 +#define PS_INVOCATION_COUNT_QW 0x2348 +#define PS_DEPTH_COUNT_QW 0x2350 +#define TIMESTAMP_QW 0x2358 +#define CLKCMP_QW 0x2360 + + + + /* General error reporting regs, p296 @@ -366,6 +428,13 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define FENCE 0x2000 #define FENCE_NR 8 +#define FENCE_NEW 0x3000 +#define FENCE_NEW_NR 16 + +#define FENCE_LINEAR 0 +#define FENCE_XMAJOR 1 +#define FENCE_YMAJOR 2 + #define I915G_FENCE_START_MASK 0x0ff00000 #define I830_FENCE_START_MASK 0x07f80000 @@ -772,6 +841,12 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define DSPBPOS 0x7118C #define DSPBSIZE 0x71190 +#define DSPASURF 0x7019C +#define DSPATILEOFF 0x701A4 + +#define DSPBSURF 0x7119C +#define DSPBTILEOFF 0x711A4 + /* Various masks for reserved bits, etc. */ #define I830_FWATER1_MASK (~((1<<11)|(1<<10)|(1<<9)| \ (1<<8)|(1<<26)|(1<<25)|(1<<24)|(1<<5)|(1<<4)|(1<<3)| \ diff --git a/src/i830.h b/src/i830.h index d2276629..2ff20a7c 100644 --- a/src/i830.h +++ b/src/i830.h @@ -141,7 +141,7 @@ typedef struct { } I830RingBuffer; typedef struct { - unsigned int Fence[8]; + unsigned int Fence[FENCE_NEW_NR * 2]; /* Broadwater has more fence regs */ } I830RegRec, *I830RegPtr; typedef struct { @@ -220,7 +220,6 @@ typedef struct _I830Rec { #endif unsigned int LinearAlloc; - XF86ModReqInfo shadowReq; /* to test for later libshadow */ I830MemRange RotatedMem; I830MemRange RotatedMem2; Rotation rotation; @@ -238,6 +237,12 @@ typedef struct _I830Rec { I830MemRange ContextMem; int drmMinor; Bool have3DWindows; + + unsigned int front_tiled; + unsigned int back_tiled; + unsigned int depth_tiled; + unsigned int rotated_tiled; + unsigned int rotated2_tiled; #endif Bool NeedRingBufferLow; @@ -377,6 +382,9 @@ typedef struct _I830Rec { Bool devicePresence; OsTimerPtr devicesTimer; + + CARD32 savedAsurf; + CARD32 savedBsurf; } I830Rec; #define I830PTR(p) ((I830Ptr)((p)->driverPrivate)) @@ -448,8 +456,10 @@ extern long I830GetExcessMemoryAllocations(ScrnInfoPtr pScrn); extern Bool I830Allocate2DMemory(ScrnInfoPtr pScrn, const int flags); extern Bool I830DoPoolAllocation(ScrnInfoPtr pScrn, I830MemPool *pool); extern Bool I830FixupOffsets(ScrnInfoPtr pScrn); -extern Bool I830BindGARTMemory(ScrnInfoPtr pScrn); -extern Bool I830UnbindGARTMemory(ScrnInfoPtr pScrn); +extern Bool I830BindAGPMemory(ScrnInfoPtr pScrn); +extern Bool I830UnbindAGPMemory(ScrnInfoPtr pScrn); +extern Bool I830BindGARTMemory(int screenNum, int key, unsigned long offset); +extern Bool I830UnbindGARTMemory(int screenNum, int key); extern unsigned long I830AllocVidMem(ScrnInfoPtr pScrn, I830MemRange *result, I830MemPool *pool, long size, unsigned long alignment, int flags); @@ -471,6 +481,19 @@ extern Bool I830CheckModeSupport(ScrnInfoPtr pScrn, int x, int y, int mode); extern Bool I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode); extern Bool I830FixOffset(ScrnInfoPtr pScrn, I830MemRange *mem); +/* AGP */ +extern Bool I830AgpGARTSupported(void); +extern AgpInfoPtr I830GetAGPInfo(int screenNum); +extern Bool I830AcquireGART(int screenNum); +extern Bool I830ReleaseGART(int screenNum); +extern int I830AllocateGARTMemory(int screenNum, unsigned long size, int type, + unsigned long *physical); +extern Bool I830DeallocateGARTMemory(int screenNum, int key); +extern Bool I830BindGARTMemory(int screenNum, int key, unsigned long offset); +extern Bool I830UnbindGARTMemory(int screenNum, int key); +extern Bool I830EnableAGP(int screenNum, CARD32 mode); +extern Bool I830GARTCloseScreen(int screenNum); + /* * 12288 is set as the maximum, chosen because it is enough for * 1920x1440@32bpp with a 2048 pixel line pitch with some to spare. diff --git a/src/i830_accel.c b/src/i830_accel.c index a11f64b9..112d32da 100644 --- a/src/i830_accel.c +++ b/src/i830_accel.c @@ -133,6 +133,7 @@ void I830Sync(ScrnInfoPtr pScrn) { I830Ptr pI830 = I830PTR(pScrn); + int flags = MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE; if (I810_DEBUG & (DEBUG_VERBOSE_ACCEL | DEBUG_VERBOSE_SYNC)) ErrorF("I830Sync\n"); @@ -147,13 +148,17 @@ I830Sync(ScrnInfoPtr pScrn) if (pI830->entityPrivate && !pI830->entityPrivate->RingRunning) return; + if (IS_BROADWATER(pI830)) + flags = 0; + /* Send a flush instruction and then wait till the ring is empty. * This is stronger than waiting for the blitter to finish as it also * flushes the internal graphics caches. */ + { BEGIN_LP_RING(2); - OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE); + OUT_RING(MI_FLUSH | flags); OUT_RING(MI_NOOP); /* pad to quadword */ ADVANCE_LP_RING(); } @@ -168,9 +173,13 @@ void I830EmitFlush(ScrnInfoPtr pScrn) { I830Ptr pI830 = I830PTR(pScrn); + int flags = MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE; + + if (IS_BROADWATER(pI830)) + flags = 0; BEGIN_LP_RING(2); - OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE); + OUT_RING(MI_FLUSH | flags); OUT_RING(MI_NOOP); /* pad to quadword */ ADVANCE_LP_RING(); } @@ -439,6 +448,9 @@ I830SubsequentSolidFillRect(ScrnInfoPtr pScrn, int x, int y, int w, int h) ADVANCE_LP_RING(); } + + if (IS_BROADWATER(pI830)) + I830EmitFlush(pScrn); } void @@ -500,6 +512,9 @@ I830SubsequentScreenToScreenCopy(ScrnInfoPtr pScrn, int src_x1, int src_y1, ADVANCE_LP_RING(); } + + if (IS_BROADWATER(pI830)) + I830EmitFlush(pScrn); } static void @@ -574,6 +589,9 @@ I830SubsequentMono8x8PatternFillRect(ScrnInfoPtr pScrn, int pattx, int patty, OUT_RING(0); ADVANCE_LP_RING(); } + + if (IS_BROADWATER(pI830)) + I830EmitFlush(pScrn); } static void @@ -690,6 +708,9 @@ I830SubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno) */ pI830->BR[9] += pScrn->displayWidth * pI830->cpp; I830GetNextScanlineColorExpandBuffer(pScrn); + + if (IS_BROADWATER(pI830)) + I830EmitFlush(pScrn); } #if DO_SCANLINE_IMAGE_WRITE diff --git a/src/i830_agp.c b/src/i830_agp.c new file mode 100644 index 00000000..b10af0e1 --- /dev/null +++ b/src/i830_agp.c @@ -0,0 +1,364 @@ +/* + * Abstraction of the AGP GART interface. + * + * This version is for both Linux and FreeBSD. + * + * Copyright © 2000 VA Linux Systems, Inc. + * Copyright © 2001 The XFree86 Project, Inc. + */ + +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_agp.c,v 3.11 2003/04/03 22:47:42 dawes Exp $ */ + +#if defined(linux) +#include +#include +#elif defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__) +#include +#include +#endif + +#include "X.h" +#include "xf86.h" +#include "xf86_OSproc.h" +#include "i830.h" + + +#ifndef AGP_DEVICE +#define AGP_DEVICE "/dev/agpgart" +#endif +/* AGP page size is independent of the host page size. */ +#ifndef AGP_PAGE_SIZE +#define AGP_PAGE_SIZE 4096 +#endif +#define AGPGART_MAJOR_VERSION 0 +#define AGPGART_MINOR_VERSION 99 + +static int gartFd = -1; +static int acquiredScreen = -1; +static Bool initDone = FALSE; +/* + * Close /dev/agpgart. This frees all associated memory allocated during + * this server generation. + */ +Bool +I830GARTCloseScreen(int screenNum) +{ + if(gartFd != -1) { + close(gartFd); + acquiredScreen = -1; + gartFd = -1; + initDone = FALSE; + } + return TRUE; +} + +/* + * Open /dev/agpgart. Keep it open until I830GARTCloseScreen is called. + */ +static Bool +GARTInit(int screenNum) +{ + struct _agp_info agpinf; + + if (initDone) + return (gartFd != -1); + + initDone = TRUE; + + if (gartFd == -1) + gartFd = open(AGP_DEVICE, O_RDWR, 0); + else + return FALSE; + + if (gartFd == -1) { + xf86DrvMsg(screenNum, X_ERROR, + "I830GARTInit: Unable to open " AGP_DEVICE " (%s)\n", + strerror(errno)); + return FALSE; + } + + I830AcquireGART(-1); + /* Check the kernel driver version. */ + if (ioctl(gartFd, AGPIOC_INFO, &agpinf) != 0) { + xf86DrvMsg(screenNum, X_ERROR, + "I830GARTInit: AGPIOC_INFO failed (%s)\n", strerror(errno)); + close(gartFd); + gartFd = -1; + return FALSE; + } + I830ReleaseGART(-1); + +#if defined(linux) + /* Per Dave Jones, every effort will be made to keep the + * agpgart interface backwards compatible, so allow all + * future versions. + */ + if ( +#if (AGPGART_MAJOR_VERSION > 0) /* quiet compiler */ + agpinf.version.major < AGPGART_MAJOR_VERSION || +#endif + (agpinf.version.major == AGPGART_MAJOR_VERSION && + agpinf.version.minor < AGPGART_MINOR_VERSION)) { + xf86DrvMsg(screenNum, X_ERROR, + "GARTInit: Kernel agpgart driver version is not current" + " (%d.%d vs %d.%d)\n", + agpinf.version.major, agpinf.version.minor, + AGPGART_MAJOR_VERSION, AGPGART_MINOR_VERSION); + close(gartFd); + gartFd = -1; + return FALSE; + } +#endif + + return TRUE; +} + +Bool +I830AgpGARTSupported() +{ + return GARTInit(-1); +} + +AgpInfoPtr +I830GetAGPInfo(int screenNum) +{ + struct _agp_info agpinf; + AgpInfoPtr info; + + if (!GARTInit(screenNum)) + return NULL; + + + if ((info = xcalloc(sizeof(AgpInfo), 1)) == NULL) { + xf86DrvMsg(screenNum, X_ERROR, + "I830GetAGPInfo: Failed to allocate AgpInfo\n"); + return NULL; + } + + if (ioctl(gartFd, AGPIOC_INFO, &agpinf) != 0) { + xf86DrvMsg(screenNum, X_ERROR, + "I830GetAGPInfo: AGPIOC_INFO failed (%s)\n", + strerror(errno)); + return NULL; + } + + info->bridgeId = agpinf.bridge_id; + info->agpMode = agpinf.agp_mode; + info->base = agpinf.aper_base; + info->size = agpinf.aper_size; + info->totalPages = agpinf.pg_total; + info->systemPages = agpinf.pg_system; + info->usedPages = agpinf.pg_used; + + return info; +} + +/* + * XXX If multiple screens can acquire the GART, should we have a reference + * count instead of using acquiredScreen? + */ + +Bool +I830AcquireGART(int screenNum) +{ + if (screenNum != -1 && !GARTInit(screenNum)) + return FALSE; + + if (screenNum == -1 || acquiredScreen != screenNum) { + if (ioctl(gartFd, AGPIOC_ACQUIRE, 0) != 0) { + xf86DrvMsg(screenNum, X_WARNING, + "I830AcquireGART: AGPIOC_ACQUIRE failed (%s)\n", + strerror(errno)); + return FALSE; + } + acquiredScreen = screenNum; + } + return TRUE; +} + +Bool +I830ReleaseGART(int screenNum) +{ + if (screenNum != -1 && !GARTInit(screenNum)) + return FALSE; + + if (acquiredScreen == screenNum) { + /* + * The FreeBSD agp driver removes allocations on release. + * The Linux driver doesn't. I830ReleaseGART() is expected + * to give up access to the GART, but not to remove any + * allocations. + */ +#if !defined(linux) + if (screenNum == -1) +#endif + { + if (ioctl(gartFd, AGPIOC_RELEASE, 0) != 0) { + xf86DrvMsg(screenNum, X_WARNING, + "I830ReleaseGART: AGPIOC_RELEASE failed (%s)\n", + strerror(errno)); + return FALSE; + } + acquiredScreen = -1; + } + return TRUE; + } + return FALSE; +} + +int +I830AllocateGARTMemory(int screenNum, unsigned long size, int type, + unsigned long *physical) +{ + struct _agp_allocate alloc; + int pages; + + /* + * Allocates "size" bytes of GART memory (rounds up to the next + * page multiple) or type "type". A handle (key) for the allocated + * memory is returned. On error, the return value is -1. + */ + + if (!GARTInit(screenNum) || acquiredScreen != screenNum) + return -1; + + pages = (size / AGP_PAGE_SIZE); + if (size % AGP_PAGE_SIZE != 0) + pages++; + + /* XXX check for pages == 0? */ + + alloc.pg_count = pages; + alloc.type = type; + + if (ioctl(gartFd, AGPIOC_ALLOCATE, &alloc) != 0) { + if (type != 3) + xf86DrvMsg(screenNum, X_WARNING, "I830AllocateGARTMemory: " + "allocation of %d pages failed\n\t(%s)\n", pages, + strerror(errno)); + return -1; + } + + if (physical) + *physical = alloc.physical; + + return alloc.key; +} + +Bool +I830DeallocateGARTMemory(int screenNum, int key) +{ + if (!GARTInit(screenNum) || acquiredScreen != screenNum) + return FALSE; + + if (acquiredScreen != screenNum) { + xf86DrvMsg(screenNum, X_ERROR, + "xf86UnbindGARTMemory: AGP not acquired by this screen\n"); + return FALSE; + } + + if (ioctl(gartFd, AGPIOC_DEALLOCATE, (int *)key) != 0) { + xf86DrvMsg(screenNum, X_WARNING,"I830DeAllocateGARTMemory: " + "deallocation gart memory with key %d failed\n\t(%s)\n", + key, strerror(errno)); + return FALSE; + } + + return TRUE; +} + +/* Bind GART memory with "key" at "offset" */ +Bool +I830BindGARTMemory(int screenNum, int key, unsigned long offset) +{ + struct _agp_bind bind; + int pageOffset; + + if (!GARTInit(screenNum) || acquiredScreen != screenNum) + return FALSE; + + if (acquiredScreen != screenNum) { + xf86DrvMsg(screenNum, X_ERROR, + "I830BindGARTMemory: AGP not acquired by this screen\n"); + return FALSE; + } + + if (offset % AGP_PAGE_SIZE != 0) { + xf86DrvMsg(screenNum, X_WARNING, "I830BindGARTMemory: " + "offset (0x%lx) is not page-aligned (%d)\n", + offset, AGP_PAGE_SIZE); + return FALSE; + } + pageOffset = offset / AGP_PAGE_SIZE; + + xf86DrvMsgVerb(screenNum, X_INFO, 3, + "I830BindGARTMemory: bind key %d at 0x%08lx " + "(pgoffset %d)\n", key, offset, pageOffset); + + bind.pg_start = pageOffset; + bind.key = key; + + if (ioctl(gartFd, AGPIOC_BIND, &bind) != 0) { + xf86DrvMsg(screenNum, X_WARNING, "I830BindGARTMemory: " + "binding of gart memory with key %d\n" + "\tat offset 0x%lx failed (%s)\n", + key, offset, strerror(errno)); + return FALSE; + } + + return TRUE; +} + + +/* Unbind GART memory with "key" */ +Bool +I830UnbindGARTMemory(int screenNum, int key) +{ + struct _agp_unbind unbind; + + if (!GARTInit(screenNum) || acquiredScreen != screenNum) + return FALSE; + + if (acquiredScreen != screenNum) { + xf86DrvMsg(screenNum, X_ERROR, + "I830UnbindGARTMemory: AGP not acquired by this screen\n"); + return FALSE; + } + + unbind.priority = 0; + unbind.key = key; + + if (ioctl(gartFd, AGPIOC_UNBIND, &unbind) != 0) { + xf86DrvMsg(screenNum, X_WARNING, "I830UnbindGARTMemory: " + "unbinding of gart memory with key %d " + "failed (%s)\n", key, strerror(errno)); + return FALSE; + } + + xf86DrvMsgVerb(screenNum, X_INFO, 3, + "I830UnbindGARTMemory: unbind key %d\n", key); + + return TRUE; +} + + +/* XXX Interface may change. */ +Bool +I830EnableAGP(int screenNum, CARD32 mode) +{ + agp_setup setup; + + if (!GARTInit(screenNum) || acquiredScreen != screenNum) + return FALSE; + + setup.agp_mode = mode; + if (ioctl(gartFd, AGPIOC_SETUP, &setup) != 0) { + xf86DrvMsg(screenNum, X_WARNING, "I830EnableAGP: " + "AGPIOC_SETUP with mode %ld failed (%s)\n", + (unsigned long)mode, strerror(errno)); + return FALSE; + } + + return TRUE; +} + diff --git a/src/i830_common.h b/src/i830_common.h index 41b5cc3c..15056a1d 100644 --- a/src/i830_common.h +++ b/src/i830_common.h @@ -112,6 +112,12 @@ typedef struct { int rotated_size; int rotated_pitch; int virtualX, virtualY; + + unsigned int front_tiled; + unsigned int back_tiled; + unsigned int depth_tiled; + unsigned int rotated_tiled; + unsigned int rotated2_tiled; } drmI830Sarea; /* Flags for perf_boxes diff --git a/src/i830_cursor.c b/src/i830_cursor.c index e465b98c..04750933 100644 --- a/src/i830_cursor.c +++ b/src/i830_cursor.c @@ -91,32 +91,44 @@ I830InitHWCursor(ScrnInfoPtr pScrn) temp = INREG(CURSOR_A_CONTROL); temp &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE | MCURSOR_MEM_TYPE_LOCAL | MCURSOR_PIPE_SELECT); + if(pI830->CursorIsARGB) + temp |= MCURSOR_GAMMA_ENABLE; temp |= CURSOR_MODE_DISABLE; temp |= (pI830->pipe << 28); - if(pI830->CursorIsARGB) - temp |= MCURSOR_GAMMA_ENABLE; /* Need to set control, then address. */ OUTREG(CURSOR_A_CONTROL, temp); - if (pI830->CursorIsARGB) - OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Physical); - else - OUTREG(CURSOR_A_BASE, pI830->CursorMem->Physical); + if (pI830->CursorNeedsPhysical) { + if (pI830->CursorIsARGB) + OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Physical); + else + OUTREG(CURSOR_A_BASE, pI830->CursorMem->Physical); + } else { + if (pI830->CursorIsARGB) + OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Start); + else + OUTREG(CURSOR_A_BASE, pI830->CursorMem->Start); + } if (pI830->Clone) { temp &= ~MCURSOR_PIPE_SELECT; temp |= (!pI830->pipe << 28); OUTREG(CURSOR_B_CONTROL, temp); - if (pI830->CursorIsARGB) - OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Physical); - else - OUTREG(CURSOR_B_BASE, pI830->CursorMem->Physical); + if (pI830->CursorNeedsPhysical) { + if (pI830->CursorIsARGB) + OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Physical); + else + OUTREG(CURSOR_B_BASE, pI830->CursorMem->Physical); + } else { + if (pI830->CursorIsARGB) + OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Start); + else + OUTREG(CURSOR_B_BASE, pI830->CursorMem->Start); + } } } else { temp = INREG(CURSOR_CONTROL); temp &= ~(CURSOR_FORMAT_MASK | CURSOR_GAMMA_ENABLE | CURSOR_ENABLE | CURSOR_STRIDE_MASK); temp |= (CURSOR_FORMAT_3C); - if (pI830->CursorIsARGB) - temp |= CURSOR_GAMMA_ENABLE; /* This initialises the format and leave the cursor disabled. */ OUTREG(CURSOR_CONTROL, temp); /* Need to set address and size after disabling. */ @@ -362,12 +374,10 @@ I830SetCursorPosition(ScrnInfoPtr pScrn, int x, int y) { I830Ptr pI830 = I830PTR(pScrn); CARD32 temp = 0; + static Bool outsideViewport = FALSE; Bool hide = FALSE, show = FALSE; int oldx = x, oldy = y; int hotspotx = 0, hotspoty = 0; -#if 0 - static Bool outsideViewport = FALSE; -#endif oldx += pScrn->frameX0; /* undo what xf86HWCurs did */ oldy += pScrn->frameY0; @@ -451,15 +461,29 @@ I830SetCursorPosition(ScrnInfoPtr pScrn, int x, int y) /* have to upload the base for the new position */ if (IS_I9XX(pI830)) { - if (pI830->CursorIsARGB) - OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Physical); - else - OUTREG(CURSOR_A_BASE, pI830->CursorMem->Physical); - if (pI830->Clone) { + if (pI830->CursorNeedsPhysical) { if (pI830->CursorIsARGB) - OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Physical); + OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Physical); else - OUTREG(CURSOR_B_BASE, pI830->CursorMem->Physical); + OUTREG(CURSOR_A_BASE, pI830->CursorMem->Physical); + } else { + if (pI830->CursorIsARGB) + OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Start); + else + OUTREG(CURSOR_A_BASE, pI830->CursorMem->Start); + } + if (pI830->Clone) { + if (pI830->CursorNeedsPhysical) { + if (pI830->CursorIsARGB) + OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Physical); + else + OUTREG(CURSOR_B_BASE, pI830->CursorMem->Physical); + } else { + if (pI830->CursorIsARGB) + OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Start); + else + OUTREG(CURSOR_B_BASE, pI830->CursorMem->Start); + } } } } @@ -483,7 +507,7 @@ I830ShowCursor(ScrnInfoPtr pScrn) pI830->cursorOn = TRUE; if (IS_MOBILE(pI830) || IS_I9XX(pI830)) { temp = INREG(CURSOR_A_CONTROL); - temp &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT); + temp &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE | MCURSOR_PIPE_SELECT); if (pI830->CursorIsARGB) temp |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE; else @@ -491,25 +515,39 @@ I830ShowCursor(ScrnInfoPtr pScrn) temp |= (pI830->pipe << 28); /* Connect to correct pipe */ /* Need to set mode, then address. */ OUTREG(CURSOR_A_CONTROL, temp); - if (pI830->CursorIsARGB) - OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Physical); - else - OUTREG(CURSOR_A_BASE, pI830->CursorMem->Physical); + if (pI830->CursorNeedsPhysical) { + if (pI830->CursorIsARGB) + OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Physical); + else + OUTREG(CURSOR_A_BASE, pI830->CursorMem->Physical); + } else { + if (pI830->CursorIsARGB) + OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Start); + else + OUTREG(CURSOR_A_BASE, pI830->CursorMem->Start); + } if (pI830->Clone) { temp &= ~MCURSOR_PIPE_SELECT; temp |= (!pI830->pipe << 28); OUTREG(CURSOR_B_CONTROL, temp); - if (pI830->CursorIsARGB) - OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Physical); - else - OUTREG(CURSOR_B_BASE, pI830->CursorMem->Physical); + if (pI830->CursorNeedsPhysical) { + if (pI830->CursorIsARGB) + OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Physical); + else + OUTREG(CURSOR_B_BASE, pI830->CursorMem->Physical); + } else { + if (pI830->CursorIsARGB) + OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Start); + else + OUTREG(CURSOR_B_BASE, pI830->CursorMem->Start); + } } } else { temp = INREG(CURSOR_CONTROL); temp &= ~(CURSOR_FORMAT_MASK); temp |= CURSOR_ENABLE; if (pI830->CursorIsARGB) - temp |= CURSOR_FORMAT_ARGB | CURSOR_GAMMA_ENABLE; + temp |= CURSOR_FORMAT_ARGB; else temp |= CURSOR_FORMAT_3C; OUTREG(CURSOR_CONTROL, temp); @@ -531,7 +569,7 @@ I830HideCursor(ScrnInfoPtr pScrn) pI830->cursorOn = FALSE; if (IS_MOBILE(pI830) || IS_I9XX(pI830)) { temp = INREG(CURSOR_A_CONTROL); - temp &= ~(CURSOR_MODE|MCURSOR_GAMMA_ENABLE); + temp &= ~CURSOR_MODE; temp |= CURSOR_MODE_DISABLE; OUTREG(CURSOR_A_CONTROL, temp); /* This is needed to flush the above change. */ @@ -548,7 +586,7 @@ I830HideCursor(ScrnInfoPtr pScrn) } } else { temp = INREG(CURSOR_CONTROL); - temp &= ~(CURSOR_ENABLE|CURSOR_GAMMA_ENABLE); + temp &= ~CURSOR_ENABLE; OUTREG(CURSOR_CONTROL, temp); } } diff --git a/src/i830_dri.c b/src/i830_dri.c index 13d2cfdd..e3fcc970 100644 --- a/src/i830_dri.c +++ b/src/i830_dri.c @@ -81,8 +81,11 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #include "i830.h" #include "i830_dri.h" +#include "dristruct.h" + static char I830KernelDriverName[] = "i915"; static char I830ClientDriverName[] = "i915"; +static char BRWClientDriverName[] = "brw"; static Bool I830InitVisualConfigs(ScreenPtr pScreen); static Bool I830CreateContext(ScreenPtr pScreen, VisualPtr visual, @@ -99,12 +102,16 @@ static void I830DRIInitBuffers(WindowPtr pWin, RegionPtr prgn, CARD32 index); static void I830DRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg, RegionPtr prgnSrc, CARD32 index); +static Bool I830DRICloseFullScreen(ScreenPtr pScreen); +static Bool I830DRIOpenFullScreen(ScreenPtr pScreen); static void I830DRITransitionTo2d(ScreenPtr pScreen); static void I830DRITransitionTo3d(ScreenPtr pScreen); static void I830DRITransitionMultiToSingle3d(ScreenPtr pScreen); static void I830DRITransitionSingleToMulti3d(ScreenPtr pScreen); +#if 0 static void I830DRIShadowUpdate (ScreenPtr pScreen, shadowBufPtr pBuf); +#endif extern void GlxSetVisualConfigs(int nconfigs, __GLXvisualConfig * configs, @@ -422,11 +429,13 @@ I830CheckDRIAvailable(ScrnInfoPtr pScrn) * for known symbols in each module. */ if (!xf86LoaderCheckSymbol("GlxSetVisualConfigs")) return FALSE; + if (!xf86LoaderCheckSymbol("DRIScreenInit")) + return FALSE; if (!xf86LoaderCheckSymbol("drmAvailable")) return FALSE; if (!xf86LoaderCheckSymbol("DRIQueryVersion")) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "[dri] %s failed (libdri.a too old)\n", "I830DRIScreenInit"); + "[dri] %s failed (libdri.a too old)\n", "I830CheckDRIAvailable"); return FALSE; } @@ -435,13 +444,12 @@ I830CheckDRIAvailable(ScrnInfoPtr pScrn) int major, minor, patch; DRIQueryVersion(&major, &minor, &patch); - if (major != DRIINFO_MAJOR_VERSION || minor < DRIINFO_MINOR_VERSION) { + if (major != 4 || minor < 0) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[dri] %s failed because of a version mismatch.\n" - "[dri] libdri version is %d.%d.%d bug version %d.%d.x is needed.\n" + "[dri] libDRI version is %d.%d.%d but version 4.0.x is needed.\n" "[dri] Disabling DRI.\n", - "I830DRIScreenInit", major, minor, patch, - DRIINFO_MAJOR_VERSION, DRIINFO_MINOR_VERSION); + "I830CheckDRIAvailable", major, minor, patch); return FALSE; } } @@ -473,7 +481,11 @@ I830DRIScreenInit(ScreenPtr pScreen) pI830->LockHeld = 0; pDRIInfo->drmDriverName = I830KernelDriverName; - pDRIInfo->clientDriverName = I830ClientDriverName; + if (IS_BROADWATER(pI830)) + pDRIInfo->clientDriverName = BRWClientDriverName; + else + pDRIInfo->clientDriverName = I830ClientDriverName; + if (xf86LoaderCheckSymbol("DRICreatePCIBusID")) { pDRIInfo->busIdString = DRICreatePCIBusID(pI830->PciInfo); } else { @@ -483,16 +495,19 @@ I830DRIScreenInit(ScreenPtr pScreen) ((pciConfigPtr) pI830->PciInfo->thisCard)->devnum, ((pciConfigPtr) pI830->PciInfo->thisCard)->funcnum); } - pDRIInfo->ddxDriverMajorVersion = I830_MAJOR_VERSION; - pDRIInfo->ddxDriverMinorVersion = I830_MINOR_VERSION; - pDRIInfo->ddxDriverPatchVersion = I830_PATCHLEVEL; -#if 1 /* temporary until this gets removed from the libdri layer */ - pDRIInfo->frameBufferPhysicalAddress = (pointer) pI830->LinearAddr + + pDRIInfo->ddxDriverMajorVersion = INTEL_MAJOR_VERSION; + pDRIInfo->ddxDriverMinorVersion = INTEL_MINOR_VERSION; + pDRIInfo->ddxDriverPatchVersion = INTEL_PATCHLEVEL; + pDRIInfo->frameBufferPhysicalAddress = pI830->LinearAddr + pI830->FrontBuffer.Start; +#if 0 pDRIInfo->frameBufferSize = ROUND_TO_PAGE(pScrn->displayWidth * pScrn->virtualY * pI830->cpp); - pDRIInfo->frameBufferStride = pScrn->displayWidth * pI830->cpp; +#else + /* For rotation we map a 0 length framebuffer as we remap ourselves later */ + pDRIInfo->frameBufferSize = 0; #endif + pDRIInfo->frameBufferStride = pScrn->displayWidth * pI830->cpp; pDRIInfo->ddxDrawableTableEntry = I830_MAX_DRAWABLES; if (SAREA_MAX_DRAWABLES < I830_MAX_DRAWABLES) @@ -527,11 +542,14 @@ I830DRIScreenInit(ScreenPtr pScreen) pDRIInfo->InitBuffers = I830DRIInitBuffers; pDRIInfo->MoveBuffers = I830DRIMoveBuffers; pDRIInfo->bufferRequests = DRI_ALL_WINDOWS; + pDRIInfo->OpenFullScreen = I830DRIOpenFullScreen; + pDRIInfo->CloseFullScreen = I830DRICloseFullScreen; pDRIInfo->TransitionTo2d = I830DRITransitionTo2d; pDRIInfo->TransitionTo3d = I830DRITransitionTo3d; pDRIInfo->TransitionSingleToMulti3D = I830DRITransitionSingleToMulti3d; pDRIInfo->TransitionMultiToSingle3D = I830DRITransitionMultiToSingle3d; + /* do driver-independent DRI screen initialization here */ if (!DRIScreenInit(pScreen, pDRIInfo, &pI830->drmSubFD)) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[dri] DRIScreenInit failed. Disabling DRI.\n"); @@ -542,6 +560,27 @@ I830DRIScreenInit(ScreenPtr pScreen) return FALSE; } +#if 0 /* disabled now, see frameBufferSize above being set to 0 */ + /* for this driver, get rid of the front buffer mapping now */ + if (xf86LoaderCheckSymbol("DRIGetScreenPrivate")) { + DRIScreenPrivPtr pDRIPriv + = (DRIScreenPrivPtr) DRIGetScreenPrivate(pScreen); + + if (pDRIPriv && pDRIPriv->drmFD && pDRIPriv->hFrameBuffer) { + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[intel] removing original screen mapping\n"); + drmRmMap(pDRIPriv->drmFD, pDRIPriv->hFrameBuffer); + pDRIPriv->hFrameBuffer = 0; + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[intel] done removing original screen mapping\n"); + } + } + else { + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[intel] DRIGetScreenPrivate not found!!!!\n"); + } +#endif + /* Check the i915 DRM versioning */ { drmVersionPtr version; @@ -587,11 +626,11 @@ I830DRIScreenInit(ScreenPtr pScreen) /* Check the i915 DRM version */ version = drmGetVersion(pI830->drmSubFD); if (version) { - if (version->version_major != 1 || version->version_minor < 4) { + if (version->version_major != 1 || version->version_minor < 3) { /* incompatible drm version */ xf86DrvMsg(pScreen->myNum, X_ERROR, "[dri] %s failed because of a version mismatch.\n" - "[dri] i915 kernel module version is %d.%d.%d but version 1.4 or greater is needed.\n" + "[dri] i915 kernel module version is %d.%d.%d but version 1.3 or greater is needed.\n" "[dri] Disabling DRI.\n", "I830DRIScreenInit", version->version_major, @@ -935,7 +974,8 @@ I830DRIFinishScreenInit(ScreenPtr pScreen) */ #if 0 if (pI830->allowPageFlip && pI830->drmMinor >= 1) { - shadowAdd(pScreen, 0, I830DRIShadowUpdate, 0, 0, 0); + I830shadowSetup(pScreen); + I830shadowAdd(pScreen, 0, I830DRIShadowUpdate, 0, 0, 0); } else #endif @@ -1227,6 +1267,7 @@ I830EmitInvarientState(ScrnInfoPtr pScrn) * might be faster, but seems like a lot more work... */ + #if 0 /* This should be done *before* XAA syncs, * Otherwise will have to sync again??? @@ -1236,7 +1277,7 @@ I830DRIShadowUpdate (ScreenPtr pScreen, shadowBufPtr pBuf) { ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; I830Ptr pI830 = I830PTR(pScrn); - RegionPtr damage = (RegionPtr) shadowDamage(pBuf); + RegionPtr damage = &pBuf->damage; int i, num = REGION_NUM_RECTS(damage); BoxPtr pbox = REGION_RECTS(damage); drmI830Sarea *pSAREAPriv = DRIGetSAREAPrivate(pScreen); @@ -1366,6 +1407,10 @@ I830DRITransitionTo2d(ScreenPtr pScreen) } pI830->have3DWindows = 0; + + + I830PrintErrorState(pScrn); + } @@ -1382,6 +1427,14 @@ I830UpdateDRIBuffers(ScrnInfoPtr pScrn, drmI830Sarea *sarea) I830DRIUnmapScreenRegions(pScrn, sarea); + sarea->front_tiled = pI830->front_tiled; + sarea->back_tiled = pI830->back_tiled; + sarea->depth_tiled = pI830->depth_tiled; + sarea->rotated_tiled = pI830->rotated_tiled; +#if 0 + sarea->rotated2_tiled = pI830->rotated2_tiled; +#endif + if (pI830->rotation == RR_Rotate_0) { sarea->front_offset = pI830->FrontBuffer.Start; /* Don't use FrontBuffer.Size here as it includes the pixmap cache area diff --git a/src/i830_dri.h b/src/i830_dri.h index e511ac7f..281013b3 100644 --- a/src/i830_dri.h +++ b/src/i830_dri.h @@ -3,36 +3,18 @@ #ifndef _I830_DRI_H #define _I830_DRI_H +#include "xf86dri.h" #include "xf86drm.h" #include "i830_common.h" #define I830_MAX_DRAWABLES 256 -#define I830_MAJOR_VERSION 1 -#define I830_MINOR_VERSION 5 -#define I830_PATCHLEVEL 1 - #define I830_REG_SIZE 0x80000 typedef struct _I830DRIRec { drm_handle_t regs; drmSize regsSize; - drmSize backbufferSize; - drm_handle_t backbuffer; - - drmSize depthbufferSize; - drm_handle_t depthbuffer; - - drmSize rotatedSize; - drm_handle_t rotatedbuffer; - - drm_handle_t textures; - int textureSize; - - drm_handle_t agp_buffers; - drmSize agp_buf_size; - int deviceID; int width; int height; @@ -43,18 +25,6 @@ typedef struct _I830DRIRec { int fbOffset; int fbStride; - int backOffset; - int backPitch; - - int depthOffset; - int depthPitch; - - int rotatedOffset; - int rotatedPitch; - - int logTextureGranularity; - int textureOffset; - int irq; int sarea_priv_offset; } I830DRIRec, *I830DRIPtr; diff --git a/src/i830_driver.c b/src/i830_driver.c index 053ccd1d..43b33fc5 100644 --- a/src/i830_driver.c +++ b/src/i830_driver.c @@ -185,6 +185,10 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #include "shadow.h" #include "i830.h" +#ifdef HAS_MTRR_SUPPORT +#include +#endif + #ifdef XF86DRI #include "dri.h" #endif @@ -204,6 +208,7 @@ static SymTabRec I830BIOSChipsets[] = { {PCI_CHIP_I915_GM, "915GM"}, {PCI_CHIP_I945_G, "945G"}, {PCI_CHIP_I945_GM, "945GM"}, + {PCI_CHIP_BROADWATER, "Broadwater"}, {-1, NULL} }; @@ -217,6 +222,7 @@ static PciChipsets I830BIOSPciChipsets[] = { {PCI_CHIP_I915_GM, PCI_CHIP_I915_GM, RES_SHARED_VGA}, {PCI_CHIP_I945_G, PCI_CHIP_I945_G, RES_SHARED_VGA}, {PCI_CHIP_I945_GM, PCI_CHIP_I945_GM, RES_SHARED_VGA}, + {PCI_CHIP_BROADWATER, PCI_CHIP_BROADWATER, RES_SHARED_VGA}, {-1, -1, RES_UNDEFINED} }; @@ -272,7 +278,7 @@ static OptionInfoRec I830BIOSOptions[] = { static void I830DisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags); -static void I830BIOSAdjustFrame(int scrnIndex, int x, int y, int flags); +static void I830AdjustFrame(int scrnIndex, int x, int y, int flags); static Bool I830BIOSCloseScreen(int scrnIndex, ScreenPtr pScreen); static Bool I830BIOSSaveScreen(ScreenPtr pScreen, int unblack); static Bool I830BIOSEnterVT(int scrnIndex, int flags); @@ -471,7 +477,7 @@ GetNextDisplayDeviceList(ScrnInfoPtr pScrn, int toggle) CARD32 VODA = (CARD32)((CARD32*)pVbe->memory)[i]; xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Next ACPI _DGS [%d] 0x%lx\n", - i, (unsigned long) VODA); + i, VODA); /* Check if it's a custom Video Output Device Attribute */ if (!(VODA & 0x80000000)) @@ -528,8 +534,7 @@ GetAttachableDisplayDeviceList(ScrnInfoPtr pScrn) for (i=0; i<(pVbe->pInt10->cx & 0xff); i++) xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "Attachable device 0x%lx.\n", - (unsigned long) ((CARD32*)pVbe->memory)[i]); + "Attachable device 0x%lx.\n", ((CARD32*)pVbe->memory)[i]); return pVbe->pInt10->cx & 0xffff; } @@ -1423,8 +1428,11 @@ I830DetectMemory(ScrnInfoPtr pScrn) gmch_ctrl = pciReadWord(bridge, I830_GMCH_CTRL); /* We need to reduce the stolen size, by the GTT and the popup. - * The GTT varying according the the FbMapSize and the popup is 4KB */ - range = (pI830->FbMapSize / (1024*1024)) + 4; + * The GTT varying according the the FbMapSize and the popup is 4KB. */ + if (IS_BROADWATER(pI830)) + range = 512 + 4; /* Fixed 512KB size for Broadwater */ + else + range = (pI830->FbMapSize / MB(1)) + 4; if (IS_I85X(pI830) || IS_I865G(pI830) || IS_I9XX(pI830)) { switch (gmch_ctrl & I830_GMCH_GMS_MASK) { @@ -1470,6 +1478,12 @@ I830DetectMemory(ScrnInfoPtr pScrn) break; } } + +#if 0 + /* And 64KB page aligned */ + memsize &= ~0xFFFF; +#endif + if (memsize > 0) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "detected %d kB stolen memory.\n", memsize / 1024); @@ -1841,7 +1855,7 @@ I830LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices, unsigned char r, g, b; CARD32 val, temp; int palreg; - int dspreg, dspbase; + int dspreg, dspbase, dspsurf; DPRINTF(PFX, "I830LoadPalette: numColors: %d\n", numColors); pI830 = I830PTR(pScrn); @@ -1850,10 +1864,12 @@ I830LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices, palreg = PALETTE_A; dspreg = DSPACNTR; dspbase = DSPABASE; + dspsurf = DSPASURF; } else { palreg = PALETTE_B; dspreg = DSPBCNTR; dspbase = DSPBBASE; + dspsurf = DSPBSURF; } /* To ensure gamma is enabled we need to turn off and on the plane */ @@ -1862,6 +1878,8 @@ I830LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices, OUTREG(dspbase, INREG(dspbase)); OUTREG(dspreg, temp | DISPPLANE_GAMMA_ENABLE); OUTREG(dspbase, INREG(dspbase)); + if (IS_BROADWATER(pI830)) + OUTREG(dspsurf, INREG(dspsurf)); /* It seems that an initial read is needed. */ temp = INREG(palreg); @@ -2085,6 +2103,23 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags) if (pScrn->numEntities != 1) return FALSE; + if (!xf86LoadSubModule(pScrn, "intel_acpi")) + return FALSE; + + /* try to load the video kernel module now */ + xf86LoadKernelModule("video"); + + if (xf86LoaderCheckSymbol("I830ACPIOpen")) { + void (*acpiOpen)(void) = NULL; + + acpiOpen = LoaderSymbol("I830ACPIOpen"); + + if (acpiOpen) { + ErrorF("Opening ACPI\n"); + (*acpiOpen)(); + } + } + /* Load int10 module */ if (!xf86LoadSubModule(pScrn, "int10")) return FALSE; @@ -2269,6 +2304,9 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags) case PCI_CHIP_I945_GM: chipname = "945GM"; break; + case PCI_CHIP_BROADWATER: + chipname = "Broadwater"; + break; default: chipname = "unknown chipset"; break; @@ -2889,7 +2927,7 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags) * or, at least it's meant to..... alas it doesn't seem to always work. */ if (pI830->devicePresence) { - int req=0, att=0, enc=0; + int req, att, enc; GetDevicePresence(pScrn, &req, &att, &enc); for (i = 0; i < NumDisplayTypes; i++) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, @@ -3035,6 +3073,9 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags) else pI830->CursorNeedsPhysical = FALSE; + if (IS_BROADWATER(pI830)) + pI830->CursorNeedsPhysical = FALSE; + /* Force ring buffer to be in low memory for all chipsets */ pI830->NeedRingBufferLow = TRUE; @@ -3076,6 +3117,47 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags) SetPipeAccess(pScrn); + /* + * Using the installation script we need to find out if we've just been + * installed, and if so, default to the native panel resolutions, otherwise + * we'll default to whatever existed or the default monitor settings + * that's inbuilt into the Xserver. + */ + { + FILE *f; + if ((f = fopen("/tmp/.newinstallation", "r"))) { + char data[2]; + fgets(data, 2, f); + if (data[0] == 48) { /* First time */ + /* Ignore our monitors horizsync and vertrefresh + * settings when we've detected a new installation + * and we're on a flat panel, therefore we should + * start with the native panels resolution + */ +#if 0 + if ((pI830->pipe == 1) && + (pI830->operatingDevices & (PIPE_LFP << 8))) { +#else + /* Changed this to only work on LFP only systems + * as the other devices may not support the LFP's + * resolution. + */ + if ((pI830->pipe == 1) && + (pI830->operatingDevices == (PIPE_LFP << 8))) { +#endif + pScrn->monitor->nHsync = 0; + pScrn->monitor->nVrefresh = 0; + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Detected new installation of driver, defaulting to LFP panel size.\n"); + } + } + fclose(f); + f = fopen("/tmp/.newinstallation", "w"); + fputc(49, f); + fclose(f); + } + } + /* Check we have an LFP connected, before trying to * read PanelID information. */ if ( (pI830->pipe == 1 && pI830->operatingDevices & (PIPE_LFP << 8)) || @@ -3620,8 +3702,15 @@ ResetState(ScrnInfoPtr pScrn, Bool flush) pI830->entityPrivate->RingRunning = 0; /* Reset the fence registers to 0 */ - for (i = 0; i < 8; i++) - OUTREG(FENCE + i * 4, 0); + if (IS_BROADWATER(pI830)) { + for (i = 0; i < FENCE_NEW_NR; i++) { + OUTREG(FENCE_NEW + i * 8, 0); + OUTREG(FENCE_NEW + 4 + i * 8, 0); + } + } else { + for (i = 0; i < FENCE_NR; i++) + OUTREG(FENCE + i * 4, 0); + } /* Flush the ring buffer (if enabled), then disable it. */ if (pI830->AccelInfoRec != NULL && flush) { @@ -3651,10 +3740,21 @@ SetFenceRegs(ScrnInfoPtr pScrn) if (!I830IsPrimary(pScrn)) return; - for (i = 0; i < 8; i++) { - OUTREG(FENCE + i * 4, pI830->ModeReg.Fence[i]); - if (I810_DEBUG & DEBUG_VERBOSE_VGA) - ErrorF("Fence Register : %x\n", pI830->ModeReg.Fence[i]); + if (IS_BROADWATER(pI830)) { + for (i = 0; i < FENCE_NEW_NR; i++) { + OUTREG(FENCE_NEW + i * 8, pI830->ModeReg.Fence[i]); + OUTREG(FENCE_NEW + 4 + i * 8, pI830->ModeReg.Fence[i+FENCE_NEW_NR]); + if (I810_DEBUG & DEBUG_VERBOSE_VGA) { + ErrorF("Fence Start Register : %x\n", pI830->ModeReg.Fence[i]); + ErrorF("Fence End Register : %x\n", pI830->ModeReg.Fence[i+FENCE_NEW_NR]); + } + } + } else { + for (i = 0; i < FENCE_NR; i++) { + OUTREG(FENCE + i * 4, pI830->ModeReg.Fence[i]); + if (I810_DEBUG & DEBUG_VERBOSE_VGA) + ErrorF("Fence Register : %x\n", pI830->ModeReg.Fence[i]); + } } } @@ -3755,6 +3855,12 @@ SaveHWState(ScrnInfoPtr pScrn) vgaHWSave(pScrn, vgaReg, VGA_SR_FONTS); pVesa = pI830->vesa; + + if (IS_BROADWATER(pI830)) { + pI830->savedAsurf = INREG(DSPASURF); + pI830->savedBsurf = INREG(DSPBSURF); + } + /* * This save/restore method doesn't work for 845G BIOS, or for some * other platforms. Enable it in all cases. @@ -3865,6 +3971,11 @@ RestoreHWState(ScrnInfoPtr pScrn) VBESetDisplayStart(pVbe, pVesa->x, pVesa->y, TRUE); + if (IS_BROADWATER(pI830)) { + OUTREG(DSPASURF, pI830->savedAsurf); + OUTREG(DSPBSURF, pI830->savedBsurf); + } + vgaHWRestore(pScrn, vgaReg, VGA_SR_FONTS); vgaHWLock(hwp); @@ -4096,6 +4207,25 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) SetPipeAccess(pScrn); +#if 0 + { /* BROADWATER ENABLE TILING */ + planeA = INREG(DSPACNTR) | 1<<10; + OUTREG(DSPACNTR, planeA); + /* flush the change. */ + temp = INREG(DSPABASE); + OUTREG(DSPABASE, temp); + } +#else + { /* BROADWATER DISABLE TILING */ + planeA = INREG(DSPACNTR) & ~1<<10; + OUTREG(DSPACNTR, planeA); + /* flush the change. */ + temp = INREG(DSPABASE); + OUTREG(DSPABASE, temp); + OUTREG(DSPASURF, INREG(DSPASURF)); + } +#endif + if (I830VESASetVBEMode(pScrn, mode, data->block) == FALSE) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Set VBE Mode failed!\n"); return FALSE; @@ -4160,6 +4290,10 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) /* flush the change. */ temp = INREG(DSPABASE); OUTREG(DSPABASE, temp); + if (IS_BROADWATER(pI830)) { + temp = INREG(DSPASURF); + OUTREG(DSPASURF, temp); + } } if (pI830->planeEnabled[1]) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Enabling plane B.\n"); @@ -4170,6 +4304,10 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) /* flush the change. */ temp = INREG(DSPBADDR); OUTREG(DSPBADDR, temp); + if (IS_BROADWATER(pI830)) { + temp = INREG(DSPBSURF); + OUTREG(DSPBSURF, temp); + } } planeA = INREG(DSPACNTR); @@ -4202,6 +4340,7 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) CARD32 stridereg = !pI830->pipe ? DSPASTRIDE : DSPBSTRIDE; CARD32 basereg = !pI830->pipe ? DSPABASE : DSPBBASE; CARD32 sizereg = !pI830->pipe ? DSPASIZE : DSPBSIZE; + CARD32 surfreg = !pI830->pipe ? DSPASURF : DSPBSURF; I830Ptr pI8301 = I830PTR(pI830->entityPrivate->pScrn_1); temp = INREG(stridereg); @@ -4215,12 +4354,17 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) /* Trigger update */ temp = INREG(basereg); OUTREG(basereg, temp); + if (IS_BROADWATER(pI830)) { + temp = INREG(surfreg); + OUTREG(surfreg, temp); + } if (pI830->entityPrivate && pI830->entityPrivate->pScrn_2) { I830Ptr pI8302 = I830PTR(pI830->entityPrivate->pScrn_2); stridereg = pI830->pipe ? DSPASTRIDE : DSPBSTRIDE; basereg = pI830->pipe ? DSPABASE : DSPBBASE; sizereg = pI830->pipe ? DSPASIZE : DSPBSIZE; + surfreg = pI830->pipe ? DSPASURF : DSPBSURF; temp = INREG(stridereg); if (temp / pI8302->cpp != (CARD32)(pI8302->displayWidth)) { @@ -4233,11 +4377,16 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) /* Trigger update */ temp = INREG(basereg); OUTREG(basereg, temp); + if (IS_BROADWATER(pI830)) { + temp = INREG(surfreg); + OUTREG(surfreg, temp); + } } } else { CARD32 stridereg = pI830->pipe ? DSPASTRIDE : DSPBSTRIDE; CARD32 basereg = pI830->pipe ? DSPABASE : DSPBBASE; CARD32 sizereg = pI830->pipe ? DSPASIZE : DSPBSIZE; + CARD32 surfreg = pI830->pipe ? DSPASURF : DSPBSURF; I830Ptr pI8301 = I830PTR(pI830->entityPrivate->pScrn_1); I830Ptr pI8302 = I830PTR(pI830->entityPrivate->pScrn_2); @@ -4252,10 +4401,15 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) /* Trigger update */ temp = INREG(basereg); OUTREG(basereg, temp); + if (IS_BROADWATER(pI830)) { + temp = INREG(surfreg); + OUTREG(surfreg, temp); + } stridereg = !pI830->pipe ? DSPASTRIDE : DSPBSTRIDE; basereg = !pI830->pipe ? DSPABASE : DSPBBASE; sizereg = !pI830->pipe ? DSPASIZE : DSPBSIZE; + surfreg = !pI830->pipe ? DSPASURF : DSPBSURF; temp = INREG(stridereg); if (temp / pI8302->cpp != ((CARD32)pI8302->displayWidth)) { @@ -4268,12 +4422,17 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) /* Trigger update */ temp = INREG(basereg); OUTREG(basereg, temp); + if (IS_BROADWATER(pI830)) { + temp = INREG(surfreg); + OUTREG(surfreg, temp); + } } } else { for (i = 0; i < pI830->availablePipes; i++) { CARD32 stridereg = i ? DSPBSTRIDE : DSPASTRIDE; CARD32 basereg = i ? DSPBBASE : DSPABASE; CARD32 sizereg = i ? DSPBSIZE : DSPASIZE; + CARD32 surfreg = i ? DSPBSURF : DSPASURF; if (!pI830->planeEnabled[i]) continue; @@ -4286,9 +4445,12 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) OUTREG(stridereg, pI830->displayWidth * pI830->cpp); } OUTREG(sizereg, (pMode->HDisplay - 1) | ((pMode->VDisplay - 1) << 16)); - /* Trigger update */ temp = INREG(basereg); OUTREG(basereg, temp); + if (IS_BROADWATER(pI830)) { + temp = INREG(surfreg); + OUTREG(surfreg, temp); + } } } @@ -4391,6 +4553,10 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) SetHWOperatingState(pScrn); #endif +#if 0 + I830PrintErrorState(pScrn); +#endif + #ifdef XF86DRI if (didLock) I830DRIUnlock(pScrn); @@ -4421,27 +4587,51 @@ I830PrintErrorState(ScrnInfoPtr pScrn) I830Ptr pI830 = I830PTR(pScrn); ErrorF("pgetbl_ctl: 0x%lx pgetbl_err: 0x%lx\n", - (unsigned long)INREG(PGETBL_CTL), (unsigned long)INREG(PGE_ERR)); + INREG(PGETBL_CTL), INREG(PGE_ERR)); - ErrorF("ipeir: %lx iphdr: %lx\n", (unsigned long)INREG(IPEIR), - (unsigned long)INREG(IPEHR)); + ErrorF("ipeir: %lx iphdr: %lx\n", INREG(IPEIR), INREG(IPEHR)); ErrorF("LP ring tail: %lx head: %lx len: %lx start %lx\n", - (unsigned long)INREG(LP_RING + RING_TAIL), - (unsigned long)INREG(LP_RING + RING_HEAD) & HEAD_ADDR, - (unsigned long)INREG(LP_RING + RING_LEN), - (unsigned long)INREG(LP_RING + RING_START)); + INREG(LP_RING + RING_TAIL), + INREG(LP_RING + RING_HEAD) & HEAD_ADDR, + INREG(LP_RING + RING_LEN), INREG(LP_RING + RING_START)); - ErrorF("eir: %x esr: %x emr: %x\n", - INREG16(EIR), INREG16(ESR), INREG16(EMR)); + ErrorF("Err ID (eir): %x Err Status (esr): %x Err Mask (emr): %x\n", + INREG(EIR), INREG(ESR), INREG(EMR)); - ErrorF("instdone: %x instpm: %x\n", INREG16(INST_DONE), INREG8(INST_PM)); + ErrorF("instdone: %x instdone_1: %x\n", INREG(INST_DONE), INREG(INST_DONE_1)); + ErrorF("instpm: %x\n", INREG(INST_PM)); - ErrorF("memmode: %lx instps: %lx\n", (unsigned long)INREG(MEMMODE), - (unsigned long)INREG(INST_PS)); + ErrorF("memmode: %lx instps: %lx\n", INREG(MEMMODE), INREG(INST_PS)); - ErrorF("hwstam: %x ier: %x imr: %x iir: %x\n", - INREG16(HWSTAM), INREG16(IER), INREG16(IMR), INREG16(IIR)); + ErrorF("HW Status mask (hwstam): %x\nIRQ enable (ier): %x imr: %x iir: %x\n", + INREG(HWSTAM), INREG(IER), INREG(IMR), INREG(IIR)); + + ErrorF("acthd: %lx dma_fadd_p: %lx\n", INREG(ACTHD), INREG(DMA_FADD_P)); + ErrorF("ecoskpd: %lx excc: %lx\n", INREG(ECOSKPD), INREG(EXCC)); + + ErrorF("cache_mode: %x/%x\n", INREG(CACHE_MODE_0), INREG(CACHE_MODE_1)); + ErrorF("mi_arb_state: %x\n", INREG(MI_ARB_STATE)); + + ErrorF("IA_VERTICES_COUNT_QW %x/%x\n", INREG(IA_VERTICES_COUNT_QW), INREG(IA_VERTICES_COUNT_QW+4)); + ErrorF("IA_PRIMITIVES_COUNT_QW %x/%x\n", INREG(IA_PRIMITIVES_COUNT_QW), INREG(IA_PRIMITIVES_COUNT_QW+4)); + + ErrorF("VS_INVOCATION_COUNT_QW %x/%x\n", INREG(VS_INVOCATION_COUNT_QW), INREG(VS_INVOCATION_COUNT_QW+4)); + + ErrorF("GS_INVOCATION_COUNT_QW %x/%x\n", INREG(GS_INVOCATION_COUNT_QW), INREG(GS_INVOCATION_COUNT_QW+4)); + ErrorF("GS_PRIMITIVES_COUNT_QW %x/%x\n", INREG(GS_PRIMITIVES_COUNT_QW), INREG(GS_PRIMITIVES_COUNT_QW+4)); + + ErrorF("CL_INVOCATION_COUNT_QW %x/%x\n", INREG(CL_INVOCATION_COUNT_QW), INREG(CL_INVOCATION_COUNT_QW+4)); + ErrorF("CL_PRIMITIVES_COUNT_QW %x/%x\n", INREG(CL_PRIMITIVES_COUNT_QW), INREG(CL_PRIMITIVES_COUNT_QW+4)); + + ErrorF("PS_INVOCATION_COUNT_QW %x/%x\n", INREG(PS_INVOCATION_COUNT_QW), INREG(PS_INVOCATION_COUNT_QW+4)); + ErrorF("PS_DEPTH_COUNT_QW %x/%x\n", INREG(PS_DEPTH_COUNT_QW), INREG(PS_DEPTH_COUNT_QW+4)); + + ErrorF("WIZ_CTL %x\n", INREG(WIZ_CTL)); + ErrorF("TS_CTL %x TS_DEBUG_DATA %x\n", INREG(TS_CTL), INREG(TS_DEBUG_DATA)); + ErrorF("TD_CTL %x / %x\n", INREG(TD_CTL), INREG(TD_CTL2)); + + } #ifdef I830DEBUG @@ -4670,7 +4860,8 @@ I830CreateScreenResources (ScreenPtr pScreen) if (!(*pScreen->CreateScreenResources)(pScreen)) return FALSE; - if (pI830->rotation != RR_Rotate_0) { + if (xf86LoaderCheckSymbol("I830RandRSetConfig") && pI830->rotation != RR_Rotate_0) { + Rotation (*I830RandRSetConfig)(ScreenPtr pScreen, Rotation rr, int rate, RRScreenSizePtr pSize) = NULL; RRScreenSize p; Rotation requestedRotation = pI830->rotation; @@ -4682,9 +4873,12 @@ I830CreateScreenResources (ScreenPtr pScreen) p.mmWidth = pScreen->mmWidth; p.mmHeight = pScreen->mmHeight; - pI830->starting = TRUE; /* abuse this for dual head & rotation */ - I830RandRSetConfig (pScreen, requestedRotation, 0, &p); - pI830->starting = FALSE; + I830RandRSetConfig = LoaderSymbol("I830RandRSetConfig"); + if (I830RandRSetConfig) { + pI830->starting = TRUE; /* abuse this for dual head & rotation */ + (*I830RandRSetConfig) (pScreen, requestedRotation, 0, &p); + pI830->starting = FALSE; + } } return TRUE; @@ -4779,6 +4973,47 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) pI830->RotatedMem2.Key = -1; } +#ifdef HAS_MTRR_SUPPORT + { + int fd; + struct mtrr_gentry gentry; + struct mtrr_sentry sentry; + + if ( ( fd = open ("/proc/mtrr", O_RDONLY, 0) ) != -1 ) { + for (gentry.regnum = 0; ioctl (fd, MTRRIOC_GET_ENTRY, &gentry) == 0; + ++gentry.regnum) { + + if (gentry.size < 1) { + /* DISABLED */ + continue; + } + + /* Check the MTRR range is one we like and if not - remove it. + * The Xserver common layer will then setup the right range + * for us. + */ + if (gentry.base == pI830->LinearAddr && + gentry.size < pI830->FbMapSize) { + + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Removing bad MTRR range (base 0x%lx, size 0x%x)\n", + gentry.base, gentry.size); + + sentry.base = gentry.base; + sentry.size = gentry.size; + sentry.type = gentry.type; + + if (ioctl (fd, MTRRIOC_DEL_ENTRY, &sentry) == -1) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Failed to remove bad MTRR range\n"); + } + } + } + close(fd); + } + } +#endif + if (xf86IsEntityShared(pScrn->entityList[0])) { /* PreInit failed on the second head, so make sure we turn it off */ if (I830IsPrimary(pScrn) && !pI830->entityPrivate->pScrn_2) { @@ -5130,21 +5365,44 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) pI830->CloseScreen = pScreen->CloseScreen; pScreen->CloseScreen = I830BIOSCloseScreen; - if (pI830->shadowReq.minorversion >= 1) { - /* Rotation */ - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "RandR enabled, ignore the following RandR disabled message.\n"); - xf86DisableRandR(); /* Disable built-in RandR extension */ - shadowSetup(pScreen); - /* support all rotations */ - I830RandRInit(pScreen, RR_Rotate_0 | RR_Rotate_90 | RR_Rotate_180 | RR_Rotate_270); - pI830->PointerMoved = pScrn->PointerMoved; - pScrn->PointerMoved = I830PointerMoved; - pI830->CreateScreenResources = pScreen->CreateScreenResources; - pScreen->CreateScreenResources = I830CreateScreenResources; - } else { - /* Rotation */ - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "libshadow is version %d.%d.%d, required 1.1.0 or greater for rotation.\n",pI830->shadowReq.majorversion,pI830->shadowReq.minorversion,pI830->shadowReq.patchlevel); +#if 1 /* ROTATION */ + { + Bool init = TRUE; + + if (!xf86LoadSubModule(pScrn, "intel_randr")) + init = FALSE; + +#if 0 + if (!xf86LoadSubModule(pScrn, "i830_damage")) + init = FALSE; + + if (!xf86LoadSubModule(pScrn, "i830_shadow")) + init = FALSE; +#endif + + if (init && xf86LoaderCheckSymbol("I830RandRInit")) { + Bool (*I830RandRInit)(ScreenPtr pScreen, int rotation) = NULL; + + I830RandRInit = LoaderSymbol("I830RandRInit"); + + if (I830RandRInit) { + xf86DisableRandR(); /* Disable built-in RandR extension */ + I830shadowSetup(pScreen); + if (IS_BROADWATER(pI830)) + /* only 0 degrees for Broadwater */ + (*I830RandRInit)(pScreen, RR_Rotate_0); + else + /* support all rotations */ + (*I830RandRInit)(pScreen, RR_Rotate_0 | RR_Rotate_90 | RR_Rotate_180 | RR_Rotate_270); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Intel: RandR enabled, ignore the following RandR disabled message.\n"); + pI830->PointerMoved = pScrn->PointerMoved; + pScrn->PointerMoved = I830PointerMoved; + pI830->CreateScreenResources = pScreen->CreateScreenResources; + pScreen->CreateScreenResources = I830CreateScreenResources; + } + } } +#endif if (serverGeneration == 1) xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options); @@ -5153,6 +5411,36 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) I830_dump_registers(pScrn); #endif + /* turn off clock gating */ + /* XXX: How much of this is needed for BRW? I am currently turning + * off everything. + */ +#if 1 + /* A0 + */ + if (IS_BROADWATER(pI830)) { + OUTREG(0x6204, 0x70804000); + OUTREG(0x6208, 0x00000001); + } +#else + /* C0 ? + */ + if (IS_BROADWATER(pI830)) { + OUTREG(0x6204, (1<<23)); + OUTREG(0x6208, 0x0); + } +#endif + + /* Enable DAP stateless accesses. + * Required for all broadwater steppings. + */ + if (IS_BROADWATER(pI830)) { + ErrorF("SVG_WORK_CTL before %x\n", INREG(SVG_WORK_CTL)); + OUTREG(SVG_WORK_CTL, 0x00000010); + ErrorF("SVG_WORK_CTL after %x\n", INREG(SVG_WORK_CTL)); + } + + pI830->starting = FALSE; pI830->closing = FALSE; pI830->suspended = FALSE; @@ -5161,7 +5449,7 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) } static void -I830BIOSAdjustFrame(int scrnIndex, int x, int y, int flags) +I830AdjustFrame(int scrnIndex, int x, int y, int flags) { ScrnInfoPtr pScrn; I830Ptr pI830; @@ -5172,7 +5460,7 @@ I830BIOSAdjustFrame(int scrnIndex, int x, int y, int flags) pI830 = I830PTR(pScrn); pVbe = pI830->pVbe; - DPRINTF(PFX, "I830BIOSAdjustFrame: y = %d (+ %d), x = %d (+ %d)\n", + DPRINTF(PFX, "I830AdjustFrame: y = %d (+ %d), x = %d (+ %d)\n", x, pI830->xoffset, y, pI830->yoffset); /* Sync the engine before adjust frame */ @@ -5195,16 +5483,36 @@ I830BIOSAdjustFrame(int scrnIndex, int x, int y, int flags) if (pI830->Clone) { if (!pI830->pipe == 0) { - OUTREG(DSPABASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); + if (!IS_BROADWATER(pI830)) { + OUTREG(DSPABASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); + } else { + OUTREG(DSPABASE, 0); + OUTREG(DSPASURF, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); + } } else { - OUTREG(DSPBBASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); + if (!IS_BROADWATER(pI830)) { + OUTREG(DSPBBASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); + } else { + OUTREG(DSPBBASE, 0); + OUTREG(DSPBSURF, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); + } } } if (pI830->pipe == 0) { - OUTREG(DSPABASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); + if (!IS_BROADWATER(pI830)) { + OUTREG(DSPABASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); + } else { + OUTREG(DSPABASE, 0); + OUTREG(DSPASURF, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); + } } else { - OUTREG(DSPBBASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); + if (!IS_BROADWATER(pI830)) { + OUTREG(DSPBBASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); + } else { + OUTREG(DSPBBASE, 0); + OUTREG(DSPBSURF, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); + } } } @@ -5665,7 +5973,7 @@ I830BIOSSwitchMode(int scrnIndex, DisplayModePtr mode, int flags) * The extra WindowTable check detects a rotation at startup. */ if ( (!WindowTable[pScrn->scrnIndex] || pspix->devPrivate.ptr == NULL) && - !pI830->DGAactive ) { + !pI830->DGAactive && (pScrn->PointerMoved == pI830->PointerMoved) ) { if (!I830Rotate(pScrn, mode)) ret = FALSE; } @@ -5701,7 +6009,7 @@ I830BIOSSaveScreen(ScreenPtr pScreen, int mode) ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; I830Ptr pI830 = I830PTR(pScrn); Bool on = xf86IsUnblank(mode); - CARD32 temp, ctrl, base; + CARD32 temp, ctrl, base, surf; DPRINTF(PFX, "I830BIOSSaveScreen: %d, on is %s\n", mode, BOOLTOSTRING(on)); @@ -5709,9 +6017,11 @@ I830BIOSSaveScreen(ScreenPtr pScreen, int mode) if (pI830->pipe == 0) { ctrl = DSPACNTR; base = DSPABASE; + surf = DSPASURF; } else { ctrl = DSPBCNTR; base = DSPBADDR; + surf = DSPBSURF; } if (pI830->planeEnabled[pI830->pipe]) { temp = INREG(ctrl); @@ -5723,6 +6033,10 @@ I830BIOSSaveScreen(ScreenPtr pScreen, int mode) /* Flush changes */ temp = INREG(base); OUTREG(base, temp); + if (IS_BROADWATER(pI830)) { + temp = INREG(surf); + OUTREG(surf, temp); + } } if (pI830->CursorInfoRec && !pI830->SWCursor && pI830->cursorOn) { @@ -5841,7 +6155,7 @@ I830BIOSCloseScreen(int scrnIndex, ScreenPtr pScreen) } if (I830IsPrimary(pScrn)) { - xf86GARTCloseScreen(scrnIndex); + I830GARTCloseScreen(scrnIndex); xfree(pI830->LpRing); pI830->LpRing = NULL; @@ -5857,9 +6171,7 @@ I830BIOSCloseScreen(int scrnIndex, ScreenPtr pScreen) pI830->used3D = NULL; } - if (pI830->shadowReq.minorversion >= 1) - pScrn->PointerMoved = pI830->PointerMoved; - + pScrn->PointerMoved = pI830->PointerMoved; pScrn->vtSema = FALSE; pI830->closing = FALSE; pScreen->CloseScreen = pI830->CloseScreen; @@ -6187,16 +6499,23 @@ I830CheckDevicesTimer(OsTimerPtr timer, CARD32 now, pointer arg) offset = pI8301->FrontBuffer2.Start + ((pScrn->frameY0 * pI830->displayWidth + pScrn->frameX0) * pI830->cpp); } - if (pI830->pipe == 0) - adjust = INREG(DSPABASE); - else - adjust = INREG(DSPBBASE); + if (IS_BROADWATER(pI830)) { + if (pI830->pipe == 0) + adjust = INREG(DSPASURF); + else + adjust = INREG(DSPBSURF); + } else { + if (pI830->pipe == 0) + adjust = INREG(DSPABASE); + else + adjust = INREG(DSPBBASE); + } if (adjust != offset) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Fixing display offsets.\n"); - I830BIOSAdjustFrame(pScrn->pScreen->myNum, pScrn->frameX0, pScrn->frameY0, 0); + I830AdjustFrame(pScrn->pScreen->myNum, pScrn->frameX0, pScrn->frameY0, 0); } } @@ -6221,7 +6540,7 @@ I830CheckDevicesTimer(OsTimerPtr timer, CARD32 now, pointer arg) pI830->currentMode = NULL; I830BIOSSwitchMode(pScrn->pScreen->myNum, pScrn->currentMode, 0); - I830BIOSAdjustFrame(pScrn->pScreen->myNum, pScrn->frameX0, pScrn->frameY0, 0); + I830AdjustFrame(pScrn->pScreen->myNum, pScrn->frameX0, pScrn->frameY0, 0); if (xf86IsEntityShared(pScrn->entityList[0])) { ScrnInfoPtr pScrn2; @@ -6240,7 +6559,7 @@ I830CheckDevicesTimer(OsTimerPtr timer, CARD32 now, pointer arg) pI8302->currentMode = NULL; I830BIOSSwitchMode(pScrn2->pScreen->myNum, pScrn2->currentMode, 0); - I830BIOSAdjustFrame(pScrn2->pScreen->myNum, pScrn2->frameX0, pScrn2->frameY0, 0); + I830AdjustFrame(pScrn2->pScreen->myNum, pScrn2->frameX0, pScrn2->frameY0, 0); (*pScrn2->EnableDisableFBAccess) (pScrn2->pScreen->myNum, FALSE); (*pScrn2->EnableDisableFBAccess) (pScrn2->pScreen->myNum, TRUE); @@ -6289,7 +6608,7 @@ I830InitpScrn(ScrnInfoPtr pScrn) pScrn->PreInit = I830BIOSPreInit; pScrn->ScreenInit = I830BIOSScreenInit; pScrn->SwitchMode = I830BIOSSwitchMode; - pScrn->AdjustFrame = I830BIOSAdjustFrame; + pScrn->AdjustFrame = I830AdjustFrame; pScrn->EnterVT = I830BIOSEnterVT; pScrn->LeaveVT = I830BIOSLeaveVT; pScrn->FreeScreen = I830BIOSFreeScreen; diff --git a/src/i830_memory.c b/src/i830_memory.c index 433aa47d..e5c92151 100644 --- a/src/i830_memory.c +++ b/src/i830_memory.c @@ -210,10 +210,15 @@ AllocFromAGP(ScrnInfoPtr pScrn, I830MemRange *result, long size, return 0; if (flags & NEED_PHYSICAL_ADDR) { - result->Key = xf86AllocateGARTMemory(pScrn->scrnIndex, size, 2, + result->Key = I830AllocateGARTMemory(pScrn->scrnIndex, size, 2, &(result->Physical)); } else { - result->Key = xf86AllocateGARTMemory(pScrn->scrnIndex, size, 0, NULL); + /* Due to a bug in agpgart in 2.6 kernels resulting in very poor + * allocation performance we need to workaround it here... + */ + result->Key = I830AllocateGARTMemory(pScrn->scrnIndex, size, 3, NULL); + if (result->Key == -1) + result->Key = I830AllocateGARTMemory(pScrn->scrnIndex, size, 0, NULL); } if (result->Key == -1) return 0; @@ -243,7 +248,7 @@ I830FreeVidMem(ScrnInfoPtr pScrn, I830MemRange *range) return; if (range->Key != -1) - xf86DeallocateGARTMemory(pScrn->scrnIndex, range->Key); + I830DeallocateGARTMemory(pScrn->scrnIndex, range->Key); if (range->Pool) { /* @@ -498,7 +503,7 @@ I830AllocateRotatedBuffer(ScrnInfoPtr pScrn, int flags) alloced = 0; if (tileable) { align = GetBestTileAlignment(size); - for (align = GetBestTileAlignment(size); align >= KB(512); align >>= 1) { + for (align = GetBestTileAlignment(size); align >= (IS_I9XX(pI830) ? MB(1) : KB(512)); align >>= 1) { alloced = I830AllocVidMem(pScrn, &(pI830->RotatedMem), &(pI830->StolenPool), size, align, flags | FROM_ANYWHERE | ALLOCATE_AT_TOP | @@ -563,7 +568,7 @@ I830AllocateRotated2Buffer(ScrnInfoPtr pScrn, int flags) alloced = 0; if (tileable) { align = GetBestTileAlignment(size); - for (align = GetBestTileAlignment(size); align >= KB(512); align >>= 1) { + for (align = GetBestTileAlignment(size); align >= (IS_I9XX(pI830) ? MB(1) : KB(512)); align >>= 1) { alloced = I830AllocVidMem(pScrn, &(pI830->RotatedMem2), &(pI830->StolenPool), size, align, flags | FROM_ANYWHERE | ALLOCATE_AT_TOP | @@ -630,7 +635,7 @@ I830Allocate2DMemory(ScrnInfoPtr pScrn, const int flags) BOOLTOSTRING(flags & ALLOC_INITIAL)); if (!pI830->StolenOnly && - (!xf86AgpGARTSupported() || !xf86AcquireGART(pScrn->scrnIndex))) { + (!I830AgpGARTSupported() || !I830AcquireGART(pScrn->scrnIndex))) { if (!dryrun) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "AGP GART support is either not available or cannot " @@ -673,6 +678,7 @@ I830Allocate2DMemory(ScrnInfoPtr pScrn, const int flags) memset(&(pI830->FrontBuffer2), 0, sizeof(pI830->FrontBuffer2)); pI830->FrontBuffer2.Key = -1; +#if 1 /* ROTATION */ pI830->FbMemBox2.x1 = 0; pI830->FbMemBox2.x2 = pI830Ent->pScrn_2->displayWidth; pI830->FbMemBox2.y1 = 0; @@ -680,6 +686,12 @@ I830Allocate2DMemory(ScrnInfoPtr pScrn, const int flags) pI830->FbMemBox2.y2 = pI830Ent->pScrn_2->virtualX; else pI830->FbMemBox2.y2 = pI830Ent->pScrn_2->virtualY; +#else + pI830->FbMemBox2.x1 = 0; + pI830->FbMemBox2.x2 = pI830Ent->pScrn_2->displayWidth; + pI830->FbMemBox2.y1 = 0; + pI830->FbMemBox2.y2 = pI830Ent->pScrn_2->virtualY; +#endif /* * Calculate how much framebuffer memory to allocate. For the @@ -731,19 +743,26 @@ I830Allocate2DMemory(ScrnInfoPtr pScrn, const int flags) tileable = !(flags & ALLOC_NO_TILING) && pI8302->allowPageFlip && IsTileable(pI830Ent->pScrn_2->displayWidth * pI8302->cpp); if (tileable) { - align = KB(512); + if (IS_I9XX(pI830)) + align = MB(1); + else + align = KB(512); alignflags = ALIGN_BOTH_ENDS; } else { align = KB(64); alignflags = 0; } +#if 1 /* ROTATION */ if (pI830Ent->pScrn_2->virtualX > pI830Ent->pScrn_2->virtualY) size = lineSize * (pI830Ent->pScrn_2->virtualX + cacheLines); else size = lineSize * (pI830Ent->pScrn_2->virtualY + cacheLines); size = ROUND_TO_PAGE(size); - +#else + size = lineSize * (pI830Ent->pScrn_2->virtualY + cacheLines); + size = ROUND_TO_PAGE(size); +#endif xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity, "%sSecondary framebuffer allocation size: %ld kByte\n", s, size / 1024); @@ -765,6 +784,7 @@ I830Allocate2DMemory(ScrnInfoPtr pScrn, const int flags) memset(&(pI830->FrontBuffer), 0, sizeof(pI830->FrontBuffer)); pI830->FrontBuffer.Key = -1; +#if 1 /* ROTATION */ pI830->FbMemBox.x1 = 0; pI830->FbMemBox.x2 = pScrn->displayWidth; pI830->FbMemBox.y1 = 0; @@ -772,6 +792,12 @@ I830Allocate2DMemory(ScrnInfoPtr pScrn, const int flags) pI830->FbMemBox.y2 = pScrn->virtualX; else pI830->FbMemBox.y2 = pScrn->virtualY; +#else + pI830->FbMemBox.x1 = 0; + pI830->FbMemBox.x2 = pScrn->displayWidth; + pI830->FbMemBox.y1 = 0; + pI830->FbMemBox.y2 = pScrn->virtualY; +#endif /* * Calculate how much framebuffer memory to allocate. For the @@ -823,19 +849,26 @@ I830Allocate2DMemory(ScrnInfoPtr pScrn, const int flags) tileable = !(flags & ALLOC_NO_TILING) && pI830->allowPageFlip && IsTileable(pScrn->displayWidth * pI830->cpp); if (tileable) { - align = KB(512); + if (IS_I9XX(pI830)) + align = MB(1); + else + align = KB(512); alignflags = ALIGN_BOTH_ENDS; } else { align = KB(64); alignflags = 0; } +#if 1 /* ROTATION */ if (pScrn->virtualX > pScrn->virtualY) size = lineSize * (pScrn->virtualX + cacheLines); else size = lineSize * (pScrn->virtualY + cacheLines); size = ROUND_TO_PAGE(size); - +#else + size = lineSize * (pScrn->virtualY + cacheLines); + size = ROUND_TO_PAGE(size); +#endif xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity, "%sInitial framebuffer allocation size: %ld kByte\n", s, size / 1024); @@ -909,7 +942,10 @@ I830Allocate2DMemory(ScrnInfoPtr pScrn, const int flags) tileable = !(flags & ALLOC_NO_TILING) && pI830->allowPageFlip && IsTileable(pScrn->displayWidth * pI830->cpp); if (tileable) { - align = KB(512); + if (IS_I9XX(pI830)) + align = MB(1); + else + align = KB(512); alignflags = ALIGN_BOTH_ENDS; } else { align = KB(64); @@ -937,7 +973,13 @@ I830Allocate2DMemory(ScrnInfoPtr pScrn, const int flags) */ if (!dryrun) { memset(&(pI830->Dummy), 0, sizeof(pI830->Dummy)); - pI830->Dummy.Key = xf86AllocateGARTMemory(pScrn->scrnIndex, size, 0, NULL); + /* Due to a bug in agpgart in 2.6 kernels resulting in very poor + * allocation performance we need to workaround it here... + */ + pI830->Dummy.Key = + I830AllocateGARTMemory(pScrn->scrnIndex, size, 3, NULL); + if (pI830->Dummy.Key == -1) + pI830->Dummy.Key = I830AllocateGARTMemory(pScrn->scrnIndex, size, 0, NULL); pI830->Dummy.Offset = 0; } #endif @@ -1147,7 +1189,7 @@ I830AllocateBackBuffer(ScrnInfoPtr pScrn, const int flags) alloced = 0; if (tileable) { align = GetBestTileAlignment(size); - for (align = GetBestTileAlignment(size); align >= KB(512); align >>= 1) { + for (align = GetBestTileAlignment(size); align >= (IS_I9XX(pI830) ? MB(1) : KB(512)); align >>= 1) { alloced = I830AllocVidMem(pScrn, &(pI830->BackBuffer), &(pI830->StolenPool), size, align, flags | FROM_ANYWHERE | ALLOCATE_AT_TOP | @@ -1210,7 +1252,7 @@ I830AllocateDepthBuffer(ScrnInfoPtr pScrn, const int flags) alloced = 0; if (tileable) { align = GetBestTileAlignment(size); - for (align = GetBestTileAlignment(size); align >= KB(512); align >>= 1) { + for (align = GetBestTileAlignment(size); align >= (IS_I9XX(pI830) ? MB(1) : KB(512)); align >>= 1) { alloced = I830AllocVidMem(pScrn, &(pI830->DepthBuffer), &(pI830->StolenPool), size, align, flags | FROM_ANYWHERE | ALLOCATE_AT_TOP | @@ -1357,7 +1399,14 @@ I830DoPoolAllocation(ScrnInfoPtr pScrn, I830MemPool *pool) if (pool->Total.Size > pool->Fixed.Size) { pool->Allocated.Size = pool->Total.Size - pool->Fixed.Size; - pool->Allocated.Key = xf86AllocateGARTMemory(pScrn->scrnIndex, + /* Due to a bug in agpgart in 2.6 kernels resulting in very poor + * allocation performance we need to workaround it here... + */ + pool->Allocated.Key = + I830AllocateGARTMemory(pScrn->scrnIndex, pool->Allocated.Size, + 3, NULL); + if (pool->Allocated.Key == -1) + pool->Allocated.Key = I830AllocateGARTMemory(pScrn->scrnIndex, pool->Allocated.Size, 0, NULL); if (pool->Allocated.Key == -1) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Pool allocation failed\n"); @@ -1644,7 +1693,7 @@ SetFence(ScrnInfoPtr pScrn, int nr, unsigned int start, unsigned int pitch, } static Bool -MakeTiles(ScrnInfoPtr pScrn, I830MemRange *pMem) +MakeTiles(ScrnInfoPtr pScrn, I830MemRange *pMem, unsigned int fence) { I830Ptr pI830 = I830PTR(pScrn); int pitch, ntiles, i; @@ -1662,6 +1711,31 @@ MakeTiles(ScrnInfoPtr pScrn, I830MemRange *pMem) } pitch = pScrn->displayWidth * pI830->cpp; + + if (IS_BROADWATER(pI830)) { + I830RegPtr i830Reg = &pI830->ModeReg; + + switch (fence) { + case FENCE_XMAJOR: + i830Reg->Fence[nextTile] = (((pitch / 128) - 1) << 2) | pMem->Start | 1; + break; + case FENCE_YMAJOR: + /* YMajor can be 128B aligned but the current code dictates + * otherwise. This isn't a problem apart from memory waste. + * FIXME */ + i830Reg->Fence[nextTile] = (((pitch / 128) - 1) << 2) | pMem->Start | 1; + i830Reg->Fence[nextTile] |= (1<<1); + break; + default: + case FENCE_LINEAR: + break; + } + + i830Reg->Fence[nextTile+FENCE_NEW_NR] = pMem->End; + nextTile++; + return TRUE; + } + /* * Simply try to break the region up into at most four pieces of size * equal to the alignment. @@ -1703,20 +1777,27 @@ I830SetupMemoryTiling(ScrnInfoPtr pScrn) return; } + pI830->front_tiled = FENCE_LINEAR; + pI830->back_tiled = FENCE_LINEAR; + pI830->depth_tiled = FENCE_LINEAR; + pI830->rotated_tiled = FENCE_LINEAR; + pI830->rotated2_tiled = FENCE_LINEAR; + if (pI830->allowPageFlip) { if (pI830->allowPageFlip && pI830->FrontBuffer.Alignment >= KB(512)) { - if (MakeTiles(pScrn, &(pI830->FrontBuffer))) { + if (MakeTiles(pScrn, &(pI830->FrontBuffer), FENCE_XMAJOR)) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "Activating tiled memory for the FRONT buffer\n"); + "Activating tiled memory for the front buffer\n"); + pI830->front_tiled = FENCE_XMAJOR; } else { pI830->allowPageFlip = FALSE; xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "MakeTiles failed for the FRONT buffer\n"); + "MakeTiles failed for the front buffer\n"); } } else { pI830->allowPageFlip = FALSE; xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "Alignment bad for the FRONT buffer\n"); + "Alignment bad for the front buffer\n"); } } @@ -1727,9 +1808,10 @@ I830SetupMemoryTiling(ScrnInfoPtr pScrn) * value. */ if (pI830->BackBuffer.Alignment >= KB(512)) { - if (MakeTiles(pScrn, &(pI830->BackBuffer))) { + if (MakeTiles(pScrn, &(pI830->BackBuffer), FENCE_XMAJOR)) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Activating tiled memory for the back buffer.\n"); + pI830->back_tiled = FENCE_XMAJOR; } else { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "MakeTiles failed for the back buffer.\n"); @@ -1738,9 +1820,10 @@ I830SetupMemoryTiling(ScrnInfoPtr pScrn) } if (pI830->DepthBuffer.Alignment >= KB(512)) { - if (MakeTiles(pScrn, &(pI830->DepthBuffer))) { + if (MakeTiles(pScrn, &(pI830->DepthBuffer), FENCE_YMAJOR)) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "Activating tiled memory for the depth buffer.\n"); + "Activating tiled memory for the depth buffer.\n"); + pI830->depth_tiled = FENCE_YMAJOR; } else { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "MakeTiles failed for the depth buffer.\n"); @@ -1748,9 +1831,10 @@ I830SetupMemoryTiling(ScrnInfoPtr pScrn) } if (pI830->RotatedMem.Alignment >= KB(512)) { - if (MakeTiles(pScrn, &(pI830->RotatedMem))) { + if (MakeTiles(pScrn, &(pI830->RotatedMem), FENCE_XMAJOR)) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Activating tiled memory for the rotated buffer.\n"); + pI830->rotated_tiled = FENCE_XMAJOR; } else { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "MakeTiles failed for the rotated buffer.\n"); @@ -1759,9 +1843,10 @@ I830SetupMemoryTiling(ScrnInfoPtr pScrn) #if 0 if (pI830->RotatedMem2.Alignment >= KB(512)) { - if (MakeTiles(pScrn, &(pI830->RotatedMem2))) { + if (MakeTiles(pScrn, &(pI830->RotatedMem2), FENCE_XMAJOR)) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Activating tiled memory for the rotated2 buffer.\n"); + pI830->rotated2_tiled = FENCE_XMAJOR; } else { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "MakeTiles failed for the rotated buffer.\n"); @@ -1780,7 +1865,7 @@ BindMemRange(ScrnInfoPtr pScrn, I830MemRange *mem) if (mem->Key == -1) return TRUE; - return xf86BindGARTMemory(pScrn->scrnIndex, mem->Key, mem->Offset); + return I830BindGARTMemory(pScrn->scrnIndex, mem->Key, mem->Offset); } Bool @@ -1795,8 +1880,8 @@ I830BindAGPMemory(ScrnInfoPtr pScrn) if (pI830->StolenOnly == TRUE) return TRUE; - if (xf86AgpGARTSupported() && !pI830->GttBound) { - if (!xf86AcquireGART(pScrn->scrnIndex)) + if (I830AgpGARTSupported() && !pI830->GttBound) { + if (!I830AcquireGART(pScrn->scrnIndex)) return FALSE; #if REMAP_RESERVED @@ -1865,7 +1950,7 @@ UnbindMemRange(ScrnInfoPtr pScrn, I830MemRange *mem) if (mem->Key == -1) return TRUE; - return xf86UnbindGARTMemory(pScrn->scrnIndex, mem->Key); + return I830UnbindGARTMemory(pScrn->scrnIndex, mem->Key); } @@ -1881,7 +1966,7 @@ I830UnbindAGPMemory(ScrnInfoPtr pScrn) if (pI830->StolenOnly == TRUE) return TRUE; - if (xf86AgpGARTSupported() && pI830->GttBound) { + if (I830AgpGARTSupported() && pI830->GttBound) { #if REMAP_RESERVED /* "unbind" the pre-allocated region. */ @@ -1934,7 +2019,7 @@ I830UnbindAGPMemory(ScrnInfoPtr pScrn) return FALSE; } #endif - if (!xf86ReleaseGART(pScrn->scrnIndex)) + if (!I830ReleaseGART(pScrn->scrnIndex)) return FALSE; pI830->GttBound = 0; @@ -1949,10 +2034,10 @@ I830CheckAvailableMemory(ScrnInfoPtr pScrn) AgpInfoPtr agpinf; int maxPages; - if (!xf86AgpGARTSupported() || - !xf86AcquireGART(pScrn->scrnIndex) || - (agpinf = xf86GetAGPInfo(pScrn->scrnIndex)) == NULL || - !xf86ReleaseGART(pScrn->scrnIndex)) + if (!I830AgpGARTSupported() || + !I830AcquireGART(pScrn->scrnIndex) || + (agpinf = I830GetAGPInfo(pScrn->scrnIndex)) == NULL || + !I830ReleaseGART(pScrn->scrnIndex)) return -1; maxPages = agpinf->totalPages - agpinf->usedPages; diff --git a/src/i830_rotate.c b/src/i830_rotate.c index e4a80645..9c91cc40 100644 --- a/src/i830_rotate.c +++ b/src/i830_rotate.c @@ -680,13 +680,10 @@ I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode) 0 }; - if (pI830->noAccel) - func = LoaderSymbol("shadowUpdateRotatePacked"); + if (IS_I9XX(pI830)) + func = I915UpdateRotate; else - if (IS_I9XX(pI830)) - func = I915UpdateRotate; - else - func = I830UpdateRotate; + func = I830UpdateRotate; if (I830IsPrimary(pScrn)) { pI8301 = pI830; @@ -702,7 +699,13 @@ I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode) pScrn2 = pScrn; } - pI830->rotation = I830GetRotation(pScrn->pScreen); + if (xf86LoaderCheckSymbol("I830GetRotation")) { + Rotation (*I830GetRotation)(ScreenPtr pScreen) = NULL; + I830GetRotation = LoaderSymbol("I830GetRotation"); + if (I830GetRotation) { + pI830->rotation = (*I830GetRotation)(pScrn->pScreen); + } + } /* Check if we've still got the same orientation, or same mode */ if (pI830->rotation == oldRotation && pI830->currentMode == mode) @@ -716,6 +719,7 @@ I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode) * We grab the DRI lock when reallocating buffers to avoid DRI clients * getting bogus information. */ + #ifdef XF86DRI if (pI8301->directRenderingEnabled && reAllocate) { didLock = I830DRILock(pScrn1); @@ -734,18 +738,19 @@ I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode) } } + if (pI8301->TexMem.Key != -1) - xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->TexMem.Key); + I830UnbindGARTMemory(pScrn1->scrnIndex, pI8301->TexMem.Key); I830FreeVidMem(pScrn1, &(pI8301->TexMem)); if (pI8301->StolenPool.Allocated.Key != -1) { - xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->StolenPool.Allocated.Key); - xf86DeallocateGARTMemory(pScrn1->scrnIndex, pI8301->StolenPool.Allocated.Key); + I830UnbindGARTMemory(pScrn1->scrnIndex, pI8301->StolenPool.Allocated.Key); + I830DeallocateGARTMemory(pScrn1->scrnIndex, pI8301->StolenPool.Allocated.Key); } if (pI8301->DepthBuffer.Key != -1) - xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->DepthBuffer.Key); + I830UnbindGARTMemory(pScrn1->scrnIndex, pI8301->DepthBuffer.Key); I830FreeVidMem(pScrn1, &(pI8301->DepthBuffer)); if (pI8301->BackBuffer.Key != -1) - xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->BackBuffer.Key); + I830UnbindGARTMemory(pScrn1->scrnIndex, pI8301->BackBuffer.Key); I830FreeVidMem(pScrn1, &(pI8301->BackBuffer)); } #endif @@ -754,7 +759,7 @@ I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode) *pI830->used3D |= 1<<31; /* use high bit to denote new rotation occured */ if (pI8301->RotatedMem.Key != -1) - xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key); + I830UnbindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key); I830FreeVidMem(pScrn1, &(pI8301->RotatedMem)); memset(&(pI8301->RotatedMem), 0, sizeof(pI8301->RotatedMem)); @@ -762,7 +767,7 @@ I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode) if (pI830->entityPrivate) { if (pI8301->RotatedMem2.Key != -1) - xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem2.Key); + I830UnbindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem2.Key); I830FreeVidMem(pScrn1, &(pI8301->RotatedMem2)); memset(&(pI8301->RotatedMem2), 0, sizeof(pI8301->RotatedMem2)); @@ -830,26 +835,27 @@ I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode) I830FixOffset(pScrn1, &(pI8301->RotatedMem2)); if (pI8301->RotatedMem2.Key != -1) - xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem2.Key, pI8301->RotatedMem2.Offset); + I830BindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem2.Key, pI8301->RotatedMem2.Offset); } } if (pI8301->rotation != RR_Rotate_0) { if (!I830AllocateRotatedBuffer(pScrn1, - (pI8301->disableTiling ? ALLOC_NO_TILING : 0))) + pI8301->disableTiling ? ALLOC_NO_TILING : 0)) goto BAIL1; I830FixOffset(pScrn1, &(pI8301->RotatedMem)); if (pI8301->RotatedMem.Key != -1) - xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key, pI8301->RotatedMem.Offset); + I830BindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key, pI8301->RotatedMem.Offset); } } - shadowRemove (pScrn->pScreen, NULL); + I830shadowUnset (pScrn->pScreen); if (pI830->rotation != RR_Rotate_0) - shadowAdd (pScrn->pScreen, + I830shadowSet (pScrn->pScreen, (*pScrn->pScreen->GetScreenPixmap) (pScrn->pScreen), - func, I830WindowLinear, pI830->rotation, 0); + pI830->noAccel ? I830shadowUpdateRotatePacked : func, + I830WindowLinear, pI830->rotation, 0); if (I830IsPrimary(pScrn)) { if (pI830->rotation != RR_Rotate_0) @@ -896,13 +902,13 @@ I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode) I830FixOffset(pScrn1, &(pI8301->DepthBuffer)); if (pI8301->BackBuffer.Key != -1) - xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->BackBuffer.Key, pI8301->BackBuffer.Offset); + I830BindGARTMemory(pScrn1->scrnIndex, pI8301->BackBuffer.Key, pI8301->BackBuffer.Offset); if (pI8301->DepthBuffer.Key != -1) - xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->DepthBuffer.Key, pI8301->DepthBuffer.Offset); + I830BindGARTMemory(pScrn1->scrnIndex, pI8301->DepthBuffer.Key, pI8301->DepthBuffer.Offset); if (pI8301->StolenPool.Allocated.Key != -1) - xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->StolenPool.Allocated.Key, pI8301->StolenPool.Allocated.Offset); + I830BindGARTMemory(pScrn1->scrnIndex, pI8301->StolenPool.Allocated.Key, pI8301->StolenPool.Allocated.Offset); if (pI8301->TexMem.Key != -1) - xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->TexMem.Key, pI8301->TexMem.Offset); + I830BindGARTMemory(pScrn1->scrnIndex, pI8301->TexMem.Key, pI8301->TexMem.Offset); I830SetupMemoryTiling(pScrn1); /* update fence registers */ for (i = 0; i < 8; i++) @@ -990,7 +996,7 @@ BAIL3: BAIL2: if (pI8301->rotation != RR_Rotate_0) { if (pI8301->RotatedMem.Key != -1) - xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key); + I830UnbindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key); I830FreeVidMem(pScrn1, &(pI8301->RotatedMem)); memset(&(pI8301->RotatedMem), 0, sizeof(pI8301->RotatedMem)); @@ -1000,7 +1006,7 @@ BAIL1: if (pI830->entityPrivate) { if (pI8302->rotation != RR_Rotate_0) { if (pI8301->RotatedMem.Key != -1) - xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key); + I830UnbindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key); I830FreeVidMem(pScrn1, &(pI8301->RotatedMem)); memset(&(pI8301->RotatedMem), 0, sizeof(pI8301->RotatedMem)); @@ -1039,26 +1045,27 @@ BAIL0: I830FixOffset(pScrn1, &(pI8301->RotatedMem2)); if (pI8301->RotatedMem2.Key != -1) - xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem2.Key, pI8301->RotatedMem2.Offset); + I830BindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem2.Key, pI8301->RotatedMem2.Offset); } } if (pI8301->rotation != RR_Rotate_0) { if (!I830AllocateRotatedBuffer(pScrn1, - (pI8301->disableTiling ? ALLOC_NO_TILING : 0))) + pI8301->disableTiling ? ALLOC_NO_TILING : 0)) xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Oh dear, the rotated buffer failed - badness\n"); I830FixOffset(pScrn1, &(pI8301->RotatedMem)); if (pI8301->RotatedMem.Key != -1) - xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key, pI8301->RotatedMem.Offset); + I830BindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key, pI8301->RotatedMem.Offset); } - shadowRemove (pScrn->pScreen, NULL); + I830shadowUnset (pScrn->pScreen); if (pI830->rotation != RR_Rotate_0) - shadowAdd (pScrn->pScreen, + I830shadowSet (pScrn->pScreen, (*pScrn->pScreen->GetScreenPixmap) (pScrn->pScreen), - func, I830WindowLinear, pI830->rotation, 0); + pI830->noAccel ? I830shadowUpdateRotatePacked : func, + I830WindowLinear, pI830->rotation, 0); if (I830IsPrimary(pScrn)) { if (pI830->rotation != RR_Rotate_0) @@ -1130,13 +1137,13 @@ BAIL0: I830FixOffset(pScrn1, &(pI8301->DepthBuffer)); if (pI8301->BackBuffer.Key != -1) - xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->BackBuffer.Key, pI8301->BackBuffer.Offset); + I830BindGARTMemory(pScrn1->scrnIndex, pI8301->BackBuffer.Key, pI8301->BackBuffer.Offset); if (pI8301->DepthBuffer.Key != -1) - xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->DepthBuffer.Key, pI8301->DepthBuffer.Offset); + I830BindGARTMemory(pScrn1->scrnIndex, pI8301->DepthBuffer.Key, pI8301->DepthBuffer.Offset); if (pI8301->StolenPool.Allocated.Key != -1) - xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->StolenPool.Allocated.Key, pI8301->StolenPool.Allocated.Offset); + I830BindGARTMemory(pScrn1->scrnIndex, pI8301->StolenPool.Allocated.Key, pI8301->StolenPool.Allocated.Offset); if (pI8301->TexMem.Key != -1) - xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->TexMem.Key, pI8301->TexMem.Offset); + I830BindGARTMemory(pScrn1->scrnIndex, pI8301->TexMem.Key, pI8301->TexMem.Offset); I830SetupMemoryTiling(pScrn1); /* update fence registers */ for (i = 0; i < 8; i++) diff --git a/src/i830_video.c b/src/i830_video.c index a608a7e3..8ae19062 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -1,4 +1,4 @@ -#define VIDEO_DEBUG 0 +#define VIDEO_DEBUG 1 /*************************************************************************** Copyright 2000 Intel Corporation. All Rights Reserved. @@ -120,9 +120,9 @@ static Atom xvBrightness, xvContrast, xvColorKey, xvPipe, xvDoubleBuffer; static Atom xvGamma0, xvGamma1, xvGamma2, xvGamma3, xvGamma4, xvGamma5; #define IMAGE_MAX_WIDTH 1920 -#define IMAGE_MAX_HEIGHT 1088 +#define IMAGE_MAX_HEIGHT 1080 #define IMAGE_MAX_WIDTH_LEGACY 1024 -#define IMAGE_MAX_HEIGHT_LEGACY 1088 +#define IMAGE_MAX_HEIGHT_LEGACY 1080 #if !VIDEO_DEBUG #define ErrorF Edummy @@ -157,7 +157,7 @@ Edummy(const char *dummy, ...) OUT_RING(MI_NOOP); \ OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_FLIP_CONTINUE); \ } \ - OUT_RING(pI830->OverlayMem->Physical | OFC_UPDATE); \ + OUT_RING(pI830->OverlayMem->Start | OFC_UPDATE); \ ADVANCE_LP_RING(); \ ErrorF("OVERLAY_UPDATE\n"); \ } while(0) @@ -172,11 +172,11 @@ Edummy(const char *dummy, ...) OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); \ OUT_RING(MI_NOOP); \ OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_FLIP_CONTINUE); \ - OUT_RING(pI830->OverlayMem->Physical | OFC_UPDATE); \ + OUT_RING(pI830->OverlayMem->Start | OFC_UPDATE); \ OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); \ OUT_RING(MI_NOOP); \ OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_FLIP_OFF); \ - OUT_RING(pI830->OverlayMem->Physical | OFC_UPDATE); \ + OUT_RING(pI830->OverlayMem->Start | OFC_UPDATE); \ OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); \ OUT_RING(MI_NOOP); \ ADVANCE_LP_RING(); \ @@ -334,18 +334,18 @@ typedef struct { CARD32 OCONFIG; CARD32 OCMD; CARD32 RESERVED1; /* 0x6C */ - CARD32 AWINPOS; - CARD32 AWINSZ; - CARD32 RESERVED2; /* 0x78 */ - CARD32 RESERVED3; /* 0x7C */ - CARD32 RESERVED4; /* 0x80 */ - CARD32 RESERVED5; /* 0x84 */ - CARD32 RESERVED6; /* 0x88 */ - CARD32 RESERVED7; /* 0x8C */ - CARD32 RESERVED8; /* 0x90 */ - CARD32 RESERVED9; /* 0x94 */ - CARD32 RESERVEDA; /* 0x98 */ - CARD32 RESERVEDB; /* 0x9C */ + CARD32 OSTART_0Y; /* for broadwater */ + CARD32 OSTART_1Y; /* for broadwater */ + CARD32 OSTART_0U; + CARD32 OSTART_0V; + CARD32 OSTART_1U; + CARD32 OSTART_1V; + CARD32 OTILEOFF_0Y; + CARD32 OTILEOFF_1Y; + CARD32 OTILEOFF_0U; + CARD32 OTILEOFF_0V; + CARD32 OTILEOFF_1U; + CARD32 OTILEOFF_1V; CARD32 FASTHSCALE; /* 0xA0 */ CARD32 UVSCALEV; /* 0xA4 */ @@ -501,8 +501,10 @@ I830ResetVideo(ScrnInfoPtr pScrn) overlay->SHEIGHT = 0; overlay->OCLRC0 = (pPriv->contrast << 18) | (pPriv->brightness & 0xff); overlay->OCLRC1 = 0x00000080; /* saturation: bypass */ +#if 0 overlay->AWINPOS = 0; overlay->AWINSZ = 0; +#endif overlay->FASTHSCALE = 0; /* @@ -1647,14 +1649,31 @@ I830DisplayVideo(ScrnInfoPtr pScrn, int id, short width, short height, dstBox->x2, dstBox->y2); /* buffer locations */ - overlay->OBUF_0Y = pPriv->YBuf0offset; - overlay->OBUF_0U = pPriv->UBuf0offset; - overlay->OBUF_0V = pPriv->VBuf0offset; - - if(pPriv->doubleBuffer) { - overlay->OBUF_1Y = pPriv->YBuf1offset; - overlay->OBUF_1U = pPriv->UBuf1offset; - overlay->OBUF_1V = pPriv->VBuf1offset; + if (IS_BROADWATER(pI830)) + { + overlay->OBUF_0Y = 0; + overlay->OBUF_0U = 0; + overlay->OBUF_0V = 0; + overlay->OSTART_0Y = pPriv->YBuf0offset; + overlay->OSTART_0U = pPriv->UBuf0offset; + overlay->OSTART_0V = pPriv->VBuf0offset; + if(pPriv->doubleBuffer) { + overlay->OBUF_1Y = 0; + overlay->OBUF_1U = 0; + overlay->OBUF_1V = 0; + overlay->OSTART_1Y = pPriv->YBuf1offset; + overlay->OSTART_1U = pPriv->UBuf1offset; + overlay->OSTART_1V = pPriv->VBuf1offset; + } + } else { + overlay->OBUF_0Y = pPriv->YBuf0offset; + overlay->OBUF_0U = pPriv->UBuf0offset; + overlay->OBUF_0V = pPriv->VBuf0offset; + if(pPriv->doubleBuffer) { + overlay->OBUF_1Y = pPriv->YBuf1offset; + overlay->OBUF_1U = pPriv->UBuf1offset; + overlay->OBUF_1V = pPriv->VBuf1offset; + } } ErrorF("Buffers: Y0: 0x%lx, U0: 0x%lx, V0: 0x%lx\n", overlay->OBUF_0Y, @@ -1967,10 +1986,10 @@ I830PutImage(ScrnInfoPtr pScrn, } #else if (pI830->rotation & (RR_Rotate_90 | RR_Rotate_270)) { - dstPitch = ((height / 2) + 511) & ~511; + dstPitch = ((height / 2) + 255) & ~255; size = dstPitch * width * 3; } else { - dstPitch = ((width / 2) + 511) & ~511; /* of chroma */ + dstPitch = ((width / 2) + 255) & ~255; /* of chroma */ size = dstPitch * height * 3; } #endif @@ -1989,10 +2008,10 @@ I830PutImage(ScrnInfoPtr pScrn, } #else if (pI830->rotation & (RR_Rotate_90 | RR_Rotate_270)) { - dstPitch = ((height << 1) + 511) & ~511; + dstPitch = ((height << 1) + 255) & ~255; size = dstPitch * width; } else { - dstPitch = ((width << 1) + 511) & ~511; /* of chroma */ + dstPitch = ((width << 1) + 255) & ~255; /* of chroma */ size = dstPitch * height; } #endif @@ -2008,7 +2027,11 @@ I830PutImage(ScrnInfoPtr pScrn, return BadAlloc; /* fixup pointers */ +#if 0 + pPriv->YBuf0offset = pScrn->fbOffset + pPriv->linear->offset * pI830->cpp; +#else pPriv->YBuf0offset = pI830->FrontBuffer.Start + pPriv->linear->offset * pI830->cpp; +#endif if (pI830->rotation & (RR_Rotate_90 | RR_Rotate_270)) { pPriv->UBuf0offset = pPriv->YBuf0offset + (dstPitch * 2 * width); pPriv->VBuf0offset = pPriv->UBuf0offset + (dstPitch * width / 2); @@ -2180,7 +2203,11 @@ I830BlockHandler(int i, pScreen->BlockHandler = I830BlockHandler; if (pPriv->videoStatus & TIMER_MASK) { +#if 1 Time now = currentTime.milliseconds; +#else + UpdateCurrentTime(); +#endif if (pPriv->videoStatus & OFF_TIMER) { if (pPriv->offTime < now) { /* Turn off the overlay */ @@ -2280,7 +2307,11 @@ I830AllocateSurface(ScrnInfoPtr pScrn, surface->offsets[0] = linear->offset * bpp; surface->devPrivate.ptr = (pointer) pPriv; +#if 0 + memset(pI830->FbBase + pScrn->fbOffset + surface->offsets[0], 0, size); +#else memset(pI830->FbBase + pI830->FrontBuffer.Start + surface->offsets[0], 0, size); +#endif return Success; } @@ -2526,27 +2557,29 @@ I830VideoSwitchModeAfter(ScrnInfoPtr pScrn, DisplayModePtr mode) } } - if (pPriv->pipe == 0) { - if (INREG(PIPEACONF) & PIPEACONF_DOUBLE_WIDE) { - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, - "Disabling XVideo output because Pipe A is in double-wide mode.\n"); - pPriv->overlayOK = FALSE; - } else if (!pPriv->overlayOK) { - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, - "Re-enabling XVideo output because Pipe A is now in single-wide mode.\n"); - pPriv->overlayOK = TRUE; + if (!IS_BROADWATER(pI830)) { + if (pPriv->pipe == 0) { + if (INREG(PIPEACONF) & PIPEACONF_DOUBLE_WIDE) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Disabling XVideo output because Pipe A is in double-wide mode.\n"); + pPriv->overlayOK = FALSE; + } else if (!pPriv->overlayOK) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Re-enabling XVideo output because Pipe A is now in single-wide mode.\n"); + pPriv->overlayOK = TRUE; + } } - } - if (pPriv->pipe == 1) { - if (INREG(PIPEBCONF) & PIPEBCONF_DOUBLE_WIDE) { - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, - "Disabling XVideo output because Pipe B is in double-wide mode.\n"); - pPriv->overlayOK = FALSE; - } else if (!pPriv->overlayOK) { - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, - "Re-enabling XVideo output because Pipe B is now in single-wide mode.\n"); - pPriv->overlayOK = TRUE; + if (pPriv->pipe == 1) { + if (INREG(PIPEBCONF) & PIPEBCONF_DOUBLE_WIDE) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Disabling XVideo output because Pipe B is in double-wide mode.\n"); + pPriv->overlayOK = FALSE; + } else if (!pPriv->overlayOK) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Re-enabling XVideo output because Pipe B is now in single-wide mode.\n"); + pPriv->overlayOK = TRUE; + } } } diff --git a/src/intel_acpi.c b/src/intel_acpi.c new file mode 100644 index 00000000..e7014b28 --- /dev/null +++ b/src/intel_acpi.c @@ -0,0 +1,231 @@ +#ifndef XFree86LOADER +#include +#include +#include +#endif +#include +#include +#include "X.h" +#include "os.h" +#include "xf86.h" +#include "xf86Priv.h" +#define XF86_OS_PRIVS +#include "xf86_OSproc.h" + +#include "i830.h" + +#define ACPI_SOCKET "/var/run/acpid.socket" +#define ACPI_EVENTS "/proc/acpi/event" + +#define ACPI_VIDEO_NOTIFY_SWITCH 0x80 +#define ACPI_VIDEO_NOTIFY_PROBE 0x81 +#define ACPI_VIDEO_NOTIFY_CYCLE 0x82 +#define ACPI_VIDEO_NOTIFY_NEXT_OUTPUT 0x83 +#define ACPI_VIDEO_NOTIFY_PREV_OUTPUT 0x84 + +#define ACPI_VIDEO_NOTIFY_CYCLE_BRIGHTNESS 0x82 +#define ACPI_VIDEO_NOTIFY_INC_BRIGHTNESS 0x83 +#define ACPI_VIDEO_NOTIFY_DEC_BRIGHTNESS 0x84 +#define ACPI_VIDEO_NOTIFY_ZERO_BRIGHTNESS 0x85 +#define ACPI_VIDEO_NOTIFY_DISPLAY_OFF 0x86 + +#define ACPI_VIDEO_HEAD_INVALID (~0u - 1) +#define ACPI_VIDEO_HEAD_END (~0u) + +static void I830CloseACPI(void); +pointer I830ACPIihPtr = NULL; +PMClose I830ACPIOpen(void); + +#define LINE_LENGTH 80 + +#define MAX_NO_EVENTS 10 + +static int +I830ACPIGetEventFromOs(int fd, pmEvent *events, int num) +{ + char ev[LINE_LENGTH]; + int n; + + memset(ev, 0, LINE_LENGTH); + + n = read( fd, ev, LINE_LENGTH ); + + /* Check that we have a video event */ + if (strstr(ev, "video") == ev) { + char *video = NULL; + char *GFX = NULL; + char *notify = NULL; + char *data = NULL; /* doesn't appear to be used in the kernel */ + unsigned long int notify_l, data_l; + + video = strtok(ev, "video"); + + GFX = strtok(NULL, " "); +#if 0 + ErrorF("GFX: %s\n",GFX); +#endif + + notify = strtok(NULL, " "); + notify_l = strtoul(notify, NULL, 16); +#if 0 + ErrorF("notify: 0x%lx\n",notify_l); +#endif + + data = strtok(NULL, " "); + data_l = strtoul(data, NULL, 16); +#if 0 + ErrorF("data: 0x%lx\n",data_l); +#endif + + /* Currently we don't differentiate events */ + switch (notify_l) { + case ACPI_VIDEO_NOTIFY_SWITCH: + break; + case ACPI_VIDEO_NOTIFY_PROBE: + break; + case ACPI_VIDEO_NOTIFY_CYCLE: + break; + case ACPI_VIDEO_NOTIFY_NEXT_OUTPUT: + break; + case ACPI_VIDEO_NOTIFY_PREV_OUTPUT: + break; + default: + break; + } + + /* We should probably add the ACPI events to the common layer */ + events[0] = XF86_APM_CAPABILITY_CHANGED; + + return 1; + } + + return 0; +} + +static void +I830HandlePMEvents(int fd, pointer data) +{ + pmEvent events[MAX_NO_EVENTS]; + int i,j,n; + + if (!I830ACPIGetEventFromOs) + return; + + if ((n = I830ACPIGetEventFromOs(fd,events,MAX_NO_EVENTS))) { + do { + for (j = 0; j < n; j++) { + xf86EnterServerState(SETUP); + for (i = 0; i < xf86NumScreens; i++) { + xf86EnableAccess(xf86Screens[i]); + if (xf86Screens[i]->PMEvent) + xf86Screens[i]->PMEvent(i,events[j],FALSE); + } + xf86EnterServerState(OPERATING); + } + break; + } while (1); + } +} + +PMClose +I830ACPIOpen(void) +{ + int fd; + struct sockaddr_un addr; + int r = -1; + +#ifdef DEBUG + ErrorF("ACPI: OSPMOpen called\n"); +#endif + if (I830ACPIihPtr) + return NULL; + +#ifdef DEBUG + ErrorF("ACPI: Opening device\n"); +#endif + if ((fd = socket(AF_UNIX, SOCK_STREAM, 0)) > -1) { + memset(&addr, 0, sizeof(addr)); + addr.sun_family = AF_UNIX; + strcpy(addr.sun_path, ACPI_SOCKET); + if ((r = connect(fd, (struct sockaddr*)&addr, sizeof(addr))) == -1) { + shutdown(fd, 2); + close(fd); + fd = -1; + } + } + + /* acpid's socket isn't available, so try going direct */ + if (fd == -1) { + if ((fd = open(ACPI_EVENTS, O_RDONLY)) < 0) { + xf86MsgVerb(X_WARNING,3,"Open ACPI failed (%s) (%s)\n", ACPI_EVENTS, + strerror(errno)); + return NULL; + } + } + + I830ACPIihPtr = xf86AddInputHandler(fd,I830HandlePMEvents,NULL); + xf86MsgVerb(X_INFO,3,"Open ACPI successful (%s)\n", (r != -1) ? ACPI_SOCKET : ACPI_EVENTS); + + return I830CloseACPI; +} + +static void +I830CloseACPI(void) +{ + int fd; + +#ifdef DEBUG + ErrorF("ACPI: Closing device\n"); +#endif + if (I830ACPIihPtr) { + fd = xf86RemoveInputHandler(I830ACPIihPtr); + shutdown(fd, 2); + close(fd); + I830ACPIihPtr = NULL; + } +} + +#ifdef XFree86LOADER +static MODULESETUPPROTO(intel_acpiSetup); + +static XF86ModuleVersionInfo intel_acpiVersRec = +{ + "intel_acpi", + "Tungsten Graphics, Inc", + MODINFOSTRING1, + MODINFOSTRING2, + XF86_VERSION_CURRENT, + INTEL_MAJOR_VERSION, INTEL_MINOR_VERSION, INTEL_PATCHLEVEL, + ABI_CLASS_EXTENSION, + ABI_EXTENSION_VERSION, + MOD_CLASS_EXTENSION, + {0,0,0,0} +}; + +XF86ModuleData intel_acpiModuleData = { &intel_acpiVersRec, intel_acpiSetup, NULL }; + +ModuleInfoRec INTELACPI = { + 1, + "INTELACPI", + NULL, + 0, + NULL, +}; + +/*ARGSUSED*/ +static pointer +intel_acpiSetup(pointer Module, pointer Options, int *ErrorMajor, int *ErrorMinor) +{ + static Bool Initialised = FALSE; + + if (!Initialised) { + Initialised = TRUE; +#ifndef REMOVE_LOADER_CHECK_MODULE_INFO + if (xf86LoaderCheckSymbol("xf86AddModuleInfo")) +#endif + xf86AddModuleInfo(&INTELACPI, Module); + } + + return (pointer)TRUE; +} +#endif diff --git a/src/intel_randr.c b/src/intel_randr.c new file mode 100644 index 00000000..950a1226 --- /dev/null +++ b/src/intel_randr.c @@ -0,0 +1,424 @@ +/* $XdotOrg: xc/programs/Xserver/hw/xfree86/common/xf86RandR.c,v 1.3 2004/07/30 21:53:09 eich Exp $ */ +/* + * $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86RandR.c,v 1.7tsi Exp $ + * + * Copyright © 2002 Keith Packard, member of The XFree86 Project, Inc. + * + * Permission to use, copy, modify, distribute, and sell this software and its + * documentation for any purpose is hereby granted without fee, provided that + * the above copyright notice appear in all copies and that both that + * copyright notice and this permission notice appear in supporting + * documentation, and that the name of Keith Packard not be used in + * advertising or publicity pertaining to distribution of the software without + * specific, written prior permission. Keith Packard makes no + * representations about the suitability of this software for any purpose. It + * is provided "as is" without express or implied warranty. + * + * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, + * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO + * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR + * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, + * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER + * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR + * PERFORMANCE OF THIS SOFTWARE. + */ + +#include "X.h" +#include "os.h" +#include "mibank.h" +#include "globals.h" +#include "xf86.h" +#include "xf86Priv.h" +#include "xf86DDC.h" +#include "mipointer.h" +#include "windowstr.h" +#include "mivalidate.h" +#include + +#include "i830.h" + +typedef struct _i830RandRInfo { + int virtualX; + int virtualY; + int mmWidth; + int mmHeight; + int maxX; + int maxY; + Rotation rotation; /* current mode */ + Rotation supported_rotations; /* driver supported */ +} XF86RandRInfoRec, *XF86RandRInfoPtr; + +static int i830RandRIndex; +static int i830RandRGeneration; + +#define XF86RANDRINFO(p) ((XF86RandRInfoPtr) (p)->devPrivates[i830RandRIndex].ptr) + +static int +I830RandRModeRefresh (DisplayModePtr mode) +{ + if (mode->VRefresh) + return (int) (mode->VRefresh + 0.5); + else + return (int) (mode->Clock * 1000.0 / mode->HTotal / mode->VTotal + 0.5); +} + +static Bool +I830RandRGetInfo (ScreenPtr pScreen, Rotation *rotations) +{ + RRScreenSizePtr pSize; + ScrnInfoPtr scrp = XF86SCRNINFO(pScreen); + XF86RandRInfoPtr randrp = XF86RANDRINFO(pScreen); + DisplayModePtr mode; + int refresh0 = 60; + int maxX = 0, maxY = 0; + + *rotations = randrp->supported_rotations; + + if (randrp->virtualX == -1 || randrp->virtualY == -1) + { + randrp->virtualX = scrp->virtualX; + randrp->virtualY = scrp->virtualY; + } + + for (mode = scrp->modes; ; mode = mode->next) + { + int refresh = I830RandRModeRefresh (mode); + if (randrp->maxX == 0 || randrp->maxY == 0) + { + if (maxX < mode->HDisplay) + maxX = mode->HDisplay; + if (maxY < mode->VDisplay) + maxY = mode->VDisplay; + } + if (mode == scrp->modes) + refresh0 = refresh; + pSize = RRRegisterSize (pScreen, + mode->HDisplay, mode->VDisplay, + randrp->mmWidth, randrp->mmHeight); + if (!pSize) + return FALSE; + RRRegisterRate (pScreen, pSize, refresh); + if (mode == scrp->currentMode && + mode->HDisplay == scrp->virtualX && mode->VDisplay == scrp->virtualY) + RRSetCurrentConfig (pScreen, randrp->rotation, refresh, pSize); + if (mode->next == scrp->modes) + break; + } + + if (randrp->maxX == 0 || randrp->maxY == 0) + { + randrp->maxX = maxX; + randrp->maxY = maxY; + } + + if (scrp->currentMode->HDisplay != randrp->virtualX || + scrp->currentMode->VDisplay != randrp->virtualY) + { + mode = scrp->modes; + pSize = RRRegisterSize (pScreen, + randrp->virtualX, randrp->virtualY, + randrp->mmWidth, + randrp->mmHeight); + if (!pSize) + return FALSE; + RRRegisterRate (pScreen, pSize, refresh0); + if (scrp->virtualX == randrp->virtualX && + scrp->virtualY == randrp->virtualY) + { + RRSetCurrentConfig (pScreen, randrp->rotation, refresh0, pSize); + } + } + + /* If there is driver support for randr, let it set our supported rotations */ + if(scrp->RRFunc) { + xorgRRRotation RRRotation; + + RRRotation.RRRotations = *rotations; + if (!(*scrp->RRFunc)(scrp, RR_GET_INFO, &RRRotation)) + return FALSE; + *rotations = RRRotation.RRRotations; + } + + return TRUE; +} + +static Bool +I830RandRSetMode (ScreenPtr pScreen, + DisplayModePtr mode, + Bool useVirtual, + int mmWidth, + int mmHeight) +{ + ScrnInfoPtr scrp = XF86SCRNINFO(pScreen); + XF86RandRInfoPtr randrp = XF86RANDRINFO(pScreen); + int oldWidth = pScreen->width; + int oldHeight = pScreen->height; + int oldmmWidth = pScreen->mmWidth; + int oldmmHeight = pScreen->mmHeight; + WindowPtr pRoot = WindowTable[pScreen->myNum]; + DisplayModePtr currentMode = NULL; + Bool ret = TRUE; + PixmapPtr pspix = NULL; + + if (pRoot) + (*scrp->EnableDisableFBAccess) (pScreen->myNum, FALSE); + if (useVirtual) + { + scrp->virtualX = randrp->virtualX; + scrp->virtualY = randrp->virtualY; + } + else + { + scrp->virtualX = mode->HDisplay; + scrp->virtualY = mode->VDisplay; + } + if(randrp->rotation & (RR_Rotate_90 | RR_Rotate_270)) + { + /* If the screen is rotated 90 or 270 degrees, swap the sizes. */ + pScreen->width = scrp->virtualY; + pScreen->height = scrp->virtualX; + pScreen->mmWidth = mmHeight; + pScreen->mmHeight = mmWidth; + } + else + { + pScreen->width = scrp->virtualX; + pScreen->height = scrp->virtualY; + pScreen->mmWidth = mmWidth; + pScreen->mmHeight = mmHeight; + } + if (scrp->currentMode == mode) { + /* Save current mode */ + currentMode = scrp->currentMode; + /* Reset, just so we ensure the drivers SwitchMode is called */ + scrp->currentMode = NULL; + } + /* + * We assume that if the driver failed to SwitchMode to the rotated + * version, then it should revert back to it's prior mode... Mmm... + */ + if (!xf86SwitchMode (pScreen, mode)) + { + ret = FALSE; + scrp->virtualX = pScreen->width = oldWidth; + scrp->virtualY = pScreen->height = oldHeight; + pScreen->mmWidth = oldmmWidth; + pScreen->mmHeight = oldmmHeight; + scrp->currentMode = currentMode; + } + /* + * Get the new Screen pixmap ptr as SwitchMode might have called + * ModifyPixmapHeader and xf86EnableDisableFBAccess will put it back... + * Unfortunately. + */ + pspix = (*pScreen->GetScreenPixmap) (pScreen); + if (pspix->devPrivate.ptr) + scrp->pixmapPrivate = pspix->devPrivate; + + /* + * Make sure the layout is correct + */ + xf86ReconfigureLayout(); + + /* + * Make sure the whole screen is visible + */ + xf86SetViewport (pScreen, pScreen->width, pScreen->height); + xf86SetViewport (pScreen, 0, 0); + if (pRoot) + (*scrp->EnableDisableFBAccess) (pScreen->myNum, TRUE); + return ret; +} + +Bool +I830RandRSetConfig (ScreenPtr pScreen, + Rotation rotation, + int rate, + RRScreenSizePtr pSize) +{ + ScrnInfoPtr scrp = XF86SCRNINFO(pScreen); + XF86RandRInfoPtr randrp = XF86RANDRINFO(pScreen); + DisplayModePtr mode; + int px, py; + Bool useVirtual = FALSE; + int maxX = 0, maxY = 0; + Rotation oldRotation = randrp->rotation; + + randrp->rotation = rotation; + + if (randrp->virtualX == -1 || randrp->virtualY == -1) + { + randrp->virtualX = scrp->virtualX; + randrp->virtualY = scrp->virtualY; + } + + miPointerPosition (&px, &py); + for (mode = scrp->modes; ; mode = mode->next) + { + if (randrp->maxX == 0 || randrp->maxY == 0) + { + if (maxX < mode->HDisplay) + maxX = mode->HDisplay; + if (maxY < mode->VDisplay) + maxY = mode->VDisplay; + } + if (mode->HDisplay == pSize->width && + mode->VDisplay == pSize->height && + (rate == 0 || I830RandRModeRefresh (mode) == rate)) + break; + if (mode->next == scrp->modes) + { + if (pSize->width == randrp->virtualX && + pSize->height == randrp->virtualY) + { + mode = scrp->modes; + useVirtual = TRUE; + break; + } + if (randrp->maxX == 0 || randrp->maxY == 0) + { + randrp->maxX = maxX; + randrp->maxY = maxY; + } + return FALSE; + } + } + + if (randrp->maxX == 0 || randrp->maxY == 0) + { + randrp->maxX = maxX; + randrp->maxY = maxY; + } + + /* Have the driver do its thing. */ + if (scrp->RRFunc) { + xorgRRRotation RRRotation; + RRRotation.RRConfig.rotation = rotation; + RRRotation.RRConfig.rate = rate; + RRRotation.RRConfig.width = pSize->width; + RRRotation.RRConfig.height = pSize->height; + + if (!(*scrp->RRFunc)(scrp, RR_SET_CONFIG, &RRRotation)) + return FALSE; + } + + if (!I830RandRSetMode (pScreen, mode, useVirtual, pSize->mmWidth, pSize->mmHeight)) { + randrp->rotation = oldRotation; + return FALSE; + } + + /* + * Move the cursor back where it belongs; SwitchMode repositions it + */ + if (pScreen == miPointerCurrentScreen ()) + { + px = (px >= pScreen->width ? (pScreen->width - 1) : px); + py = (py >= pScreen->height ? (pScreen->height - 1) : py); + + xf86SetViewport(pScreen, px, py); + + (*pScreen->SetCursorPosition) (pScreen, px, py, FALSE); + } + + return TRUE; +} + +Rotation +I830GetRotation(ScreenPtr pScreen) +{ + XF86RandRInfoPtr randrp = XF86RANDRINFO(pScreen); + + return randrp->rotation; +} + +Bool +I830RandRInit (ScreenPtr pScreen, int rotation) +{ + rrScrPrivPtr rp; + XF86RandRInfoPtr randrp; + ScrnInfoPtr scrp = XF86SCRNINFO(pScreen); + +#ifdef PANORAMIX + /* XXX disable RandR when using Xinerama */ + if (!noPanoramiXExtension) + return TRUE; +#endif + if (i830RandRGeneration != serverGeneration) + { + i830RandRIndex = AllocateScreenPrivateIndex(); + i830RandRGeneration = serverGeneration; + } + + randrp = xalloc (sizeof (XF86RandRInfoRec)); + if (!randrp) + return FALSE; + + if (!RRScreenInit(pScreen)) + { + xfree (randrp); + return FALSE; + } + rp = rrGetScrPriv(pScreen); + rp->rrGetInfo = I830RandRGetInfo; + rp->rrSetConfig = I830RandRSetConfig; + + randrp->virtualX = -1; + randrp->virtualY = -1; + randrp->mmWidth = pScreen->mmWidth; + randrp->mmHeight = pScreen->mmHeight; + + randrp->rotation = RR_Rotate_0; /* initial rotated mode */ + + randrp->supported_rotations = rotation; + + randrp->maxX = randrp->maxY = 0; + + pScreen->devPrivates[i830RandRIndex].ptr = randrp; + + return TRUE; +} + +#ifdef XFree86LOADER +static MODULESETUPPROTO(intelrandrSetup); + +static XF86ModuleVersionInfo intelrandrVersRec = +{ + "intel_randr", + "Tungsten Graphics, Inc", + MODINFOSTRING1, + MODINFOSTRING2, + XF86_VERSION_CURRENT, + INTEL_MAJOR_VERSION, INTEL_MINOR_VERSION, INTEL_PATCHLEVEL, + ABI_CLASS_EXTENSION, + ABI_EXTENSION_VERSION, + MOD_CLASS_EXTENSION, + {0,0,0,0} +}; + +XF86ModuleData intel_randrModuleData = { &intelrandrVersRec, intelrandrSetup, NULL }; + +ModuleInfoRec INTELRANDR = { + 1, + "INTELRANDR", + NULL, + 0, + NULL, +}; + +/*ARGSUSED*/ +static pointer +intelrandrSetup(pointer Module, pointer Options, int *ErrorMajor, int *ErrorMinor) +{ + static Bool Initialised = FALSE; + + if (!Initialised) { + Initialised = TRUE; +#ifndef REMOVE_LOADER_CHECK_MODULE_INFO + if (xf86LoaderCheckSymbol("xf86AddModuleInfo")) +#endif + xf86AddModuleInfo(&INTELRANDR, Module); + } + + return (pointer)TRUE; +} +#endif From 9e387ef92be9b38c68bda8a6a28b0d9eb98d53a4 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Fri, 12 May 2006 13:41:38 -0700 Subject: [PATCH 02/70] Re-add authorship note in i830_driver.c accidentally left out of last commit. --- src/i830_driver.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/i830_driver.c b/src/i830_driver.c index 43b33fc5..1886c52a 100644 --- a/src/i830_driver.c +++ b/src/i830_driver.c @@ -150,6 +150,12 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. * 09/2005 Alan Hourihane * - Add Intel(R) 945GM support. * + * 10/2005 Alan Hourihane, Keith Whitwell, Brian Paul + * - Added Rotation support + * + * 12/2005 Alan Hourihane + * - Add Intel(R) Broadwater support. + * */ #ifdef HAVE_CONFIG_H From 88558ebeed12d6cefd73bba0ddac3c043861ac89 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Fri, 12 May 2006 15:00:17 -0700 Subject: [PATCH 03/70] Start fixing up the build and remove a regression from master (I think) in rotation. --- src/Makefile.am | 5 ++++- src/i810_driver.c | 9 --------- src/i830.h | 2 ++ src/i830_agp.c | 4 +++- src/i830_driver.c | 1 + src/i830_rotate.c | 9 ++++++--- 6 files changed, 16 insertions(+), 14 deletions(-) diff --git a/src/Makefile.am b/src/Makefile.am index c64c2036..1680123a 100644 --- a/src/Makefile.am +++ b/src/Makefile.am @@ -44,6 +44,7 @@ i810_drv_la_SOURCES = \ i810_video.c \ i810_wmark.c \ i830_accel.c \ + i830_agp.c \ i830_common.h \ i830_cursor.c \ i830_dga.c \ @@ -54,7 +55,9 @@ i810_drv_la_SOURCES = \ i830_modes.c \ i830_video.c \ i830_rotate.c \ - i830_randr.c + i830_randr.c \ + intel_randr.c \ + intel_acpi.c if DRI i810_drv_la_SOURCES += \ diff --git a/src/i810_driver.c b/src/i810_driver.c index cf3725a9..37c20d80 100644 --- a/src/i810_driver.c +++ b/src/i810_driver.c @@ -327,13 +327,6 @@ const char *I810driSymbols[] = { NULL }; -#ifdef XF86DRI - -const char *I810shadowFBSymbols[] = { - "ShadowFBInit", - NULL -}; - const char *I810shadowSymbols[] = { "shadowInit", "shadowSetup", @@ -341,8 +334,6 @@ const char *I810shadowSymbols[] = { NULL }; -#endif - #endif /* I830_ONLY */ #ifndef I810_DEBUG diff --git a/src/i830.h b/src/i830.h index 2ff20a7c..29506eae 100644 --- a/src/i830.h +++ b/src/i830.h @@ -47,6 +47,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #ifndef _I830_H_ #define _I830_H_ +#include "xf86_OSproc.h" #include "compiler.h" #include "xf86PciInfo.h" #include "xf86Pci.h" @@ -220,6 +221,7 @@ typedef struct _I830Rec { #endif unsigned int LinearAlloc; + XF86ModReqInfo shadowReq; /* to test for later libshadow */ I830MemRange RotatedMem; I830MemRange RotatedMem2; Rotation rotation; diff --git a/src/i830_agp.c b/src/i830_agp.c index b10af0e1..aba5bcf7 100644 --- a/src/i830_agp.c +++ b/src/i830_agp.c @@ -13,11 +13,13 @@ #include #include #elif defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__) +#include #include #include +#include +#include #endif -#include "X.h" #include "xf86.h" #include "xf86_OSproc.h" #include "i830.h" diff --git a/src/i830_driver.c b/src/i830_driver.c index 1886c52a..f4cdfdcf 100644 --- a/src/i830_driver.c +++ b/src/i830_driver.c @@ -169,6 +169,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #include #include #include +#include #include "xf86.h" #include "xf86_OSproc.h" diff --git a/src/i830_rotate.c b/src/i830_rotate.c index 9c91cc40..1f1d7291 100644 --- a/src/i830_rotate.c +++ b/src/i830_rotate.c @@ -680,10 +680,13 @@ I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode) 0 }; - if (IS_I9XX(pI830)) - func = I915UpdateRotate; + if (pI830->noAccel) + func = LoaderSymbol("shadowUpdateRotatePacked"); else - func = I830UpdateRotate; + if (IS_I9XX(pI830)) + func = I915UpdateRotate; + else + func = I830UpdateRotate; if (I830IsPrimary(pScrn)) { pI8301 = pI830; From 2cd6c8fa2321ca217ef89db1027dbe9e716ad7aa Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Fri, 12 May 2006 15:37:44 -0700 Subject: [PATCH 04/70] Revert internal shadow module changes back like master, along with RandR initialization. RandR initialization retains the no-rotation setting for BW. --- src/i830_dri.c | 3 +-- src/i830_driver.c | 53 +++++++++++++++-------------------------------- src/i830_rotate.c | 26 ++++++++--------------- 3 files changed, 27 insertions(+), 55 deletions(-) diff --git a/src/i830_dri.c b/src/i830_dri.c index e3fcc970..b82eae63 100644 --- a/src/i830_dri.c +++ b/src/i830_dri.c @@ -974,8 +974,7 @@ I830DRIFinishScreenInit(ScreenPtr pScreen) */ #if 0 if (pI830->allowPageFlip && pI830->drmMinor >= 1) { - I830shadowSetup(pScreen); - I830shadowAdd(pScreen, 0, I830DRIShadowUpdate, 0, 0, 0); + shadowAdd(pScreen, 0, I830DRIShadowUpdate, 0, 0, 0); } else #endif diff --git a/src/i830_driver.c b/src/i830_driver.c index f4cdfdcf..8671e5ae 100644 --- a/src/i830_driver.c +++ b/src/i830_driver.c @@ -5372,44 +5372,25 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) pI830->CloseScreen = pScreen->CloseScreen; pScreen->CloseScreen = I830BIOSCloseScreen; -#if 1 /* ROTATION */ - { - Bool init = TRUE; - - if (!xf86LoadSubModule(pScrn, "intel_randr")) - init = FALSE; - -#if 0 - if (!xf86LoadSubModule(pScrn, "i830_damage")) - init = FALSE; - - if (!xf86LoadSubModule(pScrn, "i830_shadow")) - init = FALSE; -#endif - - if (init && xf86LoaderCheckSymbol("I830RandRInit")) { - Bool (*I830RandRInit)(ScreenPtr pScreen, int rotation) = NULL; - - I830RandRInit = LoaderSymbol("I830RandRInit"); - - if (I830RandRInit) { - xf86DisableRandR(); /* Disable built-in RandR extension */ - I830shadowSetup(pScreen); - if (IS_BROADWATER(pI830)) - /* only 0 degrees for Broadwater */ - (*I830RandRInit)(pScreen, RR_Rotate_0); - else - /* support all rotations */ - (*I830RandRInit)(pScreen, RR_Rotate_0 | RR_Rotate_90 | RR_Rotate_180 | RR_Rotate_270); - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Intel: RandR enabled, ignore the following RandR disabled message.\n"); - pI830->PointerMoved = pScrn->PointerMoved; - pScrn->PointerMoved = I830PointerMoved; - pI830->CreateScreenResources = pScreen->CreateScreenResources; - pScreen->CreateScreenResources = I830CreateScreenResources; - } + if (pI830->shadowReq.minorversion >= 1) { + /* Rotation */ + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "RandR enabled, ignore the following RandR disabled message.\n"); + xf86DisableRandR(); /* Disable built-in RandR extension */ + shadowSetup(pScreen); + /* support all rotations */ + if (IS_BROADWATER(pI830)) { + I830RandRInit(pScreen, RR_Rotate_0); /* only 0 degrees for Broadwater */ + } else { + I830RandRInit(pScreen, RR_Rotate_0 | RR_Rotate_90 | RR_Rotate_180 | RR_Rotate_270); } + pI830->PointerMoved = pScrn->PointerMoved; + pScrn->PointerMoved = I830PointerMoved; + pI830->CreateScreenResources = pScreen->CreateScreenResources; + pScreen->CreateScreenResources = I830CreateScreenResources; + } else { + /* Rotation */ + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "libshadow is version %d.%d.%d, required 1.1.0 or greater for rotation.\n",pI830->shadowReq.majorversion,pI830->shadowReq.minorversion,pI830->shadowReq.patchlevel); } -#endif if (serverGeneration == 1) xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options); diff --git a/src/i830_rotate.c b/src/i830_rotate.c index 1f1d7291..d0d9cf2d 100644 --- a/src/i830_rotate.c +++ b/src/i830_rotate.c @@ -702,13 +702,7 @@ I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode) pScrn2 = pScrn; } - if (xf86LoaderCheckSymbol("I830GetRotation")) { - Rotation (*I830GetRotation)(ScreenPtr pScreen) = NULL; - I830GetRotation = LoaderSymbol("I830GetRotation"); - if (I830GetRotation) { - pI830->rotation = (*I830GetRotation)(pScrn->pScreen); - } - } + pI830->rotation = I830GetRotation(pScrn->pScreen); /* Check if we've still got the same orientation, or same mode */ if (pI830->rotation == oldRotation && pI830->currentMode == mode) @@ -853,12 +847,11 @@ I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode) } } - I830shadowUnset (pScrn->pScreen); + shadowRemove (pScrn->pScreen, NULL); if (pI830->rotation != RR_Rotate_0) - I830shadowSet (pScrn->pScreen, - (*pScrn->pScreen->GetScreenPixmap) (pScrn->pScreen), - pI830->noAccel ? I830shadowUpdateRotatePacked : func, - I830WindowLinear, pI830->rotation, 0); + shadowAdd (pScrn->pScreen, + (*pScrn->pScreen->GetScreenPixmap) (pScrn->pScreen), + func, I830WindowLinear, pI830->rotation, 0); if (I830IsPrimary(pScrn)) { if (pI830->rotation != RR_Rotate_0) @@ -1063,12 +1056,11 @@ BAIL0: I830BindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key, pI8301->RotatedMem.Offset); } - I830shadowUnset (pScrn->pScreen); + shadowRemove (pScrn->pScreen, NULL); if (pI830->rotation != RR_Rotate_0) - I830shadowSet (pScrn->pScreen, - (*pScrn->pScreen->GetScreenPixmap) (pScrn->pScreen), - pI830->noAccel ? I830shadowUpdateRotatePacked : func, - I830WindowLinear, pI830->rotation, 0); + shadowAdd (pScrn->pScreen, + (*pScrn->pScreen->GetScreenPixmap) (pScrn->pScreen), + func, I830WindowLinear, pI830->rotation, 0); if (I830IsPrimary(pScrn)) { if (pI830->rotation != RR_Rotate_0) From 2e58aa401dfbab438752038a9034df571c8f8bde Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Fri, 12 May 2006 15:54:37 -0700 Subject: [PATCH 05/70] Make the intel_acpi.c code non-modular and make it compile. I think we'll end up nuking this code anyway, as keithp (and I, as well) disagree about how ACPI should be handled, but the goal is to compile at the moment. --- src/i830_driver.c | 14 +------------ src/intel_acpi.c | 52 ++++++----------------------------------------- 2 files changed, 7 insertions(+), 59 deletions(-) diff --git a/src/i830_driver.c b/src/i830_driver.c index 8671e5ae..ca76a68c 100644 --- a/src/i830_driver.c +++ b/src/i830_driver.c @@ -2110,22 +2110,10 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags) if (pScrn->numEntities != 1) return FALSE; - if (!xf86LoadSubModule(pScrn, "intel_acpi")) - return FALSE; - /* try to load the video kernel module now */ xf86LoadKernelModule("video"); - if (xf86LoaderCheckSymbol("I830ACPIOpen")) { - void (*acpiOpen)(void) = NULL; - - acpiOpen = LoaderSymbol("I830ACPIOpen"); - - if (acpiOpen) { - ErrorF("Opening ACPI\n"); - (*acpiOpen)(); - } - } + I830ACPIOpen(); /* Load int10 module */ if (!xf86LoadSubModule(pScrn, "int10")) diff --git a/src/intel_acpi.c b/src/intel_acpi.c index e7014b28..1cd6c97b 100644 --- a/src/intel_acpi.c +++ b/src/intel_acpi.c @@ -1,3 +1,7 @@ +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + #ifndef XFree86LOADER #include #include @@ -5,7 +9,8 @@ #endif #include #include -#include "X.h" +#include +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" @@ -184,48 +189,3 @@ I830CloseACPI(void) I830ACPIihPtr = NULL; } } - -#ifdef XFree86LOADER -static MODULESETUPPROTO(intel_acpiSetup); - -static XF86ModuleVersionInfo intel_acpiVersRec = -{ - "intel_acpi", - "Tungsten Graphics, Inc", - MODINFOSTRING1, - MODINFOSTRING2, - XF86_VERSION_CURRENT, - INTEL_MAJOR_VERSION, INTEL_MINOR_VERSION, INTEL_PATCHLEVEL, - ABI_CLASS_EXTENSION, - ABI_EXTENSION_VERSION, - MOD_CLASS_EXTENSION, - {0,0,0,0} -}; - -XF86ModuleData intel_acpiModuleData = { &intel_acpiVersRec, intel_acpiSetup, NULL }; - -ModuleInfoRec INTELACPI = { - 1, - "INTELACPI", - NULL, - 0, - NULL, -}; - -/*ARGSUSED*/ -static pointer -intel_acpiSetup(pointer Module, pointer Options, int *ErrorMajor, int *ErrorMinor) -{ - static Bool Initialised = FALSE; - - if (!Initialised) { - Initialised = TRUE; -#ifndef REMOVE_LOADER_CHECK_MODULE_INFO - if (xf86LoaderCheckSymbol("xf86AddModuleInfo")) -#endif - xf86AddModuleInfo(&INTELACPI, Module); - } - - return (pointer)TRUE; -} -#endif From 78b95386b630039864b31954ebcd02ec8829b0c8 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Fri, 12 May 2006 16:09:40 -0700 Subject: [PATCH 06/70] Remove intel_randr.c and stick with the previous code. Broadwater shouldn't be changing our randr, and the new version didn't compile. --- src/Makefile.am | 1 - src/intel_randr.c | 424 ---------------------------------------------- 2 files changed, 425 deletions(-) delete mode 100644 src/intel_randr.c diff --git a/src/Makefile.am b/src/Makefile.am index 1680123a..ad861e7e 100644 --- a/src/Makefile.am +++ b/src/Makefile.am @@ -56,7 +56,6 @@ i810_drv_la_SOURCES = \ i830_video.c \ i830_rotate.c \ i830_randr.c \ - intel_randr.c \ intel_acpi.c if DRI diff --git a/src/intel_randr.c b/src/intel_randr.c deleted file mode 100644 index 950a1226..00000000 --- a/src/intel_randr.c +++ /dev/null @@ -1,424 +0,0 @@ -/* $XdotOrg: xc/programs/Xserver/hw/xfree86/common/xf86RandR.c,v 1.3 2004/07/30 21:53:09 eich Exp $ */ -/* - * $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86RandR.c,v 1.7tsi Exp $ - * - * Copyright © 2002 Keith Packard, member of The XFree86 Project, Inc. - * - * Permission to use, copy, modify, distribute, and sell this software and its - * documentation for any purpose is hereby granted without fee, provided that - * the above copyright notice appear in all copies and that both that - * copyright notice and this permission notice appear in supporting - * documentation, and that the name of Keith Packard not be used in - * advertising or publicity pertaining to distribution of the software without - * specific, written prior permission. Keith Packard makes no - * representations about the suitability of this software for any purpose. It - * is provided "as is" without express or implied warranty. - * - * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO - * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR - * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, - * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER - * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR - * PERFORMANCE OF THIS SOFTWARE. - */ - -#include "X.h" -#include "os.h" -#include "mibank.h" -#include "globals.h" -#include "xf86.h" -#include "xf86Priv.h" -#include "xf86DDC.h" -#include "mipointer.h" -#include "windowstr.h" -#include "mivalidate.h" -#include - -#include "i830.h" - -typedef struct _i830RandRInfo { - int virtualX; - int virtualY; - int mmWidth; - int mmHeight; - int maxX; - int maxY; - Rotation rotation; /* current mode */ - Rotation supported_rotations; /* driver supported */ -} XF86RandRInfoRec, *XF86RandRInfoPtr; - -static int i830RandRIndex; -static int i830RandRGeneration; - -#define XF86RANDRINFO(p) ((XF86RandRInfoPtr) (p)->devPrivates[i830RandRIndex].ptr) - -static int -I830RandRModeRefresh (DisplayModePtr mode) -{ - if (mode->VRefresh) - return (int) (mode->VRefresh + 0.5); - else - return (int) (mode->Clock * 1000.0 / mode->HTotal / mode->VTotal + 0.5); -} - -static Bool -I830RandRGetInfo (ScreenPtr pScreen, Rotation *rotations) -{ - RRScreenSizePtr pSize; - ScrnInfoPtr scrp = XF86SCRNINFO(pScreen); - XF86RandRInfoPtr randrp = XF86RANDRINFO(pScreen); - DisplayModePtr mode; - int refresh0 = 60; - int maxX = 0, maxY = 0; - - *rotations = randrp->supported_rotations; - - if (randrp->virtualX == -1 || randrp->virtualY == -1) - { - randrp->virtualX = scrp->virtualX; - randrp->virtualY = scrp->virtualY; - } - - for (mode = scrp->modes; ; mode = mode->next) - { - int refresh = I830RandRModeRefresh (mode); - if (randrp->maxX == 0 || randrp->maxY == 0) - { - if (maxX < mode->HDisplay) - maxX = mode->HDisplay; - if (maxY < mode->VDisplay) - maxY = mode->VDisplay; - } - if (mode == scrp->modes) - refresh0 = refresh; - pSize = RRRegisterSize (pScreen, - mode->HDisplay, mode->VDisplay, - randrp->mmWidth, randrp->mmHeight); - if (!pSize) - return FALSE; - RRRegisterRate (pScreen, pSize, refresh); - if (mode == scrp->currentMode && - mode->HDisplay == scrp->virtualX && mode->VDisplay == scrp->virtualY) - RRSetCurrentConfig (pScreen, randrp->rotation, refresh, pSize); - if (mode->next == scrp->modes) - break; - } - - if (randrp->maxX == 0 || randrp->maxY == 0) - { - randrp->maxX = maxX; - randrp->maxY = maxY; - } - - if (scrp->currentMode->HDisplay != randrp->virtualX || - scrp->currentMode->VDisplay != randrp->virtualY) - { - mode = scrp->modes; - pSize = RRRegisterSize (pScreen, - randrp->virtualX, randrp->virtualY, - randrp->mmWidth, - randrp->mmHeight); - if (!pSize) - return FALSE; - RRRegisterRate (pScreen, pSize, refresh0); - if (scrp->virtualX == randrp->virtualX && - scrp->virtualY == randrp->virtualY) - { - RRSetCurrentConfig (pScreen, randrp->rotation, refresh0, pSize); - } - } - - /* If there is driver support for randr, let it set our supported rotations */ - if(scrp->RRFunc) { - xorgRRRotation RRRotation; - - RRRotation.RRRotations = *rotations; - if (!(*scrp->RRFunc)(scrp, RR_GET_INFO, &RRRotation)) - return FALSE; - *rotations = RRRotation.RRRotations; - } - - return TRUE; -} - -static Bool -I830RandRSetMode (ScreenPtr pScreen, - DisplayModePtr mode, - Bool useVirtual, - int mmWidth, - int mmHeight) -{ - ScrnInfoPtr scrp = XF86SCRNINFO(pScreen); - XF86RandRInfoPtr randrp = XF86RANDRINFO(pScreen); - int oldWidth = pScreen->width; - int oldHeight = pScreen->height; - int oldmmWidth = pScreen->mmWidth; - int oldmmHeight = pScreen->mmHeight; - WindowPtr pRoot = WindowTable[pScreen->myNum]; - DisplayModePtr currentMode = NULL; - Bool ret = TRUE; - PixmapPtr pspix = NULL; - - if (pRoot) - (*scrp->EnableDisableFBAccess) (pScreen->myNum, FALSE); - if (useVirtual) - { - scrp->virtualX = randrp->virtualX; - scrp->virtualY = randrp->virtualY; - } - else - { - scrp->virtualX = mode->HDisplay; - scrp->virtualY = mode->VDisplay; - } - if(randrp->rotation & (RR_Rotate_90 | RR_Rotate_270)) - { - /* If the screen is rotated 90 or 270 degrees, swap the sizes. */ - pScreen->width = scrp->virtualY; - pScreen->height = scrp->virtualX; - pScreen->mmWidth = mmHeight; - pScreen->mmHeight = mmWidth; - } - else - { - pScreen->width = scrp->virtualX; - pScreen->height = scrp->virtualY; - pScreen->mmWidth = mmWidth; - pScreen->mmHeight = mmHeight; - } - if (scrp->currentMode == mode) { - /* Save current mode */ - currentMode = scrp->currentMode; - /* Reset, just so we ensure the drivers SwitchMode is called */ - scrp->currentMode = NULL; - } - /* - * We assume that if the driver failed to SwitchMode to the rotated - * version, then it should revert back to it's prior mode... Mmm... - */ - if (!xf86SwitchMode (pScreen, mode)) - { - ret = FALSE; - scrp->virtualX = pScreen->width = oldWidth; - scrp->virtualY = pScreen->height = oldHeight; - pScreen->mmWidth = oldmmWidth; - pScreen->mmHeight = oldmmHeight; - scrp->currentMode = currentMode; - } - /* - * Get the new Screen pixmap ptr as SwitchMode might have called - * ModifyPixmapHeader and xf86EnableDisableFBAccess will put it back... - * Unfortunately. - */ - pspix = (*pScreen->GetScreenPixmap) (pScreen); - if (pspix->devPrivate.ptr) - scrp->pixmapPrivate = pspix->devPrivate; - - /* - * Make sure the layout is correct - */ - xf86ReconfigureLayout(); - - /* - * Make sure the whole screen is visible - */ - xf86SetViewport (pScreen, pScreen->width, pScreen->height); - xf86SetViewport (pScreen, 0, 0); - if (pRoot) - (*scrp->EnableDisableFBAccess) (pScreen->myNum, TRUE); - return ret; -} - -Bool -I830RandRSetConfig (ScreenPtr pScreen, - Rotation rotation, - int rate, - RRScreenSizePtr pSize) -{ - ScrnInfoPtr scrp = XF86SCRNINFO(pScreen); - XF86RandRInfoPtr randrp = XF86RANDRINFO(pScreen); - DisplayModePtr mode; - int px, py; - Bool useVirtual = FALSE; - int maxX = 0, maxY = 0; - Rotation oldRotation = randrp->rotation; - - randrp->rotation = rotation; - - if (randrp->virtualX == -1 || randrp->virtualY == -1) - { - randrp->virtualX = scrp->virtualX; - randrp->virtualY = scrp->virtualY; - } - - miPointerPosition (&px, &py); - for (mode = scrp->modes; ; mode = mode->next) - { - if (randrp->maxX == 0 || randrp->maxY == 0) - { - if (maxX < mode->HDisplay) - maxX = mode->HDisplay; - if (maxY < mode->VDisplay) - maxY = mode->VDisplay; - } - if (mode->HDisplay == pSize->width && - mode->VDisplay == pSize->height && - (rate == 0 || I830RandRModeRefresh (mode) == rate)) - break; - if (mode->next == scrp->modes) - { - if (pSize->width == randrp->virtualX && - pSize->height == randrp->virtualY) - { - mode = scrp->modes; - useVirtual = TRUE; - break; - } - if (randrp->maxX == 0 || randrp->maxY == 0) - { - randrp->maxX = maxX; - randrp->maxY = maxY; - } - return FALSE; - } - } - - if (randrp->maxX == 0 || randrp->maxY == 0) - { - randrp->maxX = maxX; - randrp->maxY = maxY; - } - - /* Have the driver do its thing. */ - if (scrp->RRFunc) { - xorgRRRotation RRRotation; - RRRotation.RRConfig.rotation = rotation; - RRRotation.RRConfig.rate = rate; - RRRotation.RRConfig.width = pSize->width; - RRRotation.RRConfig.height = pSize->height; - - if (!(*scrp->RRFunc)(scrp, RR_SET_CONFIG, &RRRotation)) - return FALSE; - } - - if (!I830RandRSetMode (pScreen, mode, useVirtual, pSize->mmWidth, pSize->mmHeight)) { - randrp->rotation = oldRotation; - return FALSE; - } - - /* - * Move the cursor back where it belongs; SwitchMode repositions it - */ - if (pScreen == miPointerCurrentScreen ()) - { - px = (px >= pScreen->width ? (pScreen->width - 1) : px); - py = (py >= pScreen->height ? (pScreen->height - 1) : py); - - xf86SetViewport(pScreen, px, py); - - (*pScreen->SetCursorPosition) (pScreen, px, py, FALSE); - } - - return TRUE; -} - -Rotation -I830GetRotation(ScreenPtr pScreen) -{ - XF86RandRInfoPtr randrp = XF86RANDRINFO(pScreen); - - return randrp->rotation; -} - -Bool -I830RandRInit (ScreenPtr pScreen, int rotation) -{ - rrScrPrivPtr rp; - XF86RandRInfoPtr randrp; - ScrnInfoPtr scrp = XF86SCRNINFO(pScreen); - -#ifdef PANORAMIX - /* XXX disable RandR when using Xinerama */ - if (!noPanoramiXExtension) - return TRUE; -#endif - if (i830RandRGeneration != serverGeneration) - { - i830RandRIndex = AllocateScreenPrivateIndex(); - i830RandRGeneration = serverGeneration; - } - - randrp = xalloc (sizeof (XF86RandRInfoRec)); - if (!randrp) - return FALSE; - - if (!RRScreenInit(pScreen)) - { - xfree (randrp); - return FALSE; - } - rp = rrGetScrPriv(pScreen); - rp->rrGetInfo = I830RandRGetInfo; - rp->rrSetConfig = I830RandRSetConfig; - - randrp->virtualX = -1; - randrp->virtualY = -1; - randrp->mmWidth = pScreen->mmWidth; - randrp->mmHeight = pScreen->mmHeight; - - randrp->rotation = RR_Rotate_0; /* initial rotated mode */ - - randrp->supported_rotations = rotation; - - randrp->maxX = randrp->maxY = 0; - - pScreen->devPrivates[i830RandRIndex].ptr = randrp; - - return TRUE; -} - -#ifdef XFree86LOADER -static MODULESETUPPROTO(intelrandrSetup); - -static XF86ModuleVersionInfo intelrandrVersRec = -{ - "intel_randr", - "Tungsten Graphics, Inc", - MODINFOSTRING1, - MODINFOSTRING2, - XF86_VERSION_CURRENT, - INTEL_MAJOR_VERSION, INTEL_MINOR_VERSION, INTEL_PATCHLEVEL, - ABI_CLASS_EXTENSION, - ABI_EXTENSION_VERSION, - MOD_CLASS_EXTENSION, - {0,0,0,0} -}; - -XF86ModuleData intel_randrModuleData = { &intelrandrVersRec, intelrandrSetup, NULL }; - -ModuleInfoRec INTELRANDR = { - 1, - "INTELRANDR", - NULL, - 0, - NULL, -}; - -/*ARGSUSED*/ -static pointer -intelrandrSetup(pointer Module, pointer Options, int *ErrorMajor, int *ErrorMinor) -{ - static Bool Initialised = FALSE; - - if (!Initialised) { - Initialised = TRUE; -#ifndef REMOVE_LOADER_CHECK_MODULE_INFO - if (xf86LoaderCheckSymbol("xf86AddModuleInfo")) -#endif - xf86AddModuleInfo(&INTELRANDR, Module); - } - - return (pointer)TRUE; -} -#endif From 0cb251fadca1cbb3d4c5b97982cd0d8c2fc3e840 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Fri, 12 May 2006 16:10:02 -0700 Subject: [PATCH 07/70] Do a couple of reverts to get the DRI code building. At this point, the whole driver builds. --- src/i830_dri.c | 17 ++++++++--------- src/i830_dri.h | 4 ++++ 2 files changed, 12 insertions(+), 9 deletions(-) diff --git a/src/i830_dri.c b/src/i830_dri.c index b82eae63..2eacc5b4 100644 --- a/src/i830_dri.c +++ b/src/i830_dri.c @@ -444,12 +444,13 @@ I830CheckDRIAvailable(ScrnInfoPtr pScrn) int major, minor, patch; DRIQueryVersion(&major, &minor, &patch); - if (major != 4 || minor < 0) { + if (major != DRIINFO_MAJOR_VERSION || minor < DRIINFO_MINOR_VERSION) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[dri] %s failed because of a version mismatch.\n" - "[dri] libDRI version is %d.%d.%d but version 4.0.x is needed.\n" + "[dri] libDRI version is %d.%d.%d but version %d.%d.x is needed.\n" "[dri] Disabling DRI.\n", - "I830CheckDRIAvailable", major, minor, patch); + "I830CheckDRIAvailable", major, minor, patch, + DRIINFO_MAJOR_VERSION, DRIINFO_MINOR_VERSION); return FALSE; } } @@ -495,10 +496,10 @@ I830DRIScreenInit(ScreenPtr pScreen) ((pciConfigPtr) pI830->PciInfo->thisCard)->devnum, ((pciConfigPtr) pI830->PciInfo->thisCard)->funcnum); } - pDRIInfo->ddxDriverMajorVersion = INTEL_MAJOR_VERSION; - pDRIInfo->ddxDriverMinorVersion = INTEL_MINOR_VERSION; - pDRIInfo->ddxDriverPatchVersion = INTEL_PATCHLEVEL; - pDRIInfo->frameBufferPhysicalAddress = pI830->LinearAddr + + pDRIInfo->ddxDriverMajorVersion = I830_MAJOR_VERSION; + pDRIInfo->ddxDriverMinorVersion = I830_MINOR_VERSION; + pDRIInfo->ddxDriverPatchVersion = I830_PATCHLEVEL; + pDRIInfo->frameBufferPhysicalAddress = (pointer) pI830->LinearAddr + pI830->FrontBuffer.Start; #if 0 pDRIInfo->frameBufferSize = ROUND_TO_PAGE(pScrn->displayWidth * @@ -542,8 +543,6 @@ I830DRIScreenInit(ScreenPtr pScreen) pDRIInfo->InitBuffers = I830DRIInitBuffers; pDRIInfo->MoveBuffers = I830DRIMoveBuffers; pDRIInfo->bufferRequests = DRI_ALL_WINDOWS; - pDRIInfo->OpenFullScreen = I830DRIOpenFullScreen; - pDRIInfo->CloseFullScreen = I830DRICloseFullScreen; pDRIInfo->TransitionTo2d = I830DRITransitionTo2d; pDRIInfo->TransitionTo3d = I830DRITransitionTo3d; pDRIInfo->TransitionSingleToMulti3D = I830DRITransitionSingleToMulti3d; diff --git a/src/i830_dri.h b/src/i830_dri.h index 281013b3..66e9525d 100644 --- a/src/i830_dri.h +++ b/src/i830_dri.h @@ -9,6 +9,10 @@ #define I830_MAX_DRAWABLES 256 +#define I830_MAJOR_VERSION 1 +#define I830_MINOR_VERSION 5 +#define I830_PATCHLEVEL 1 + #define I830_REG_SIZE 0x80000 typedef struct _I830DRIRec { From a115c4b872a385530dcf94b7e7f2fa9b3b7e3155 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Fri, 12 May 2006 16:11:29 -0700 Subject: [PATCH 08/70] Remove the code that changes our behavior based on whether a magic file exists with magic contents in /tmp (created by some install script). --- src/i830_driver.c | 41 ----------------------------------------- 1 file changed, 41 deletions(-) diff --git a/src/i830_driver.c b/src/i830_driver.c index ca76a68c..d36ff3ea 100644 --- a/src/i830_driver.c +++ b/src/i830_driver.c @@ -3112,47 +3112,6 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags) SetPipeAccess(pScrn); - /* - * Using the installation script we need to find out if we've just been - * installed, and if so, default to the native panel resolutions, otherwise - * we'll default to whatever existed or the default monitor settings - * that's inbuilt into the Xserver. - */ - { - FILE *f; - if ((f = fopen("/tmp/.newinstallation", "r"))) { - char data[2]; - fgets(data, 2, f); - if (data[0] == 48) { /* First time */ - /* Ignore our monitors horizsync and vertrefresh - * settings when we've detected a new installation - * and we're on a flat panel, therefore we should - * start with the native panels resolution - */ -#if 0 - if ((pI830->pipe == 1) && - (pI830->operatingDevices & (PIPE_LFP << 8))) { -#else - /* Changed this to only work on LFP only systems - * as the other devices may not support the LFP's - * resolution. - */ - if ((pI830->pipe == 1) && - (pI830->operatingDevices == (PIPE_LFP << 8))) { -#endif - pScrn->monitor->nHsync = 0; - pScrn->monitor->nVrefresh = 0; - xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "Detected new installation of driver, defaulting to LFP panel size.\n"); - } - } - fclose(f); - f = fopen("/tmp/.newinstallation", "w"); - fputc(49, f); - fclose(f); - } - } - /* Check we have an LFP connected, before trying to * read PanelID information. */ if ( (pI830->pipe == 1 && pI830->operatingDevices & (PIPE_LFP << 8)) || From 4c727254da354cfd6f35148a334d046d67a50e99 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Fri, 12 May 2006 16:26:58 -0700 Subject: [PATCH 09/70] Remove the local, renamed copy of lnx_agp.c. The diff between lnx_agp.c and it appeared to be removal of bugfixes. --- src/Makefile.am | 1 - src/i830.h | 16 -- src/i830_agp.c | 366 ---------------------------------------------- src/i830_driver.c | 2 +- src/i830_memory.c | 38 ++--- src/i830_rotate.c | 42 +++--- 6 files changed, 41 insertions(+), 424 deletions(-) delete mode 100644 src/i830_agp.c diff --git a/src/Makefile.am b/src/Makefile.am index ad861e7e..f1726f11 100644 --- a/src/Makefile.am +++ b/src/Makefile.am @@ -44,7 +44,6 @@ i810_drv_la_SOURCES = \ i810_video.c \ i810_wmark.c \ i830_accel.c \ - i830_agp.c \ i830_common.h \ i830_cursor.c \ i830_dga.c \ diff --git a/src/i830.h b/src/i830.h index 29506eae..cc26149d 100644 --- a/src/i830.h +++ b/src/i830.h @@ -460,8 +460,6 @@ extern Bool I830DoPoolAllocation(ScrnInfoPtr pScrn, I830MemPool *pool); extern Bool I830FixupOffsets(ScrnInfoPtr pScrn); extern Bool I830BindAGPMemory(ScrnInfoPtr pScrn); extern Bool I830UnbindAGPMemory(ScrnInfoPtr pScrn); -extern Bool I830BindGARTMemory(int screenNum, int key, unsigned long offset); -extern Bool I830UnbindGARTMemory(int screenNum, int key); extern unsigned long I830AllocVidMem(ScrnInfoPtr pScrn, I830MemRange *result, I830MemPool *pool, long size, unsigned long alignment, int flags); @@ -482,20 +480,6 @@ extern int I830GetBestRefresh(ScrnInfoPtr pScrn, int refresh); extern Bool I830CheckModeSupport(ScrnInfoPtr pScrn, int x, int y, int mode); extern Bool I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode); extern Bool I830FixOffset(ScrnInfoPtr pScrn, I830MemRange *mem); - -/* AGP */ -extern Bool I830AgpGARTSupported(void); -extern AgpInfoPtr I830GetAGPInfo(int screenNum); -extern Bool I830AcquireGART(int screenNum); -extern Bool I830ReleaseGART(int screenNum); -extern int I830AllocateGARTMemory(int screenNum, unsigned long size, int type, - unsigned long *physical); -extern Bool I830DeallocateGARTMemory(int screenNum, int key); -extern Bool I830BindGARTMemory(int screenNum, int key, unsigned long offset); -extern Bool I830UnbindGARTMemory(int screenNum, int key); -extern Bool I830EnableAGP(int screenNum, CARD32 mode); -extern Bool I830GARTCloseScreen(int screenNum); - /* * 12288 is set as the maximum, chosen because it is enough for * 1920x1440@32bpp with a 2048 pixel line pitch with some to spare. diff --git a/src/i830_agp.c b/src/i830_agp.c deleted file mode 100644 index aba5bcf7..00000000 --- a/src/i830_agp.c +++ /dev/null @@ -1,366 +0,0 @@ -/* - * Abstraction of the AGP GART interface. - * - * This version is for both Linux and FreeBSD. - * - * Copyright © 2000 VA Linux Systems, Inc. - * Copyright © 2001 The XFree86 Project, Inc. - */ - -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_agp.c,v 3.11 2003/04/03 22:47:42 dawes Exp $ */ - -#if defined(linux) -#include -#include -#elif defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__) -#include -#include -#include -#include -#include -#endif - -#include "xf86.h" -#include "xf86_OSproc.h" -#include "i830.h" - - -#ifndef AGP_DEVICE -#define AGP_DEVICE "/dev/agpgart" -#endif -/* AGP page size is independent of the host page size. */ -#ifndef AGP_PAGE_SIZE -#define AGP_PAGE_SIZE 4096 -#endif -#define AGPGART_MAJOR_VERSION 0 -#define AGPGART_MINOR_VERSION 99 - -static int gartFd = -1; -static int acquiredScreen = -1; -static Bool initDone = FALSE; -/* - * Close /dev/agpgart. This frees all associated memory allocated during - * this server generation. - */ -Bool -I830GARTCloseScreen(int screenNum) -{ - if(gartFd != -1) { - close(gartFd); - acquiredScreen = -1; - gartFd = -1; - initDone = FALSE; - } - return TRUE; -} - -/* - * Open /dev/agpgart. Keep it open until I830GARTCloseScreen is called. - */ -static Bool -GARTInit(int screenNum) -{ - struct _agp_info agpinf; - - if (initDone) - return (gartFd != -1); - - initDone = TRUE; - - if (gartFd == -1) - gartFd = open(AGP_DEVICE, O_RDWR, 0); - else - return FALSE; - - if (gartFd == -1) { - xf86DrvMsg(screenNum, X_ERROR, - "I830GARTInit: Unable to open " AGP_DEVICE " (%s)\n", - strerror(errno)); - return FALSE; - } - - I830AcquireGART(-1); - /* Check the kernel driver version. */ - if (ioctl(gartFd, AGPIOC_INFO, &agpinf) != 0) { - xf86DrvMsg(screenNum, X_ERROR, - "I830GARTInit: AGPIOC_INFO failed (%s)\n", strerror(errno)); - close(gartFd); - gartFd = -1; - return FALSE; - } - I830ReleaseGART(-1); - -#if defined(linux) - /* Per Dave Jones, every effort will be made to keep the - * agpgart interface backwards compatible, so allow all - * future versions. - */ - if ( -#if (AGPGART_MAJOR_VERSION > 0) /* quiet compiler */ - agpinf.version.major < AGPGART_MAJOR_VERSION || -#endif - (agpinf.version.major == AGPGART_MAJOR_VERSION && - agpinf.version.minor < AGPGART_MINOR_VERSION)) { - xf86DrvMsg(screenNum, X_ERROR, - "GARTInit: Kernel agpgart driver version is not current" - " (%d.%d vs %d.%d)\n", - agpinf.version.major, agpinf.version.minor, - AGPGART_MAJOR_VERSION, AGPGART_MINOR_VERSION); - close(gartFd); - gartFd = -1; - return FALSE; - } -#endif - - return TRUE; -} - -Bool -I830AgpGARTSupported() -{ - return GARTInit(-1); -} - -AgpInfoPtr -I830GetAGPInfo(int screenNum) -{ - struct _agp_info agpinf; - AgpInfoPtr info; - - if (!GARTInit(screenNum)) - return NULL; - - - if ((info = xcalloc(sizeof(AgpInfo), 1)) == NULL) { - xf86DrvMsg(screenNum, X_ERROR, - "I830GetAGPInfo: Failed to allocate AgpInfo\n"); - return NULL; - } - - if (ioctl(gartFd, AGPIOC_INFO, &agpinf) != 0) { - xf86DrvMsg(screenNum, X_ERROR, - "I830GetAGPInfo: AGPIOC_INFO failed (%s)\n", - strerror(errno)); - return NULL; - } - - info->bridgeId = agpinf.bridge_id; - info->agpMode = agpinf.agp_mode; - info->base = agpinf.aper_base; - info->size = agpinf.aper_size; - info->totalPages = agpinf.pg_total; - info->systemPages = agpinf.pg_system; - info->usedPages = agpinf.pg_used; - - return info; -} - -/* - * XXX If multiple screens can acquire the GART, should we have a reference - * count instead of using acquiredScreen? - */ - -Bool -I830AcquireGART(int screenNum) -{ - if (screenNum != -1 && !GARTInit(screenNum)) - return FALSE; - - if (screenNum == -1 || acquiredScreen != screenNum) { - if (ioctl(gartFd, AGPIOC_ACQUIRE, 0) != 0) { - xf86DrvMsg(screenNum, X_WARNING, - "I830AcquireGART: AGPIOC_ACQUIRE failed (%s)\n", - strerror(errno)); - return FALSE; - } - acquiredScreen = screenNum; - } - return TRUE; -} - -Bool -I830ReleaseGART(int screenNum) -{ - if (screenNum != -1 && !GARTInit(screenNum)) - return FALSE; - - if (acquiredScreen == screenNum) { - /* - * The FreeBSD agp driver removes allocations on release. - * The Linux driver doesn't. I830ReleaseGART() is expected - * to give up access to the GART, but not to remove any - * allocations. - */ -#if !defined(linux) - if (screenNum == -1) -#endif - { - if (ioctl(gartFd, AGPIOC_RELEASE, 0) != 0) { - xf86DrvMsg(screenNum, X_WARNING, - "I830ReleaseGART: AGPIOC_RELEASE failed (%s)\n", - strerror(errno)); - return FALSE; - } - acquiredScreen = -1; - } - return TRUE; - } - return FALSE; -} - -int -I830AllocateGARTMemory(int screenNum, unsigned long size, int type, - unsigned long *physical) -{ - struct _agp_allocate alloc; - int pages; - - /* - * Allocates "size" bytes of GART memory (rounds up to the next - * page multiple) or type "type". A handle (key) for the allocated - * memory is returned. On error, the return value is -1. - */ - - if (!GARTInit(screenNum) || acquiredScreen != screenNum) - return -1; - - pages = (size / AGP_PAGE_SIZE); - if (size % AGP_PAGE_SIZE != 0) - pages++; - - /* XXX check for pages == 0? */ - - alloc.pg_count = pages; - alloc.type = type; - - if (ioctl(gartFd, AGPIOC_ALLOCATE, &alloc) != 0) { - if (type != 3) - xf86DrvMsg(screenNum, X_WARNING, "I830AllocateGARTMemory: " - "allocation of %d pages failed\n\t(%s)\n", pages, - strerror(errno)); - return -1; - } - - if (physical) - *physical = alloc.physical; - - return alloc.key; -} - -Bool -I830DeallocateGARTMemory(int screenNum, int key) -{ - if (!GARTInit(screenNum) || acquiredScreen != screenNum) - return FALSE; - - if (acquiredScreen != screenNum) { - xf86DrvMsg(screenNum, X_ERROR, - "xf86UnbindGARTMemory: AGP not acquired by this screen\n"); - return FALSE; - } - - if (ioctl(gartFd, AGPIOC_DEALLOCATE, (int *)key) != 0) { - xf86DrvMsg(screenNum, X_WARNING,"I830DeAllocateGARTMemory: " - "deallocation gart memory with key %d failed\n\t(%s)\n", - key, strerror(errno)); - return FALSE; - } - - return TRUE; -} - -/* Bind GART memory with "key" at "offset" */ -Bool -I830BindGARTMemory(int screenNum, int key, unsigned long offset) -{ - struct _agp_bind bind; - int pageOffset; - - if (!GARTInit(screenNum) || acquiredScreen != screenNum) - return FALSE; - - if (acquiredScreen != screenNum) { - xf86DrvMsg(screenNum, X_ERROR, - "I830BindGARTMemory: AGP not acquired by this screen\n"); - return FALSE; - } - - if (offset % AGP_PAGE_SIZE != 0) { - xf86DrvMsg(screenNum, X_WARNING, "I830BindGARTMemory: " - "offset (0x%lx) is not page-aligned (%d)\n", - offset, AGP_PAGE_SIZE); - return FALSE; - } - pageOffset = offset / AGP_PAGE_SIZE; - - xf86DrvMsgVerb(screenNum, X_INFO, 3, - "I830BindGARTMemory: bind key %d at 0x%08lx " - "(pgoffset %d)\n", key, offset, pageOffset); - - bind.pg_start = pageOffset; - bind.key = key; - - if (ioctl(gartFd, AGPIOC_BIND, &bind) != 0) { - xf86DrvMsg(screenNum, X_WARNING, "I830BindGARTMemory: " - "binding of gart memory with key %d\n" - "\tat offset 0x%lx failed (%s)\n", - key, offset, strerror(errno)); - return FALSE; - } - - return TRUE; -} - - -/* Unbind GART memory with "key" */ -Bool -I830UnbindGARTMemory(int screenNum, int key) -{ - struct _agp_unbind unbind; - - if (!GARTInit(screenNum) || acquiredScreen != screenNum) - return FALSE; - - if (acquiredScreen != screenNum) { - xf86DrvMsg(screenNum, X_ERROR, - "I830UnbindGARTMemory: AGP not acquired by this screen\n"); - return FALSE; - } - - unbind.priority = 0; - unbind.key = key; - - if (ioctl(gartFd, AGPIOC_UNBIND, &unbind) != 0) { - xf86DrvMsg(screenNum, X_WARNING, "I830UnbindGARTMemory: " - "unbinding of gart memory with key %d " - "failed (%s)\n", key, strerror(errno)); - return FALSE; - } - - xf86DrvMsgVerb(screenNum, X_INFO, 3, - "I830UnbindGARTMemory: unbind key %d\n", key); - - return TRUE; -} - - -/* XXX Interface may change. */ -Bool -I830EnableAGP(int screenNum, CARD32 mode) -{ - agp_setup setup; - - if (!GARTInit(screenNum) || acquiredScreen != screenNum) - return FALSE; - - setup.agp_mode = mode; - if (ioctl(gartFd, AGPIOC_SETUP, &setup) != 0) { - xf86DrvMsg(screenNum, X_WARNING, "I830EnableAGP: " - "AGPIOC_SETUP with mode %ld failed (%s)\n", - (unsigned long)mode, strerror(errno)); - return FALSE; - } - - return TRUE; -} - diff --git a/src/i830_driver.c b/src/i830_driver.c index d36ff3ea..1e1e02df 100644 --- a/src/i830_driver.c +++ b/src/i830_driver.c @@ -6090,7 +6090,7 @@ I830BIOSCloseScreen(int scrnIndex, ScreenPtr pScreen) } if (I830IsPrimary(pScrn)) { - I830GARTCloseScreen(scrnIndex); + xf86GARTCloseScreen(scrnIndex); xfree(pI830->LpRing); pI830->LpRing = NULL; diff --git a/src/i830_memory.c b/src/i830_memory.c index e5c92151..accc0a76 100644 --- a/src/i830_memory.c +++ b/src/i830_memory.c @@ -210,15 +210,15 @@ AllocFromAGP(ScrnInfoPtr pScrn, I830MemRange *result, long size, return 0; if (flags & NEED_PHYSICAL_ADDR) { - result->Key = I830AllocateGARTMemory(pScrn->scrnIndex, size, 2, + result->Key = xf86AllocateGARTMemory(pScrn->scrnIndex, size, 2, &(result->Physical)); } else { /* Due to a bug in agpgart in 2.6 kernels resulting in very poor * allocation performance we need to workaround it here... */ - result->Key = I830AllocateGARTMemory(pScrn->scrnIndex, size, 3, NULL); + result->Key = xf86AllocateGARTMemory(pScrn->scrnIndex, size, 3, NULL); if (result->Key == -1) - result->Key = I830AllocateGARTMemory(pScrn->scrnIndex, size, 0, NULL); + result->Key = xf86AllocateGARTMemory(pScrn->scrnIndex, size, 0, NULL); } if (result->Key == -1) return 0; @@ -248,7 +248,7 @@ I830FreeVidMem(ScrnInfoPtr pScrn, I830MemRange *range) return; if (range->Key != -1) - I830DeallocateGARTMemory(pScrn->scrnIndex, range->Key); + xf86DeallocateGARTMemory(pScrn->scrnIndex, range->Key); if (range->Pool) { /* @@ -635,7 +635,7 @@ I830Allocate2DMemory(ScrnInfoPtr pScrn, const int flags) BOOLTOSTRING(flags & ALLOC_INITIAL)); if (!pI830->StolenOnly && - (!I830AgpGARTSupported() || !I830AcquireGART(pScrn->scrnIndex))) { + (!xf86AgpGARTSupported() || !xf86AcquireGART(pScrn->scrnIndex))) { if (!dryrun) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "AGP GART support is either not available or cannot " @@ -977,9 +977,9 @@ I830Allocate2DMemory(ScrnInfoPtr pScrn, const int flags) * allocation performance we need to workaround it here... */ pI830->Dummy.Key = - I830AllocateGARTMemory(pScrn->scrnIndex, size, 3, NULL); + xf86AllocateGARTMemory(pScrn->scrnIndex, size, 3, NULL); if (pI830->Dummy.Key == -1) - pI830->Dummy.Key = I830AllocateGARTMemory(pScrn->scrnIndex, size, 0, NULL); + pI830->Dummy.Key = xf86AllocateGARTMemory(pScrn->scrnIndex, size, 0, NULL); pI830->Dummy.Offset = 0; } #endif @@ -1403,10 +1403,10 @@ I830DoPoolAllocation(ScrnInfoPtr pScrn, I830MemPool *pool) * allocation performance we need to workaround it here... */ pool->Allocated.Key = - I830AllocateGARTMemory(pScrn->scrnIndex, pool->Allocated.Size, + xf86AllocateGARTMemory(pScrn->scrnIndex, pool->Allocated.Size, 3, NULL); if (pool->Allocated.Key == -1) - pool->Allocated.Key = I830AllocateGARTMemory(pScrn->scrnIndex, + pool->Allocated.Key = xf86AllocateGARTMemory(pScrn->scrnIndex, pool->Allocated.Size, 0, NULL); if (pool->Allocated.Key == -1) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Pool allocation failed\n"); @@ -1865,7 +1865,7 @@ BindMemRange(ScrnInfoPtr pScrn, I830MemRange *mem) if (mem->Key == -1) return TRUE; - return I830BindGARTMemory(pScrn->scrnIndex, mem->Key, mem->Offset); + return xf86BindGARTMemory(pScrn->scrnIndex, mem->Key, mem->Offset); } Bool @@ -1880,8 +1880,8 @@ I830BindAGPMemory(ScrnInfoPtr pScrn) if (pI830->StolenOnly == TRUE) return TRUE; - if (I830AgpGARTSupported() && !pI830->GttBound) { - if (!I830AcquireGART(pScrn->scrnIndex)) + if (xf86AgpGARTSupported() && !pI830->GttBound) { + if (!xf86AcquireGART(pScrn->scrnIndex)) return FALSE; #if REMAP_RESERVED @@ -1950,7 +1950,7 @@ UnbindMemRange(ScrnInfoPtr pScrn, I830MemRange *mem) if (mem->Key == -1) return TRUE; - return I830UnbindGARTMemory(pScrn->scrnIndex, mem->Key); + return xf86UnbindGARTMemory(pScrn->scrnIndex, mem->Key); } @@ -1966,7 +1966,7 @@ I830UnbindAGPMemory(ScrnInfoPtr pScrn) if (pI830->StolenOnly == TRUE) return TRUE; - if (I830AgpGARTSupported() && pI830->GttBound) { + if (xf86AgpGARTSupported() && pI830->GttBound) { #if REMAP_RESERVED /* "unbind" the pre-allocated region. */ @@ -2019,7 +2019,7 @@ I830UnbindAGPMemory(ScrnInfoPtr pScrn) return FALSE; } #endif - if (!I830ReleaseGART(pScrn->scrnIndex)) + if (!xf86ReleaseGART(pScrn->scrnIndex)) return FALSE; pI830->GttBound = 0; @@ -2034,10 +2034,10 @@ I830CheckAvailableMemory(ScrnInfoPtr pScrn) AgpInfoPtr agpinf; int maxPages; - if (!I830AgpGARTSupported() || - !I830AcquireGART(pScrn->scrnIndex) || - (agpinf = I830GetAGPInfo(pScrn->scrnIndex)) == NULL || - !I830ReleaseGART(pScrn->scrnIndex)) + if (!xf86AgpGARTSupported() || + !xf86AcquireGART(pScrn->scrnIndex) || + (agpinf = xf86GetAGPInfo(pScrn->scrnIndex)) == NULL || + !xf86ReleaseGART(pScrn->scrnIndex)) return -1; maxPages = agpinf->totalPages - agpinf->usedPages; diff --git a/src/i830_rotate.c b/src/i830_rotate.c index d0d9cf2d..82b2c5d9 100644 --- a/src/i830_rotate.c +++ b/src/i830_rotate.c @@ -737,17 +737,17 @@ I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode) if (pI8301->TexMem.Key != -1) - I830UnbindGARTMemory(pScrn1->scrnIndex, pI8301->TexMem.Key); + xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->TexMem.Key); I830FreeVidMem(pScrn1, &(pI8301->TexMem)); if (pI8301->StolenPool.Allocated.Key != -1) { - I830UnbindGARTMemory(pScrn1->scrnIndex, pI8301->StolenPool.Allocated.Key); - I830DeallocateGARTMemory(pScrn1->scrnIndex, pI8301->StolenPool.Allocated.Key); + xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->StolenPool.Allocated.Key); + xf86DeallocateGARTMemory(pScrn1->scrnIndex, pI8301->StolenPool.Allocated.Key); } if (pI8301->DepthBuffer.Key != -1) - I830UnbindGARTMemory(pScrn1->scrnIndex, pI8301->DepthBuffer.Key); + xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->DepthBuffer.Key); I830FreeVidMem(pScrn1, &(pI8301->DepthBuffer)); if (pI8301->BackBuffer.Key != -1) - I830UnbindGARTMemory(pScrn1->scrnIndex, pI8301->BackBuffer.Key); + xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->BackBuffer.Key); I830FreeVidMem(pScrn1, &(pI8301->BackBuffer)); } #endif @@ -756,7 +756,7 @@ I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode) *pI830->used3D |= 1<<31; /* use high bit to denote new rotation occured */ if (pI8301->RotatedMem.Key != -1) - I830UnbindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key); + xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key); I830FreeVidMem(pScrn1, &(pI8301->RotatedMem)); memset(&(pI8301->RotatedMem), 0, sizeof(pI8301->RotatedMem)); @@ -764,7 +764,7 @@ I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode) if (pI830->entityPrivate) { if (pI8301->RotatedMem2.Key != -1) - I830UnbindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem2.Key); + xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem2.Key); I830FreeVidMem(pScrn1, &(pI8301->RotatedMem2)); memset(&(pI8301->RotatedMem2), 0, sizeof(pI8301->RotatedMem2)); @@ -832,7 +832,7 @@ I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode) I830FixOffset(pScrn1, &(pI8301->RotatedMem2)); if (pI8301->RotatedMem2.Key != -1) - I830BindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem2.Key, pI8301->RotatedMem2.Offset); + xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem2.Key, pI8301->RotatedMem2.Offset); } } @@ -843,7 +843,7 @@ I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode) I830FixOffset(pScrn1, &(pI8301->RotatedMem)); if (pI8301->RotatedMem.Key != -1) - I830BindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key, pI8301->RotatedMem.Offset); + xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key, pI8301->RotatedMem.Offset); } } @@ -898,13 +898,13 @@ I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode) I830FixOffset(pScrn1, &(pI8301->DepthBuffer)); if (pI8301->BackBuffer.Key != -1) - I830BindGARTMemory(pScrn1->scrnIndex, pI8301->BackBuffer.Key, pI8301->BackBuffer.Offset); + xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->BackBuffer.Key, pI8301->BackBuffer.Offset); if (pI8301->DepthBuffer.Key != -1) - I830BindGARTMemory(pScrn1->scrnIndex, pI8301->DepthBuffer.Key, pI8301->DepthBuffer.Offset); + xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->DepthBuffer.Key, pI8301->DepthBuffer.Offset); if (pI8301->StolenPool.Allocated.Key != -1) - I830BindGARTMemory(pScrn1->scrnIndex, pI8301->StolenPool.Allocated.Key, pI8301->StolenPool.Allocated.Offset); + xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->StolenPool.Allocated.Key, pI8301->StolenPool.Allocated.Offset); if (pI8301->TexMem.Key != -1) - I830BindGARTMemory(pScrn1->scrnIndex, pI8301->TexMem.Key, pI8301->TexMem.Offset); + xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->TexMem.Key, pI8301->TexMem.Offset); I830SetupMemoryTiling(pScrn1); /* update fence registers */ for (i = 0; i < 8; i++) @@ -992,7 +992,7 @@ BAIL3: BAIL2: if (pI8301->rotation != RR_Rotate_0) { if (pI8301->RotatedMem.Key != -1) - I830UnbindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key); + xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key); I830FreeVidMem(pScrn1, &(pI8301->RotatedMem)); memset(&(pI8301->RotatedMem), 0, sizeof(pI8301->RotatedMem)); @@ -1002,7 +1002,7 @@ BAIL1: if (pI830->entityPrivate) { if (pI8302->rotation != RR_Rotate_0) { if (pI8301->RotatedMem.Key != -1) - I830UnbindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key); + xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key); I830FreeVidMem(pScrn1, &(pI8301->RotatedMem)); memset(&(pI8301->RotatedMem), 0, sizeof(pI8301->RotatedMem)); @@ -1041,7 +1041,7 @@ BAIL0: I830FixOffset(pScrn1, &(pI8301->RotatedMem2)); if (pI8301->RotatedMem2.Key != -1) - I830BindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem2.Key, pI8301->RotatedMem2.Offset); + xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem2.Key, pI8301->RotatedMem2.Offset); } } @@ -1053,7 +1053,7 @@ BAIL0: I830FixOffset(pScrn1, &(pI8301->RotatedMem)); if (pI8301->RotatedMem.Key != -1) - I830BindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key, pI8301->RotatedMem.Offset); + xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key, pI8301->RotatedMem.Offset); } shadowRemove (pScrn->pScreen, NULL); @@ -1132,13 +1132,13 @@ BAIL0: I830FixOffset(pScrn1, &(pI8301->DepthBuffer)); if (pI8301->BackBuffer.Key != -1) - I830BindGARTMemory(pScrn1->scrnIndex, pI8301->BackBuffer.Key, pI8301->BackBuffer.Offset); + xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->BackBuffer.Key, pI8301->BackBuffer.Offset); if (pI8301->DepthBuffer.Key != -1) - I830BindGARTMemory(pScrn1->scrnIndex, pI8301->DepthBuffer.Key, pI8301->DepthBuffer.Offset); + xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->DepthBuffer.Key, pI8301->DepthBuffer.Offset); if (pI8301->StolenPool.Allocated.Key != -1) - I830BindGARTMemory(pScrn1->scrnIndex, pI8301->StolenPool.Allocated.Key, pI8301->StolenPool.Allocated.Offset); + xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->StolenPool.Allocated.Key, pI8301->StolenPool.Allocated.Offset); if (pI8301->TexMem.Key != -1) - I830BindGARTMemory(pScrn1->scrnIndex, pI8301->TexMem.Key, pI8301->TexMem.Offset); + xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->TexMem.Key, pI8301->TexMem.Offset); I830SetupMemoryTiling(pScrn1); /* update fence registers */ for (i = 0; i < 8; i++) From 66875c1559bc20b531ab72e5d6b921d9f50b29f3 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Fri, 5 May 2006 10:15:23 -0700 Subject: [PATCH 10/70] Convert magic numbers in i915 rotation 3D state to symbolic names. --- src/i810_reg.h | 509 +++++++++++++++++++++++++++++++++++++++++++++- src/i830_rotate.c | 150 +++++++++----- 2 files changed, 602 insertions(+), 57 deletions(-) diff --git a/src/i810_reg.h b/src/i810_reg.h index e52375f8..6c9b5bcd 100644 --- a/src/i810_reg.h +++ b/src/i810_reg.h @@ -837,6 +837,9 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define I852_GME 0x2 #define I852_GM 0x5 +#define CMD_MI (0 << 29) +#define CMD_2D (2 << 29) +#define CMD_3D (3 << 29) /* BLT commands */ #define COLOR_BLT_CMD ((2<<29)|(0x40<<22)|(0x3)) #define COLOR_BLT_WRITE_ALPHA (1<<21) @@ -867,14 +870,514 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define XY_MONO_SRC_BLT_WRITE_RGB (1<<20) /* 3d state */ +#define STATE3D_ANTI_ALIASING (CMD_3D | (0x06<<24)) +#define LINE_CAP_WIDTH_MODIFY (1 << 16) +#define LINE_CAP_WIDTH_1_0 (0x1 << 14) +#define LINE_WIDTH_MODIFY (1 << 8) +#define LINE_WIDTH_1_0 (0x1 << 6) + +#define STATE3D_RASTERIZATION_RULES (CMD_3D | (0x07<<24)) +#define ENABLE_POINT_RASTER_RULE (1<<15) +#define OGL_POINT_RASTER_RULE (1<<13) +#define ENABLE_TEXKILL_3D_4D (1<<10) +#define TEXKILL_3D (0<<9) +#define TEXKILL_4D (1<<9) +#define ENABLE_LINE_STRIP_PROVOKE_VRTX (1<<8) +#define ENABLE_TRI_FAN_PROVOKE_VRTX (1<<5) +#define LINE_STRIP_PROVOKE_VRTX(x) ((x)<<6) +#define TRI_FAN_PROVOKE_VRTX(x) ((x)<<3) + +#define STATE3D_INDEPENDENT_ALPHA_BLEND (CMD_3D | (0x0b<<24)) +#define IAB_MODIFY_ENABLE (1<<23) +#define IAB_ENABLE (1<<22) +#define IAB_MODIFY_FUNC (1<<21) +#define IAB_FUNC_SHIFT 16 +#define IAB_MODIFY_SRC_FACTOR (1<<11) +#define IAB_SRC_FACTOR_SHIFT 6 +#define IAB_SRC_FACTOR_MASK (BLENDFACT_MASK<<6) +#define IAB_MODIFY_DST_FACTOR (1<<5) +#define IAB_DST_FACTOR_SHIFT 0 +#define IAB_DST_FACTOR_MASK (BLENDFACT_MASK<<0) + +#define BLENDFUNC_ADD 0x0 +#define BLENDFUNC_SUBTRACT 0x1 +#define BLENDFUNC_REVERSE_SUBTRACT 0x2 +#define BLENDFUNC_MIN 0x3 +#define BLENDFUNC_MAX 0x4 +#define BLENDFUNC_MASK 0x7 + +#define BLENDFACT_ZERO 0x01 +#define BLENDFACT_ONE 0x02 +#define BLENDFACT_SRC_COLR 0x03 +#define BLENDFACT_INV_SRC_COLR 0x04 +#define BLENDFACT_SRC_ALPHA 0x05 +#define BLENDFACT_INV_SRC_ALPHA 0x06 +#define BLENDFACT_DST_ALPHA 0x07 +#define BLENDFACT_INV_DST_ALPHA 0x08 +#define BLENDFACT_DST_COLR 0x09 +#define BLENDFACT_INV_DST_COLR 0x0a +#define BLENDFACT_SRC_ALPHA_SATURATE 0x0b +#define BLENDFACT_CONST_COLOR 0x0c +#define BLENDFACT_INV_CONST_COLOR 0x0d +#define BLENDFACT_CONST_ALPHA 0x0e +#define BLENDFACT_INV_CONST_ALPHA 0x0f +#define BLENDFACT_MASK 0x0f + +#define STATE3D_MODES_4 (CMD_3D | (0x0d<<24)) +#define ENABLE_LOGIC_OP_FUNC (1<<23) +#define LOGIC_OP_FUNC(x) ((x)<<18) +#define LOGICOP_MASK (0xf<<18) +#define MODE4_ENABLE_STENCIL_TEST_MASK ((1<<17)|(0xff00)) +#define ENABLE_STENCIL_TEST_MASK (1<<17) +#define STENCIL_TEST_MASK(x) ((x)<<8) +#define MODE4_ENABLE_STENCIL_WRITE_MASK ((1<<16)|(0x00ff)) +#define ENABLE_STENCIL_WRITE_MASK (1<<16) +#define STENCIL_WRITE_MASK(x) ((x)&0xff) + +#define LOGICOP_CLEAR 0 +#define LOGICOP_NOR 0x1 +#define LOGICOP_AND_INV 0x2 +#define LOGICOP_COPY_INV 0x3 +#define LOGICOP_AND_RVRSE 0x4 +#define LOGICOP_INV 0x5 +#define LOGICOP_XOR 0x6 +#define LOGICOP_NAND 0x7 +#define LOGICOP_AND 0x8 +#define LOGICOP_EQUIV 0x9 +#define LOGICOP_NOOP 0xa +#define LOGICOP_OR_INV 0xb +#define LOGICOP_COPY 0xc +#define LOGICOP_OR_RVRSE 0xd +#define LOGICOP_OR 0xe +#define LOGICOP_SET 0xf + +#define STATE3D_COORD_SET_BINDINGS (CMD_3D | (0x16<<24)) +#define CSB_TCB(iunit,eunit) ((eunit) << ((iunit) * 3)) + +#define STATE3D_SCISSOR_ENABLE (CMD_3D | (0x1c<<24)|(0x10<<19)) +#define ENABLE_SCISSOR_RECT ((1<<1) | 1) +#define DISABLE_SCISSOR_RECT ((1<<1) | 0) + +#define STATE3D_MAP_STATE (CMD_3D | (0x1d<<24)|(0x00<<16)|3) + +#define MS1_MAPMASK_SHIFT 0 +#define MS1_MAPMASK_MASK (0x8fff<<0) + +#define MS2_UNTRUSTED_SURFACE (1<<31) +#define MS2_ADDRESS_MASK 0xfffffffc +#define MS2_VERTICAL_LINE_STRIDE (1<<1) +#define MS2_VERTICAL_OFFSET (1<<1) + +#define MS3_HEIGHT_SHIFT 21 +#define MS3_WIDTH_SHIFT 10 +#define MS3_PALETTE_SELECT (1<<9) +#define MS3_MAPSURF_FORMAT_SHIFT 7 +#define MS3_MAPSURF_FORMAT_MASK (0x7<<7) +#define MAPSURF_8BIT (1<<7) +#define MAPSURF_16BIT (2<<7) +#define MAPSURF_32BIT (3<<7) +#define MAPSURF_422 (5<<7) +#define MAPSURF_COMPRESSED (6<<7) +#define MAPSURF_4BIT_INDEXED (7<<7) +#define MS3_MT_FORMAT_MASK (0x7 << 3) +#define MS3_MT_FORMAT_SHIFT 3 +#define MT_4BIT_IDX_ARGB8888 (7<<3) /* SURFACE_4BIT_INDEXED */ +#define MT_8BIT_I8 (0<<3) /* SURFACE_8BIT */ +#define MT_8BIT_L8 (1<<3) +#define MT_8BIT_A8 (4<<3) +#define MT_8BIT_MONO8 (5<<3) +#define MT_16BIT_RGB565 (0<<3) /* SURFACE_16BIT */ +#define MT_16BIT_ARGB1555 (1<<3) +#define MT_16BIT_ARGB4444 (2<<3) +#define MT_16BIT_AY88 (3<<3) +#define MT_16BIT_88DVDU (5<<3) +#define MT_16BIT_BUMP_655LDVDU (6<<3) +#define MT_16BIT_I16 (7<<3) +#define MT_16BIT_L16 (8<<3) +#define MT_16BIT_A16 (9<<3) +#define MT_32BIT_ARGB8888 (0<<3) /* SURFACE_32BIT */ +#define MT_32BIT_ABGR8888 (1<<3) +#define MT_32BIT_XRGB8888 (2<<3) +#define MT_32BIT_XBGR8888 (3<<3) +#define MT_32BIT_QWVU8888 (4<<3) +#define MT_32BIT_AXVU8888 (5<<3) +#define MT_32BIT_LXVU8888 (6<<3) +#define MT_32BIT_XLVU8888 (7<<3) +#define MT_32BIT_ARGB2101010 (8<<3) +#define MT_32BIT_ABGR2101010 (9<<3) +#define MT_32BIT_AWVU2101010 (0xA<<3) +#define MT_32BIT_GR1616 (0xB<<3) +#define MT_32BIT_VU1616 (0xC<<3) +#define MT_32BIT_xI824 (0xD<<3) +#define MT_32BIT_xA824 (0xE<<3) +#define MT_32BIT_xL824 (0xF<<3) +#define MT_422_YCRCB_SWAPY (0<<3) /* SURFACE_422 */ +#define MT_422_YCRCB_NORMAL (1<<3) +#define MT_422_YCRCB_SWAPUV (2<<3) +#define MT_422_YCRCB_SWAPUVY (3<<3) +#define MT_COMPRESS_DXT1 (0<<3) /* SURFACE_COMPRESSED */ +#define MT_COMPRESS_DXT2_3 (1<<3) +#define MT_COMPRESS_DXT4_5 (2<<3) +#define MT_COMPRESS_FXT1 (3<<3) +#define MT_COMPRESS_DXT1_RGB (4<<3) +#define MS3_USE_FENCE_REGS (1<<2) +#define MS3_TILED_SURFACE (1<<1) +#define MS3_TILE_WALK (1<<0) + +#define MS4_PITCH_SHIFT 21 +#define MS4_CUBE_FACE_ENA_NEGX (1<<20) +#define MS4_CUBE_FACE_ENA_POSX (1<<19) +#define MS4_CUBE_FACE_ENA_NEGY (1<<18) +#define MS4_CUBE_FACE_ENA_POSY (1<<17) +#define MS4_CUBE_FACE_ENA_NEGZ (1<<16) +#define MS4_CUBE_FACE_ENA_POSZ (1<<15) +#define MS4_CUBE_FACE_ENA_MASK (0x3f<<15) +#define MS4_MAX_LOD_SHIFT 9 +#define MS4_MAX_LOD_MASK (0x3f<<9) +#define MS4_MIP_LAYOUT_LEGACY (0<<8) +#define MS4_MIP_LAYOUT_BELOW_LPT (0<<8) +#define MS4_MIP_LAYOUT_RIGHT_LPT (1<<8) +#define MS4_VOLUME_DEPTH_SHIFT 0 +#define MS4_VOLUME_DEPTH_MASK (0xff<<0) + +#define STATE3D_SAMPLER_STATE (CMD_3D | (0x1d<<24)|(0x01<<16) + +#define SS1_MAPMASK_SHIFT 0 +#define SS1_MAPMASK_MASK (0x8fff<<0) + +#define SS2_REVERSE_GAMMA_ENABLE (1<<31) +#define SS2_PACKED_TO_PLANAR_ENABLE (1<<30) +#define SS2_COLORSPACE_CONVERSION (1<<29) +#define SS2_CHROMAKEY_SHIFT 27 +#define SS2_BASE_MIP_LEVEL_SHIFT 22 +#define SS2_BASE_MIP_LEVEL_MASK (0x1f<<22) +#define SS2_MIP_FILTER_SHIFT 20 +#define SS2_MIP_FILTER_MASK (0x3<<20) +#define MIPFILTER_NONE 0 +#define MIPFILTER_NEAREST 1 +#define MIPFILTER_LINEAR 3 +#define SS2_MAG_FILTER_SHIFT 17 +#define SS2_MAG_FILTER_MASK (0x7<<17) +#define FILTER_NEAREST 0 +#define FILTER_LINEAR 1 +#define FILTER_ANISOTROPIC 2 +#define FILTER_4X4_1 3 +#define FILTER_4X4_2 4 +#define FILTER_4X4_FLAT 5 +#define FILTER_6X5_MONO 6 /* XXX - check */ +#define SS2_MIN_FILTER_SHIFT 14 +#define SS2_MIN_FILTER_MASK (0x7<<14) +#define SS2_LOD_BIAS_SHIFT 5 +#define SS2_LOD_BIAS_ONE (0x10<<5) +#define SS2_LOD_BIAS_MASK (0x1ff<<5) +/* Shadow requires: + * MT_X8{I,L,A}24 or MT_{I,L,A}16 texture format + * FILTER_4X4_x MIN and MAG filters + */ +#define SS2_SHADOW_ENABLE (1<<4) +#define SS2_MAX_ANISO_MASK (1<<3) +#define SS2_MAX_ANISO_2 (0<<3) +#define SS2_MAX_ANISO_4 (1<<3) +#define SS2_SHADOW_FUNC_SHIFT 0 +#define SS2_SHADOW_FUNC_MASK (0x7<<0) +/* SS2_SHADOW_FUNC values: see COMPAREFUNC_* */ + +#define SS3_MIN_LOD_SHIFT 24 +#define SS3_MIN_LOD_ONE (0x10<<24) +#define SS3_MIN_LOD_MASK (0xff<<24) +#define SS3_KILL_PIXEL_ENABLE (1<<17) +#define SS3_TCX_ADDR_MODE_SHIFT 12 +#define SS3_TCX_ADDR_MODE_MASK (0x7<<12) +#define TEXCOORDMODE_WRAP 0 +#define TEXCOORDMODE_MIRROR 1 +#define TEXCOORDMODE_CLAMP_EDGE 2 +#define TEXCOORDMODE_CUBE 3 +#define TEXCOORDMODE_CLAMP_BORDER 4 +#define TEXCOORDMODE_MIRROR_ONCE 5 +#define SS3_TCY_ADDR_MODE_SHIFT 9 +#define SS3_TCY_ADDR_MODE_MASK (0x7<<9) +#define SS3_TCZ_ADDR_MODE_SHIFT 6 +#define SS3_TCZ_ADDR_MODE_MASK (0x7<<6) +#define SS3_NORMALIZED_COORDS (1<<5) +#define SS3_TEXTUREMAP_INDEX_SHIFT 1 +#define SS3_TEXTUREMAP_INDEX_MASK (0xf<<1) +#define SS3_DEINTERLACER_ENABLE (1<<0) + +#define SS4_BORDER_COLOR_MASK (~0) + +#define STATE3D_LOAD_STATE_IMMEDIATE_1 (CMD_3D | (0x1d<<24)|(0x04<<16)) +#define I1_LOAD_S(n) (1 << (4 + n)) + +#define STATE3D_PIXEL_SHADER_PROGRAM (CMD_3D | (0x1d<<24)|(0x05<<16)) + +#define REG_TYPE_R 0 /* temporary regs, no need to + * dcl, must be written before + * read -- Preserved between + * phases. + */ +#define REG_TYPE_T 1 /* Interpolated values, must be + * dcl'ed before use. + * + * 0..7: texture coord, + * 8: diffuse spec, + * 9: specular color, + * 10: fog parameter in w. + */ +#define REG_TYPE_CONST 2 /* Restriction: only one const + * can be referenced per + * instruction, though it may be + * selected for multiple inputs. + * Constants not initialized + * default to zero. + */ +#define REG_TYPE_S 3 /* sampler */ +#define REG_TYPE_OC 4 /* output color (rgba) */ +#define REG_TYPE_OD 5 /* output depth (w), xyz are + * temporaries. If not written, + * interpolated depth is used? + */ +#define REG_TYPE_U 6 /* unpreserved temporaries */ +#define REG_TYPE_MASK 0x7 +#define REG_NR_MASK 0xf + + +/* REG_TYPE_T: + */ +#define T_TEX0 0 +#define T_TEX1 1 +#define T_TEX2 2 +#define T_TEX3 3 +#define T_TEX4 4 +#define T_TEX5 5 +#define T_TEX6 6 +#define T_TEX7 7 +#define T_DIFFUSE 8 +#define T_SPECULAR 9 +#define T_FOG_W 10 /* interpolated fog is in W coord */ + +/* Arithmetic instructions */ + +/* .replicate_swizzle == selection and replication of a particular + * scalar channel, ie., .xxxx, .yyyy, .zzzz or .wwww + */ +#define A0_NOP (0x0<<24) /* no operation */ +#define A0_ADD (0x1<<24) /* dst = src0 + src1 */ +#define A0_MOV (0x2<<24) /* dst = src0 */ +#define A0_MUL (0x3<<24) /* dst = src0 * src1 */ +#define A0_MAD (0x4<<24) /* dst = src0 * src1 + src2 */ +#define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ +#define A0_DP3 (0x6<<24) /* dst.xyzw = src0.xyz dot src1.xyz */ +#define A0_DP4 (0x7<<24) /* dst.xyzw = src0.xyzw dot src1.xyzw */ +#define A0_FRC (0x8<<24) /* dst = src0 - floor(src0) */ +#define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ +#define A0_RSQ (0xa<<24) /* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */ +#define A0_EXP (0xb<<24) /* dst.xyzw = exp2(src0.replicate_swizzle) */ +#define A0_LOG (0xc<<24) /* dst.xyzw = log2(abs(src0.replicate_swizzle)) */ +#define A0_CMP (0xd<<24) /* dst = (src0 >= 0.0) ? src1 : src2 */ +#define A0_MIN (0xe<<24) /* dst = (src0 < src1) ? src0 : src1 */ +#define A0_MAX (0xf<<24) /* dst = (src0 >= src1) ? src0 : src1 */ +#define A0_FLR (0x10<<24) /* dst = floor(src0) */ +#define A0_MOD (0x11<<24) /* dst = src0 fmod 1.0 */ +#define A0_TRC (0x12<<24) /* dst = int(src0) */ +#define A0_SGE (0x13<<24) /* dst = src0 >= src1 ? 1.0 : 0.0 */ +#define A0_SLT (0x14<<24) /* dst = src0 < src1 ? 1.0 : 0.0 */ +#define A0_DEST_SATURATE (1<<22) +#define A0_DEST_TYPE_SHIFT 19 +/* Allow: R, OC, OD, U */ +#define A0_DEST_NR_SHIFT 14 +/* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */ +#define A0_DEST_CHANNEL_X (1<<10) +#define A0_DEST_CHANNEL_Y (2<<10) +#define A0_DEST_CHANNEL_Z (4<<10) +#define A0_DEST_CHANNEL_W (8<<10) +#define A0_DEST_CHANNEL_ALL (0xf<<10) +#define A0_DEST_CHANNEL_SHIFT 10 +#define A0_SRC0_TYPE_SHIFT 7 +#define A0_SRC0_NR_SHIFT 2 + +#define A0_DEST_CHANNEL_XY (A0_DEST_CHANNEL_X|A0_DEST_CHANNEL_Y) +#define A0_DEST_CHANNEL_XYZ (A0_DEST_CHANNEL_XY|A0_DEST_CHANNEL_Z) + + +#define SRC_X 0 +#define SRC_Y 1 +#define SRC_Z 2 +#define SRC_W 3 +#define SRC_ZERO 4 +#define SRC_ONE 5 + +#define A1_SRC0_CHANNEL_X_NEGATE (1<<31) +#define A1_SRC0_CHANNEL_X_SHIFT 28 +#define A1_SRC0_CHANNEL_Y_NEGATE (1<<27) +#define A1_SRC0_CHANNEL_Y_SHIFT 24 +#define A1_SRC0_CHANNEL_Z_NEGATE (1<<23) +#define A1_SRC0_CHANNEL_Z_SHIFT 20 +#define A1_SRC0_CHANNEL_W_NEGATE (1<<19) +#define A1_SRC0_CHANNEL_W_SHIFT 16 +#define A1_SRC1_TYPE_SHIFT 13 +#define A1_SRC1_NR_SHIFT 8 +#define A1_SRC1_CHANNEL_X_NEGATE (1<<7) +#define A1_SRC1_CHANNEL_X_SHIFT 4 +#define A1_SRC1_CHANNEL_Y_NEGATE (1<<3) +#define A1_SRC1_CHANNEL_Y_SHIFT 0 + +#define A2_SRC1_CHANNEL_Z_NEGATE (1<<31) +#define A2_SRC1_CHANNEL_Z_SHIFT 28 +#define A2_SRC1_CHANNEL_W_NEGATE (1<<27) +#define A2_SRC1_CHANNEL_W_SHIFT 24 +#define A2_SRC2_TYPE_SHIFT 21 +#define A2_SRC2_NR_SHIFT 16 +#define A2_SRC2_CHANNEL_X_NEGATE (1<<15) +#define A2_SRC2_CHANNEL_X_SHIFT 12 +#define A2_SRC2_CHANNEL_Y_NEGATE (1<<11) +#define A2_SRC2_CHANNEL_Y_SHIFT 8 +#define A2_SRC2_CHANNEL_Z_NEGATE (1<<7) +#define A2_SRC2_CHANNEL_Z_SHIFT 4 +#define A2_SRC2_CHANNEL_W_NEGATE (1<<3) +#define A2_SRC2_CHANNEL_W_SHIFT 0 + + + +/* Texture instructions */ +#define T0_TEXLD (0x15<<24) /* Sample texture using predeclared + * sampler and address, and output + * filtered texel data to destination + * register */ +#define T0_TEXLDP (0x16<<24) /* Same as texld but performs a + * perspective divide of the texture + * coordinate .xyz values by .w before + * sampling. */ +#define T0_TEXLDB (0x17<<24) /* Same as texld but biases the + * computed LOD by w. Only S4.6 two's + * comp is used. This implies that a + * float to fixed conversion is + * done. */ +#define T0_TEXKILL (0x18<<24) /* Does not perform a sampling + * operation. Simply kills the pixel + * if any channel of the address + * register is < 0.0. */ +#define T0_DEST_TYPE_SHIFT 19 +/* Allow: R, OC, OD, U */ +/* Note: U (unpreserved) regs do not retain their values between + * phases (cannot be used for feedback) + * + * Note: oC and OD registers can only be used as the destination of a + * texture instruction once per phase (this is an implementation + * restriction). + */ +#define T0_DEST_NR_SHIFT 14 +/* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */ +#define T0_SAMPLER_NR_SHIFT 0 /* This field ignored for TEXKILL */ +#define T0_SAMPLER_NR_MASK (0xf<<0) + +#define T1_ADDRESS_REG_TYPE_SHIFT 24 /* Reg to use as texture coord */ +/* Allow R, T, OC, OD -- R, OC, OD are 'dependent' reads, new program phase */ +#define T1_ADDRESS_REG_NR_SHIFT 17 +#define T2_MBZ 0 + +/* Declaration instructions */ +#define D0_DCL (0x19<<24) /* Declare a t (interpolated attrib) + * register or an s (sampler) + * register. */ +#define D0_SAMPLE_TYPE_SHIFT 22 +#define D0_SAMPLE_TYPE_2D (0x0<<22) +#define D0_SAMPLE_TYPE_CUBE (0x1<<22) +#define D0_SAMPLE_TYPE_VOLUME (0x2<<22) +#define D0_SAMPLE_TYPE_MASK (0x3<<22) + +#define D0_TYPE_SHIFT 19 +/* Allow: T, S */ +#define D0_NR_SHIFT 14 +/* Allow T: 0..10, S: 0..15 */ +#define D0_CHANNEL_X (1<<10) +#define D0_CHANNEL_Y (2<<10) +#define D0_CHANNEL_Z (4<<10) +#define D0_CHANNEL_W (8<<10) +#define D0_CHANNEL_ALL (0xf<<10) +#define D0_CHANNEL_NONE (0<<10) + +#define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) +#define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z) +/* End description of STATE3D_PIXEL_SHADER_PROGRAM */ + +#define STATE3D_DRAWING_RECTANGLE (CMD_3D | (0x1d<<24)|(0x80<<16)|3) + +#define STATE3D_SCISSOR_RECTANGLE (CMD_3D | (0x1d<<24)|(0x81<<16)|1) + +#define STATE3D_STIPPLE (CMD_3D | (0x1d<<24)|(0x83<<16)) +#define ST1_ENABLE (1<<16) +#define ST1_MASK (0xffff) + +#define STATE3D_DEST_BUFFER_VARIABLES (CMD_3D | (0x1d<<24)|(0x85<<16)) +#define TEX_DEFAULT_COLOR_OGL (0<<30) +#define TEX_DEFAULT_COLOR_D3D (1<<30) +#define ZR_EARLY_DEPTH (1<<29) +#define LOD_PRECLAMP_OGL (1<<28) +#define LOD_PRECLAMP_D3D (0<<28) +#define DITHER_FULL_ALWAYS (0<<26) +#define DITHER_FULL_ON_FB_BLEND (1<<26) +#define DITHER_CLAMPED_ALWAYS (2<<26) +#define LINEAR_GAMMA_BLEND_32BPP (1<<25) +#define DEBUG_DISABLE_ENH_DITHER (1<<24) +#define DSTORG_HORIZ_BIAS(x) ((x)<<20) +#define DSTORG_VERT_BIAS(x) ((x)<<16) +#define COLOR_4_2_2_CHNL_WRT_ALL 0 +#define COLOR_4_2_2_CHNL_WRT_Y (1<<12) +#define COLOR_4_2_2_CHNL_WRT_CR (2<<12) +#define COLOR_4_2_2_CHNL_WRT_CB (3<<12) +#define COLOR_4_2_2_CHNL_WRT_CRCB (4<<12) +#define COLR_BUF_8BIT 0 +#define COLR_BUF_RGB555 (1<<8) +#define COLR_BUF_RGB565 (2<<8) +#define COLR_BUF_ARGB8888 (3<<8) +#define DEPTH_FRMT_16_FIXED 0 +#define DEPTH_FRMT_16_FLOAT (1<<2) +#define DEPTH_FRMT_24_FIXED_8_OTHER (2<<2) +#define VERT_LINE_STRIDE_1 (1<<1) +#define VERT_LINE_STRIDE_0 (0<<1) +#define VERT_LINE_STRIDE_OFS_1 1 +#define VERT_LINE_STRIDE_OFS_0 0 + +#define STATE3D_CONST_BLEND_COLOR (CMD_3D | (0x1d<<24)|(0x88<<16)) + #define STATE3D_FOG_MODE ((3<<29)|(0x1d<<24)|(0x89<<16)|2) #define FOG_MODE_VERTEX (1<<31) #define STATE3D_MAP_COORD_TRANSFORM ((3<<29)|(0x1d<<24)|(0x8c<<16)) + +#define STATE3D_BUFFER_INFO (CMD_3D | (0x1d<<24)|(0x8e<<16)|1) +#define BUFFERID_COLOR_BACK (3 << 24) +#define BUFFERID_COLOR_AUX (4 << 24) +#define BUFFERID_MC_INTRA_CORR (5 << 24) +#define BUFFERID_DEPTH (7 << 24) +#define BUFFER_USE_FENCES (1 << 23) + +#define STATE3D_DFLT_Z_CMD (CMD_3D | (0x1d<<24)|(0x98<<16)) + +#define STATE3D_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24)|(0x99<<16)) + +#define STATE3D_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24)|(0x9a<<16)) + +#define PRIMITIVE3D (CMD_3D | (0x1f<<24)) +#define PRIM3D_INLINE (0<<23) +#define PRIM3D_INDIRECT (1<<23) +#define PRIM3D_TRILIST (0x0<<18) +#define PRIM3D_TRISTRIP (0x1<<18) +#define PRIM3D_TRISTRIP_RVRSE (0x2<<18) +#define PRIM3D_TRIFAN (0x3<<18) +#define PRIM3D_POLY (0x4<<18) +#define PRIM3D_LINELIST (0x5<<18) +#define PRIM3D_LINESTRIP (0x6<<18) +#define PRIM3D_RECTLIST (0x7<<18) +#define PRIM3D_POINTLIST (0x8<<18) +#define PRIM3D_DIB (0x9<<18) +#define PRIM3D_CLEAR_RECT (0xa<<18) +#define PRIM3D_ZONE_INIT (0xd<<18) +#define PRIM3D_MASK (0x1f<<18) + + #define DISABLE_TEX_TRANSFORM (1<<28) #define TEXTURE_SET(x) (x<<29) -#define STATE3D_RASTERIZATION_RULES ((3<<29)|(0x07<<24)) -#define POINT_RASTER_ENABLE (1<<15) -#define POINT_RASTER_OGL (1<<13) + #define STATE3D_VERTEX_TRANSFORM ((3<<29)|(0x1d<<24)|(0x8b<<16)) #define DISABLE_VIEWPORT_TRANSFORM (1<<31) #define DISABLE_PERSPECTIVE_DIVIDE (1<<29) diff --git a/src/i830_rotate.c b/src/i830_rotate.c index e4a80645..3b5ed254 100644 --- a/src/i830_rotate.c +++ b/src/i830_rotate.c @@ -214,6 +214,7 @@ I915UpdateRotate (ScreenPtr pScreen, drm_context_t myContext = 0; #endif Bool didLock = FALSE; + CARD32 format; if (I830IsPrimary(pScrn)) { pI8301 = pI830; @@ -267,86 +268,127 @@ I915UpdateRotate (ScreenPtr pScreen, BEGIN_LP_RING(64); /* invarient state */ OUT_RING(MI_NOOP); - OUT_RING(0x66014140); - OUT_RING(0x7d990000); + OUT_RING(STATE3D_ANTI_ALIASING | + LINE_CAP_WIDTH_MODIFY | LINE_CAP_WIDTH_1_0 | + LINE_WIDTH_MODIFY | LINE_WIDTH_1_0); + + OUT_RING(STATE3D_DFLT_DIFFUSE_CMD); OUT_RING(0x00000000); - OUT_RING(0x7d9a0000); + + OUT_RING(STATE3D_DFLT_SPEC_CMD); OUT_RING(0x00000000); - OUT_RING(0x7d980000); + + OUT_RING(STATE3D_DFLT_Z_CMD); OUT_RING(0x00000000); - OUT_RING(0x76fac688); - OUT_RING(0x6700a770); - OUT_RING(0x7d040081); + + OUT_RING(STATE3D_COORD_SET_BINDINGS | CSB_TCB(0, 0) | CSB_TCB(1, 1) | + CSB_TCB(2,2) | CSB_TCB(3,3) | CSB_TCB(4,4) | CSB_TCB(5,5) | + CSB_TCB(6,6) | CSB_TCB(7,7)); + + OUT_RING(STATE3D_RASTERIZATION_RULES | + ENABLE_TRI_FAN_PROVOKE_VRTX | TRI_FAN_PROVOKE_VRTX(2) | + ENABLE_LINE_STRIP_PROVOKE_VRTX | LINE_STRIP_PROVOKE_VRTX(1) | + ENABLE_TEXKILL_3D_4D | TEXKILL_4D | + ENABLE_POINT_RASTER_RULE | OGL_POINT_RASTER_RULE); + + OUT_RING(STATE3D_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | 1); OUT_RING(0x00000000); + /* flush map & render cache */ OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE); OUT_RING(0x00000000); + /* draw rect */ - OUT_RING(0x7d800003); - OUT_RING(0x00000000); - OUT_RING(0x00000000); - OUT_RING((pScrn->virtualX - 1) | (pScrn->virtualY - 1) << 16); - OUT_RING(0x00000000); - OUT_RING(0x00000000); + OUT_RING(STATE3D_DRAWING_RECTANGLE); + OUT_RING(0x00000000); /* flags */ + OUT_RING(0x00000000); /* ymin, xmin */ + OUT_RING((pScrn->virtualX - 1) | (pScrn->virtualY - 1) << 16); /* ymax, xmax */ + OUT_RING(0x00000000); /* yorigin, xorigin */ + OUT_RING(MI_NOOP); + /* scissor */ - OUT_RING(0x7c800002); - OUT_RING(0x7d810001); - OUT_RING(0x00000000); - OUT_RING(0x00000000); - OUT_RING(0x7c000003); + OUT_RING(STATE3D_SCISSOR_ENABLE | DISABLE_SCISSOR_RECT); + OUT_RING(STATE3D_SCISSOR_RECTANGLE); + OUT_RING(0x00000000); /* ymin, xmin */ + OUT_RING(0x00000000); /* ymax, xmax */ + + OUT_RING(0x7c000003); /* unknown command */ OUT_RING(0x7d070000); OUT_RING(0x00000000); OUT_RING(0x68000002); + /* context setup */ - OUT_RING(0x6db3ffff); - OUT_RING(0x7d040744); + OUT_RING(STATE3D_MODES_4 | + ENABLE_LOGIC_OP_FUNC | LOGIC_OP_FUNC(LOGICOP_COPY) | + ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff) | + ENABLE_STENCIL_TEST_MASK | STENCIL_TEST_MASK(0xff)); + + OUT_RING(STATE3D_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) | + I1_LOAD_S(4) | I1_LOAD_S(5) | I1_LOAD_S(6) | 4); OUT_RING(0xfffffff0); OUT_RING(0x00902c80); OUT_RING(0x00000000); OUT_RING(0x00020216); - OUT_RING(0x6ba008a1); - OUT_RING(0x7d880000); + + OUT_RING(STATE3D_INDEPENDENT_ALPHA_BLEND | + IAB_MODIFY_ENABLE | + IAB_MODIFY_FUNC | (BLENDFUNC_ADD << IAB_FUNC_SHIFT) | + IAB_MODIFY_SRC_FACTOR | (BLENDFACT_ONE << IAB_SRC_FACTOR_SHIFT) | + IAB_MODIFY_DST_FACTOR | (BLENDFACT_ZERO << IAB_DST_FACTOR_SHIFT)); + + OUT_RING(STATE3D_CONST_BLEND_COLOR); OUT_RING(0x00000000); - /* dv0 */ - OUT_RING(0x7d850000); - /* dv1 */ + + OUT_RING(STATE3D_DEST_BUFFER_VARIABLES); if (pI830->cpp == 1) - OUT_RING(0x10880000); + format = COLR_BUF_8BIT; else if (pI830->cpp == 2) - OUT_RING(0x10880200); - else - OUT_RING(0x10880308); - /* stipple */ - OUT_RING(0x7d830000); + format = COLR_BUF_RGB565; + else + format = COLR_BUF_ARGB8888 | DEPTH_FRMT_24_FIXED_8_OTHER; + + OUT_RING(LOD_PRECLAMP_OGL | + DSTORG_HORIZ_BIAS(0x80) | DSTORG_VERT_BIAS(0x80) | format); + + OUT_RING(STATE3D_STIPPLE); OUT_RING(0x00000000); + /* fragment program - texture blend replace*/ - OUT_RING(0x7d050008); - OUT_RING(0x19180000); + OUT_RING(STATE3D_PIXEL_SHADER_PROGRAM | 8); + OUT_RING(D0_DCL | (REG_TYPE_S << D0_TYPE_SHIFT) | (0 << D0_NR_SHIFT)); OUT_RING(0x00000000); OUT_RING(0x00000000); - OUT_RING(0x19083c00); + + OUT_RING(D0_DCL | (REG_TYPE_T << D0_TYPE_SHIFT) | (0 << D0_NR_SHIFT) | + D0_CHANNEL_ALL); OUT_RING(0x00000000); OUT_RING(0x00000000); - OUT_RING(0x15200000); - OUT_RING(0x01000000); + + OUT_RING(T0_TEXLD | (REG_TYPE_OC << T0_DEST_TYPE_SHIFT) | + (0 << T0_SAMPLER_NR_SHIFT)); + OUT_RING((REG_TYPE_T << T1_ADDRESS_REG_TYPE_SHIFT) | + (0 << T1_ADDRESS_REG_NR_SHIFT)); OUT_RING(0x00000000); - /* texture sampler state */ - OUT_RING(0x7d010003); + /* End fragment program */ + + OUT_RING(STATE3D_SAMPLER_STATE | 3); OUT_RING(0x00000001); OUT_RING(0x00000000); OUT_RING(0x00000000); OUT_RING(0x00000000); + /* front buffer, pitch, offset */ - OUT_RING(0x7d8e0001); - OUT_RING(0x03800000 | (((pI830->displayWidth * pI830->cpp) / 4) << 2)); + OUT_RING(STATE3D_BUFFER_INFO); + OUT_RING(BUFFERID_COLOR_BACK | BUFFER_USE_FENCES | + (((pI830->displayWidth * pI830->cpp) / 4) << 2)); if (I830IsPrimary(pScrn)) OUT_RING(pI830->FrontBuffer.Start); else OUT_RING(pI8301->FrontBuffer2.Start); /* Set the entire frontbuffer up as a texture */ - OUT_RING(0x7d000003); - OUT_RING(0x00000001); + OUT_RING(STATE3D_MAP_STATE); + OUT_RING(0x00000001); /* texture map #1 */ if (I830IsPrimary(pScrn)) OUT_RING(pI830->RotatedMem.Start); @@ -356,15 +398,15 @@ I915UpdateRotate (ScreenPtr pScreen, if (pI830->disableTiling) use_fence = 0; else - use_fence = 4; + use_fence = MS3_USE_FENCE_REGS; if (pI830->cpp == 1) - use_fence |= 0x80; /* MAPSURF_8BIT */ + use_fence |= MAPSURF_8BIT; else if (pI830->cpp == 2) - use_fence |= 0x100; /* MAPSURF_16BIT */ + use_fence |= MAPSURF_16BIT; else - use_fence |= 0x180; /* MAPSURF_32BIT */ + use_fence |= MAPSURF_32BIT; OUT_RING(use_fence | (pScreen->height - 1) << 21 | (pScreen->width - 1) << 10); OUT_RING(((((pScrn->displayWidth * pI830->cpp) / 4) - 1) << 21)); ADVANCE_LP_RING(); @@ -395,7 +437,7 @@ I915UpdateRotate (ScreenPtr pScreen, OUT_RING(MI_NOOP); /* vertex data */ - OUT_RING(0x7f0c001f); + OUT_RING(PRIMITIVE3D | PRIM3D_INLINE | PRIM3D_TRIFAN | (32 - 1)); verts[0][0] = box_x1; verts[0][1] = box_y1; verts[1][0] = box_x2; verts[1][1] = box_y1; verts[2][0] = box_x2; verts[2][1] = box_y2; @@ -520,15 +562,15 @@ I830UpdateRotate (ScreenPtr pScreen, OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE); OUT_RING(0x00000000); /* draw rect */ - OUT_RING(0x7d800003); - OUT_RING(0x00000000); - OUT_RING(0x00000000); - OUT_RING((pScrn->virtualX - 1) | (pScrn->virtualY - 1) << 16); - OUT_RING(0x00000000); - OUT_RING(0x00000000); + OUT_RING(STATE3D_DRAWING_RECTANGLE); + OUT_RING(0x00000000); /* flags */ + OUT_RING(0x00000000); /* ymin, xmin */ + OUT_RING((pScrn->virtualX - 1) | (pScrn->virtualY - 1) << 16); /* ymax, xmax */ + OUT_RING(0x00000000); /* yorigin, xorigin */ + OUT_RING(MI_NOOP); /* front buffer */ - OUT_RING(0x7d8e0001); + OUT_RING(STATE3D_BUFFER_INFO); OUT_RING(0x03800000 | (((pI830->displayWidth * pI830->cpp) / 4) << 2)); if (I830IsPrimary(pScrn)) OUT_RING(pI830->FrontBuffer.Start); From 3a2d8af214a79591322ce6e5546f856a1ee41736 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Mon, 8 May 2006 09:42:40 -0700 Subject: [PATCH 11/70] Add initial textured XV support for i915, which can do YUY2 and UYVY, but fails on I420 and YV12 currently, doesn't support the composite extension, and should break XV support on non-i915. --- src/i810_reg.h | 2 +- src/i830_video.c | 296 ++++++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 295 insertions(+), 3 deletions(-) diff --git a/src/i810_reg.h b/src/i810_reg.h index 6c9b5bcd..54536c6a 100644 --- a/src/i810_reg.h +++ b/src/i810_reg.h @@ -1040,7 +1040,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define MS4_VOLUME_DEPTH_SHIFT 0 #define MS4_VOLUME_DEPTH_MASK (0xff<<0) -#define STATE3D_SAMPLER_STATE (CMD_3D | (0x1d<<24)|(0x01<<16) +#define STATE3D_SAMPLER_STATE (CMD_3D | (0x1d<<24)|(0x01<<16)) #define SS1_MAPMASK_SHIFT 0 #define SS1_MAPMASK_MASK (0x8fff<<0) diff --git a/src/i830_video.c b/src/i830_video.c index a608a7e3..ab6b7777 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -1,4 +1,4 @@ -#define VIDEO_DEBUG 0 +#define VIDEO_DEBUG 1 /*************************************************************************** Copyright 2000 Intel Corporation. All Rights Reserved. @@ -84,6 +84,8 @@ THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "dixstruct.h" #include "fourcc.h" +#define USE_TEXTURED_VIDEO + #ifndef USE_USLEEP_FOR_VIDEO #define USE_USLEEP_FOR_VIDEO 0 #endif @@ -1847,6 +1849,278 @@ I830DisplayVideo(ScrnInfoPtr pScrn, int id, short width, short height, OVERLAY_UPDATE; } +/* Doesn't matter on the order for our purposes */ +typedef struct { + unsigned char red, green, blue, alpha; +} intel_color_t; + +/* Vertex format */ +typedef union { + struct { + float x, y, z, w; + intel_color_t color; + intel_color_t specular; + float u0, v0; + float u1, v1; + float u2, v2; + float u3, v3; + } v; + float f[24]; + unsigned int ui[24]; + unsigned char ub4[24][4]; +} intelVertex, *intelVertexPtr; + +static void draw_poly(CARD32 *vb, + float verts[][2], + float texcoords[][2]) +{ + int vertex_size = 8; + intelVertex tmp; + int i, k; + + /* initial constant vertex fields */ + tmp.v.z = 1.0; + tmp.v.w = 1.0; + tmp.v.color.red = 255; + tmp.v.color.green = 255; + tmp.v.color.blue = 255; + tmp.v.color.alpha = 255; + tmp.v.specular.red = 0; + tmp.v.specular.green = 0; + tmp.v.specular.blue = 0; + tmp.v.specular.alpha = 0; + + for (k = 0; k < 4; k++) { + tmp.v.x = verts[k][0]; + tmp.v.y = verts[k][1]; + tmp.v.u0 = texcoords[k][0]; + tmp.v.v0 = texcoords[k][1]; + + for (i = 0 ; i < vertex_size ; i++) + vb[i] = tmp.ui[i]; + + vb += vertex_size; + } +} + +#ifdef USE_TEXTURED_VIDEO +static void +I915DisplayVideoTextured(ScrnInfoPtr pScrn, int id, RegionPtr dstRegion, + short width, short height, int video_offset, + int video_pitch, int x1, int y1, int x2, int y2, + short src_w, short src_h, short drw_w, short drw_h, + DrawablePtr pDraw) +{ + I830Ptr pI830 = I830PTR(pScrn); + CARD32 format, ms3; + BoxPtr pbox; + int nbox, dxo, dyo; + + ErrorF("I915DisplayVideo: %dx%d (pitch %d)\n", width, height, + video_pitch); + + /* XXX: Dirty dri/rotate state */ + BEGIN_LP_RING(64); + /* invarient state */ + OUT_RING(MI_NOOP); + OUT_RING(STATE3D_ANTI_ALIASING | + LINE_CAP_WIDTH_MODIFY | LINE_CAP_WIDTH_1_0 | + LINE_WIDTH_MODIFY | LINE_WIDTH_1_0); + + OUT_RING(STATE3D_DFLT_DIFFUSE_CMD); + OUT_RING(0x00000000); + + OUT_RING(STATE3D_DFLT_SPEC_CMD); + OUT_RING(0x00000000); + + OUT_RING(STATE3D_DFLT_Z_CMD); + OUT_RING(0x00000000); + + OUT_RING(STATE3D_COORD_SET_BINDINGS | CSB_TCB(0, 0) | CSB_TCB(1, 1) | + CSB_TCB(2,2) | CSB_TCB(3,3) | CSB_TCB(4,4) | CSB_TCB(5,5) | + CSB_TCB(6,6) | CSB_TCB(7,7)); + + OUT_RING(STATE3D_RASTERIZATION_RULES | + ENABLE_TRI_FAN_PROVOKE_VRTX | TRI_FAN_PROVOKE_VRTX(2) | + ENABLE_LINE_STRIP_PROVOKE_VRTX | LINE_STRIP_PROVOKE_VRTX(1) | + ENABLE_TEXKILL_3D_4D | TEXKILL_4D | + ENABLE_POINT_RASTER_RULE | OGL_POINT_RASTER_RULE); + + OUT_RING(STATE3D_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | 1); + OUT_RING(0x00000000); + + /* flush map & render cache */ + OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE); + OUT_RING(0x00000000); + + /* draw rect -- just clipping */ + OUT_RING(STATE3D_DRAWING_RECTANGLE); + OUT_RING(0x00000000); /* flags */ + OUT_RING(0x00000000); /* ymin, xmin */ + OUT_RING((pScrn->virtualX - 1) | (pScrn->virtualY - 1) << 16); /* ymax, xmax */ + OUT_RING(0x00000000); /* yorigin, xorigin */ + OUT_RING(MI_NOOP); + + /* scissor */ + OUT_RING(STATE3D_SCISSOR_ENABLE | DISABLE_SCISSOR_RECT); + OUT_RING(STATE3D_SCISSOR_RECTANGLE); + OUT_RING(0x00000000); /* ymin, xmin */ + OUT_RING(0x00000000); /* ymax, xmax */ + + OUT_RING(0x7c000003); /* unknown command */ + OUT_RING(0x7d070000); + OUT_RING(0x00000000); + OUT_RING(0x68000002); + + /* context setup */ + OUT_RING(STATE3D_MODES_4 | + ENABLE_LOGIC_OP_FUNC | LOGIC_OP_FUNC(LOGICOP_COPY) | + ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff) | + ENABLE_STENCIL_TEST_MASK | STENCIL_TEST_MASK(0xff)); + + OUT_RING(STATE3D_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) | + I1_LOAD_S(4) | I1_LOAD_S(5) | I1_LOAD_S(6) | 4); + OUT_RING(0xfffffff0); + OUT_RING(0x00902c80); + OUT_RING(0x00000000); + OUT_RING(0x00020216); + + OUT_RING(STATE3D_INDEPENDENT_ALPHA_BLEND | + IAB_MODIFY_ENABLE | + IAB_MODIFY_FUNC | (BLENDFUNC_ADD << IAB_FUNC_SHIFT) | + IAB_MODIFY_SRC_FACTOR | (BLENDFACT_ONE << IAB_SRC_FACTOR_SHIFT) | + IAB_MODIFY_DST_FACTOR | (BLENDFACT_ZERO << IAB_DST_FACTOR_SHIFT)); + + OUT_RING(STATE3D_CONST_BLEND_COLOR); + OUT_RING(0x00000000); + + OUT_RING(STATE3D_DEST_BUFFER_VARIABLES); + if (pI830->cpp == 2) + format = COLR_BUF_RGB565; + else + format = COLR_BUF_ARGB8888 | DEPTH_FRMT_24_FIXED_8_OTHER; + + OUT_RING(LOD_PRECLAMP_OGL | + DSTORG_HORIZ_BIAS(0x80) | DSTORG_VERT_BIAS(0x80) | format); + + OUT_RING(STATE3D_STIPPLE); + OUT_RING(0x00000000); + + /* fragment program - texture blend replace*/ + OUT_RING(STATE3D_PIXEL_SHADER_PROGRAM | 8); + OUT_RING(D0_DCL | (REG_TYPE_S << D0_TYPE_SHIFT) | (0 << D0_NR_SHIFT)); + OUT_RING(0x00000000); + OUT_RING(0x00000000); + + OUT_RING(D0_DCL | (REG_TYPE_T << D0_TYPE_SHIFT) | (0 << D0_NR_SHIFT) | + D0_CHANNEL_ALL); + OUT_RING(0x00000000); + OUT_RING(0x00000000); + + OUT_RING(T0_TEXLD | (REG_TYPE_OC << T0_DEST_TYPE_SHIFT) | + (0 << T0_SAMPLER_NR_SHIFT)); + OUT_RING((REG_TYPE_T << T1_ADDRESS_REG_TYPE_SHIFT) | + (0 << T1_ADDRESS_REG_NR_SHIFT)); + OUT_RING(0x00000000); + /* End fragment program */ + + OUT_RING(STATE3D_SAMPLER_STATE | 3); + OUT_RING(0x00000001); + OUT_RING(SS2_COLORSPACE_CONVERSION); + OUT_RING(0x00000000); + OUT_RING(0x00000000); + + /* front buffer, pitch, offset */ + OUT_RING(STATE3D_BUFFER_INFO); + OUT_RING(BUFFERID_COLOR_BACK | BUFFER_USE_FENCES | + (((pI830->displayWidth * pI830->cpp) / 4) << 2)); + OUT_RING(pI830->bufferOffset); + + /* Set the entire frontbuffer up as a texture */ + OUT_RING(STATE3D_MAP_STATE); + OUT_RING(0x00000001); /* texture map #1 */ + OUT_RING(video_offset); + + ms3 = MAPSURF_422; + switch (id) { + case FOURCC_YUY2: + ms3 |= MT_422_YCRCB_NORMAL; + break; + case FOURCC_UYVY: + ms3 |= MT_422_YCRCB_SWAPY; + break; + } + ms3 |= (height - 1) << MS3_HEIGHT_SHIFT; + ms3 |= (width - 1) << MS3_WIDTH_SHIFT; + if (!pI830->disableTiling) + ms3 |= MS3_USE_FENCE_REGS; + + OUT_RING(ms3); + OUT_RING(((video_pitch / 4) - 1) << 21); + ADVANCE_LP_RING(); + + { + BEGIN_LP_RING(2); + OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE); + OUT_RING(0x00000000); + ADVANCE_LP_RING(); + } + + dxo = dstRegion->extents.x1; + dyo = dstRegion->extents.y1; + + pbox = REGION_RECTS(dstRegion); + nbox = REGION_NUM_RECTS(dstRegion); + while (nbox--) + { + int box_x1 = pbox->x1; + int box_y1 = pbox->y1; + int box_x2 = pbox->x2; + int box_y2 = pbox->y2; + int j; + float src_scale_x, src_scale_y; + CARD32 vb[32]; + float verts[4][2], tex[4][2]; + + pbox++; + + src_scale_x = (float)src_w / (float)drw_w; + src_scale_y = (float)src_h / (float)drw_h; + + BEGIN_LP_RING(40); + OUT_RING(MI_NOOP); + OUT_RING(MI_NOOP); + OUT_RING(MI_NOOP); + OUT_RING(MI_NOOP); + OUT_RING(MI_NOOP); + OUT_RING(MI_NOOP); + OUT_RING(MI_NOOP); + + /* vertex data */ + OUT_RING(PRIMITIVE3D | PRIM3D_INLINE | PRIM3D_TRIFAN | (32 - 1)); + verts[0][0] = box_x1; verts[0][1] = box_y1; + verts[1][0] = box_x2; verts[1][1] = box_y1; + verts[2][0] = box_x2; verts[2][1] = box_y2; + verts[3][0] = box_x1; verts[3][1] = box_y2; + tex[0][0] = (box_x1 - dxo) * src_scale_x; + tex[0][1] = (box_y1 - dyo) * src_scale_y; + tex[1][0] = (box_x2 - dxo) * src_scale_x; + tex[1][1] = (box_y1 - dyo) * src_scale_y; + tex[2][0] = (box_x2 - dxo) * src_scale_x; + tex[2][1] = (box_y2 - dyo) * src_scale_y; + tex[3][0] = (box_x1 - dxo) * src_scale_x; + tex[3][1] = (box_y2 - dyo) * src_scale_y; + + /* emit vertex buffer */ + draw_poly(vb, verts, tex); + for (j = 0; j < 32; j++) + OUT_RING(vb[j]); + + ADVANCE_LP_RING(); + } +} +#endif /* USE_TEXTURED_VIDEO */ + static FBLinearPtr I830AllocateMemory(ScrnInfoPtr pScrn, FBLinearPtr linear, int size) { @@ -1889,6 +2163,19 @@ I830AllocateMemory(ScrnInfoPtr pScrn, FBLinearPtr linear, int size) return new_linear; } +/* + * The source rectangle of the video is defined by (src_x, src_y, src_w, src_h). + * The dest rectangle of the video is defined by (drw_x, drw_y, drw_w, drw_h). + * id is a fourcc code for the format of the video. + * buf is the pointer to the source data in system memory. + * width and height are the w/h of the source data. + * If "sync" is TRUE, then we must be finished with *buf at the point of return + * (which we always are). + * clipBoxes is the clipping region in screen space. + * data is a pointer to our port private. + * pDraw is a Drawable, which might not be the screen in the case of + * compositing. It's a new argument to the function in the 1.1 server. + */ static int I830PutImage(ScrnInfoPtr pScrn, short src_x, short src_y, @@ -2075,6 +2362,7 @@ I830PutImage(ScrnInfoPtr pScrn, break; } +#ifndef USE_TEXTURED_VIDEO /* update cliplist */ if (!RegionsEqual(&pPriv->clip, clipBoxes)) { REGION_COPY(pScrn->pScreen, &pPriv->clip, clipBoxes); @@ -2083,7 +2371,11 @@ I830PutImage(ScrnInfoPtr pScrn, I830DisplayVideo(pScrn, id, width, height, dstPitch, x1, y1, x2, y2, &dstBox, src_w, src_h, drw_w, drw_h); - +#else + I915DisplayVideoTextured(pScrn, id, clipBoxes, width, height, + pPriv->YBuf0offset, dstPitch, + x1, y1, x2, y2, src_w, src_h, drw_w, drw_h, pDraw); +#endif pPriv->videoStatus = CLIENT_VIDEO_ON; return Success; From b1090a42b200710628dd8b0c7ced15db7bbe71a1 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Mon, 8 May 2006 14:22:00 -0700 Subject: [PATCH 12/70] More magic number reduction in rotation code. --- src/i810_reg.h | 109 +++++++++++++++++++++++++++++++++++++++++++++- src/i830_rotate.c | 24 +++++++--- 2 files changed, 126 insertions(+), 7 deletions(-) diff --git a/src/i810_reg.h b/src/i810_reg.h index 54536c6a..f57d5d81 100644 --- a/src/i810_reg.h +++ b/src/i810_reg.h @@ -958,7 +958,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define ENABLE_SCISSOR_RECT ((1<<1) | 1) #define DISABLE_SCISSOR_RECT ((1<<1) | 0) -#define STATE3D_MAP_STATE (CMD_3D | (0x1d<<24)|(0x00<<16)|3) +#define STATE3D_MAP_STATE (CMD_3D | (0x1d<<24)|(0x00<<16)) #define MS1_MAPMASK_SHIFT 0 #define MS1_MAPMASK_MASK (0x8fff<<0) @@ -1108,6 +1108,113 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define STATE3D_LOAD_STATE_IMMEDIATE_1 (CMD_3D | (0x1d<<24)|(0x04<<16)) #define I1_LOAD_S(n) (1 << (4 + n)) +#define S0_VB_OFFSET_MASK 0xffffffc +#define S0_AUTO_CACHE_INV_DISABLE (1<<0) + +#define S1_VERTEX_WIDTH_SHIFT 24 +#define S1_VERTEX_WIDTH_MASK (0x3f<<24) +#define S1_VERTEX_PITCH_SHIFT 16 +#define S1_VERTEX_PITCH_MASK (0x3f<<16) + +#define TEXCOORDFMT_2D 0x0 +#define TEXCOORDFMT_3D 0x1 +#define TEXCOORDFMT_4D 0x2 +#define TEXCOORDFMT_1D 0x3 +#define TEXCOORDFMT_2D_16 0x4 +#define TEXCOORDFMT_4D_16 0x5 +#define TEXCOORDFMT_NOT_PRESENT 0xf +#define S2_TEXCOORD_FMT0_MASK 0xf +#define S2_TEXCOORD_FMT1_SHIFT 4 +#define S2_TEXCOORD_FMT(unit, type) ((type)<<(unit*4)) +#define S2_TEXCOORD_NONE (~0) + +/* S3 not interesting */ + +#define S4_POINT_WIDTH_SHIFT 23 +#define S4_POINT_WIDTH_MASK (0x1ff<<23) +#define S4_LINE_WIDTH_SHIFT 19 +#define S4_LINE_WIDTH_ONE (0x2<<19) +#define S4_LINE_WIDTH_MASK (0xf<<19) +#define S4_FLATSHADE_ALPHA (1<<18) +#define S4_FLATSHADE_FOG (1<<17) +#define S4_FLATSHADE_SPECULAR (1<<16) +#define S4_FLATSHADE_COLOR (1<<15) +#define S4_CULLMODE_BOTH (0<<13) +#define S4_CULLMODE_NONE (1<<13) +#define S4_CULLMODE_CW (2<<13) +#define S4_CULLMODE_CCW (3<<13) +#define S4_CULLMODE_MASK (3<<13) +#define S4_VFMT_POINT_WIDTH (1<<12) +#define S4_VFMT_SPEC_FOG (1<<11) +#define S4_VFMT_COLOR (1<<10) +#define S4_VFMT_DEPTH_OFFSET (1<<9) +#define S4_VFMT_XYZ (1<<6) +#define S4_VFMT_XYZW (2<<6) +#define S4_VFMT_XY (3<<6) +#define S4_VFMT_XYW (4<<6) +#define S4_VFMT_XYZW_MASK (7<<6) +#define S4_FORCE_DEFAULT_DIFFUSE (1<<5) +#define S4_FORCE_DEFAULT_SPECULAR (1<<4) +#define S4_LOCAL_DEPTH_OFFSET_ENABLE (1<<3) +#define S4_VFMT_FOG_PARAM (1<<2) +#define S4_SPRITE_POINT_ENABLE (1<<1) +#define S4_LINE_ANTIALIAS_ENABLE (1<<0) + +#define S4_VFMT_MASK (S4_VFMT_POINT_WIDTH | \ + S4_VFMT_SPEC_FOG | \ + S4_VFMT_COLOR | \ + S4_VFMT_DEPTH_OFFSET | \ + S4_VFMT_XYZW_MASK | \ + S4_VFMT_FOG_PARAM) + + +#define S5_WRITEDISABLE_ALPHA (1<<31) +#define S5_WRITEDISABLE_RED (1<<30) +#define S5_WRITEDISABLE_GREEN (1<<29) +#define S5_WRITEDISABLE_BLUE (1<<28) +#define S5_WRITEDISABLE_MASK (0xf<<28) +#define S5_FORCE_DEFAULT_POINT_SIZE (1<<27) +#define S5_LAST_PIXEL_ENABLE (1<<26) +#define S5_GLOBAL_DEPTH_OFFSET_ENABLE (1<<25) +#define S5_FOG_ENABLE (1<<24) +#define S5_STENCIL_REF_SHIFT 16 +#define S5_STENCIL_REF_MASK (0xff<<16) +#define S5_STENCIL_TEST_FUNC_SHIFT 13 +#define S5_STENCIL_TEST_FUNC_MASK (0x7<<13) +#define S5_STENCIL_FAIL_SHIFT 10 +#define S5_STENCIL_FAIL_MASK (0x7<<10) +#define S5_STENCIL_PASS_Z_FAIL_SHIFT 7 +#define S5_STENCIL_PASS_Z_FAIL_MASK (0x7<<7) +#define S5_STENCIL_PASS_Z_PASS_SHIFT 4 +#define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) +#define S5_STENCIL_WRITE_ENABLE (1<<3) +#define S5_STENCIL_TEST_ENABLE (1<<2) +#define S5_COLOR_DITHER_ENABLE (1<<1) +#define S5_LOGICOP_ENABLE (1<<0) + + +#define S6_ALPHA_TEST_ENABLE (1<<31) +#define S6_ALPHA_TEST_FUNC_SHIFT 28 +#define S6_ALPHA_TEST_FUNC_MASK (0x7<<28) +#define S6_ALPHA_REF_SHIFT 20 +#define S6_ALPHA_REF_MASK (0xff<<20) +#define S6_DEPTH_TEST_ENABLE (1<<19) +#define S6_DEPTH_TEST_FUNC_SHIFT 16 +#define S6_DEPTH_TEST_FUNC_MASK (0x7<<16) +#define S6_CBUF_BLEND_ENABLE (1<<15) +#define S6_CBUF_BLEND_FUNC_SHIFT 12 +#define S6_CBUF_BLEND_FUNC_MASK (0x7<<12) +#define S6_CBUF_SRC_BLEND_FACT_SHIFT 8 +#define S6_CBUF_SRC_BLEND_FACT_MASK (0xf<<8) +#define S6_CBUF_DST_BLEND_FACT_SHIFT 4 +#define S6_CBUF_DST_BLEND_FACT_MASK (0xf<<4) +#define S6_DEPTH_WRITE_ENABLE (1<<3) +#define S6_COLOR_WRITE_ENABLE (1<<2) +#define S6_TRISTRIP_PV_SHIFT 0 +#define S6_TRISTRIP_PV_MASK (0x3<<0) + +#define S7_DEPTH_OFFSET_CONST_MASK ~0 + #define STATE3D_PIXEL_SHADER_PROGRAM (CMD_3D | (0x1d<<24)|(0x05<<16)) #define REG_TYPE_R 0 /* temporary regs, no need to diff --git a/src/i830_rotate.c b/src/i830_rotate.c index 3b5ed254..cd02fbc2 100644 --- a/src/i830_rotate.c +++ b/src/i830_rotate.c @@ -292,7 +292,7 @@ I915UpdateRotate (ScreenPtr pScreen, ENABLE_POINT_RASTER_RULE | OGL_POINT_RASTER_RULE); OUT_RING(STATE3D_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | 1); - OUT_RING(0x00000000); + OUT_RING(0x00000000); /* texture coordinate wrap */ /* flush map & render cache */ OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE); @@ -325,10 +325,22 @@ I915UpdateRotate (ScreenPtr pScreen, OUT_RING(STATE3D_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) | I1_LOAD_S(4) | I1_LOAD_S(5) | I1_LOAD_S(6) | 4); - OUT_RING(0xfffffff0); - OUT_RING(0x00902c80); - OUT_RING(0x00000000); - OUT_RING(0x00020216); + OUT_RING(S2_TEXCOORD_FMT(0, TEXCOORDFMT_2D) | + S2_TEXCOORD_FMT(1, TEXCOORDFMT_NOT_PRESENT) | + S2_TEXCOORD_FMT(2, TEXCOORDFMT_NOT_PRESENT) | + S2_TEXCOORD_FMT(3, TEXCOORDFMT_NOT_PRESENT) | + S2_TEXCOORD_FMT(4, TEXCOORDFMT_NOT_PRESENT) | + S2_TEXCOORD_FMT(5, TEXCOORDFMT_NOT_PRESENT) | + S2_TEXCOORD_FMT(6, TEXCOORDFMT_NOT_PRESENT) | + S2_TEXCOORD_FMT(7, TEXCOORDFMT_NOT_PRESENT)); + OUT_RING((1 << S4_POINT_WIDTH_SHIFT) | S4_LINE_WIDTH_ONE | + S4_CULLMODE_NONE | S4_VFMT_SPEC_FOG | S4_VFMT_COLOR | + S4_VFMT_XYZW); + OUT_RING(0x00000000); /* S5 -- enable bits */ + OUT_RING((2 << S6_DEPTH_TEST_FUNC_SHIFT) | + (2 << S6_CBUF_SRC_BLEND_FACT_SHIFT) | + (1 << S6_CBUF_DST_BLEND_FACT_SHIFT) | S6_COLOR_WRITE_ENABLE | + (2 << S6_TRISTRIP_PV_SHIFT)); OUT_RING(STATE3D_INDEPENDENT_ALPHA_BLEND | IAB_MODIFY_ENABLE | @@ -387,7 +399,7 @@ I915UpdateRotate (ScreenPtr pScreen, OUT_RING(pI8301->FrontBuffer2.Start); /* Set the entire frontbuffer up as a texture */ - OUT_RING(STATE3D_MAP_STATE); + OUT_RING(STATE3D_MAP_STATE | 3); OUT_RING(0x00000001); /* texture map #1 */ if (I830IsPrimary(pScrn)) From 06e62ec521ed3f7ed232ace8e188891bedb53097 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 9 May 2006 12:04:58 -0700 Subject: [PATCH 13/70] Commit a WIP implementation of the planar video shader that does the planar-to-packed conversion for us. Unfortunately the documentation is unclear, and I haven't managed to get any implementation of it working correctly. --- src/i810_reg.h | 2 +- src/i830_video.c | 330 ++++++++++++++++++++++++++++++++++++----------- 2 files changed, 256 insertions(+), 76 deletions(-) diff --git a/src/i810_reg.h b/src/i810_reg.h index f57d5d81..08b576f7 100644 --- a/src/i810_reg.h +++ b/src/i810_reg.h @@ -1046,7 +1046,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define SS1_MAPMASK_MASK (0x8fff<<0) #define SS2_REVERSE_GAMMA_ENABLE (1<<31) -#define SS2_PACKED_TO_PLANAR_ENABLE (1<<30) +#define SS2_PLANAR_TO_PACKED_ENABLE (1<<30) #define SS2_COLORSPACE_CONVERSION (1<<29) #define SS2_CHROMAKEY_SHIFT 27 #define SS2_BASE_MIP_LEVEL_SHIFT 22 diff --git a/src/i830_video.c b/src/i830_video.c index ab6b7777..77f65d0f 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -1872,12 +1872,18 @@ typedef union { static void draw_poly(CARD32 *vb, float verts[][2], - float texcoords[][2]) + float texcoords[][2], + float texcoords2[][2]) { - int vertex_size = 8; + int vertex_size; intelVertex tmp; int i, k; + if (texcoords2 != NULL) + vertex_size = 10; + else + vertex_size = 8; + /* initial constant vertex fields */ tmp.v.z = 1.0; tmp.v.w = 1.0; @@ -1895,6 +1901,10 @@ static void draw_poly(CARD32 *vb, tmp.v.y = verts[k][1]; tmp.v.u0 = texcoords[k][0]; tmp.v.v0 = texcoords[k][1]; + if (texcoords2 != NULL) { + tmp.v.u1 = texcoords2[k][0]; + tmp.v.v1 = texcoords2[k][1]; + } for (i = 0 ; i < vertex_size ; i++) vb[i] = tmp.ui[i]; @@ -1905,22 +1915,46 @@ static void draw_poly(CARD32 *vb, #ifdef USE_TEXTURED_VIDEO static void -I915DisplayVideoTextured(ScrnInfoPtr pScrn, int id, RegionPtr dstRegion, - short width, short height, int video_offset, - int video_pitch, int x1, int y1, int x2, int y2, - short src_w, short src_h, short drw_w, short drw_h, - DrawablePtr pDraw) +I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, + RegionPtr dstRegion, + short width, short height, int video_pitch, + int x1, int y1, int x2, int y2, + short src_w, short src_h, short drw_w, short drw_h, + DrawablePtr pDraw) { I830Ptr pI830 = I830PTR(pScrn); - CARD32 format, ms3; + CARD32 format, ms3, s2; BoxPtr pbox; - int nbox, dxo, dyo; + int nbox, dwords, dxo, dyo; + Bool planar; ErrorF("I915DisplayVideo: %dx%d (pitch %d)\n", width, height, video_pitch); + switch (id) { + case FOURCC_UYVY: + case FOURCC_YUY2: + planar = FALSE; + break; + case FOURCC_YV12: + case FOURCC_I420: + planar = TRUE; + break; + default: + ErrorF("Unknown format 0x%x\n", id); + planar = FALSE; + break; + } + /* XXX: Dirty dri/rotate state */ - BEGIN_LP_RING(64); + + if (planar) + dwords = 94; + else + dwords = 64; + + BEGIN_LP_RING(dwords); + /* invarient state */ OUT_RING(MI_NOOP); OUT_RING(STATE3D_ANTI_ALIASING | @@ -1947,7 +1981,7 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, int id, RegionPtr dstRegion, ENABLE_POINT_RASTER_RULE | OGL_POINT_RASTER_RULE); OUT_RING(STATE3D_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | 1); - OUT_RING(0x00000000); + OUT_RING(0x00000000); /* texture coordinate wrap */ /* flush map & render cache */ OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE); @@ -1980,10 +2014,25 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, int id, RegionPtr dstRegion, OUT_RING(STATE3D_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) | I1_LOAD_S(4) | I1_LOAD_S(5) | I1_LOAD_S(6) | 4); - OUT_RING(0xfffffff0); - OUT_RING(0x00902c80); - OUT_RING(0x00000000); - OUT_RING(0x00020216); + s2 = S2_TEXCOORD_FMT(0, TEXCOORDFMT_2D); + if (planar) + s2 |= S2_TEXCOORD_FMT(1, TEXCOORDFMT_2D); + else + s2 |= S2_TEXCOORD_FMT(1, TEXCOORDFMT_NOT_PRESENT); + s2 |= S2_TEXCOORD_FMT(2, TEXCOORDFMT_NOT_PRESENT) | + S2_TEXCOORD_FMT(3, TEXCOORDFMT_NOT_PRESENT) | + S2_TEXCOORD_FMT(4, TEXCOORDFMT_NOT_PRESENT) | + S2_TEXCOORD_FMT(5, TEXCOORDFMT_NOT_PRESENT) | + S2_TEXCOORD_FMT(6, TEXCOORDFMT_NOT_PRESENT) | + S2_TEXCOORD_FMT(7, TEXCOORDFMT_NOT_PRESENT); + OUT_RING(s2); + OUT_RING((1 << S4_POINT_WIDTH_SHIFT) | S4_LINE_WIDTH_ONE | + S4_CULLMODE_NONE | S4_VFMT_SPEC_FOG | S4_VFMT_COLOR | S4_VFMT_XYZW); + OUT_RING(0x00000000); /* S5 - enable bits */ + OUT_RING((2 << S6_DEPTH_TEST_FUNC_SHIFT) | + (2 << S6_CBUF_SRC_BLEND_FACT_SHIFT) | + (1 << S6_CBUF_DST_BLEND_FACT_SHIFT) | S6_COLOR_WRITE_ENABLE | + (2 << S6_TRISTRIP_PV_SHIFT)); OUT_RING(STATE3D_INDEPENDENT_ALPHA_BLEND | IAB_MODIFY_ENABLE | @@ -2006,57 +2055,158 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, int id, RegionPtr dstRegion, OUT_RING(STATE3D_STIPPLE); OUT_RING(0x00000000); - /* fragment program - texture blend replace*/ - OUT_RING(STATE3D_PIXEL_SHADER_PROGRAM | 8); - OUT_RING(D0_DCL | (REG_TYPE_S << D0_TYPE_SHIFT) | (0 << D0_NR_SHIFT)); - OUT_RING(0x00000000); - OUT_RING(0x00000000); - - OUT_RING(D0_DCL | (REG_TYPE_T << D0_TYPE_SHIFT) | (0 << D0_NR_SHIFT) | - D0_CHANNEL_ALL); - OUT_RING(0x00000000); - OUT_RING(0x00000000); - - OUT_RING(T0_TEXLD | (REG_TYPE_OC << T0_DEST_TYPE_SHIFT) | - (0 << T0_SAMPLER_NR_SHIFT)); - OUT_RING((REG_TYPE_T << T1_ADDRESS_REG_TYPE_SHIFT) | - (0 << T1_ADDRESS_REG_NR_SHIFT)); - OUT_RING(0x00000000); - /* End fragment program */ - - OUT_RING(STATE3D_SAMPLER_STATE | 3); - OUT_RING(0x00000001); - OUT_RING(SS2_COLORSPACE_CONVERSION); - OUT_RING(0x00000000); - OUT_RING(0x00000000); - /* front buffer, pitch, offset */ OUT_RING(STATE3D_BUFFER_INFO); OUT_RING(BUFFERID_COLOR_BACK | BUFFER_USE_FENCES | (((pI830->displayWidth * pI830->cpp) / 4) << 2)); OUT_RING(pI830->bufferOffset); - /* Set the entire frontbuffer up as a texture */ - OUT_RING(STATE3D_MAP_STATE); - OUT_RING(0x00000001); /* texture map #1 */ - OUT_RING(video_offset); + if (!planar) { + /* fragment program - texture blend replace. */ + OUT_RING(STATE3D_PIXEL_SHADER_PROGRAM | 8); + OUT_RING(D0_DCL | (REG_TYPE_S << D0_TYPE_SHIFT) | (0 << D0_NR_SHIFT)); + OUT_RING(0x00000000); + OUT_RING(0x00000000); - ms3 = MAPSURF_422; - switch (id) { - case FOURCC_YUY2: - ms3 |= MT_422_YCRCB_NORMAL; - break; - case FOURCC_UYVY: - ms3 |= MT_422_YCRCB_SWAPY; - break; + OUT_RING(D0_DCL | (REG_TYPE_T << D0_TYPE_SHIFT) | (0 << D0_NR_SHIFT) | + D0_CHANNEL_ALL); + OUT_RING(0x00000000); + OUT_RING(0x00000000); + + OUT_RING(T0_TEXLD | (REG_TYPE_OC << T0_DEST_TYPE_SHIFT) | + (0 << T0_SAMPLER_NR_SHIFT)); + OUT_RING((REG_TYPE_T << T1_ADDRESS_REG_TYPE_SHIFT) | + (0 << T1_ADDRESS_REG_NR_SHIFT)); + OUT_RING(0x00000000); + /* End fragment program */ + + OUT_RING(STATE3D_SAMPLER_STATE | 3); + OUT_RING(0x00000001); + OUT_RING(SS2_COLORSPACE_CONVERSION); + OUT_RING(0x00000000); + OUT_RING(0x00000000); + + OUT_RING(STATE3D_MAP_STATE | 3); + OUT_RING(0x00000001); /* texture map #1 */ + OUT_RING(pPriv->YBuf0offset); + ms3 = MAPSURF_422; + switch (id) { + case FOURCC_YUY2: + ms3 |= MT_422_YCRCB_NORMAL; + break; + case FOURCC_UYVY: + ms3 |= MT_422_YCRCB_SWAPY; + break; + } + ms3 |= (height - 1) << MS3_HEIGHT_SHIFT; + ms3 |= (width - 1) << MS3_WIDTH_SHIFT; + if (!pI830->disableTiling) + ms3 |= MS3_USE_FENCE_REGS; + OUT_RING(ms3); + OUT_RING(((video_pitch / 4) - 1) << 21); + } else { + /* For the planar formats, we set up three samplers -- one for each plane. + * Each plane is in a Y8 format, but the sampler converts this into a + * packed format. We have to use a magic pixel shader, where we load + * each sampler into a temporary in turn, and then move that temporary + * into the real destination. + */ + /* fragment program - texture blend replace. */ + OUT_RING(STATE3D_PIXEL_SHADER_PROGRAM | 26); + /* Declare samplers */ + OUT_RING(D0_DCL | (REG_TYPE_S << D0_TYPE_SHIFT) | (0 << D0_NR_SHIFT)); + OUT_RING(0x00000000); + OUT_RING(0x00000000); + OUT_RING(D0_DCL | (REG_TYPE_S << D0_TYPE_SHIFT) | (1 << D0_NR_SHIFT)); + OUT_RING(0x00000000); + OUT_RING(0x00000000); + OUT_RING(D0_DCL | (REG_TYPE_S << D0_TYPE_SHIFT) | (2 << D0_NR_SHIFT)); + OUT_RING(0x00000000); + OUT_RING(0x00000000); + + /* Declare coordinate sources */ + OUT_RING(D0_DCL | (REG_TYPE_T << D0_TYPE_SHIFT) | (0 << D0_NR_SHIFT) | + D0_CHANNEL_ALL); + OUT_RING(0x00000000); + OUT_RING(0x00000000); + OUT_RING(D0_DCL | (REG_TYPE_T << D0_TYPE_SHIFT) | (1 << D0_NR_SHIFT) | + D0_CHANNEL_ALL); + OUT_RING(0x00000000); + OUT_RING(0x00000000); + + /* Load each sampler in turn. Y (sampler 0) gets the coords with + * doubled width. + */ + OUT_RING(T0_TEXLD | + (REG_TYPE_R << T0_DEST_TYPE_SHIFT) | (0 << T0_DEST_NR_SHIFT) | + (0 << T0_SAMPLER_NR_SHIFT)); + OUT_RING((REG_TYPE_T << T1_ADDRESS_REG_TYPE_SHIFT) | + (1 << T1_ADDRESS_REG_NR_SHIFT)); + OUT_RING(0x00000000); + OUT_RING(T0_TEXLD | + (REG_TYPE_R << T0_DEST_TYPE_SHIFT) | (0 << T0_DEST_NR_SHIFT) | + (1 << T0_SAMPLER_NR_SHIFT)); + OUT_RING((REG_TYPE_T << T1_ADDRESS_REG_TYPE_SHIFT) | + (0 << T1_ADDRESS_REG_NR_SHIFT)); + OUT_RING(0x00000000); + OUT_RING(T0_TEXLD | + (REG_TYPE_R << T0_DEST_TYPE_SHIFT) | (0 << T0_DEST_NR_SHIFT) | + (2 << T0_SAMPLER_NR_SHIFT)); + OUT_RING((REG_TYPE_T << T1_ADDRESS_REG_TYPE_SHIFT) | + (0 << T1_ADDRESS_REG_NR_SHIFT)); + OUT_RING(0x00000000); + + /* Move the temporary to the destination */ + OUT_RING(A0_MOV | A0_DEST_CHANNEL_ALL | + (REG_TYPE_OC << A0_DEST_TYPE_SHIFT) | (0 << A0_DEST_NR_SHIFT) | + (REG_TYPE_R << A0_SRC0_TYPE_SHIFT) | (0 << A0_SRC0_NR_SHIFT)); + OUT_RING((SRC_X << A1_SRC0_CHANNEL_X_SHIFT) | + (SRC_Y << A1_SRC0_CHANNEL_Y_SHIFT) | + (SRC_Z << A1_SRC0_CHANNEL_Z_SHIFT) | + (SRC_W << A1_SRC0_CHANNEL_W_SHIFT)); + OUT_RING(0); + /* End fragment program */ + + OUT_RING(STATE3D_SAMPLER_STATE | 9); + OUT_RING(0x00000007); + /* sampler 0 */ + OUT_RING(SS2_COLORSPACE_CONVERSION | SS2_PLANAR_TO_PACKED_ENABLE); + OUT_RING(0x00000000); + OUT_RING(0x00000000); + /* sampler 1 */ + OUT_RING(SS2_COLORSPACE_CONVERSION | SS2_PLANAR_TO_PACKED_ENABLE); + OUT_RING(0x00000000); + OUT_RING(0x00000000); + /* sampler 2 */ + OUT_RING(SS2_COLORSPACE_CONVERSION | SS2_PLANAR_TO_PACKED_ENABLE); + OUT_RING(0x00000000); + OUT_RING(0x00000000); + + OUT_RING(STATE3D_MAP_STATE | 9); + OUT_RING(0x00000007); + + OUT_RING(pPriv->YBuf0offset); + ms3 = MAPSURF_8BIT | MT_8BIT_I8; + ms3 |= (height - 1) << MS3_HEIGHT_SHIFT; + ms3 |= (width - 1) << MS3_WIDTH_SHIFT; + OUT_RING(ms3); + OUT_RING(((video_pitch * 2 / 4) - 1) << 21); + + OUT_RING(pPriv->UBuf0offset); + ms3 = MAPSURF_8BIT | MT_8BIT_I8; + ms3 |= (height / 2 - 1) << MS3_HEIGHT_SHIFT; + ms3 |= (width / 2 - 1) << MS3_WIDTH_SHIFT; + OUT_RING(ms3); + OUT_RING(((video_pitch / 4) - 1) << 21); + + OUT_RING(pPriv->VBuf0offset); + ms3 = MAPSURF_8BIT | MT_8BIT_I8; + ms3 |= (height / 2 - 1) << MS3_HEIGHT_SHIFT; + ms3 |= (width / 2 - 1) << MS3_WIDTH_SHIFT; + OUT_RING(ms3); + OUT_RING(((video_pitch / 4) - 1) << 21); } - ms3 |= (height - 1) << MS3_HEIGHT_SHIFT; - ms3 |= (width - 1) << MS3_WIDTH_SHIFT; - if (!pI830->disableTiling) - ms3 |= MS3_USE_FENCE_REGS; - OUT_RING(ms3); - OUT_RING(((video_pitch / 4) - 1) << 21); ADVANCE_LP_RING(); { @@ -2079,15 +2229,21 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, int id, RegionPtr dstRegion, int box_y2 = pbox->y2; int j; float src_scale_x, src_scale_y; - CARD32 vb[32]; - float verts[4][2], tex[4][2]; + CARD32 vb[40]; + float verts[4][2], tex[4][2], tex2[4][2]; + int vert_data_count; pbox++; src_scale_x = (float)src_w / (float)drw_w; src_scale_y = (float)src_h / (float)drw_h; - BEGIN_LP_RING(40); + if (!planar) + vert_data_count = 32; + else + vert_data_count = 40; + + BEGIN_LP_RING(vert_data_count + 8); OUT_RING(MI_NOOP); OUT_RING(MI_NOOP); OUT_RING(MI_NOOP); @@ -2097,24 +2253,48 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, int id, RegionPtr dstRegion, OUT_RING(MI_NOOP); /* vertex data */ - OUT_RING(PRIMITIVE3D | PRIM3D_INLINE | PRIM3D_TRIFAN | (32 - 1)); + OUT_RING(PRIMITIVE3D | PRIM3D_INLINE | PRIM3D_TRIFAN | + (vert_data_count - 1)); verts[0][0] = box_x1; verts[0][1] = box_y1; verts[1][0] = box_x2; verts[1][1] = box_y1; verts[2][0] = box_x2; verts[2][1] = box_y2; verts[3][0] = box_x1; verts[3][1] = box_y2; - tex[0][0] = (box_x1 - dxo) * src_scale_x; - tex[0][1] = (box_y1 - dyo) * src_scale_y; - tex[1][0] = (box_x2 - dxo) * src_scale_x; - tex[1][1] = (box_y1 - dyo) * src_scale_y; - tex[2][0] = (box_x2 - dxo) * src_scale_x; - tex[2][1] = (box_y2 - dyo) * src_scale_y; - tex[3][0] = (box_x1 - dxo) * src_scale_x; - tex[3][1] = (box_y2 - dyo) * src_scale_y; - /* emit vertex buffer */ - draw_poly(vb, verts, tex); - for (j = 0; j < 32; j++) - OUT_RING(vb[j]); + if (!planar) { + tex[0][0] = (box_x1 - dxo) * src_scale_x; + tex[0][1] = (box_y1 - dyo) * src_scale_y; + tex[1][0] = (box_x2 - dxo) * src_scale_x; + tex[1][1] = (box_y1 - dyo) * src_scale_y; + tex[2][0] = (box_x2 - dxo) * src_scale_x; + tex[2][1] = (box_y2 - dyo) * src_scale_y; + tex[3][0] = (box_x1 - dxo) * src_scale_x; + tex[3][1] = (box_y2 - dyo) * src_scale_y; + /* emit vertex buffer */ + draw_poly(vb, verts, tex, NULL); + for (j = 0; j < vert_data_count; j++) + OUT_RING(vb[j]); + } else { + tex[0][0] = (box_x1 - dxo) * src_scale_x / 2.0; + tex[0][1] = (box_y1 - dyo) * src_scale_y / 2.0; + tex[1][0] = (box_x2 - dxo) * src_scale_x / 2.0; + tex[1][1] = (box_y1 - dyo) * src_scale_y / 2.0; + tex[2][0] = (box_x2 - dxo) * src_scale_x / 2.0; + tex[2][1] = (box_y2 - dyo) * src_scale_y / 2.0; + tex[3][0] = (box_x1 - dxo) * src_scale_x / 2.0; + tex[3][1] = (box_y2 - dyo) * src_scale_y / 2.0; + tex2[0][0] = (box_x1 - dxo) * src_scale_x; + tex2[0][1] = (box_y1 - dyo) * src_scale_y; + tex2[1][0] = (box_x2 - dxo) * src_scale_x; + tex2[1][1] = (box_y1 - dyo) * src_scale_y; + tex2[2][0] = (box_x2 - dxo) * src_scale_x; + tex2[2][1] = (box_y2 - dyo) * src_scale_y; + tex2[3][0] = (box_x1 - dxo) * src_scale_x; + tex2[3][1] = (box_y2 - dyo) * src_scale_y; + /* emit vertex buffer */ + draw_poly(vb, verts, tex, tex2); + for (j = 0; j < vert_data_count; j++) + OUT_RING(vb[j]); + } ADVANCE_LP_RING(); } @@ -2372,8 +2552,8 @@ I830PutImage(ScrnInfoPtr pScrn, I830DisplayVideo(pScrn, id, width, height, dstPitch, x1, y1, x2, y2, &dstBox, src_w, src_h, drw_w, drw_h); #else - I915DisplayVideoTextured(pScrn, id, clipBoxes, width, height, - pPriv->YBuf0offset, dstPitch, + I915DisplayVideoTextured(pScrn, pPriv, id, clipBoxes, width, height, + dstPitch, x1, y1, x2, y2, src_w, src_h, drw_w, drw_h, pDraw); #endif pPriv->videoStatus = CLIENT_VIDEO_ON; From 3af4a967e73b367bb531f2760b4803db1388bcf9 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 9 May 2006 16:50:48 -0700 Subject: [PATCH 14/70] Add a couple of macros to simplify writing of video pixel shaders. --- src/i810_reg.h | 2 ++ src/i830_video.c | 88 +++++++++++++++++++----------------------------- 2 files changed, 37 insertions(+), 53 deletions(-) diff --git a/src/i810_reg.h b/src/i810_reg.h index 08b576f7..0ed7ff6e 100644 --- a/src/i810_reg.h +++ b/src/i810_reg.h @@ -1407,6 +1407,8 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z) /* End description of STATE3D_PIXEL_SHADER_PROGRAM */ +#define STATE3D_PIXEL_SHADER_CONSTANTS (CMD_3D | (0x1d<<24)|(0x06<<16)) + #define STATE3D_DRAWING_RECTANGLE (CMD_3D | (0x1d<<24)|(0x80<<16)|3) #define STATE3D_SCISSOR_RECTANGLE (CMD_3D | (0x1d<<24)|(0x81<<16)|1) diff --git a/src/i830_video.c b/src/i830_video.c index 77f65d0f..985148ef 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -1913,6 +1913,28 @@ static void draw_poly(CARD32 *vb, } } +#define OUT_DCL(type, nr) do { \ + CARD32 chans = 0; \ + if (REG_TYPE_##type == REG_TYPE_T) \ + chans = D0_CHANNEL_ALL; \ + OUT_RING(D0_DCL | \ + (REG_TYPE_##type << D0_TYPE_SHIFT) | (nr << D0_NR_SHIFT) | \ + chans); \ + OUT_RING(0x00000000); \ + OUT_RING(0x00000000); \ +} while (0) + +#define OUT_TEXLD(dest_type, dest_nr, sampler_nr, addr_type, addr_nr) \ +do { \ + OUT_RING(T0_TEXLD | \ + (REG_TYPE_##dest_type << T0_DEST_TYPE_SHIFT) | \ + (dest_nr << T0_DEST_NR_SHIFT) | \ + (sampler_nr << T0_SAMPLER_NR_SHIFT)); \ + OUT_RING((REG_TYPE_##addr_type << T1_ADDRESS_REG_TYPE_SHIFT) | \ + (addr_nr << T1_ADDRESS_REG_NR_SHIFT)); \ + OUT_RING(0x00000000); \ +} while (0) + #ifdef USE_TEXTURED_VIDEO static void I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, @@ -2064,20 +2086,9 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, if (!planar) { /* fragment program - texture blend replace. */ OUT_RING(STATE3D_PIXEL_SHADER_PROGRAM | 8); - OUT_RING(D0_DCL | (REG_TYPE_S << D0_TYPE_SHIFT) | (0 << D0_NR_SHIFT)); - OUT_RING(0x00000000); - OUT_RING(0x00000000); - - OUT_RING(D0_DCL | (REG_TYPE_T << D0_TYPE_SHIFT) | (0 << D0_NR_SHIFT) | - D0_CHANNEL_ALL); - OUT_RING(0x00000000); - OUT_RING(0x00000000); - - OUT_RING(T0_TEXLD | (REG_TYPE_OC << T0_DEST_TYPE_SHIFT) | - (0 << T0_SAMPLER_NR_SHIFT)); - OUT_RING((REG_TYPE_T << T1_ADDRESS_REG_TYPE_SHIFT) | - (0 << T1_ADDRESS_REG_NR_SHIFT)); - OUT_RING(0x00000000); + OUT_DCL(S, 0); + OUT_DCL(T, 0); + OUT_TEXLD(OC, 0, 0, T, 0); /* End fragment program */ OUT_RING(STATE3D_SAMPLER_STATE | 3); @@ -2114,47 +2125,18 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, /* fragment program - texture blend replace. */ OUT_RING(STATE3D_PIXEL_SHADER_PROGRAM | 26); /* Declare samplers */ - OUT_RING(D0_DCL | (REG_TYPE_S << D0_TYPE_SHIFT) | (0 << D0_NR_SHIFT)); - OUT_RING(0x00000000); - OUT_RING(0x00000000); - OUT_RING(D0_DCL | (REG_TYPE_S << D0_TYPE_SHIFT) | (1 << D0_NR_SHIFT)); - OUT_RING(0x00000000); - OUT_RING(0x00000000); - OUT_RING(D0_DCL | (REG_TYPE_S << D0_TYPE_SHIFT) | (2 << D0_NR_SHIFT)); - OUT_RING(0x00000000); - OUT_RING(0x00000000); + OUT_DCL(S, 0); + OUT_DCL(S, 1); + OUT_DCL(S, 2); + OUT_DCL(T, 0); + OUT_DCL(T, 1); - /* Declare coordinate sources */ - OUT_RING(D0_DCL | (REG_TYPE_T << D0_TYPE_SHIFT) | (0 << D0_NR_SHIFT) | - D0_CHANNEL_ALL); - OUT_RING(0x00000000); - OUT_RING(0x00000000); - OUT_RING(D0_DCL | (REG_TYPE_T << D0_TYPE_SHIFT) | (1 << D0_NR_SHIFT) | - D0_CHANNEL_ALL); - OUT_RING(0x00000000); - OUT_RING(0x00000000); - - /* Load each sampler in turn. Y (sampler 0) gets the coords with - * doubled width. + /* Load each sampler in turn. Y (sampler 0) gets the un-halved coords + * from t1. */ - OUT_RING(T0_TEXLD | - (REG_TYPE_R << T0_DEST_TYPE_SHIFT) | (0 << T0_DEST_NR_SHIFT) | - (0 << T0_SAMPLER_NR_SHIFT)); - OUT_RING((REG_TYPE_T << T1_ADDRESS_REG_TYPE_SHIFT) | - (1 << T1_ADDRESS_REG_NR_SHIFT)); - OUT_RING(0x00000000); - OUT_RING(T0_TEXLD | - (REG_TYPE_R << T0_DEST_TYPE_SHIFT) | (0 << T0_DEST_NR_SHIFT) | - (1 << T0_SAMPLER_NR_SHIFT)); - OUT_RING((REG_TYPE_T << T1_ADDRESS_REG_TYPE_SHIFT) | - (0 << T1_ADDRESS_REG_NR_SHIFT)); - OUT_RING(0x00000000); - OUT_RING(T0_TEXLD | - (REG_TYPE_R << T0_DEST_TYPE_SHIFT) | (0 << T0_DEST_NR_SHIFT) | - (2 << T0_SAMPLER_NR_SHIFT)); - OUT_RING((REG_TYPE_T << T1_ADDRESS_REG_TYPE_SHIFT) | - (0 << T1_ADDRESS_REG_NR_SHIFT)); - OUT_RING(0x00000000); + OUT_TEXLD(R, 0, 0, T, 1); + OUT_TEXLD(R, 0, 1, T, 0); + OUT_TEXLD(R, 0, 2, T, 0); /* Move the temporary to the destination */ OUT_RING(A0_MOV | A0_DEST_CHANNEL_ALL | From 3e0a9c9082942eb6f52612235d84b8408e1e03e9 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 9 May 2006 16:57:19 -0700 Subject: [PATCH 15/70] Do a separate BEGIN/ADVANCE_LP_RING set in the planar vs packed blocks, so I can adjust the planar code more easily. --- src/i830_video.c | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index 985148ef..027351a1 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -1947,7 +1947,7 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, I830Ptr pI830 = I830PTR(pScrn); CARD32 format, ms3, s2; BoxPtr pbox; - int nbox, dwords, dxo, dyo; + int nbox, dxo, dyo; Bool planar; ErrorF("I915DisplayVideo: %dx%d (pitch %d)\n", width, height, @@ -1970,12 +1970,7 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, /* XXX: Dirty dri/rotate state */ - if (planar) - dwords = 94; - else - dwords = 64; - - BEGIN_LP_RING(dwords); + BEGIN_LP_RING(44); /* invarient state */ OUT_RING(MI_NOOP); @@ -2082,8 +2077,10 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, OUT_RING(BUFFERID_COLOR_BACK | BUFFER_USE_FENCES | (((pI830->displayWidth * pI830->cpp) / 4) << 2)); OUT_RING(pI830->bufferOffset); + ADVANCE_LP_RING(); if (!planar) { + BEGIN_LP_RING(20); /* fragment program - texture blend replace. */ OUT_RING(STATE3D_PIXEL_SHADER_PROGRAM | 8); OUT_DCL(S, 0); @@ -2115,7 +2112,9 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, ms3 |= MS3_USE_FENCE_REGS; OUT_RING(ms3); OUT_RING(((video_pitch / 4) - 1) << 21); + ADVANCE_LP_RING(); } else { + BEGIN_LP_RING(50); /* For the planar formats, we set up three samplers -- one for each plane. * Each plane is in a Y8 format, but the sampler converts this into a * packed format. We have to use a magic pixel shader, where we load @@ -2187,9 +2186,8 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, ms3 |= (width / 2 - 1) << MS3_WIDTH_SHIFT; OUT_RING(ms3); OUT_RING(((video_pitch / 4) - 1) << 21); + ADVANCE_LP_RING(); } - - ADVANCE_LP_RING(); { BEGIN_LP_RING(2); From 4154a2f74811b91c0ef5bef32a919d6f8baf1a70 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 10 May 2006 12:09:00 -0700 Subject: [PATCH 16/70] Experimental work to use a full pixel shader for planar to YUV conversion, which also doesn't quite work. --- src/i830_video.c | 155 +++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 136 insertions(+), 19 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index 027351a1..a30b909f 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -1913,10 +1913,23 @@ static void draw_poly(CARD32 *vb, } } +union intfloat { + CARD32 ui; + float f; +}; + +#define OUT_RING_F(x) do { \ + union intfloat _tmp; \ + _tmp.f = x; \ + OUT_RING(_tmp.ui); \ +} while (0) + #define OUT_DCL(type, nr) do { \ CARD32 chans = 0; \ if (REG_TYPE_##type == REG_TYPE_T) \ chans = D0_CHANNEL_ALL; \ + else if (REG_TYPE_##type != REG_TYPE_S) \ + FatalError("wrong reg type %d to declare\n", REG_TYPE_##type); \ OUT_RING(D0_DCL | \ (REG_TYPE_##type << D0_TYPE_SHIFT) | (nr << D0_NR_SHIFT) | \ chans); \ @@ -1935,6 +1948,45 @@ do { \ OUT_RING(0x00000000); \ } while (0) +/* Move the dest_chan from src0 to dest, leaving the other channels alone */ +#define OUT_MOV_TO_CHANNEL(dest_type, dest_nr, src0_type, src0_nr, \ + dest_chan) \ +do { \ + OUT_RING(A0_MOV | A0_DEST_CHANNEL_##dest_chan | \ + (REG_TYPE_##dest_type << A0_DEST_TYPE_SHIFT) | \ + (dest_nr << A0_DEST_NR_SHIFT) | \ + (REG_TYPE_##src0_type << A0_SRC0_TYPE_SHIFT) | \ + (src0_nr << A0_SRC0_NR_SHIFT)); \ + OUT_RING((SRC_X << A1_SRC0_CHANNEL_X_SHIFT) | \ + (SRC_Y << A1_SRC0_CHANNEL_Y_SHIFT) | \ + (SRC_Z << A1_SRC0_CHANNEL_Z_SHIFT) | \ + (SRC_W << A1_SRC0_CHANNEL_W_SHIFT)); \ + OUT_RING(0); \ +} while (0) + +/* Dot3-product src0 and src1, storing the result in dest_chan of the dest. + * Saturates, in case we have out-of-range YUV values. + */ +#define OUT_DP3_TO_CHANNEL(dest_type, dest_nr, src0_type, src0_nr, \ + src1_type, src1_nr, dest_chan) \ +do { \ + OUT_RING(A0_DP3 | A0_DEST_CHANNEL_##dest_chan | A0_DEST_SATURATE | \ + (REG_TYPE_##dest_type << A0_DEST_TYPE_SHIFT) | \ + (dest_nr << A0_DEST_NR_SHIFT) | \ + (REG_TYPE_##src0_type << A0_SRC0_TYPE_SHIFT) | \ + (src0_nr << A0_SRC0_NR_SHIFT)); \ + OUT_RING((SRC_X << A1_SRC0_CHANNEL_X_SHIFT) | \ + (SRC_Y << A1_SRC0_CHANNEL_Y_SHIFT) | \ + (SRC_Z << A1_SRC0_CHANNEL_Z_SHIFT) | \ + (SRC_W << A1_SRC0_CHANNEL_W_SHIFT) | \ + (REG_TYPE_##src1_type << A1_SRC1_TYPE_SHIFT) | \ + (src1_nr << A1_SRC1_TYPE_SHIFT) | \ + (SRC_X << A1_SRC1_CHANNEL_X_SHIFT) | \ + (SRC_Y << A1_SRC1_CHANNEL_Y_SHIFT)); \ + OUT_RING((SRC_Z << A2_SRC1_CHANNEL_Z_SHIFT) | \ + (SRC_W << A2_SRC1_CHANNEL_W_SHIFT)); \ +} while (0) + #ifdef USE_TEXTURED_VIDEO static void I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, @@ -2114,15 +2166,51 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, OUT_RING(((video_pitch / 4) - 1) << 21); ADVANCE_LP_RING(); } else { - BEGIN_LP_RING(50); - /* For the planar formats, we set up three samplers -- one for each plane. - * Each plane is in a Y8 format, but the sampler converts this into a - * packed format. We have to use a magic pixel shader, where we load - * each sampler into a temporary in turn, and then move that temporary - * into the real destination. + BEGIN_LP_RING(1 + 18 + (1 + 3*16) + 11 + 11); + OUT_RING(MI_NOOP); + /* For the planar formats, we set up three samplers -- one for each plane, + * in a Y8 format. Because I couldn't get the special PLANAR_TO_PACKED + * shader setup to work, I did the manual pixel shader: + * + * y' = y - .0625 + * u' = u - .5 + * v' = v - .5; + * + * r = 1.1643 * y' + 0.0 * u' + 1.5958 * v' + * g = 1.1643 * y' - 0.39173 * u' - 0.81290 * v' + * b = 1.1643 * y' + 2.017 * u' + 0.0 * v' + * + * register assignment: + * r0 = (y',u',v',0) + * r1 = (y,y,y,y) + * r2 = (u,u,u,u) + * r3 = (v,v,v,v) + * OC = (r,g,b,1) */ - /* fragment program - texture blend replace. */ - OUT_RING(STATE3D_PIXEL_SHADER_PROGRAM | 26); + OUT_RING(STATE3D_PIXEL_SHADER_CONSTANTS | 16); + OUT_RING(0x000000f); /* constants 0-3 */ + /* constant 0: normalization offsets */ + OUT_RING_F(-0.0625); + OUT_RING_F(-0.5); + OUT_RING_F(-0.5); + OUT_RING_F(0.0); + /* constant 1: r coefficients*/ + OUT_RING_F(1.1643); + OUT_RING_F(0.0); + OUT_RING_F(1.5958); + OUT_RING_F(0.0); + /* constant 2: g coefficients */ + OUT_RING_F(1.1643); + OUT_RING_F(-0.39173); + OUT_RING_F(-0.81290); + OUT_RING_F(0.0); + /* constant 3: b coefficients */ + OUT_RING_F(1.1643); + OUT_RING_F(2.017); + OUT_RING_F(0.0); + OUT_RING_F(0.0); + + OUT_RING(STATE3D_PIXEL_SHADER_PROGRAM | (3 * 16 - 1)); /* Declare samplers */ OUT_DCL(S, 0); OUT_DCL(S, 1); @@ -2130,36 +2218,65 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, OUT_DCL(T, 0); OUT_DCL(T, 1); - /* Load each sampler in turn. Y (sampler 0) gets the un-halved coords + /* Load samplers to temporaries. Y (sampler 0) gets the un-halved coords * from t1. */ - OUT_TEXLD(R, 0, 0, T, 1); - OUT_TEXLD(R, 0, 1, T, 0); - OUT_TEXLD(R, 0, 2, T, 0); + OUT_TEXLD(R, 1, 0, T, 1); + OUT_TEXLD(R, 2, 1, T, 0); + OUT_TEXLD(R, 3, 2, T, 0); - /* Move the temporary to the destination */ - OUT_RING(A0_MOV | A0_DEST_CHANNEL_ALL | - (REG_TYPE_OC << A0_DEST_TYPE_SHIFT) | (0 << A0_DEST_NR_SHIFT) | + /* Move the sampled YUV data in R[123] to the first 3 channels of R0. */ + OUT_MOV_TO_CHANNEL(R, 0, R, 1, X); + OUT_MOV_TO_CHANNEL(R, 0, R, 2, Y); + OUT_MOV_TO_CHANNEL(R, 0, R, 3, Z); + + /* Normalize the YUV data */ + OUT_RING(A0_ADD | A0_DEST_CHANNEL_ALL | + (REG_TYPE_R << A0_DEST_TYPE_SHIFT) | (0 << A0_DEST_NR_SHIFT) | \ (REG_TYPE_R << A0_SRC0_TYPE_SHIFT) | (0 << A0_SRC0_NR_SHIFT)); OUT_RING((SRC_X << A1_SRC0_CHANNEL_X_SHIFT) | (SRC_Y << A1_SRC0_CHANNEL_Y_SHIFT) | (SRC_Z << A1_SRC0_CHANNEL_Z_SHIFT) | - (SRC_W << A1_SRC0_CHANNEL_W_SHIFT)); + (SRC_W << A1_SRC0_CHANNEL_W_SHIFT) | + (REG_TYPE_CONST << A1_SRC1_TYPE_SHIFT) | (0 << A1_SRC1_NR_SHIFT) | + (SRC_X << A1_SRC1_CHANNEL_X_SHIFT) | + (SRC_Y << A1_SRC1_CHANNEL_Y_SHIFT)); + OUT_RING((SRC_Z << A2_SRC1_CHANNEL_Z_SHIFT) | + (SRC_W << A2_SRC1_CHANNEL_W_SHIFT)); + + /* dot-product the YUV data in R0 by the vectors of coefficients for + * calculating R, G, and B, storing the results in the R, G, or B channels + * of the output color. + */ + OUT_DP3_TO_CHANNEL(OC, 0, R, 0, CONST, 1, X); + OUT_DP3_TO_CHANNEL(OC, 0, R, 0, CONST, 2, Y); + OUT_DP3_TO_CHANNEL(OC, 0, R, 0, CONST, 3, Z); + + /* Set alpha of the output to 1.0, by wiring W to 1 and not actually using + * the source. + */ + OUT_RING(A0_MOV | A0_DEST_CHANNEL_W | + (REG_TYPE_OC << A0_DEST_TYPE_SHIFT) | (0 << A0_DEST_NR_SHIFT) | + (REG_TYPE_OC << A0_SRC0_TYPE_SHIFT) | (0 << A0_SRC0_NR_SHIFT)); + OUT_RING((SRC_X << A1_SRC0_CHANNEL_X_SHIFT) | + (SRC_Y << A1_SRC0_CHANNEL_Y_SHIFT) | + (SRC_Z << A1_SRC0_CHANNEL_Z_SHIFT) | + (SRC_ONE << A1_SRC0_CHANNEL_W_SHIFT)); OUT_RING(0); /* End fragment program */ OUT_RING(STATE3D_SAMPLER_STATE | 9); OUT_RING(0x00000007); /* sampler 0 */ - OUT_RING(SS2_COLORSPACE_CONVERSION | SS2_PLANAR_TO_PACKED_ENABLE); + OUT_RING(0x00000000); OUT_RING(0x00000000); OUT_RING(0x00000000); /* sampler 1 */ - OUT_RING(SS2_COLORSPACE_CONVERSION | SS2_PLANAR_TO_PACKED_ENABLE); + OUT_RING(0x00000000); OUT_RING(0x00000000); OUT_RING(0x00000000); /* sampler 2 */ - OUT_RING(SS2_COLORSPACE_CONVERSION | SS2_PLANAR_TO_PACKED_ENABLE); + OUT_RING(0x00000000); OUT_RING(0x00000000); OUT_RING(0x00000000); From eec5e996ec9361099bf81d8d3b66933d5981c5a8 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 11 May 2006 20:26:26 -0700 Subject: [PATCH 17/70] Merge textured-video-wip to textured-video-planar-full. --- src/common.h | 12 ++++--- src/i830_video.c | 86 +++++++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 93 insertions(+), 5 deletions(-) diff --git a/src/common.h b/src/common.h index a6e4ca3e..76509d41 100644 --- a/src/common.h +++ b/src/common.h @@ -125,13 +125,17 @@ extern void I830DPRINTF_stub(const char *filename, int line, #define ADVANCE_LP_RING() do { \ if (ringused > needed) \ - ErrorF("%s: ADVANCE_LP_RING: exceeded allocation %d/%d\n ", \ - __FUNCTION__, ringused, needed); \ + FatalError("%s: ADVANCE_LP_RING: exceeded allocation %d/%d\n ", \ + __FUNCTION__, ringused, needed); \ + else if (ringused < needed) \ + FatalError("%s: ADVANCE_LP_RING: under-used allocation %d/%d\n ", \ + __FUNCTION__, ringused, needed); \ RecPtr->LpRing->tail = outring; \ RecPtr->LpRing->space -= ringused; \ if (outring & 0x07) \ - ErrorF("ADVANCE_LP_RING: " \ - "outring (0x%x) isn't on a QWord boundary\n", outring); \ + FatalError("%s: ADVANCE_LP_RING: " \ + "outring (0x%x) isn't on a QWord boundary\n", \ + __FUNCTION__, outring); \ OUTREG(LP_RING + RING_TAIL, outring); \ } while (0) diff --git a/src/i830_video.c b/src/i830_video.c index a30b909f..89f49e02 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -1090,6 +1090,65 @@ I830CopyPackedData(ScrnInfoPtr pScrn, } } +/* Copies planar data in *buf to UYVY-packed data in the screen atYBufXOffset. + */ +static void +I830CopyPlanarToPackedData(ScrnInfoPtr pScrn, unsigned char *buf, int srcPitch, + int srcPitch2, int dstPitch, int srcH, + int top, int left, int h, int w, int id) +{ + I830Ptr pI830 = I830PTR(pScrn); + I830PortPrivPtr pPriv = pI830->adaptor->pPortPrivates[0].ptr; + unsigned char *dst1, *srcy, *srcu, *srcv; + int y; + + if (pPriv->currentBuf == 0) + dst1 = pI830->FbBase + pPriv->YBuf0offset; + else + dst1 = pI830->FbBase + pPriv->YBuf1offset; + + srcy = buf; + if (id == FOURCC_YV12) { + srcv = buf + (srcH * srcPitch) + ((top * srcPitch) >> 2) + (left >> 1); + srcu = buf + (srcH * srcPitch) + ((srcH >> 1) * srcPitch2) + + ((top * srcPitch) >> 2) + (left >> 1); + } else { + srcu = buf + (srcH * srcPitch) + ((top * srcPitch) >> 2) + (left >> 1); + srcv = buf + (srcH * srcPitch) + ((srcH >> 1) * srcPitch2) + + ((top * srcPitch) >> 2) + (left >> 1); + } + + for (y = 0; y < h; y++) { + unsigned char *dst = dst1; + unsigned char *sy = srcy; + unsigned char *su = srcu; + unsigned char *sv = srcv; + int i; + + i = w; + while(i > 4) { + dst[0] = sy[0] | (sy[1] << 16) | (sv[0] << 8) | (su[0] << 24); + dst[1] = sy[2] | (sy[3] << 16) | (sv[1] << 8) | (su[1] << 24); + dst[2] = sy[4] | (sy[5] << 16) | (sv[2] << 8) | (su[2] << 24); + dst[3] = sy[6] | (sy[7] << 16) | (sv[3] << 8) | (su[3] << 24); + dst += 4; su += 4; sv += 4; sy += 8; + i -= 4; + } + while(i--) { + dst[0] = sy[0] | (sy[1] << 16) | (sv[0] << 8) | (su[0] << 24); + dst++; su++; sv++; + sy += 2; + } + + dst1 += dstPitch; + srcy += srcPitch; + if (y & 1) { + srcu += srcPitch2; + srcv += srcPitch2; + } + } +} + static void I830CopyPlanarData(ScrnInfoPtr pScrn, unsigned char *buf, int srcPitch, int srcPitch2, int dstPitch, int srcH, int top, int left, @@ -2521,6 +2580,18 @@ I830PutImage(ScrnInfoPtr pScrn, case FOURCC_I420: srcPitch = (width + 3) & ~3; srcPitch2 = ((width >> 1) + 3) & ~3; + break; + case FOURCC_UYVY: + case FOURCC_YUY2: + default: + srcPitch = width << 1; + break; + } + + switch (id) { +#ifndef USE_TEXTURED_VIDEO + case FOURCC_YV12: + case FOURCC_I420: #if 1 if (pI830->rotation & (RR_Rotate_90 | RR_Rotate_270)) { dstPitch = ((height / 2) + 63) & ~63; @@ -2539,10 +2610,16 @@ I830PutImage(ScrnInfoPtr pScrn, } #endif break; +#else /* USE_TEXTURED_VIDEO */ + case FOURCC_YV12: + case FOURCC_I420: + /* If we're doing textured video, then we're going to pack the data as + * UYVY in framebuffer, so allocate and align the memory that way. + */ +#endif case FOURCC_UYVY: case FOURCC_YUY2: default: - srcPitch = width << 1; #if 1 if (pI830->rotation & (RR_Rotate_90 | RR_Rotate_270)) { dstPitch = ((height << 1) + 63) & ~63; @@ -2627,8 +2704,15 @@ I830PutImage(ScrnInfoPtr pScrn, case FOURCC_I420: top &= ~1; nlines = ((((y2 + 0xffff) >> 16) + 1) & ~1) - top; +#ifdef USE_TEXTURED_VIDEO + I830CopyPlanarToPackedData(pScrn, buf, srcPitch, srcPitch2, dstPitch, + height, top, left, nlines, npixels, id); + /* Our data is now in this forat, either way. */ + id = FOURCC_UYVY; +#else I830CopyPlanarData(pScrn, buf, srcPitch, srcPitch2, dstPitch, height, top, left, nlines, npixels, id); +#endif break; case FOURCC_UYVY: case FOURCC_YUY2: From dd48790f4600a880fc4907c6e3b1cd51e9c0f0b7 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Fri, 12 May 2006 13:27:33 -0700 Subject: [PATCH 18/70] Divide width by 2 in planar-to-packed conversion loop, since each pass through the loop writes two source pixels. --- src/i830_video.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/i830_video.c b/src/i830_video.c index 89f49e02..39ab5073 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -1125,7 +1125,7 @@ I830CopyPlanarToPackedData(ScrnInfoPtr pScrn, unsigned char *buf, int srcPitch, unsigned char *sv = srcv; int i; - i = w; + i = w / 2; while(i > 4) { dst[0] = sy[0] | (sy[1] << 16) | (sv[0] << 8) | (su[0] << 24); dst[1] = sy[2] | (sy[3] << 16) | (sv[1] << 8) | (su[1] << 24); From b09fd42d7088ead6c23e040ac4b71114f62de82b Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Mon, 15 May 2006 09:29:43 -0700 Subject: [PATCH 19/70] Fix the planar formats to display correctly in textured mode. Still has issues with clipping, and some sampling differences between ximagesink and xvimagesink. --- src/i830_video.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index 39ab5073..ac0833e2 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -1099,7 +1099,7 @@ I830CopyPlanarToPackedData(ScrnInfoPtr pScrn, unsigned char *buf, int srcPitch, { I830Ptr pI830 = I830PTR(pScrn); I830PortPrivPtr pPriv = pI830->adaptor->pPortPrivates[0].ptr; - unsigned char *dst1, *srcy, *srcu, *srcv; + CARD8 *dst1, *srcy, *srcu, *srcv; int y; if (pPriv->currentBuf == 0) @@ -1109,20 +1109,20 @@ I830CopyPlanarToPackedData(ScrnInfoPtr pScrn, unsigned char *buf, int srcPitch, srcy = buf; if (id == FOURCC_YV12) { - srcv = buf + (srcH * srcPitch) + ((top * srcPitch) >> 2) + (left >> 1); - srcu = buf + (srcH * srcPitch) + ((srcH >> 1) * srcPitch2) + - ((top * srcPitch) >> 2) + (left >> 1); - } else { srcu = buf + (srcH * srcPitch) + ((top * srcPitch) >> 2) + (left >> 1); srcv = buf + (srcH * srcPitch) + ((srcH >> 1) * srcPitch2) + ((top * srcPitch) >> 2) + (left >> 1); + } else { + srcv = buf + (srcH * srcPitch) + ((top * srcPitch) >> 2) + (left >> 1); + srcu = buf + (srcH * srcPitch) + ((srcH >> 1) * srcPitch2) + + ((top * srcPitch) >> 2) + (left >> 1); } for (y = 0; y < h; y++) { - unsigned char *dst = dst1; - unsigned char *sy = srcy; - unsigned char *su = srcu; - unsigned char *sv = srcv; + CARD32 *dst = (CARD32 *)dst1; + CARD8 *sy = srcy; + CARD8 *su = srcu; + CARD8 *sv = srcv; int i; i = w / 2; @@ -2708,7 +2708,7 @@ I830PutImage(ScrnInfoPtr pScrn, I830CopyPlanarToPackedData(pScrn, buf, srcPitch, srcPitch2, dstPitch, height, top, left, nlines, npixels, id); /* Our data is now in this forat, either way. */ - id = FOURCC_UYVY; + id = FOURCC_YUY2; #else I830CopyPlanarData(pScrn, buf, srcPitch, srcPitch2, dstPitch, height, top, left, nlines, npixels, id); From f268979a0c779641c84e8d5b763acbda131474cf Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Mon, 15 May 2006 10:05:19 -0700 Subject: [PATCH 20/70] Correct drawing issues with planar formats when top or left != 0, and Y didn't get its offset. --- src/i830_video.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index ac0833e2..d23e83cb 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -1107,15 +1107,15 @@ I830CopyPlanarToPackedData(ScrnInfoPtr pScrn, unsigned char *buf, int srcPitch, else dst1 = pI830->FbBase + pPriv->YBuf1offset; - srcy = buf; + srcy = buf + (top * srcPitch) + left; if (id == FOURCC_YV12) { - srcu = buf + (srcH * srcPitch) + ((top * srcPitch) >> 2) + (left >> 1); - srcv = buf + (srcH * srcPitch) + ((srcH >> 1) * srcPitch2) + - ((top * srcPitch) >> 2) + (left >> 1); + srcu = buf + (srcH * srcPitch) + ((top / 2) * srcPitch2) + (left / 2); + srcv = buf + (srcH * srcPitch) + ((srcH / 2) * srcPitch2) + + ((top / 2) * srcPitch2) + (left / 2); } else { - srcv = buf + (srcH * srcPitch) + ((top * srcPitch) >> 2) + (left >> 1); - srcu = buf + (srcH * srcPitch) + ((srcH >> 1) * srcPitch2) + - ((top * srcPitch) >> 2) + (left >> 1); + srcv = buf + (srcH * srcPitch) + ((top / 2) * srcPitch2) + (left / 2); + srcu = buf + (srcH * srcPitch) + ((srcH / 2) * srcPitch2) + + ((top / 2) * srcPitch2) + (left / 2); } for (y = 0; y < h; y++) { From c9be11459bc2198b435c97c5a3432425246c4d2d Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Mon, 15 May 2006 17:04:27 -0700 Subject: [PATCH 21/70] Enable overlay and/or textured video at runtime according to hardware capabilities. Sets up 16 textured-video ports. Left in one hack (disconnected but advertised BRIGHTNESS and CONTRAST atoms) which may actually not be necessary. --- src/i830_video.c | 298 ++++++++++++++++++++++++++++++++++------------- 1 file changed, 215 insertions(+), 83 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index d23e83cb..a3cbfafd 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -84,8 +84,6 @@ THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "dixstruct.h" #include "fourcc.h" -#define USE_TEXTURED_VIDEO - #ifndef USE_USLEEP_FOR_VIDEO #define USE_USLEEP_FOR_VIDEO 0 #endif @@ -101,7 +99,8 @@ THE USE OR OTHER DEALINGS IN THE SOFTWARE. static void I830InitOffscreenImages(ScreenPtr); -static XF86VideoAdaptorPtr I830SetupImageVideo(ScreenPtr); +static XF86VideoAdaptorPtr I830SetupImageVideoOverlay(ScreenPtr); +static XF86VideoAdaptorPtr I830SetupImageVideoTextured(ScreenPtr); static void I830StopVideo(ScrnInfoPtr, pointer, Bool); static int I830SetPortAttribute(ScrnInfoPtr, Atom, INT32, pointer); static int I830GetPortAttribute(ScrnInfoPtr, Atom, INT32 *, pointer); @@ -111,8 +110,10 @@ static void I830QueryBestSize(ScrnInfoPtr, Bool, static int I830PutImage(ScrnInfoPtr, short, short, short, short, short, short, short, short, int, unsigned char *, short, short, Bool, RegionPtr, pointer, DrawablePtr); -static int I830QueryImageAttributes(ScrnInfoPtr, int, unsigned short *, - unsigned short *, int *, int *); +static int I830QueryImageAttributesOverlay(ScrnInfoPtr, int, unsigned short *, + unsigned short *, int *, int *); +static int I830QueryImageAttributesTextured(ScrnInfoPtr, int, unsigned short *, + unsigned short *, int *, int *); static void I830BlockHandler(int, pointer, pointer, pointer); @@ -288,6 +289,12 @@ static XF86AttributeRec Attributes[NUM_ATTRIBUTES] = { {XvSettable | XvGettable, 0, 1, "XV_DOUBLE_BUFFER"} }; +#define NUM_TEXTURED_ATTRIBUTES 2 +static XF86AttributeRec TexturedAttributes[NUM_ATTRIBUTES] = { + {XvSettable | XvGettable, -128, 127, "XV_BRIGHTNESS"}, + {XvSettable | XvGettable, 0, 255, "XV_CONTRAST"}, +}; + #define GAMMA_ATTRIBUTES 6 static XF86AttributeRec GammaAttributes[GAMMA_ATTRIBUTES] = { {XvSettable | XvGettable, 0, 0xffffff, "XV_GAMMA0"}, @@ -396,6 +403,7 @@ typedef struct { Bool overlayOK; int oneLineMode; int scaleRatio; + Bool textured; } I830PortPrivRec, *I830PortPrivPtr; #define GET_PORT_PRIVATE(pScrn) \ @@ -426,8 +434,9 @@ void I830InitVideo(ScreenPtr pScreen) { ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + I830Ptr pI830 = I830PTR(pScrn); XF86VideoAdaptorPtr *adaptors, *newAdaptors = NULL; - XF86VideoAdaptorPtr newAdaptor = NULL; + XF86VideoAdaptorPtr overlayAdaptor = NULL, texturedAdaptor = NULL; int num_adaptors; DPRINTF(PFX, "I830InitVideo\n"); @@ -446,35 +455,54 @@ I830InitVideo(ScreenPtr pScreen) } #endif + num_adaptors = xf86XVListGenericAdaptors(pScrn, &adaptors); + /* Give our adaptor list enough space for the overlay and/or texture video + * adaptors. + */ + newAdaptors = xalloc((num_adaptors + 2) * sizeof(XF86VideoAdaptorPtr *)); + if (newAdaptors == NULL) + return; + + memcpy(newAdaptors, adaptors, num_adaptors * sizeof(XF86VideoAdaptorPtr)); + adaptors = newAdaptors; + + /* Add the adaptors supported by our hardware. First, set up the atoms + * that will be used by both output adaptors. + */ + xvBrightness = MAKE_ATOM("XV_BRIGHTNESS"); + xvContrast = MAKE_ATOM("XV_CONTRAST"); + + /* Set up overlay video if we can do it at this depth. */ if (pScrn->bitsPerPixel != 8) { - newAdaptor = I830SetupImageVideo(pScreen); + overlayAdaptor = I830SetupImageVideoOverlay(pScreen); + if (overlayAdaptor != NULL) { + adaptors[num_adaptors++] = overlayAdaptor; + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Set up overlay video\n"); + } else { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Failed to set up overlay video\n"); + } I830InitOffscreenImages(pScreen); } - num_adaptors = xf86XVListGenericAdaptors(pScrn, &adaptors); - - if (newAdaptor) { - if (!num_adaptors) { - num_adaptors = 1; - adaptors = &newAdaptor; + /* Set up textured video if we can do it at this depth and we are on + * supported hardware. + */ + if (pScrn->bitsPerPixel >= 16 && IS_I9XX(pI830)) { + texturedAdaptor = I830SetupImageVideoTextured(pScreen); + if (texturedAdaptor != NULL) { + adaptors[num_adaptors++] = texturedAdaptor; + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Set up textured video\n"); } else { - newAdaptors = /* need to free this someplace */ - xalloc((num_adaptors + 1) * sizeof(XF86VideoAdaptorPtr *)); - if (newAdaptors) { - memcpy(newAdaptors, adaptors, num_adaptors * - sizeof(XF86VideoAdaptorPtr)); - newAdaptors[num_adaptors] = newAdaptor; - adaptors = newAdaptors; - num_adaptors++; - } + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Failed to set up textured video\n"); } } if (num_adaptors) xf86XVScreenInit(pScreen, adaptors, num_adaptors); - if (newAdaptors) - xfree(newAdaptors); + xfree(adaptors); } static void @@ -644,7 +672,7 @@ I830UpdateGamma(ScrnInfoPtr pScrn) } static XF86VideoAdaptorPtr -I830SetupImageVideo(ScreenPtr pScreen) +I830SetupImageVideoOverlay(ScreenPtr pScreen) { ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; I830Ptr pI830 = I830PTR(pScrn); @@ -652,7 +680,7 @@ I830SetupImageVideo(ScreenPtr pScreen) I830PortPrivPtr pPriv; XF86AttributePtr att; - DPRINTF(PFX, "I830SetupImageVideo\n"); + DPRINTF(PFX, "I830SetupImageVideoOverlay\n"); if (!(adapt = xcalloc(1, sizeof(XF86VideoAdaptorRec) + sizeof(I830PortPrivRec) + sizeof(DevUnion)))) @@ -705,8 +733,9 @@ I830SetupImageVideo(ScreenPtr pScreen) adapt->GetPortAttribute = I830GetPortAttribute; adapt->QueryBestSize = I830QueryBestSize; adapt->PutImage = I830PutImage; - adapt->QueryImageAttributes = I830QueryImageAttributes; + adapt->QueryImageAttributes = I830QueryImageAttributesOverlay; + pPriv->textured = FALSE; pPriv->colorKey = pI830->colorKey & ((1 << pScrn->depth) - 1); pPriv->videoStatus = 0; pPriv->brightness = 0; @@ -744,8 +773,6 @@ I830SetupImageVideo(ScreenPtr pScreen) pScreen->BlockHandler = I830BlockHandler; xvColorKey = MAKE_ATOM("XV_COLORKEY"); - xvBrightness = MAKE_ATOM("XV_BRIGHTNESS"); - xvContrast = MAKE_ATOM("XV_CONTRAST"); xvDoubleBuffer = MAKE_ATOM("XV_DOUBLE_BUFFER"); /* Allow the pipe to be switched from pipe A to B when in clone mode */ @@ -768,6 +795,86 @@ I830SetupImageVideo(ScreenPtr pScreen) return adapt; } +static XF86VideoAdaptorPtr +I830SetupImageVideoTextured(ScreenPtr pScreen) +{ + XF86VideoAdaptorPtr adapt; + XF86VideoEncodingPtr encoding; + XF86AttributePtr attrs; + I830PortPrivPtr portPrivs; + DevUnion *devUnions; + int nports = 16, i; + int nAttributes; + + DPRINTF(PFX, "I830SetupImageVideoOverlay\n"); + + nAttributes = NUM_TEXTURED_ATTRIBUTES; + + adapt = xcalloc(1, sizeof(XF86VideoAdaptorRec)); + portPrivs = xcalloc(nports, sizeof(I830PortPrivRec)); + devUnions = xcalloc(nports, sizeof(DevUnion)); + encoding = xcalloc(1, sizeof(XF86VideoEncodingRec)); + attrs = xcalloc(nAttributes, sizeof(XF86AttributeRec)); + if (adapt == NULL || portPrivs == NULL || devUnions == NULL || + encoding == NULL || attrs == NULL) + { + xfree(adapt); + xfree(portPrivs); + xfree(devUnions); + xfree(encoding); + xfree(attrs); + return NULL; + } + + adapt->type = XvWindowMask | XvInputMask | XvImageMask; + adapt->flags = 0; + adapt->name = "Intel(R) Textured Video"; + adapt->nEncodings = 1; + adapt->pEncodings = encoding; + adapt->pEncodings[0].id = 0; + adapt->pEncodings[0].name = "XV_IMAGE"; + adapt->pEncodings[0].width = 2048; + adapt->pEncodings[0].height = 2048; + adapt->pEncodings[0].rate.numerator = 1; + adapt->pEncodings[0].rate.denominator = 1; + adapt->nFormats = NUM_FORMATS; + adapt->pFormats = Formats; + adapt->nPorts = nports; + adapt->pPortPrivates = devUnions; + adapt->nAttributes = nAttributes; + adapt->pAttributes = attrs; + memcpy(attrs, TexturedAttributes, nAttributes * sizeof(XF86AttributeRec)); + adapt->nImages = NUM_IMAGES; + adapt->pImages = Images; + adapt->PutVideo = NULL; + adapt->PutStill = NULL; + adapt->GetVideo = NULL; + adapt->GetStill = NULL; + adapt->StopVideo = I830StopVideo; + adapt->SetPortAttribute = I830SetPortAttribute; + adapt->GetPortAttribute = I830GetPortAttribute; + adapt->QueryBestSize = I830QueryBestSize; + adapt->PutImage = I830PutImage; + adapt->QueryImageAttributes = I830QueryImageAttributesTextured; + + for (i = 0; i < nports; i++) { + I830PortPrivPtr pPriv = &portPrivs[i]; + + pPriv->textured = TRUE; + pPriv->videoStatus = 0; + pPriv->linear = NULL; + pPriv->currentBuf = 0; + pPriv->doubleBuffer = 1; + + /* gotta uninit this someplace, XXX: shouldn't be necessary for textured */ + REGION_NULL(pScreen, &pPriv->clip); + + adapt->pPortPrivates[i].ptr = (pointer) (pPriv); + } + + return adapt; +} + static Bool RegionsEqual(RegionPtr A, RegionPtr B) { @@ -805,6 +912,9 @@ I830StopVideo(ScrnInfoPtr pScrn, pointer data, Bool shutdown) I830OverlayRegPtr overlay = (I830OverlayRegPtr) (pI830->FbBase + pI830->OverlayMem->Start); + if (pPriv->textured) + return; + DPRINTF(PFX, "I830StopVideo\n"); REGION_EMPTY(pScrn->pScreen, &pPriv->clip); @@ -844,6 +954,14 @@ I830SetPortAttribute(ScrnInfoPtr pScrn, I830OverlayRegPtr overlay = (I830OverlayRegPtr) (pI830->FbBase + pI830->OverlayMem->Start); + if (pPriv->textured) { + /* XXX: Currently the brightness/saturation attributes aren't hooked up. + * However, apps expect them to be there, and the spec seems to let us + * sneak out of actually implementing them for now. + */ + return Success; + } + if (attribute == xvBrightness) { if ((value < -128) || (value > 127)) return BadValue; @@ -996,13 +1114,12 @@ I830QueryBestSize(ScrnInfoPtr pScrn, } static void -I830CopyPackedData(ScrnInfoPtr pScrn, +I830CopyPackedData(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, unsigned char *buf, int srcPitch, int dstPitch, int top, int left, int h, int w) { I830Ptr pI830 = I830PTR(pScrn); - I830PortPrivPtr pPriv = pI830->adaptor->pPortPrivates[0].ptr; unsigned char *src, *dst; int i,j; unsigned char *s; @@ -1093,12 +1210,12 @@ I830CopyPackedData(ScrnInfoPtr pScrn, /* Copies planar data in *buf to UYVY-packed data in the screen atYBufXOffset. */ static void -I830CopyPlanarToPackedData(ScrnInfoPtr pScrn, unsigned char *buf, int srcPitch, +I830CopyPlanarToPackedData(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, + unsigned char *buf, int srcPitch, int srcPitch2, int dstPitch, int srcH, int top, int left, int h, int w, int id) { I830Ptr pI830 = I830PTR(pScrn); - I830PortPrivPtr pPriv = pI830->adaptor->pPortPrivates[0].ptr; CARD8 *dst1, *srcy, *srcu, *srcv; int y; @@ -1150,12 +1267,12 @@ I830CopyPlanarToPackedData(ScrnInfoPtr pScrn, unsigned char *buf, int srcPitch, } static void -I830CopyPlanarData(ScrnInfoPtr pScrn, unsigned char *buf, int srcPitch, +I830CopyPlanarData(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, + unsigned char *buf, int srcPitch, int srcPitch2, int dstPitch, int srcH, int top, int left, int h, int w, int id) { I830Ptr pI830 = I830PTR(pScrn); - I830PortPrivPtr pPriv = pI830->adaptor->pPortPrivates[0].ptr; int i, j = 0; unsigned char *src1, *src2, *src3, *dst1, *dst2, *dst3; unsigned char *s; @@ -2046,7 +2163,6 @@ do { \ (SRC_W << A2_SRC1_CHANNEL_W_SHIFT)); \ } while (0) -#ifdef USE_TEXTURED_VIDEO static void I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, RegionPtr dstRegion, @@ -2455,7 +2571,6 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, ADVANCE_LP_RING(); } } -#endif /* USE_TEXTURED_VIDEO */ static FBLinearPtr I830AllocateMemory(ScrnInfoPtr pScrn, FBLinearPtr linear, int size) @@ -2529,7 +2644,7 @@ I830PutImage(ScrnInfoPtr pScrn, I830OverlayRegPtr overlay = (I830OverlayRegPtr) (pI830->FbBase + pI830->OverlayMem->Start); INT32 x1, x2, y1, y2; - int srcPitch, srcPitch2 = 0, dstPitch; + int srcPitch, srcPitch2 = 0, dstPitch, destId; int top, left, npixels, nlines, size, loops; BoxRec dstBox; @@ -2575,11 +2690,15 @@ I830PutImage(ScrnInfoPtr pScrn, width, height)) return Success; + destId = id; switch (id) { case FOURCC_YV12: case FOURCC_I420: srcPitch = (width + 3) & ~3; srcPitch2 = ((width >> 1) + 3) & ~3; + if (pPriv->textured) { + destId = FOURCC_YUY2; + } break; case FOURCC_UYVY: case FOURCC_YUY2: @@ -2588,8 +2707,7 @@ I830PutImage(ScrnInfoPtr pScrn, break; } - switch (id) { -#ifndef USE_TEXTURED_VIDEO + switch (destId) { case FOURCC_YV12: case FOURCC_I420: #if 1 @@ -2610,13 +2728,6 @@ I830PutImage(ScrnInfoPtr pScrn, } #endif break; -#else /* USE_TEXTURED_VIDEO */ - case FOURCC_YV12: - case FOURCC_I420: - /* If we're doing textured video, then we're going to pack the data as - * UYVY in framebuffer, so allocate and align the memory that way. - */ -#endif case FOURCC_UYVY: case FOURCC_YUY2: default: @@ -2670,7 +2781,9 @@ I830PutImage(ScrnInfoPtr pScrn, /* Make sure this buffer isn't in use */ loops = 0; - if (*pI830->overlayOn && pPriv->doubleBuffer && (overlay->OCMD & OVERLAY_ENABLE)) { + if (!pPriv->textured && *pI830->overlayOn && pPriv->doubleBuffer && + (overlay->OCMD & OVERLAY_ENABLE)) + { while (loops < 1000000) { #if USE_USLEEP_FOR_VIDEO usleep(10); @@ -2704,39 +2817,38 @@ I830PutImage(ScrnInfoPtr pScrn, case FOURCC_I420: top &= ~1; nlines = ((((y2 + 0xffff) >> 16) + 1) & ~1) - top; -#ifdef USE_TEXTURED_VIDEO - I830CopyPlanarToPackedData(pScrn, buf, srcPitch, srcPitch2, dstPitch, - height, top, left, nlines, npixels, id); - /* Our data is now in this forat, either way. */ - id = FOURCC_YUY2; -#else - I830CopyPlanarData(pScrn, buf, srcPitch, srcPitch2, dstPitch, height, top, left, - nlines, npixels, id); -#endif + if (pPriv->textured) { + I830CopyPlanarToPackedData(pScrn, pPriv, buf, srcPitch, srcPitch2, + dstPitch, height, top, left, nlines, + npixels, id); + } else { + I830CopyPlanarData(pScrn, pPriv, buf, srcPitch, srcPitch2, dstPitch, + height, top, left, nlines, npixels, id); + } break; case FOURCC_UYVY: case FOURCC_YUY2: default: nlines = ((y2 + 0xffff) >> 16) - top; - I830CopyPackedData(pScrn, buf, srcPitch, dstPitch, top, left, nlines, - npixels); + I830CopyPackedData(pScrn, pPriv, buf, srcPitch, dstPitch, top, left, + nlines, npixels); break; } -#ifndef USE_TEXTURED_VIDEO - /* update cliplist */ - if (!RegionsEqual(&pPriv->clip, clipBoxes)) { - REGION_COPY(pScrn->pScreen, &pPriv->clip, clipBoxes); - xf86XVFillKeyHelper(pScreen, pPriv->colorKey, clipBoxes); - } + if (!pPriv->textured) { + /* update cliplist */ + if (!RegionsEqual(&pPriv->clip, clipBoxes)) { + REGION_COPY(pScrn->pScreen, &pPriv->clip, clipBoxes); + xf86XVFillKeyHelper(pScreen, pPriv->colorKey, clipBoxes); + } - I830DisplayVideo(pScrn, id, width, height, dstPitch, - x1, y1, x2, y2, &dstBox, src_w, src_h, drw_w, drw_h); -#else - I915DisplayVideoTextured(pScrn, pPriv, id, clipBoxes, width, height, - dstPitch, - x1, y1, x2, y2, src_w, src_h, drw_w, drw_h, pDraw); -#endif + I830DisplayVideo(pScrn, destId, width, height, dstPitch, + x1, y1, x2, y2, &dstBox, src_w, src_h, drw_w, drw_h); + } else { + I915DisplayVideoTextured(pScrn, pPriv, destId, clipBoxes, width, height, + dstPitch, x1, y1, x2, y2, + src_w, src_h, drw_w, drw_h, pDraw); + } pPriv->videoStatus = CLIENT_VIDEO_ON; return Success; @@ -2746,23 +2858,25 @@ static int I830QueryImageAttributes(ScrnInfoPtr pScrn, int id, unsigned short *w, unsigned short *h, - int *pitches, int *offsets) + int *pitches, int *offsets, Bool textured) { I830Ptr pI830 = I830PTR(pScrn); int size, tmp; ErrorF("I830QueryImageAttributes: w is %d, h is %d\n", *w, *h); - if (IS_845G(pI830) || IS_I830(pI830)) { - if (*w > IMAGE_MAX_WIDTH_LEGACY) - *w = IMAGE_MAX_WIDTH_LEGACY; - if (*h > IMAGE_MAX_HEIGHT_LEGACY) - *h = IMAGE_MAX_HEIGHT_LEGACY; - } else { - if (*w > IMAGE_MAX_WIDTH) - *w = IMAGE_MAX_WIDTH; - if (*h > IMAGE_MAX_HEIGHT) - *h = IMAGE_MAX_HEIGHT; + if (!textured) { + if (IS_845G(pI830) || IS_I830(pI830)) { + if (*w > IMAGE_MAX_WIDTH_LEGACY) + *w = IMAGE_MAX_WIDTH_LEGACY; + if (*h > IMAGE_MAX_HEIGHT_LEGACY) + *h = IMAGE_MAX_HEIGHT_LEGACY; + } else { + if (*w > IMAGE_MAX_WIDTH) + *w = IMAGE_MAX_WIDTH; + if (*h > IMAGE_MAX_HEIGHT) + *h = IMAGE_MAX_HEIGHT; + } } *w = (*w + 1) & ~1; @@ -2815,6 +2929,24 @@ I830QueryImageAttributes(ScrnInfoPtr pScrn, return size; } +static int +I830QueryImageAttributesOverlay(ScrnInfoPtr pScrn, + int id, + unsigned short *w, unsigned short *h, + int *pitches, int *offsets) +{ + return I830QueryImageAttributes(pScrn, id, w, h, pitches, offsets, FALSE); +} + +static int +I830QueryImageAttributesTextured(ScrnInfoPtr pScrn, + int id, + unsigned short *w, unsigned short *h, + int *pitches, int *offsets) +{ + return I830QueryImageAttributes(pScrn, id, w, h, pitches, offsets, TRUE); +} + static void I830BlockHandler(int i, pointer blockData, pointer pTimeout, pointer pReadmask) From 29a8e88ed01c9e15a2ceba5eb62b19773e14c1f8 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Mon, 15 May 2006 17:19:33 -0700 Subject: [PATCH 22/70] Relax the alignment requirements for textured video. --- src/i830_video.c | 41 +++++++++++++++++------------------------ 1 file changed, 17 insertions(+), 24 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index a3cbfafd..bb257c77 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2647,6 +2647,7 @@ I830PutImage(ScrnInfoPtr pScrn, int srcPitch, srcPitch2 = 0, dstPitch, destId; int top, left, npixels, nlines, size, loops; BoxRec dstBox; + int pitchAlignMask; DPRINTF(PFX, "I830PutImage: src: (%d,%d)(%d,%d), dst: (%d,%d)(%d,%d)\n" "width %d, height %d\n", src_x, src_y, src_w, src_h, drw_x, drw_y, @@ -2707,47 +2708,39 @@ I830PutImage(ScrnInfoPtr pScrn, break; } + /* Only needs to be DWORD-aligned for textured on i915, but overlay has + * stricter requirements. + */ + if (pPriv->textured) { + pitchAlignMask = 3; + } else { + pitchAlignMask = 63; + } + + /* Determine the desired destination pitch (representing the chroma's pitch, + * in the planar case. + */ switch (destId) { case FOURCC_YV12: case FOURCC_I420: -#if 1 if (pI830->rotation & (RR_Rotate_90 | RR_Rotate_270)) { - dstPitch = ((height / 2) + 63) & ~63; + dstPitch = ((height / 2) + pitchAlignMask) & ~pitchAlignMask; size = dstPitch * width * 3; } else { - dstPitch = ((width / 2) + 63) & ~63; /* of chroma */ + dstPitch = ((width / 2) + pitchAlignMask) & ~pitchAlignMask; size = dstPitch * height * 3; } -#else - if (pI830->rotation & (RR_Rotate_90 | RR_Rotate_270)) { - dstPitch = ((height / 2) + 511) & ~511; - size = dstPitch * width * 3; - } else { - dstPitch = ((width / 2) + 511) & ~511; /* of chroma */ - size = dstPitch * height * 3; - } -#endif break; case FOURCC_UYVY: case FOURCC_YUY2: default: -#if 1 if (pI830->rotation & (RR_Rotate_90 | RR_Rotate_270)) { - dstPitch = ((height << 1) + 63) & ~63; + dstPitch = ((height << 1) + pitchAlignMask) & ~pitchAlignMask; size = dstPitch * width; } else { - dstPitch = ((width << 1) + 63) & ~63; /* of chroma */ + dstPitch = ((width << 1) + pitchAlignMask) & ~pitchAlignMask; size = dstPitch * height; } -#else - if (pI830->rotation & (RR_Rotate_90 | RR_Rotate_270)) { - dstPitch = ((height << 1) + 511) & ~511; - size = dstPitch * width; - } else { - dstPitch = ((width << 1) + 511) & ~511; /* of chroma */ - size = dstPitch * height; - } -#endif break; } ErrorF("srcPitch: %d, dstPitch: %d, size: %d\n", srcPitch, dstPitch, size); From db3683907d15959e79adfb8f0cd94e861fae5c36 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 16 May 2006 08:40:53 -0700 Subject: [PATCH 23/70] For textured video, disable double buffering and sync before uploading new video data. Allows more videos to play simultaneously. --- src/i830_video.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/src/i830_video.c b/src/i830_video.c index bb257c77..11c022a9 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -864,7 +864,7 @@ I830SetupImageVideoTextured(ScreenPtr pScreen) pPriv->videoStatus = 0; pPriv->linear = NULL; pPriv->currentBuf = 0; - pPriv->doubleBuffer = 1; + pPriv->doubleBuffer = 0; /* gotta uninit this someplace, XXX: shouldn't be necessary for textured */ REGION_NULL(pScreen, &pPriv->clip); @@ -2570,6 +2570,9 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, ADVANCE_LP_RING(); } + + if (pI830->AccelInfoRec) + pI830->AccelInfoRec->NeedToSync = TRUE; } static FBLinearPtr @@ -2805,6 +2808,17 @@ I830PutImage(ScrnInfoPtr pScrn, left = (x1 >> 16) & ~1; npixels = ((((x2 + 0xffff) >> 16) + 1) & ~1) - left; + if (pPriv->textured) { + /* For textured video, we don't double buffer, and instead just wait for + * acceleration to finish before writing the new video data into + * framebuffer. + */ + if (pI830->AccelInfoRec && pI830->AccelInfoRec->NeedToSync) { + (*pI830->AccelInfoRec->Sync)(pScrn); + pI830->AccelInfoRec->NeedToSync = FALSE; + } + } + switch (id) { case FOURCC_YV12: case FOURCC_I420: From 01c043de0393170e98515169f8239fef4d3e2053 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 16 May 2006 08:53:40 -0700 Subject: [PATCH 24/70] Use linear min/mag blending. --- src/i830_video.c | 25 +++++++++++++++++-------- 1 file changed, 17 insertions(+), 8 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index 11c022a9..99bb5338 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2317,8 +2317,11 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, OUT_RING(STATE3D_SAMPLER_STATE | 3); OUT_RING(0x00000001); - OUT_RING(SS2_COLORSPACE_CONVERSION); - OUT_RING(0x00000000); + OUT_RING(SS2_COLORSPACE_CONVERSION | + (FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) | + (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT)); + OUT_RING((TEXCOORDMODE_CLAMP_EDGE << SS3_TCX_ADDR_MODE_SHIFT) | + (TEXCOORDMODE_CLAMP_EDGE << SS3_TCY_ADDR_MODE_SHIFT)); OUT_RING(0x00000000); OUT_RING(STATE3D_MAP_STATE | 3); @@ -2444,16 +2447,22 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, OUT_RING(0x00000007); /* sampler 0 */ OUT_RING(0x00000000); - OUT_RING(0x00000000); - OUT_RING(0x00000000); + OUT_RING((FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) | + (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT)); + OUT_RING((TEXCOORDMODE_CLAMP_EDGE << SS3_TCX_ADDR_MODE_SHIFT) | + (TEXCOORDMODE_CLAMP_EDGE << SS3_TCY_ADDR_MODE_SHIFT)); /* sampler 1 */ OUT_RING(0x00000000); - OUT_RING(0x00000000); - OUT_RING(0x00000000); + OUT_RING((FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) | + (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT)); + OUT_RING((TEXCOORDMODE_CLAMP_EDGE << SS3_TCX_ADDR_MODE_SHIFT) | + (TEXCOORDMODE_CLAMP_EDGE << SS3_TCY_ADDR_MODE_SHIFT)); /* sampler 2 */ OUT_RING(0x00000000); - OUT_RING(0x00000000); - OUT_RING(0x00000000); + OUT_RING((FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) | + (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT)); + OUT_RING((TEXCOORDMODE_CLAMP_EDGE << SS3_TCX_ADDR_MODE_SHIFT) | + (TEXCOORDMODE_CLAMP_EDGE << SS3_TCY_ADDR_MODE_SHIFT)); OUT_RING(STATE3D_MAP_STATE | 9); OUT_RING(0x00000007); From 63a72e46fa20a4a4ba74efed386f6c3c167be5b5 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 16 May 2006 08:54:43 -0700 Subject: [PATCH 25/70] Turn debugging back off. --- src/i830_video.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/i830_video.c b/src/i830_video.c index 99bb5338..e07a1180 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -1,4 +1,4 @@ -#define VIDEO_DEBUG 1 +#define VIDEO_DEBUG 0 /*************************************************************************** Copyright 2000 Intel Corporation. All Rights Reserved. From c2cd10e1fba0e75c0ed3db5d17211bddf7ab1e33 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 16 May 2006 10:08:58 -0700 Subject: [PATCH 26/70] Flag the 3D state as dirty when we draw textured video, which should help rotation (I have other issues with rotation anyway). --- src/i830_video.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/i830_video.c b/src/i830_video.c index e07a1180..a41db5c7 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2195,7 +2195,11 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, break; } - /* XXX: Dirty dri/rotate state */ + /* Tell the rotation code that we have stomped its invariant state by + * setting a high bit. We don't use any invariant 3D state for video, so we + * don't have to worry about it ourselves. + */ + *pI830->used3D |= 1 << 30; BEGIN_LP_RING(44); From bc51d6525a12c748d0a293b7e560f6dcea33eecb Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 17 May 2006 13:42:51 -0700 Subject: [PATCH 27/70] Turn off overlay video on BW until we have stable PCI IDs so we can know whether the hardware supports overlay. --- src/i830_video.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/i830_video.c b/src/i830_video.c index dc0f8e17..1a133b9a 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -473,7 +473,7 @@ I830InitVideo(ScreenPtr pScreen) xvContrast = MAKE_ATOM("XV_CONTRAST"); /* Set up overlay video if we can do it at this depth. */ - if (pScrn->bitsPerPixel != 8) { + if (!IS_BROADWATER(pI830) && pScrn->bitsPerPixel != 8) { overlayAdaptor = I830SetupImageVideoOverlay(pScreen); if (overlayAdaptor != NULL) { adaptors[num_adaptors++] = overlayAdaptor; From 291770efc691a02650e3c580ca40c2f9fce3896c Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 18 May 2006 10:43:07 -0700 Subject: [PATCH 28/70] Start laying out some of the bits that need to be done for BW textured video. Headers taken from TG code drop. --- man/.gitignore | 2 - src/brw_defines.h | 847 +++++++++++++++++++++++++++++ src/brw_structs.h | 1325 +++++++++++++++++++++++++++++++++++++++++++++ src/i810_reg.h | 28 + src/i830_video.c | 247 ++++++++- 5 files changed, 2445 insertions(+), 4 deletions(-) delete mode 100644 man/.gitignore create mode 100644 src/brw_defines.h create mode 100644 src/brw_structs.h diff --git a/man/.gitignore b/man/.gitignore deleted file mode 100644 index a438e807..00000000 --- a/man/.gitignore +++ /dev/null @@ -1,2 +0,0 @@ -i810.4 -i810.4x diff --git a/src/brw_defines.h b/src/brw_defines.h new file mode 100644 index 00000000..93aed544 --- /dev/null +++ b/src/brw_defines.h @@ -0,0 +1,847 @@ + /************************************************************************** + * + * Copyright 2005 Tungsten Graphics, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#ifndef BRW_DEFINES_H +#define BRW_DEFINES_H + +/* + */ +#if 0 +#define MI_NOOP 0x00 +#define MI_USER_INTERRUPT 0x02 +#define MI_WAIT_FOR_EVENT 0x03 +#define MI_FLUSH 0x04 +#define MI_REPORT_HEAD 0x07 +#define MI_ARB_ON_OFF 0x08 +#define MI_BATCH_BUFFER_END 0x0A +#define MI_OVERLAY_FLIP 0x11 +#define MI_LOAD_SCAN_LINES_INCL 0x12 +#define MI_LOAD_SCAN_LINES_EXCL 0x13 +#define MI_DISPLAY_BUFFER_INFO 0x14 +#define MI_SET_CONTEXT 0x18 +#define MI_STORE_DATA_IMM 0x20 +#define MI_STORE_DATA_INDEX 0x21 +#define MI_LOAD_REGISTER_IMM 0x22 +#define MI_STORE_REGISTER_MEM 0x24 +#define MI_BATCH_BUFFER_START 0x31 + +#define MI_SYNCHRONOUS_FLIP 0x0 +#define MI_ASYNCHRONOUS_FLIP 0x1 + +#define MI_BUFFER_SECURE 0x0 +#define MI_BUFFER_NONSECURE 0x1 + +#define MI_ARBITRATE_AT_CHAIN_POINTS 0x0 +#define MI_ARBITRATE_BETWEEN_INSTS 0x1 +#define MI_NO_ARBITRATION 0x3 + +#define MI_CONDITION_CODE_WAIT_DISABLED 0x0 +#define MI_CONDITION_CODE_WAIT_0 0x1 +#define MI_CONDITION_CODE_WAIT_1 0x2 +#define MI_CONDITION_CODE_WAIT_2 0x3 +#define MI_CONDITION_CODE_WAIT_3 0x4 +#define MI_CONDITION_CODE_WAIT_4 0x5 + +#define MI_DISPLAY_PIPE_A 0x0 +#define MI_DISPLAY_PIPE_B 0x1 + +#define MI_DISPLAY_PLANE_A 0x0 +#define MI_DISPLAY_PLANE_B 0x1 +#define MI_DISPLAY_PLANE_C 0x2 + +#define MI_STANDARD_FLIP 0x0 +#define MI_ENQUEUE_FLIP_PERFORM_BASE_FRAME_NUMBER_LOAD 0x1 +#define MI_ENQUEUE_FLIP_TARGET_FRAME_NUMBER_RELATIVE 0x2 +#define MI_ENQUEUE_FLIP_ABSOLUTE_TARGET_FRAME_NUMBER 0x3 + +#define MI_PHYSICAL_ADDRESS 0x0 +#define MI_VIRTUAL_ADDRESS 0x1 + +#define MI_BUFFER_MEMORY_MAIN 0x0 +#define MI_BUFFER_MEMORY_GTT 0x2 +#define MI_BUFFER_MEMORY_PER_PROCESS_GTT 0x3 + +#define MI_FLIP_CONTINUE 0x0 +#define MI_FLIP_ON 0x1 +#define MI_FLIP_OFF 0x2 + +#define MI_UNTRUSTED_REGISTER_SPACE 0x0 +#define MI_TRUSTED_REGISTER_SPACE 0x1 +#endif + +/* 3D state: + */ +#define _3DOP_3DSTATE_PIPELINED 0x0 +#define _3DOP_3DSTATE_NONPIPELINED 0x1 +#define _3DOP_3DCONTROL 0x2 +#define _3DOP_3DPRIMITIVE 0x3 + +#define _3DSTATE_PIPELINED_POINTERS 0x00 +#define _3DSTATE_BINDING_TABLE_POINTERS 0x01 +#define _3DSTATE_VERTEX_BUFFERS 0x08 +#define _3DSTATE_VERTEX_ELEMENTS 0x09 +#define _3DSTATE_INDEX_BUFFER 0x0A +#define _3DSTATE_VF_STATISTICS 0x0B +#define _3DSTATE_DRAWING_RECTANGLE 0x00 +#define _3DSTATE_CONSTANT_COLOR 0x01 +#define _3DSTATE_SAMPLER_PALETTE_LOAD 0x02 +#define _3DSTATE_CHROMA_KEY 0x04 +#define _3DSTATE_DEPTH_BUFFER 0x05 +#define _3DSTATE_POLY_STIPPLE_OFFSET 0x06 +#define _3DSTATE_POLY_STIPPLE_PATTERN 0x07 +#define _3DSTATE_LINE_STIPPLE 0x08 +#define _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP 0x09 +#define _3DCONTROL 0x00 +#define _3DPRIMITIVE 0x00 + +#define PIPE_CONTROL_NOWRITE 0x00 +#define PIPE_CONTROL_WRITEIMMEDIATE 0x01 +#define PIPE_CONTROL_WRITEDEPTH 0x02 +#define PIPE_CONTROL_WRITETIMESTAMP 0x03 + +#define PIPE_CONTROL_GTTWRITE_PROCESS_LOCAL 0x00 +#define PIPE_CONTROL_GTTWRITE_GLOBAL 0x01 + +#define _3DPRIM_POINTLIST 0x01 +#define _3DPRIM_LINELIST 0x02 +#define _3DPRIM_LINESTRIP 0x03 +#define _3DPRIM_TRILIST 0x04 +#define _3DPRIM_TRISTRIP 0x05 +#define _3DPRIM_TRIFAN 0x06 +#define _3DPRIM_QUADLIST 0x07 +#define _3DPRIM_QUADSTRIP 0x08 +#define _3DPRIM_LINELIST_ADJ 0x09 +#define _3DPRIM_LINESTRIP_ADJ 0x0A +#define _3DPRIM_TRILIST_ADJ 0x0B +#define _3DPRIM_TRISTRIP_ADJ 0x0C +#define _3DPRIM_TRISTRIP_REVERSE 0x0D +#define _3DPRIM_POLYGON 0x0E +#define _3DPRIM_RECTLIST 0x0F +#define _3DPRIM_LINELOOP 0x10 +#define _3DPRIM_POINTLIST_BF 0x11 +#define _3DPRIM_LINESTRIP_CONT 0x12 +#define _3DPRIM_LINESTRIP_BF 0x13 +#define _3DPRIM_LINESTRIP_CONT_BF 0x14 +#define _3DPRIM_TRIFAN_NOSTIPPLE 0x15 + +#define _3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL 0 +#define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 + +#define BRW_ANISORATIO_2 0 +#define BRW_ANISORATIO_4 1 +#define BRW_ANISORATIO_6 2 +#define BRW_ANISORATIO_8 3 +#define BRW_ANISORATIO_10 4 +#define BRW_ANISORATIO_12 5 +#define BRW_ANISORATIO_14 6 +#define BRW_ANISORATIO_16 7 + +#define BRW_BLENDFACTOR_ONE 0x1 +#define BRW_BLENDFACTOR_SRC_COLOR 0x2 +#define BRW_BLENDFACTOR_SRC_ALPHA 0x3 +#define BRW_BLENDFACTOR_DST_ALPHA 0x4 +#define BRW_BLENDFACTOR_DST_COLOR 0x5 +#define BRW_BLENDFACTOR_SRC_ALPHA_SATURATE 0x6 +#define BRW_BLENDFACTOR_CONST_COLOR 0x7 +#define BRW_BLENDFACTOR_CONST_ALPHA 0x8 +#define BRW_BLENDFACTOR_SRC1_COLOR 0x9 +#define BRW_BLENDFACTOR_SRC1_ALPHA 0x0A +#define BRW_BLENDFACTOR_ZERO 0x11 +#define BRW_BLENDFACTOR_INV_SRC_COLOR 0x12 +#define BRW_BLENDFACTOR_INV_SRC_ALPHA 0x13 +#define BRW_BLENDFACTOR_INV_DST_ALPHA 0x14 +#define BRW_BLENDFACTOR_INV_DST_COLOR 0x15 +#define BRW_BLENDFACTOR_INV_CONST_COLOR 0x17 +#define BRW_BLENDFACTOR_INV_CONST_ALPHA 0x18 +#define BRW_BLENDFACTOR_INV_SRC1_COLOR 0x19 +#define BRW_BLENDFACTOR_INV_SRC1_ALPHA 0x1A + +#define BRW_BLENDFUNCTION_ADD 0 +#define BRW_BLENDFUNCTION_SUBTRACT 1 +#define BRW_BLENDFUNCTION_REVERSE_SUBTRACT 2 +#define BRW_BLENDFUNCTION_MIN 3 +#define BRW_BLENDFUNCTION_MAX 4 + +#define BRW_ALPHATEST_FORMAT_UNORM8 0 +#define BRW_ALPHATEST_FORMAT_FLOAT32 1 + +#define BRW_CHROMAKEY_KILL_ON_ANY_MATCH 0 +#define BRW_CHROMAKEY_REPLACE_BLACK 1 + +#define BRW_CLIP_API_OGL 0 +#define BRW_CLIP_API_DX 1 + +#define BRW_CLIPMODE_NORMAL 0 +#define BRW_CLIPMODE_CLIP_ALL 1 +#define BRW_CLIPMODE_CLIP_NON_REJECTED 2 +#define BRW_CLIPMODE_REJECT_ALL 3 +#define BRW_CLIPMODE_ACCEPT_ALL 4 + +#define BRW_CLIP_NDCSPACE 0 +#define BRW_CLIP_SCREENSPACE 1 + +#define BRW_COMPAREFUNCTION_ALWAYS 0 +#define BRW_COMPAREFUNCTION_NEVER 1 +#define BRW_COMPAREFUNCTION_LESS 2 +#define BRW_COMPAREFUNCTION_EQUAL 3 +#define BRW_COMPAREFUNCTION_LEQUAL 4 +#define BRW_COMPAREFUNCTION_GREATER 5 +#define BRW_COMPAREFUNCTION_NOTEQUAL 6 +#define BRW_COMPAREFUNCTION_GEQUAL 7 + +#define BRW_COVERAGE_PIXELS_HALF 0 +#define BRW_COVERAGE_PIXELS_1 1 +#define BRW_COVERAGE_PIXELS_2 2 +#define BRW_COVERAGE_PIXELS_4 3 + +#define BRW_CULLMODE_BOTH 0 +#define BRW_CULLMODE_NONE 1 +#define BRW_CULLMODE_FRONT 2 +#define BRW_CULLMODE_BACK 3 + +#define BRW_DEFAULTCOLOR_R8G8B8A8_UNORM 0 +#define BRW_DEFAULTCOLOR_R32G32B32A32_FLOAT 1 + +#define BRW_DEPTHFORMAT_D32_FLOAT_S8X24_UINT 0 +#define BRW_DEPTHFORMAT_D32_FLOAT 1 +#define BRW_DEPTHFORMAT_D24_UNORM_S8_UINT 2 +#define BRW_DEPTHFORMAT_D16_UNORM 5 + +#define BRW_FLOATING_POINT_IEEE_754 0 +#define BRW_FLOATING_POINT_NON_IEEE_754 1 + +#define BRW_FRONTWINDING_CW 0 +#define BRW_FRONTWINDING_CCW 1 + +#define BRW_INDEX_BYTE 0 +#define BRW_INDEX_WORD 1 +#define BRW_INDEX_DWORD 2 + +#define BRW_LOGICOPFUNCTION_CLEAR 0 +#define BRW_LOGICOPFUNCTION_NOR 1 +#define BRW_LOGICOPFUNCTION_AND_INVERTED 2 +#define BRW_LOGICOPFUNCTION_COPY_INVERTED 3 +#define BRW_LOGICOPFUNCTION_AND_REVERSE 4 +#define BRW_LOGICOPFUNCTION_INVERT 5 +#define BRW_LOGICOPFUNCTION_XOR 6 +#define BRW_LOGICOPFUNCTION_NAND 7 +#define BRW_LOGICOPFUNCTION_AND 8 +#define BRW_LOGICOPFUNCTION_EQUIV 9 +#define BRW_LOGICOPFUNCTION_NOOP 10 +#define BRW_LOGICOPFUNCTION_OR_INVERTED 11 +#define BRW_LOGICOPFUNCTION_COPY 12 +#define BRW_LOGICOPFUNCTION_OR_REVERSE 13 +#define BRW_LOGICOPFUNCTION_OR 14 +#define BRW_LOGICOPFUNCTION_SET 15 + +#define BRW_MAPFILTER_NEAREST 0x0 +#define BRW_MAPFILTER_LINEAR 0x1 +#define BRW_MAPFILTER_ANISOTROPIC 0x2 + +#define BRW_MIPFILTER_NONE 0 +#define BRW_MIPFILTER_NEAREST 1 +#define BRW_MIPFILTER_LINEAR 3 + +#define BRW_POLYGON_FRONT_FACING 0 +#define BRW_POLYGON_BACK_FACING 1 + +#define BRW_PREFILTER_ALWAYS 0x0 +#define BRW_PREFILTER_NEVER 0x1 +#define BRW_PREFILTER_LESS 0x2 +#define BRW_PREFILTER_EQUAL 0x3 +#define BRW_PREFILTER_LEQUAL 0x4 +#define BRW_PREFILTER_GREATER 0x5 +#define BRW_PREFILTER_NOTEQUAL 0x6 +#define BRW_PREFILTER_GEQUAL 0x7 + +#define BRW_PROVOKING_VERTEX_0 0 +#define BRW_PROVOKING_VERTEX_1 1 +#define BRW_PROVOKING_VERTEX_2 2 + +#define BRW_RASTRULE_UPPER_LEFT 0 +#define BRW_RASTRULE_UPPER_RIGHT 1 + +#define BRW_RENDERTARGET_CLAMPRANGE_UNORM 0 +#define BRW_RENDERTARGET_CLAMPRANGE_SNORM 1 +#define BRW_RENDERTARGET_CLAMPRANGE_FORMAT 2 + +#define BRW_STENCILOP_KEEP 0 +#define BRW_STENCILOP_ZERO 1 +#define BRW_STENCILOP_REPLACE 2 +#define BRW_STENCILOP_INCRSAT 3 +#define BRW_STENCILOP_DECRSAT 4 +#define BRW_STENCILOP_INCR 5 +#define BRW_STENCILOP_DECR 6 +#define BRW_STENCILOP_INVERT 7 + +#define BRW_SURFACE_MIPMAPLAYOUT_BELOW 0 +#define BRW_SURFACE_MIPMAPLAYOUT_RIGHT 1 + +#define BRW_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000 +#define BRW_SURFACEFORMAT_R32G32B32A32_SINT 0x001 +#define BRW_SURFACEFORMAT_R32G32B32A32_UINT 0x002 +#define BRW_SURFACEFORMAT_R32G32B32A32_UNORM 0x003 +#define BRW_SURFACEFORMAT_R32G32B32A32_SNORM 0x004 +#define BRW_SURFACEFORMAT_R64G64_FLOAT 0x005 +#define BRW_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006 +#define BRW_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007 +#define BRW_SURFACEFORMAT_R32G32B32A32_USCALED 0x008 +#define BRW_SURFACEFORMAT_R32G32B32_FLOAT 0x040 +#define BRW_SURFACEFORMAT_R32G32B32_SINT 0x041 +#define BRW_SURFACEFORMAT_R32G32B32_UINT 0x042 +#define BRW_SURFACEFORMAT_R32G32B32_UNORM 0x043 +#define BRW_SURFACEFORMAT_R32G32B32_SNORM 0x044 +#define BRW_SURFACEFORMAT_R32G32B32_SSCALED 0x045 +#define BRW_SURFACEFORMAT_R32G32B32_USCALED 0x046 +#define BRW_SURFACEFORMAT_R16G16B16A16_UNORM 0x080 +#define BRW_SURFACEFORMAT_R16G16B16A16_SNORM 0x081 +#define BRW_SURFACEFORMAT_R16G16B16A16_SINT 0x082 +#define BRW_SURFACEFORMAT_R16G16B16A16_UINT 0x083 +#define BRW_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084 +#define BRW_SURFACEFORMAT_R32G32_FLOAT 0x085 +#define BRW_SURFACEFORMAT_R32G32_SINT 0x086 +#define BRW_SURFACEFORMAT_R32G32_UINT 0x087 +#define BRW_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088 +#define BRW_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089 +#define BRW_SURFACEFORMAT_L32A32_FLOAT 0x08A +#define BRW_SURFACEFORMAT_R32G32_UNORM 0x08B +#define BRW_SURFACEFORMAT_R32G32_SNORM 0x08C +#define BRW_SURFACEFORMAT_R64_FLOAT 0x08D +#define BRW_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E +#define BRW_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F +#define BRW_SURFACEFORMAT_A32X32_FLOAT 0x090 +#define BRW_SURFACEFORMAT_L32X32_FLOAT 0x091 +#define BRW_SURFACEFORMAT_I32X32_FLOAT 0x092 +#define BRW_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093 +#define BRW_SURFACEFORMAT_R16G16B16A16_USCALED 0x094 +#define BRW_SURFACEFORMAT_R32G32_SSCALED 0x095 +#define BRW_SURFACEFORMAT_R32G32_USCALED 0x096 +#define BRW_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0 +#define BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1 +#define BRW_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2 +#define BRW_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3 +#define BRW_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4 +#define BRW_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5 +#define BRW_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7 +#define BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8 +#define BRW_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9 +#define BRW_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA +#define BRW_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB +#define BRW_SURFACEFORMAT_R16G16_UNORM 0x0CC +#define BRW_SURFACEFORMAT_R16G16_SNORM 0x0CD +#define BRW_SURFACEFORMAT_R16G16_SINT 0x0CE +#define BRW_SURFACEFORMAT_R16G16_UINT 0x0CF +#define BRW_SURFACEFORMAT_R16G16_FLOAT 0x0D0 +#define BRW_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1 +#define BRW_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2 +#define BRW_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3 +#define BRW_SURFACEFORMAT_R32_SINT 0x0D6 +#define BRW_SURFACEFORMAT_R32_UINT 0x0D7 +#define BRW_SURFACEFORMAT_R32_FLOAT 0x0D8 +#define BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9 +#define BRW_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA +#define BRW_SURFACEFORMAT_L16A16_UNORM 0x0DF +#define BRW_SURFACEFORMAT_I24X8_UNORM 0x0E0 +#define BRW_SURFACEFORMAT_L24X8_UNORM 0x0E1 +#define BRW_SURFACEFORMAT_A24X8_UNORM 0x0E2 +#define BRW_SURFACEFORMAT_I32_FLOAT 0x0E3 +#define BRW_SURFACEFORMAT_L32_FLOAT 0x0E4 +#define BRW_SURFACEFORMAT_A32_FLOAT 0x0E5 +#define BRW_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9 +#define BRW_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA +#define BRW_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB +#define BRW_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC +#define BRW_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED +#define BRW_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE +#define BRW_SURFACEFORMAT_L16A16_FLOAT 0x0F0 +#define BRW_SURFACEFORMAT_R32_UNORM 0x0F1 +#define BRW_SURFACEFORMAT_R32_SNORM 0x0F2 +#define BRW_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3 +#define BRW_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4 +#define BRW_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5 +#define BRW_SURFACEFORMAT_R16G16_SSCALED 0x0F6 +#define BRW_SURFACEFORMAT_R16G16_USCALED 0x0F7 +#define BRW_SURFACEFORMAT_R32_SSCALED 0x0F8 +#define BRW_SURFACEFORMAT_R32_USCALED 0x0F9 +#define BRW_SURFACEFORMAT_B5G6R5_UNORM 0x100 +#define BRW_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101 +#define BRW_SURFACEFORMAT_B5G5R5A1_UNORM 0x102 +#define BRW_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103 +#define BRW_SURFACEFORMAT_B4G4R4A4_UNORM 0x104 +#define BRW_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105 +#define BRW_SURFACEFORMAT_R8G8_UNORM 0x106 +#define BRW_SURFACEFORMAT_R8G8_SNORM 0x107 +#define BRW_SURFACEFORMAT_R8G8_SINT 0x108 +#define BRW_SURFACEFORMAT_R8G8_UINT 0x109 +#define BRW_SURFACEFORMAT_R16_UNORM 0x10A +#define BRW_SURFACEFORMAT_R16_SNORM 0x10B +#define BRW_SURFACEFORMAT_R16_SINT 0x10C +#define BRW_SURFACEFORMAT_R16_UINT 0x10D +#define BRW_SURFACEFORMAT_R16_FLOAT 0x10E +#define BRW_SURFACEFORMAT_I16_UNORM 0x111 +#define BRW_SURFACEFORMAT_L16_UNORM 0x112 +#define BRW_SURFACEFORMAT_A16_UNORM 0x113 +#define BRW_SURFACEFORMAT_L8A8_UNORM 0x114 +#define BRW_SURFACEFORMAT_I16_FLOAT 0x115 +#define BRW_SURFACEFORMAT_L16_FLOAT 0x116 +#define BRW_SURFACEFORMAT_A16_FLOAT 0x117 +#define BRW_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119 +#define BRW_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A +#define BRW_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B +#define BRW_SURFACEFORMAT_R8G8_SSCALED 0x11C +#define BRW_SURFACEFORMAT_R8G8_USCALED 0x11D +#define BRW_SURFACEFORMAT_R16_SSCALED 0x11E +#define BRW_SURFACEFORMAT_R16_USCALED 0x11F +#define BRW_SURFACEFORMAT_R8_UNORM 0x140 +#define BRW_SURFACEFORMAT_R8_SNORM 0x141 +#define BRW_SURFACEFORMAT_R8_SINT 0x142 +#define BRW_SURFACEFORMAT_R8_UINT 0x143 +#define BRW_SURFACEFORMAT_A8_UNORM 0x144 +#define BRW_SURFACEFORMAT_I8_UNORM 0x145 +#define BRW_SURFACEFORMAT_L8_UNORM 0x146 +#define BRW_SURFACEFORMAT_P4A4_UNORM 0x147 +#define BRW_SURFACEFORMAT_A4P4_UNORM 0x148 +#define BRW_SURFACEFORMAT_R8_SSCALED 0x149 +#define BRW_SURFACEFORMAT_R8_USCALED 0x14A +#define BRW_SURFACEFORMAT_R1_UINT 0x181 +#define BRW_SURFACEFORMAT_YCRCB_NORMAL 0x182 +#define BRW_SURFACEFORMAT_YCRCB_SWAPUVY 0x183 +#define BRW_SURFACEFORMAT_BC1_UNORM 0x186 +#define BRW_SURFACEFORMAT_BC2_UNORM 0x187 +#define BRW_SURFACEFORMAT_BC3_UNORM 0x188 +#define BRW_SURFACEFORMAT_BC4_UNORM 0x189 +#define BRW_SURFACEFORMAT_BC5_UNORM 0x18A +#define BRW_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B +#define BRW_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C +#define BRW_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D +#define BRW_SURFACEFORMAT_MONO8 0x18E +#define BRW_SURFACEFORMAT_YCRCB_SWAPUV 0x18F +#define BRW_SURFACEFORMAT_YCRCB_SWAPY 0x190 +#define BRW_SURFACEFORMAT_DXT1_RGB 0x191 +#define BRW_SURFACEFORMAT_FXT1 0x192 +#define BRW_SURFACEFORMAT_R8G8B8_UNORM 0x193 +#define BRW_SURFACEFORMAT_R8G8B8_SNORM 0x194 +#define BRW_SURFACEFORMAT_R8G8B8_SSCALED 0x195 +#define BRW_SURFACEFORMAT_R8G8B8_USCALED 0x196 +#define BRW_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197 +#define BRW_SURFACEFORMAT_R64G64B64_FLOAT 0x198 +#define BRW_SURFACEFORMAT_BC4_SNORM 0x199 +#define BRW_SURFACEFORMAT_BC5_SNORM 0x19A +#define BRW_SURFACEFORMAT_R16G16B16_UNORM 0x19C +#define BRW_SURFACEFORMAT_R16G16B16_SNORM 0x19D +#define BRW_SURFACEFORMAT_R16G16B16_SSCALED 0x19E +#define BRW_SURFACEFORMAT_R16G16B16_USCALED 0x19F + +#define BRW_SURFACERETURNFORMAT_FLOAT32 0 +#define BRW_SURFACERETURNFORMAT_S1 1 + +#define BRW_SURFACE_1D 0 +#define BRW_SURFACE_2D 1 +#define BRW_SURFACE_3D 2 +#define BRW_SURFACE_CUBE 3 +#define BRW_SURFACE_BUFFER 4 +#define BRW_SURFACE_NULL 7 + +#define BRW_TEXCOORDMODE_WRAP 0 +#define BRW_TEXCOORDMODE_MIRROR 1 +#define BRW_TEXCOORDMODE_CLAMP 2 +#define BRW_TEXCOORDMODE_CUBE 3 +#define BRW_TEXCOORDMODE_CLAMP_BORDER 4 +#define BRW_TEXCOORDMODE_MIRROR_ONCE 5 + +#define BRW_THREAD_PRIORITY_NORMAL 0 +#define BRW_THREAD_PRIORITY_HIGH 1 + +#define BRW_TILEWALK_XMAJOR 0 +#define BRW_TILEWALK_YMAJOR 1 + +#define BRW_VERTEX_SUBPIXEL_PRECISION_8BITS 0 +#define BRW_VERTEX_SUBPIXEL_PRECISION_4BITS 1 + +#define BRW_VERTEXBUFFER_ACCESS_VERTEXDATA 0 +#define BRW_VERTEXBUFFER_ACCESS_INSTANCEDATA 1 + +#define BRW_VFCOMPONENT_NOSTORE 0 +#define BRW_VFCOMPONENT_STORE_SRC 1 +#define BRW_VFCOMPONENT_STORE_0 2 +#define BRW_VFCOMPONENT_STORE_1_FLT 3 +#define BRW_VFCOMPONENT_STORE_1_INT 4 +#define BRW_VFCOMPONENT_STORE_VID 5 +#define BRW_VFCOMPONENT_STORE_IID 6 +#define BRW_VFCOMPONENT_STORE_PID 7 + + + +/* Execution Unit (EU) defines + */ + +#define BRW_ALIGN_1 0 +#define BRW_ALIGN_16 1 + +#define BRW_ADDRESS_DIRECT 0 +#define BRW_ADDRESS_REGISTER_INDIRECT_REGISTER 1 + +#define BRW_CHANNEL_X 0 +#define BRW_CHANNEL_Y 1 +#define BRW_CHANNEL_Z 2 +#define BRW_CHANNEL_W 3 + +#define BRW_COMPRESSION_NONE 0 +#define BRW_COMPRESSION_2NDHALF 1 +#define BRW_COMPRESSION_COMPRESSED 2 + +#define BRW_CONDITIONAL_NONE 0 +#define BRW_CONDITIONAL_Z 1 +#define BRW_CONDITIONAL_NZ 2 +#define BRW_CONDITIONAL_EQ 1 /* Z */ +#define BRW_CONDITIONAL_NEQ 2 /* NZ */ +#define BRW_CONDITIONAL_G 3 +#define BRW_CONDITIONAL_GE 4 +#define BRW_CONDITIONAL_L 5 +#define BRW_CONDITIONAL_LE 6 +#define BRW_CONDITIONAL_C 7 +#define BRW_CONDITIONAL_O 8 + +#define BRW_DEBUG_NONE 0 +#define BRW_DEBUG_BREAKPOINT 1 + +#define BRW_DEPENDENCY_NORMAL 0 +#define BRW_DEPENDENCY_NOTCLEARED 1 +#define BRW_DEPENDENCY_NOTCHECKED 2 +#define BRW_DEPENDENCY_DISABLE 3 + +#define BRW_EXECUTE_1 0 +#define BRW_EXECUTE_2 1 +#define BRW_EXECUTE_4 2 +#define BRW_EXECUTE_8 3 +#define BRW_EXECUTE_16 4 +#define BRW_EXECUTE_32 5 + +#define BRW_HORIZONTAL_STRIDE_0 0 +#define BRW_HORIZONTAL_STRIDE_1 1 +#define BRW_HORIZONTAL_STRIDE_2 2 +#define BRW_HORIZONTAL_STRIDE_4 3 + +#define BRW_INSTRUCTION_NORMAL 0 +#define BRW_INSTRUCTION_SATURATE 1 + +#define BRW_MASK_ENABLE 0 +#define BRW_MASK_DISABLE 1 + +#define BRW_OPCODE_MOV 1 +#define BRW_OPCODE_SEL 2 +#define BRW_OPCODE_NOT 4 +#define BRW_OPCODE_AND 5 +#define BRW_OPCODE_OR 6 +#define BRW_OPCODE_XOR 7 +#define BRW_OPCODE_SHR 8 +#define BRW_OPCODE_SHL 9 +#define BRW_OPCODE_RSR 10 +#define BRW_OPCODE_RSL 11 +#define BRW_OPCODE_ASR 12 +#define BRW_OPCODE_CMP 16 +#define BRW_OPCODE_JMPI 32 +#define BRW_OPCODE_IF 34 +#define BRW_OPCODE_IFF 35 +#define BRW_OPCODE_ELSE 36 +#define BRW_OPCODE_ENDIF 37 +#define BRW_OPCODE_DO 38 +#define BRW_OPCODE_WHILE 39 +#define BRW_OPCODE_BREAK 40 +#define BRW_OPCODE_CONTINUE 41 +#define BRW_OPCODE_HALT 42 +#define BRW_OPCODE_MSAVE 44 +#define BRW_OPCODE_MRESTORE 45 +#define BRW_OPCODE_PUSH 46 +#define BRW_OPCODE_POP 47 +#define BRW_OPCODE_WAIT 48 +#define BRW_OPCODE_SEND 49 +#define BRW_OPCODE_ADD 64 +#define BRW_OPCODE_MUL 65 +#define BRW_OPCODE_AVG 66 +#define BRW_OPCODE_FRC 67 +#define BRW_OPCODE_RNDU 68 +#define BRW_OPCODE_RNDD 69 +#define BRW_OPCODE_RNDE 70 +#define BRW_OPCODE_RNDZ 71 +#define BRW_OPCODE_MAC 72 +#define BRW_OPCODE_MACH 73 +#define BRW_OPCODE_LZD 74 +#define BRW_OPCODE_SAD2 80 +#define BRW_OPCODE_SADA2 81 +#define BRW_OPCODE_DP4 84 +#define BRW_OPCODE_DPH 85 +#define BRW_OPCODE_DP3 86 +#define BRW_OPCODE_DP2 87 +#define BRW_OPCODE_DPA2 88 +#define BRW_OPCODE_LINE 89 +#define BRW_OPCODE_NOP 126 + +#define BRW_PREDICATE_NONE 0 +#define BRW_PREDICATE_NORMAL 1 +#define BRW_PREDICATE_ALIGN1_ANYV 2 +#define BRW_PREDICATE_ALIGN1_ALLV 3 +#define BRW_PREDICATE_ALIGN1_ANY2H 4 +#define BRW_PREDICATE_ALIGN1_ALL2H 5 +#define BRW_PREDICATE_ALIGN1_ANY4H 6 +#define BRW_PREDICATE_ALIGN1_ALL4H 7 +#define BRW_PREDICATE_ALIGN1_ANY8H 8 +#define BRW_PREDICATE_ALIGN1_ALL8H 9 +#define BRW_PREDICATE_ALIGN1_ANY16H 10 +#define BRW_PREDICATE_ALIGN1_ALL16H 11 +#define BRW_PREDICATE_ALIGN16_REPLICATE_X 2 +#define BRW_PREDICATE_ALIGN16_REPLICATE_Y 3 +#define BRW_PREDICATE_ALIGN16_REPLICATE_Z 4 +#define BRW_PREDICATE_ALIGN16_REPLICATE_W 5 +#define BRW_PREDICATE_ALIGN16_ANY4H 6 +#define BRW_PREDICATE_ALIGN16_ALL4H 7 + +#define BRW_ARCHITECTURE_REGISTER_FILE 0 +#define BRW_GENERAL_REGISTER_FILE 1 +#define BRW_MESSAGE_REGISTER_FILE 2 +#define BRW_IMMEDIATE_VALUE 3 + +#define BRW_REGISTER_TYPE_UD 0 +#define BRW_REGISTER_TYPE_D 1 +#define BRW_REGISTER_TYPE_UW 2 +#define BRW_REGISTER_TYPE_W 3 +#define BRW_REGISTER_TYPE_UB 4 +#define BRW_REGISTER_TYPE_B 5 +#define BRW_REGISTER_TYPE_VF 5 /* packed float vector, immediates only? */ +#define BRW_REGISTER_TYPE_HF 6 +#define BRW_REGISTER_TYPE_V 6 /* packed int vector, immediates only, uword dest only */ +#define BRW_REGISTER_TYPE_F 7 + +#define BRW_ARF_NULL 0x00 +#define BRW_ARF_ADDRESS 0x10 +#define BRW_ARF_ACCUMULATOR 0x20 +#define BRW_ARF_FLAG 0x30 +#define BRW_ARF_MASK 0x40 +#define BRW_ARF_MASK_STACK 0x50 +#define BRW_ARF_MASK_STACK_DEPTH 0x60 +#define BRW_ARF_STATE 0x70 +#define BRW_ARF_CONTROL 0x80 +#define BRW_ARF_NOTIFICATION_COUNT 0x90 +#define BRW_ARF_IP 0xA0 + +#define BRW_AMASK 0 +#define BRW_IMASK 1 +#define BRW_LMASK 2 +#define BRW_CMASK 3 + + + +#define BRW_THREAD_NORMAL 0 +#define BRW_THREAD_ATOMIC 1 +#define BRW_THREAD_SWITCH 2 + +#define BRW_VERTICAL_STRIDE_0 0 +#define BRW_VERTICAL_STRIDE_1 1 +#define BRW_VERTICAL_STRIDE_2 2 +#define BRW_VERTICAL_STRIDE_4 3 +#define BRW_VERTICAL_STRIDE_8 4 +#define BRW_VERTICAL_STRIDE_16 5 +#define BRW_VERTICAL_STRIDE_32 6 +#define BRW_VERTICAL_STRIDE_64 7 +#define BRW_VERTICAL_STRIDE_128 8 +#define BRW_VERTICAL_STRIDE_256 9 +#define BRW_VERTICAL_STRIDE_ONE_DIMENSIONAL 0xF + +#define BRW_WIDTH_1 0 +#define BRW_WIDTH_2 1 +#define BRW_WIDTH_4 2 +#define BRW_WIDTH_8 3 +#define BRW_WIDTH_16 4 + +#define BRW_STATELESS_BUFFER_BOUNDARY_1K 0 +#define BRW_STATELESS_BUFFER_BOUNDARY_2K 1 +#define BRW_STATELESS_BUFFER_BOUNDARY_4K 2 +#define BRW_STATELESS_BUFFER_BOUNDARY_8K 3 +#define BRW_STATELESS_BUFFER_BOUNDARY_16K 4 +#define BRW_STATELESS_BUFFER_BOUNDARY_32K 5 +#define BRW_STATELESS_BUFFER_BOUNDARY_64K 6 +#define BRW_STATELESS_BUFFER_BOUNDARY_128K 7 +#define BRW_STATELESS_BUFFER_BOUNDARY_256K 8 +#define BRW_STATELESS_BUFFER_BOUNDARY_512K 9 +#define BRW_STATELESS_BUFFER_BOUNDARY_1M 10 +#define BRW_STATELESS_BUFFER_BOUNDARY_2M 11 + +#define BRW_POLYGON_FACING_FRONT 0 +#define BRW_POLYGON_FACING_BACK 1 + +#define BRW_MESSAGE_TARGET_NULL 0 +#define BRW_MESSAGE_TARGET_MATH 1 +#define BRW_MESSAGE_TARGET_SAMPLER 2 +#define BRW_MESSAGE_TARGET_GATEWAY 3 +#define BRW_MESSAGE_TARGET_DATAPORT_READ 4 +#define BRW_MESSAGE_TARGET_DATAPORT_WRITE 5 +#define BRW_MESSAGE_TARGET_URB 6 +#define BRW_MESSAGE_TARGET_THREAD_SPAWNER 7 + +#define BRW_SAMPLER_RETURN_FORMAT_FLOAT32 0 +#define BRW_SAMPLER_RETURN_FORMAT_UINT32 2 +#define BRW_SAMPLER_RETURN_FORMAT_SINT32 3 + +#define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE 0 +#define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE 0 +#define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS 0 +#define BRW_SAMPLER_MESSAGE_SIMD8_KILLPIX 1 +#define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD 1 +#define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_LOD 1 +#define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_GRADIENTS 2 +#define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_GRADIENTS 2 +#define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_COMPARE 0 +#define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE 2 +#define BRW_SAMPLER_MESSAGE_SIMD4X2_RESINFO 2 +#define BRW_SAMPLER_MESSAGE_SIMD8_RESINFO 2 +#define BRW_SAMPLER_MESSAGE_SIMD16_RESINFO 2 +#define BRW_SAMPLER_MESSAGE_SIMD4X2_LD 3 +#define BRW_SAMPLER_MESSAGE_SIMD8_LD 3 +#define BRW_SAMPLER_MESSAGE_SIMD16_LD 3 + +#define BRW_DATAPORT_OWORD_BLOCK_1_OWORDLOW 0 +#define BRW_DATAPORT_OWORD_BLOCK_1_OWORDHIGH 1 +#define BRW_DATAPORT_OWORD_BLOCK_2_OWORDS 2 +#define BRW_DATAPORT_OWORD_BLOCK_4_OWORDS 3 +#define BRW_DATAPORT_OWORD_BLOCK_8_OWORDS 4 + +#define BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD 0 +#define BRW_DATAPORT_OWORD_DUAL_BLOCK_4OWORDS 2 + +#define BRW_DATAPORT_DWORD_SCATTERED_BLOCK_8DWORDS 2 +#define BRW_DATAPORT_DWORD_SCATTERED_BLOCK_16DWORDS 3 + +#define BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ 0 +#define BRW_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 1 +#define BRW_DATAPORT_READ_MESSAGE_DWORD_BLOCK_READ 2 +#define BRW_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 3 + +#define BRW_DATAPORT_READ_TARGET_DATA_CACHE 0 +#define BRW_DATAPORT_READ_TARGET_RENDER_CACHE 1 +#define BRW_DATAPORT_READ_TARGET_SAMPLER_CACHE 2 + +#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE 0 +#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE_REPLICATED 1 +#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN01 2 +#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN23 3 +#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01 4 + +#define BRW_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 0 +#define BRW_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 1 +#define BRW_DATAPORT_WRITE_MESSAGE_DWORD_BLOCK_WRITE 2 +#define BRW_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE 3 +#define BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 4 +#define BRW_DATAPORT_WRITE_MESSAGE_STREAMED_VERTEX_BUFFER_WRITE 5 +#define BRW_DATAPORT_WRITE_MESSAGE_FLUSH_RENDER_CACHE 7 + +#define BRW_MATH_FUNCTION_INV 1 +#define BRW_MATH_FUNCTION_LOG 2 +#define BRW_MATH_FUNCTION_EXP 3 +#define BRW_MATH_FUNCTION_SQRT 4 +#define BRW_MATH_FUNCTION_RSQ 5 +#define BRW_MATH_FUNCTION_SIN 6 /* was 7 */ +#define BRW_MATH_FUNCTION_COS 7 /* was 8 */ +#define BRW_MATH_FUNCTION_SINCOS 8 /* was 6 */ +#define BRW_MATH_FUNCTION_TAN 9 +#define BRW_MATH_FUNCTION_POW 10 +#define BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER 11 +#define BRW_MATH_FUNCTION_INT_DIV_QUOTIENT 12 +#define BRW_MATH_FUNCTION_INT_DIV_REMAINDER 13 + +#define BRW_MATH_INTEGER_UNSIGNED 0 +#define BRW_MATH_INTEGER_SIGNED 1 + +#define BRW_MATH_PRECISION_FULL 0 +#define BRW_MATH_PRECISION_PARTIAL 1 + +#define BRW_MATH_SATURATE_NONE 0 +#define BRW_MATH_SATURATE_SATURATE 1 + +#define BRW_MATH_DATA_VECTOR 0 +#define BRW_MATH_DATA_SCALAR 1 + +#define BRW_URB_OPCODE_WRITE 0 + +#define BRW_URB_SWIZZLE_NONE 0 +#define BRW_URB_SWIZZLE_INTERLEAVE 1 +#define BRW_URB_SWIZZLE_TRANSPOSE 2 + +#define BRW_SCRATCH_SPACE_SIZE_1K 0 +#define BRW_SCRATCH_SPACE_SIZE_2K 1 +#define BRW_SCRATCH_SPACE_SIZE_4K 2 +#define BRW_SCRATCH_SPACE_SIZE_8K 3 +#define BRW_SCRATCH_SPACE_SIZE_16K 4 +#define BRW_SCRATCH_SPACE_SIZE_32K 5 +#define BRW_SCRATCH_SPACE_SIZE_64K 6 +#define BRW_SCRATCH_SPACE_SIZE_128K 7 +#define BRW_SCRATCH_SPACE_SIZE_256K 8 +#define BRW_SCRATCH_SPACE_SIZE_512K 9 +#define BRW_SCRATCH_SPACE_SIZE_1M 10 +#define BRW_SCRATCH_SPACE_SIZE_2M 11 + + + + +#define CMD_URB_FENCE 0x6000 +#define CMD_CONST_BUFFER_STATE 0x6001 +#define CMD_CONST_BUFFER 0x6002 + +#define CMD_STATE_BASE_ADDRESS 0x6101 +#define CMD_STATE_INSN_POINTER 0x6102 +#define CMD_PIPELINE_SELECT 0x6104 + +#define CMD_PIPELINED_STATE_POINTERS 0x7800 +#define CMD_BINDING_TABLE_PTRS 0x7801 +#define CMD_VERTEX_BUFFER 0x7808 +#define CMD_VERTEX_ELEMENT 0x7809 +#define CMD_INDEX_BUFFER 0x780a +#define CMD_VF_STATISTICS 0x780b + +#define CMD_DRAW_RECT 0x7900 +#define CMD_BLEND_CONSTANT_COLOR 0x7901 +#define CMD_CHROMA_KEY 0x7904 +#define CMD_DEPTH_BUFFER 0x7905 +#define CMD_POLY_STIPPLE_OFFSET 0x7906 +#define CMD_POLY_STIPPLE_PATTERN 0x7907 +#define CMD_LINE_STIPPLE_PATTERN 0x7908 +#define CMD_GLOBAL_DEPTH_OFFSET_CLAMP 0x7908 + +#define CMD_PIPE_CONTROL 0x7a00 + +#define CMD_3D_PRIM 0x7b00 + +#define CMD_MI_FLUSH 0x0200 + + +/* Various values from the R0 vertex header: + */ +#define R02_PRIM_END 0x1 +#define R02_PRIM_START 0x2 + + + +#endif diff --git a/src/brw_structs.h b/src/brw_structs.h new file mode 100644 index 00000000..1c59716a --- /dev/null +++ b/src/brw_structs.h @@ -0,0 +1,1325 @@ + /************************************************************************** + * + * Copyright 2005 Tungsten Graphics, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#ifndef BRW_STRUCTS_H +#define BRW_STRUCTS_H + +/* Command packets: + */ +struct header +{ + GLuint length:16; + GLuint opcode:16; +} bits; + + +union header_union +{ + struct header bits; + GLuint dword; +}; + +struct brw_3d_control +{ + struct + { + GLuint length:8; + GLuint notify_enable:1; + GLuint pad:3; + GLuint wc_flush_enable:1; + GLuint depth_stall_enable:1; + GLuint operation:2; + GLuint opcode:16; + } header; + + struct + { + GLuint pad:2; + GLuint dest_addr_type:1; + GLuint dest_addr:29; + } dest; + + GLuint dword2; + GLuint dword3; +}; + + +struct brw_3d_primitive +{ + struct + { + GLuint length:8; + GLuint pad:2; + GLuint topology:5; + GLuint indexed:1; + GLuint opcode:16; + } header; + + GLuint verts_per_instance; + GLuint start_vert_location; + GLuint instance_count; + GLuint start_instance_location; + GLuint base_vert_location; +}; + +/* These seem to be passed around as function args, so it works out + * better to keep them as #defines: + */ +#define BRW_FLUSH_READ_CACHE 0x1 +#define BRW_FLUSH_STATE_CACHE 0x2 +#define BRW_INHIBIT_FLUSH_RENDER_CACHE 0x4 +#define BRW_FLUSH_SNAPSHOT_COUNTERS 0x8 + +struct brw_mi_flush +{ + GLuint flags:4; + GLuint pad:12; + GLuint opcode:16; +}; + +struct brw_vf_statistics +{ + GLuint statistics_enable:1; + GLuint pad:15; + GLuint opcode:16; +}; + + + +struct brw_binding_table_pointers +{ + struct header header; + GLuint vs; + GLuint gs; + GLuint clp; + GLuint sf; + GLuint wm; +}; + + +struct brw_blend_constant_color +{ + struct header header; + GLfloat blend_constant_color[4]; +}; + + +struct brw_depthbuffer +{ + union header_union header; + + union { + struct { + GLuint pitch:18; + GLuint format:3; + GLuint pad:4; + GLuint depth_offset_disable:1; + GLuint tile_walk:1; + GLuint tiled_surface:1; + GLuint pad2:1; + GLuint surface_type:3; + } bits; + GLuint dword; + } dword1; + + GLuint dword2_base_addr; + + union { + struct { + GLuint pad:1; + GLuint mipmap_layout:1; + GLuint lod:4; + GLuint width:13; + GLuint height:13; + } bits; + GLuint dword; + } dword3; + + union { + struct { + GLuint pad:12; + GLuint min_array_element:9; + GLuint depth:11; + } bits; + GLuint dword; + } dword4; +}; + +struct brw_drawrect +{ + struct header header; + GLuint xmin:16; + GLuint ymin:16; + GLuint xmax:16; + GLuint ymax:16; + GLuint xorg:16; + GLuint yorg:16; +}; + + + + +struct brw_global_depth_offset_clamp +{ + struct header header; + GLfloat depth_offset_clamp; +}; + +struct brw_indexbuffer +{ + union { + struct + { + GLuint length:8; + GLuint index_format:2; + GLuint cut_index_enable:1; + GLuint pad:5; + GLuint opcode:16; + } bits; + GLuint dword; + + } header; + + GLuint buffer_start; + GLuint buffer_end; +}; + + +struct brw_line_stipple +{ + struct header header; + + struct + { + GLuint pattern:16; + GLuint pad:16; + } bits0; + + struct + { + GLuint repeat_count:9; + GLuint pad:7; + GLuint inverse_repeat_count:16; + } bits1; +}; + + +struct brw_pipelined_state_pointers +{ + struct header header; + + struct { + GLuint pad:5; + GLuint offset:27; + } vs; + + struct + { + GLuint enable:1; + GLuint pad:4; + GLuint offset:27; + } gs; + + struct + { + GLuint enable:1; + GLuint pad:4; + GLuint offset:27; + } clp; + + struct + { + GLuint pad:5; + GLuint offset:27; + } sf; + + struct + { + GLuint pad:5; + GLuint offset:27; + } wm; + + struct + { + GLuint pad:5; + GLuint offset:27; /* KW: check me! */ + } cc; +}; + + +struct brw_polygon_stipple_offset +{ + struct header header; + + struct { + GLuint y_offset:5; + GLuint pad:3; + GLuint x_offset:5; + GLuint pad0:19; + } bits0; +}; + + + +struct brw_polygon_stipple +{ + struct header header; + GLuint stipple[32]; +}; + + + +struct brw_pipeline_select +{ + struct + { + GLuint pipeline_select:1; + GLuint pad:15; + GLuint opcode:16; + } header; +}; + + +struct brw_pipe_control +{ + struct + { + GLuint length:8; + GLuint notify_enable:1; + GLuint pad:2; + GLuint instruction_state_cache_flush_enable:1; + GLuint write_cache_flush_enable:1; + GLuint depth_stall_enable:1; + GLuint post_sync_operation:2; + + GLuint opcode:16; + } header; + + struct + { + GLuint pad:2; + GLuint dest_addr_type:1; + GLuint dest_addr:29; + } bits1; + + GLuint data0; + GLuint data1; +}; + + +struct brw_urb_fence +{ + struct + { + GLuint length:8; + GLuint vs_realloc:1; + GLuint gs_realloc:1; + GLuint clp_realloc:1; + GLuint sf_realloc:1; + GLuint vfe_realloc:1; + GLuint cs_realloc:1; + GLuint pad:2; + GLuint opcode:16; + } header; + + struct + { + GLuint vs_fence:10; + GLuint gs_fence:10; + GLuint clp_fence:10; + GLuint pad:2; + } bits0; + + struct + { + GLuint sf_fence:10; + GLuint vf_fence:10; + GLuint cs_fence:10; + GLuint pad:2; + } bits1; +}; + +struct brw_constant_buffer_state /* previously brw_command_streamer */ +{ + struct header header; + + struct + { + GLuint nr_urb_entries:3; + GLuint pad:1; + GLuint urb_entry_size:5; + GLuint pad0:23; + } bits0; +}; + +struct brw_constant_buffer +{ + struct + { + GLuint length:8; + GLuint valid:1; + GLuint pad:7; + GLuint opcode:16; + } header; + + struct + { + GLuint buffer_length:6; + GLuint buffer_address:26; + } bits0; +}; + +struct brw_state_base_address +{ + struct header header; + + struct + { + GLuint modify_enable:1; + GLuint pad:4; + GLuint general_state_address:27; + } bits0; + + struct + { + GLuint modify_enable:1; + GLuint pad:4; + GLuint surface_state_address:27; + } bits1; + + struct + { + GLuint modify_enable:1; + GLuint pad:4; + GLuint indirect_object_state_address:27; + } bits2; + + struct + { + GLuint modify_enable:1; + GLuint pad:11; + GLuint general_state_upper_bound:20; + } bits3; + + struct + { + GLuint modify_enable:1; + GLuint pad:11; + GLuint indirect_object_state_upper_bound:20; + } bits4; +}; + +struct brw_state_prefetch +{ + struct header header; + + struct + { + GLuint prefetch_count:3; + GLuint pad:3; + GLuint prefetch_pointer:26; + } bits0; +}; + +struct brw_system_instruction_pointer +{ + struct header header; + + struct + { + GLuint pad:4; + GLuint system_instruction_pointer:28; + } bits0; +}; + + + + +/* State structs for the various fixed function units: + */ + + +struct thread0 +{ + GLuint pad0:1; + GLuint grf_reg_count:3; + GLuint pad1:2; + GLuint kernel_start_pointer:26; +}; + +struct thread1 +{ + GLuint ext_halt_exception_enable:1; + GLuint sw_exception_enable:1; + GLuint mask_stack_exception_enable:1; + GLuint timeout_exception_enable:1; + GLuint illegal_op_exception_enable:1; + GLuint pad0:3; + GLuint depth_coef_urb_read_offset:6; /* WM only */ + GLuint pad1:2; + GLuint floating_point_mode:1; + GLuint thread_priority:1; + GLuint binding_table_entry_count:8; + GLuint pad3:5; + GLuint single_program_flow:1; +}; + +struct thread2 +{ + GLuint per_thread_scratch_space:4; + GLuint pad0:6; + GLuint scratch_space_base_pointer:22; +}; + + +struct thread3 +{ + GLuint dispatch_grf_start_reg:4; + GLuint urb_entry_read_offset:6; + GLuint pad0:1; + GLuint urb_entry_read_length:6; + GLuint pad1:1; + GLuint const_urb_entry_read_offset:6; + GLuint pad2:1; + GLuint const_urb_entry_read_length:6; + GLuint pad3:1; +}; + + + +struct brw_clip_unit_state +{ + struct thread0 thread0; + struct thread1 thread1; + struct thread2 thread2; + struct thread3 thread3; + + struct + { + GLuint pad0:9; + GLuint gs_output_stats:1; /* not always */ + GLuint stats_enable:1; + GLuint nr_urb_entries:7; + GLuint pad1:1; + GLuint urb_entry_allocation_size:5; + GLuint pad2:1; + GLuint max_threads:6; /* may be less */ + GLuint pad3:1; + } thread4; + + struct + { + GLuint pad0:13; + GLuint clip_mode:3; + GLuint userclip_enable_flags:8; + GLuint userclip_must_clip:1; + GLuint pad1:1; + GLuint guard_band_enable:1; + GLuint viewport_z_clip_enable:1; + GLuint viewport_xy_clip_enable:1; + GLuint vertex_position_space:1; + GLuint api_mode:1; + GLuint pad2:1; + } clip5; + + struct + { + GLuint pad0:5; + GLuint clipper_viewport_state_ptr:27; + } clip6; + + + GLfloat viewport_xmin; + GLfloat viewport_xmax; + GLfloat viewport_ymin; + GLfloat viewport_ymax; +}; + + + +struct brw_cc_unit_state +{ + struct + { + GLuint pad0:3; + GLuint bf_stencil_pass_depth_pass_op:3; + GLuint bf_stencil_pass_depth_fail_op:3; + GLuint bf_stencil_fail_op:3; + GLuint bf_stencil_func:3; + GLuint bf_stencil_enable:1; + GLuint pad1:2; + GLuint stencil_write_enable:1; + GLuint stencil_pass_depth_pass_op:3; + GLuint stencil_pass_depth_fail_op:3; + GLuint stencil_fail_op:3; + GLuint stencil_func:3; + GLuint stencil_enable:1; + } cc0; + + + struct + { + GLuint bf_stencil_ref:8; + GLuint stencil_write_mask:8; + GLuint stencil_test_mask:8; + GLuint stencil_ref:8; + } cc1; + + + struct + { + GLuint logicop_enable:1; + GLuint pad0:10; + GLuint depth_write_enable:1; + GLuint depth_test_function:3; + GLuint depth_test:1; + GLuint bf_stencil_write_mask:8; + GLuint bf_stencil_test_mask:8; + } cc2; + + + struct + { + GLuint pad0:8; + GLuint alpha_test_func:3; + GLuint alpha_test:1; + GLuint blend_enable:1; + GLuint ia_blend_enable:1; + GLuint pad1:1; + GLuint alpha_test_format:1; + GLuint pad2:16; + } cc3; + + struct + { + GLuint pad0:5; + GLuint cc_viewport_state_offset:27; + } cc4; + + struct + { + GLuint pad0:2; + GLuint ia_dest_blend_factor:5; + GLuint ia_src_blend_factor:5; + GLuint ia_blend_function:3; + GLuint statistics_enable:1; + GLuint logicop_func:4; + GLuint pad1:11; + GLuint dither_enable:1; + } cc5; + + struct + { + GLuint clamp_post_alpha_blend:1; + GLuint clamp_pre_alpha_blend:1; + GLuint clamp_range:2; + GLuint pad0:11; + GLuint y_dither_offset:2; + GLuint x_dither_offset:2; + GLuint dest_blend_factor:5; + GLuint src_blend_factor:5; + GLuint blend_function:3; + } cc6; + + struct { + union { + GLfloat f; + GLubyte ub[4]; + } alpha_ref; + } cc7; +}; + + + +struct brw_sf_unit_state +{ + struct thread0 thread0; + struct thread1 thread1; + struct thread2 thread2; + struct thread3 thread3; + + struct + { + GLuint pad0:10; + GLuint stats_enable:1; + GLuint nr_urb_entries:7; + GLuint pad1:1; + GLuint urb_entry_allocation_size:5; + GLuint pad2:1; + GLuint max_threads:6; + GLuint pad3:1; + } thread4; + + struct + { + GLuint front_winding:1; + GLuint viewport_transform:1; + GLuint pad0:3; + GLuint sf_viewport_state_offset:27; + } sf5; + + struct + { + GLuint pad0:9; + GLuint dest_org_vbias:4; + GLuint dest_org_hbias:4; + GLuint scissor:1; + GLuint disable_2x2_trifilter:1; + GLuint disable_zero_pix_trifilter:1; + GLuint point_rast_rule:2; + GLuint line_endcap_aa_region_width:2; + GLuint line_width:4; + GLuint fast_scissor_disable:1; + GLuint cull_mode:2; + GLuint aa_enable:1; + } sf6; + + struct + { + GLuint point_size:11; + GLuint use_point_size_state:1; + GLuint subpixel_precision:1; + GLuint sprite_point:1; + GLuint pad0:11; + GLuint trifan_pv:2; + GLuint linestrip_pv:2; + GLuint tristrip_pv:2; + GLuint line_last_pixel_enable:1; + } sf7; + +}; + + +struct brw_gs_unit_state +{ + struct thread0 thread0; + struct thread1 thread1; + struct thread2 thread2; + struct thread3 thread3; + + struct + { + GLuint pad0:10; + GLuint stats_enable:1; + GLuint nr_urb_entries:7; + GLuint pad1:1; + GLuint urb_entry_allocation_size:5; + GLuint pad2:1; + GLuint max_threads:1; + GLuint pad3:6; + } thread4; + + struct + { + GLuint sampler_count:3; + GLuint pad0:2; + GLuint sampler_state_pointer:27; + } gs5; + + + struct + { + GLuint max_vp_index:4; + GLuint pad0:26; + GLuint reorder_enable:1; + GLuint pad1:1; + } gs6; +}; + + +struct brw_vs_unit_state +{ + struct thread0 thread0; + struct thread1 thread1; + struct thread2 thread2; + struct thread3 thread3; + + struct + { + GLuint pad0:10; + GLuint stats_enable:1; + GLuint nr_urb_entries:7; + GLuint pad1:1; + GLuint urb_entry_allocation_size:5; + GLuint pad2:1; + GLuint max_threads:4; + GLuint pad3:3; + } thread4; + + struct + { + GLuint sampler_count:3; + GLuint pad0:2; + GLuint sampler_state_pointer:27; + } vs5; + + struct + { + GLuint vs_enable:1; + GLuint vert_cache_disable:1; + GLuint pad0:30; + } vs6; +}; + + +struct brw_wm_unit_state +{ + struct thread0 thread0; + struct thread1 thread1; + struct thread2 thread2; + struct thread3 thread3; + + struct { + GLuint stats_enable:1; + GLuint pad0:1; + GLuint sampler_count:3; + GLuint sampler_state_pointer:27; + } wm4; + + struct + { + GLuint enable_8_pix:1; + GLuint enable_16_pix:1; + GLuint enable_32_pix:1; + GLuint pad0:7; + GLuint legacy_global_depth_bias:1; + GLuint line_stipple:1; + GLuint depth_offset:1; + GLuint polygon_stipple:1; + GLuint line_aa_region_width:2; + GLuint line_endcap_aa_region_width:2; + GLuint early_depth_test:1; + GLuint thread_dispatch_enable:1; + GLuint program_uses_depth:1; + GLuint program_computes_depth:1; + GLuint program_uses_killpixel:1; + GLuint legacy_line_rast: 1; + GLuint pad1:1; + GLuint max_threads:6; + GLuint pad2:1; + } wm5; + + GLfloat global_depth_offset_constant; + GLfloat global_depth_offset_scale; +}; + +struct brw_sampler_default_color { + GLfloat color[4]; +}; + +struct brw_sampler_state +{ + + struct + { + GLuint shadow_function:3; + GLuint lod_bias:11; + GLuint min_filter:3; + GLuint mag_filter:3; + GLuint mip_filter:2; + GLuint base_level:5; + GLuint pad:1; + GLuint lod_preclamp:1; + GLuint default_color_mode:1; + GLuint pad0:1; + GLuint disable:1; + } ss0; + + struct + { + GLuint r_wrap_mode:3; + GLuint t_wrap_mode:3; + GLuint s_wrap_mode:3; + GLuint pad:3; + GLuint max_lod:10; + GLuint min_lod:10; + } ss1; + + + struct + { + GLuint pad:5; + GLuint default_color_pointer:27; + } ss2; + + struct + { + GLuint pad:19; + GLuint max_aniso:3; + GLuint chroma_key_mode:1; + GLuint chroma_key_index:2; + GLuint chroma_key_enable:1; + GLuint monochrome_filter_width:3; + GLuint monochrome_filter_height:3; + } ss3; +}; + + +struct brw_clipper_viewport +{ + GLfloat xmin; + GLfloat xmax; + GLfloat ymin; + GLfloat ymax; +}; + +struct brw_cc_viewport +{ + GLfloat min_depth; + GLfloat max_depth; +}; + +struct brw_sf_viewport +{ + struct { + GLfloat m00; + GLfloat m11; + GLfloat m22; + GLfloat m30; + GLfloat m31; + GLfloat m32; + } viewport; + + struct { + GLshort xmin; + GLshort ymin; + GLshort xmax; + GLshort ymax; + } scissor; +}; + +/* Documented in the subsystem/shared-functions/sampler chapter... + */ +struct brw_surface_state +{ + struct { + GLuint cube_pos_z:1; + GLuint cube_neg_z:1; + GLuint cube_pos_y:1; + GLuint cube_neg_y:1; + GLuint cube_pos_x:1; + GLuint cube_neg_x:1; + GLuint pad:4; + GLuint mipmap_layout_mode:1; + GLuint vert_line_stride_ofs:1; + GLuint vert_line_stride:1; + GLuint color_blend:1; + GLuint writedisable_blue:1; + GLuint writedisable_green:1; + GLuint writedisable_red:1; + GLuint writedisable_alpha:1; + GLuint surface_format:9; + GLuint data_return_format:1; + GLuint pad0:1; + GLuint surface_type:3; + } ss0; + + struct { + GLuint base_addr; + } ss1; + + struct { + GLuint pad:2; + GLuint mip_count:4; + GLuint width:13; + GLuint height:13; + } ss2; + + struct { + GLuint tile_walk:1; + GLuint tiled_surface:1; + GLuint pad:1; + GLuint pitch:18; + GLuint depth:11; + } ss3; + + struct { + GLuint pad:19; + GLuint min_array_elt:9; + GLuint min_lod:4; + } ss4; +}; + + + +struct brw_vertex_buffer_state +{ + struct { + GLuint pitch:11; + GLuint pad:15; + GLuint access_type:1; + GLuint vb_index:5; + } vb0; + + GLuint start_addr; + GLuint max_index; +#if 1 + GLuint instance_data_step_rate; /* not included for sequential/random vertices? */ +#endif +}; + +#define BRW_VBP_MAX 17 + +struct brw_vb_array_state { + struct header header; + struct brw_vertex_buffer_state vb[BRW_VBP_MAX]; +}; + + +struct brw_vertex_element_state +{ + struct + { + GLuint src_offset:11; + GLuint pad:5; + GLuint src_format:9; + GLuint pad0:1; + GLuint valid:1; + GLuint vertex_buffer_index:5; + } ve0; + + struct + { + GLuint dst_offset:8; + GLuint pad:8; + GLuint vfcomponent3:4; + GLuint vfcomponent2:4; + GLuint vfcomponent1:4; + GLuint vfcomponent0:4; + } ve1; +}; + +#define BRW_VEP_MAX 18 + +struct brw_vertex_element_packet { + struct header header; + struct brw_vertex_element_state ve[BRW_VEP_MAX]; /* note: less than _TNL_ATTRIB_MAX */ +}; + + +struct brw_urb_immediate { + GLuint opcode:4; + GLuint offset:6; + GLuint swizzle_control:2; + GLuint pad:1; + GLuint allocate:1; + GLuint used:1; + GLuint complete:1; + GLuint response_length:4; + GLuint msg_length:4; + GLuint msg_target:4; + GLuint pad1:3; + GLuint end_of_thread:1; +}; + +/* Instruction format for the execution units: + */ + +struct brw_instruction +{ + struct + { + GLuint opcode:7; + GLuint pad:1; + GLuint access_mode:1; + GLuint mask_control:1; + GLuint dependency_control:2; + GLuint compression_control:2; + GLuint thread_control:2; + GLuint predicate_control:4; + GLuint predicate_inverse:1; + GLuint execution_size:3; + GLuint destreg__conditonalmod:4; /* destreg - send, conditionalmod - others */ + GLuint pad0:2; + GLuint debug_control:1; + GLuint saturate:1; + } header; + + union { + struct + { + GLuint dest_reg_file:2; + GLuint dest_reg_type:3; + GLuint src0_reg_file:2; + GLuint src0_reg_type:3; + GLuint src1_reg_file:2; + GLuint src1_reg_type:3; + GLuint pad:1; + GLuint dest_subreg_nr:5; + GLuint dest_reg_nr:8; + GLuint dest_horiz_stride:2; + GLuint dest_address_mode:1; + } da1; + + struct + { + GLuint dest_reg_file:2; + GLuint dest_reg_type:3; + GLuint src0_reg_file:2; + GLuint src0_reg_type:3; + GLuint pad:6; + GLint dest_indirect_offset:10; /* offset against the deref'd address reg */ + GLuint dest_subreg_nr:3; /* subnr for the address reg a0.x */ + GLuint dest_horiz_stride:2; + GLuint dest_address_mode:1; + } ia1; + + struct + { + GLuint dest_reg_file:2; + GLuint dest_reg_type:3; + GLuint src0_reg_file:2; + GLuint src0_reg_type:3; + GLuint src1_reg_file:2; + GLuint src1_reg_type:3; + GLuint pad0:1; + GLuint dest_writemask:4; + GLuint dest_subreg_nr:1; + GLuint dest_reg_nr:8; + GLuint pad1:2; + GLuint dest_address_mode:1; + } da16; + + struct + { + GLuint dest_reg_file:2; + GLuint dest_reg_type:3; + GLuint src0_reg_file:2; + GLuint src0_reg_type:3; + GLuint pad0:6; + GLuint dest_writemask:4; + GLint dest_indirect_offset:6; + GLuint dest_subreg_nr:3; + GLuint pad1:2; + GLuint dest_address_mode:1; + } ia16; + } bits1; + + + union { + struct + { + GLuint src0_subreg_nr:5; + GLuint src0_reg_nr:8; + GLuint src0_abs:1; + GLuint src0_negate:1; + GLuint src0_address_mode:1; + GLuint src0_horiz_stride:2; + GLuint src0_width:3; + GLuint src0_vert_stride:4; + GLuint flag_reg_nr:1; + GLuint pad:6; + } da1; + + struct + { + GLint src0_indirect_offset:10; + GLuint src0_subreg_nr:3; + GLuint src0_abs:1; + GLuint src0_negate:1; + GLuint src0_address_mode:1; + GLuint src0_horiz_stride:2; + GLuint src0_width:3; + GLuint src0_vert_stride:4; + GLuint flag_reg_nr:1; + GLuint pad:6; + } ia1; + + struct + { + GLuint src0_swz_x:2; + GLuint src0_swz_y:2; + GLuint src0_subreg_nr:1; + GLuint src0_reg_nr:8; + GLuint src0_abs:1; + GLuint src0_negate:1; + GLuint src0_address_mode:1; + GLuint src0_swz_z:2; + GLuint src0_swz_w:2; + GLuint pad0:1; + GLuint src0_vert_stride:4; + GLuint flag_reg_nr:1; + GLuint pad1:6; + } da16; + + struct + { + GLuint src0_swz_x:2; + GLuint src0_swz_y:2; + GLint src0_indirect_offset:6; + GLuint src0_subreg_nr:3; + GLuint src0_abs:1; + GLuint src0_negate:1; + GLuint src0_address_mode:1; + GLuint src0_swz_z:2; + GLuint src0_swz_w:2; + GLuint pad0:1; + GLuint src0_vert_stride:4; + GLuint flag_reg_nr:1; + GLuint pad1:6; + } ia16; + + } bits2; + + union + { + struct + { + GLuint src1_subreg_nr:5; + GLuint src1_reg_nr:8; + GLuint src1_abs:1; + GLuint src1_negate:1; + GLuint pad:1; + GLuint src1_horiz_stride:2; + GLuint src1_width:3; + GLuint src1_vert_stride:4; + GLuint pad0:7; + } da1; + + struct + { + GLuint src1_swz_x:2; + GLuint src1_swz_y:2; + GLuint src1_subreg_nr:1; + GLuint src1_reg_nr:8; + GLuint src1_abs:1; + GLuint src1_negate:1; + GLuint pad0:1; + GLuint src1_swz_z:2; + GLuint src1_swz_w:2; + GLuint pad1:1; + GLuint src1_vert_stride:4; + GLuint pad2:7; + } da16; + + struct + { + GLint src1_indirect_offset:10; + GLuint src1_subreg_nr:3; + GLuint src1_abs:1; + GLuint src1_negate:1; + GLuint pad0:1; + GLuint src1_horiz_stride:2; + GLuint src1_width:3; + GLuint src1_vert_stride:4; + GLuint flag_reg_nr:1; + GLuint pad1:6; + } ia1; + + struct + { + GLuint src1_swz_x:2; + GLuint src1_swz_y:2; + GLint src1_indirect_offset:6; + GLuint src1_subreg_nr:3; + GLuint src1_abs:1; + GLuint src1_negate:1; + GLuint pad0:1; + GLuint src1_swz_z:2; + GLuint src1_swz_w:2; + GLuint pad1:1; + GLuint src1_vert_stride:4; + GLuint flag_reg_nr:1; + GLuint pad2:6; + } ia16; + + + struct + { + GLint jump_count:16; /* note: signed */ + GLuint pop_count:4; + GLuint pad0:12; + } if_else; + + struct { + GLuint function:4; + GLuint int_type:1; + GLuint precision:1; + GLuint saturate:1; + GLuint data_type:1; + GLuint pad0:8; + GLuint response_length:4; + GLuint msg_length:4; + GLuint msg_target:4; + GLuint pad1:3; + GLuint end_of_thread:1; + } math; + + struct { + GLuint binding_table_index:8; + GLuint sampler:4; + GLuint return_format:2; + GLuint msg_type:2; + GLuint response_length:4; + GLuint msg_length:4; + GLuint msg_target:4; + GLuint pad1:3; + GLuint end_of_thread:1; + } sampler; + + struct brw_urb_immediate urb; + + struct { + GLuint binding_table_index:8; + GLuint msg_control:4; + GLuint msg_type:2; + GLuint target_cache:2; + GLuint response_length:4; + GLuint msg_length:4; + GLuint msg_target:4; + GLuint pad1:3; + GLuint end_of_thread:1; + } dp_read; + + struct { + GLuint binding_table_index:8; + GLuint msg_control:3; + GLuint pixel_scoreboard_clear:1; + GLuint msg_type:3; + GLuint send_commit_msg:1; + GLuint response_length:4; + GLuint msg_length:4; + GLuint msg_target:4; + GLuint pad1:3; + GLuint end_of_thread:1; + } dp_write; + + struct { + GLuint pad:16; + GLuint response_length:4; + GLuint msg_length:4; + GLuint msg_target:4; + GLuint pad1:3; + GLuint end_of_thread:1; + } generic; + + GLuint ud; + } bits3; +}; + + +#endif diff --git a/src/i810_reg.h b/src/i810_reg.h index 5b9654b2..5ccd8cc5 100644 --- a/src/i810_reg.h +++ b/src/i810_reg.h @@ -1594,6 +1594,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define MI_WRITE_DIRTY_STATE (1<<4) #define MI_END_SCENE (1<<3) #define MI_INHIBIT_RENDER_CACHE_FLUSH (1<<2) +#define MI_STATE_INSTRUCTION_CACHE_FLUSH (1<<1) #define MI_INVALIDATE_MAP_CACHE (1<<0) /* Noop */ @@ -1608,6 +1609,33 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define ENABLE_FOG_CONST (1<<24) #define ENABLE_FOG_DENSITY (1<<23) +/* + * New regs for broadwater -- we need to split this file up sensibly somehow. + */ +#define STATE3D_PIPELINE_SELECT (CMD_3D | (0x01<<24) | (0x04<<16)) +#define PIPELINE_SELECT_3D 0 +#define PIPELINE_SELECT_MEDIA 1 + +#define STATE3D_URB_FENCE (CMD_3D | (0x00<<24) | (0x00<<16)) +#define UF0_CS_REALLOC (1 << 13) +#define UF0_VFE_REALLOC (1 << 12) +#define UF0_SF_REALLOC (1 << 11) +#define UF0_CLIP_REALLOC (1 << 10) +#define UF0_GS_REALLOC (1 << 9) +#define UF0_VS_REALLOC (1 << 8) +#define UF1_CLIP_FENCE_SHIFT 20 +#define UF1_GS_FENCE_SHIFT 10 +#define UF1_VS_FENCE_SHIFT 0 +#define UF2_CS_FENCE_SHIFT 20 +#define UF2_VFE_FENCE_SHIFT 10 +#define UF2_SF_FENCE_SHIFT 0 + +#define STATE3D_DRAWING_RECTANGLE_BRW (CMD_3D | (0x01<<24) | (0x00<<16)) + +#define PRIMITIVE3D_BRW (CMD_3D | (0x03<<27) | (0x08<<16)) +#define PRIM3D_BRW_POINTLIST 0x0 +/* End regs for broadwater */ + #define MAX_DISPLAY_PIPES 2 diff --git a/src/i830_video.c b/src/i830_video.c index 1a133b9a..d13b75fd 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -83,6 +83,8 @@ THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "xaalocal.h" #include "dixstruct.h" #include "fourcc.h" +#include "brw_defines.h" +#include "brw_structs.h" #ifndef USE_USLEEP_FOR_VIDEO #define USE_USLEEP_FOR_VIDEO 0 @@ -488,7 +490,7 @@ I830InitVideo(ScreenPtr pScreen) /* Set up textured video if we can do it at this depth and we are on * supported hardware. */ - if (pScrn->bitsPerPixel >= 16 && IS_I9XX(pI830)) { + if (pScrn->bitsPerPixel >= 16 && IS_I9XX(pI830) || IS_BROADWATER(pI830)) { texturedAdaptor = I830SetupImageVideoTextured(pScreen); if (texturedAdaptor != NULL) { adaptors[num_adaptors++] = texturedAdaptor; @@ -2607,6 +2609,247 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, pI830->AccelInfoRec->NeedToSync = TRUE; } +static void +BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, + RegionPtr dstRegion, + short width, short height, int video_pitch, + int x1, int y1, int x2, int y2, + short src_w, short src_h, + short drw_w, short drw_h, + DrawablePtr pDraw) +{ + I830Ptr pI830 = I830PTR(pScrn); + CARD32 format, ms3, s2; + BoxPtr pbox; + int nbox, dxo, dyo; + Bool planar; + int urb_vs_start, urb_vs_size; + int urb_gs_start, urb_gs_size; + int urb_clip_start, urb_clip_size; + int urb_sf_start, urb_sf_size; + int urb_cs_start, urb_cs_size; + struct brw_surface_state *dest_surf_state; + struct brw_surface_state *src_surf_state; + struct brw_sampler_state *src_sampler_state; + struct brw_cc_unit_state *cc_state; + + ErrorF("BroadwaterDisplayVideoTextured: %dx%d (pitch %d)\n", width, height, + video_pitch); + + assert((id == FOURCC_UYVY) || (id == FOURCC_YUY2)); + + /* Tell the rotation code that we have stomped its invariant state by + * setting a high bit. We don't use any invariant 3D state for video, so we + * don't have to worry about it ourselves. + */ + *pI830->used3D |= 1 << 30; + + /* Set up a default static partitioning of the URB, which is supposed to + * allow anything we would want to do, at potentially lower performance. + */ + urb_vs_start = 0; + urb_vs_size = 8 * 5; + urb_gs_start = urb_vs_start + urb_vs_size; + urb_gs_size = 4 * 5; + urb_clip_start = urb_gs_start + urb_gs_size; + urb_clip_size = 6 * 5; + urb_sf_start = urb_clip_start + urb_clip_size; + urb_sf_size = 8 * 11; + urb_cs_start = urb_sf_start + urb_sf_size; + urb_cs_size = 2 * 32; + + /* We'll be poking the state buffers that could be in use by the 3d hardware + * here, but we should have synced the 3D engine if we've reached this point. + */ + + /* XXX: Allocate space for our state buffers, and set up the state structure + * pointers. + */ + + /* Set up the state buffer for the destination surface */ + memset(dest_surf_state, 0, sizeof(*dest_surf_state)); + dest_surf_state->ss0.surface_type = BRW_SURFACE_2D; + if (pI830->cpp == 2) { + dest_surf_state->ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM; + } else { + dest_surf_state->ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8X8_UNORM; + } + dest_surf_state->ss1.base_addr = pI830->bufferOffset; + dest_surf_state->ss2.width = pScrn->virtualX - 1; + dest_surf_state->ss2.height = pScrn->virtualY - 1; + dest_surf_state->ss3.pitch = pI830->displayWidth * pI830->cpp; + + /* Set up the source surface state buffer */ + memset(src_surf_state, 0, sizeof(*src_surf_state)); + src_surf_state->ss0.surface_type = BRW_SURFACE_2D; + switch (id) { + case FOURCC_YUY2: + src_surf_state->ss0.surface_format = BRW_SURFACEFORMAT_YCRCB_NORMAL; + break; + case FOURCC_UYVY: + src_surf_state->ss0.surface_format = BRW_SURFACEFORMAT_YCRCB_SWAPY; + break; + } + src_surf_state->ss1.base_addr = pPriv->YBuf0offset; + src_surf_state->ss2.width = width; + src_surf_state->ss2.height = height; + src_surf_state->ss3.pitch = video_pitch - 1; + + /* Set up the packed YUV source sampler. Doesn't do colorspace conversion. + */ + memset(src_sampler_state, 0, sizeof(*src_sampler_state)); + src_sampler_state->ss0.min_filter = BRW_MAPFILTER_LINEAR; + src_sampler_state->ss0.mag_filter = BRW_MAPFILTER_LINEAR; + src_sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP; + src_sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP; + + /* XXX: Set up binding table state */ + /* XXX: Set up the VF for however we send our prims */ + /* XXX: Set up the SF kernel to do coord interp */ + /* XXX: Set up the SF state */ + /* XXX: Set up the clipper to do nothing for us, I think */ + + /* XXX: Set up the PS kernel (dispatched by WM) for convertiny YUV to RGB. + * The 3D driver does this as: + * + CONST C0 = { -.5, -.0625, -.5, 1.164 } + CONST C1 = { 1.596, -0.813, 2.018, -.391 } + UYV = TEX ... + UYV.xyz = ADD UYV, C0 + UYV.y = MUL UYV.y, C0.w + RGB.xyz = MAD UYV.xxz, C1, UYV.y + RGB.y = MAD UYV.z, C1.w, RGB.y + * + */ + + /* XXX: Set up the WM state. */ + + /* XXX: Set up CC_VIEWPORT, though we really don't care about its behavior. + */ + + memset(cc_state, 0, sizeof(*cc_state)); + /* XXX: Set pointer to CC_VIEWPORT */ + + BEGIN_LP_RING(XXX); + OUT_RING(MI_FLUSH | MI_STATE_INSTRUCTION_CACHE_FLUSH); + + OUT_RING(STATE3D_PIPELINE_SELECT | PIPELINE_SELECT_3D); + + OUT_RING(STATE3D_URB_FENCE | + UF0_CS_REALLOC | + UF0_VFE_REALLOC | + UF0_SF_REALLOC | + UF0_CLIP_REALLOC | + UF0_GS_REALLOC | + UF0_VS_REALLOC); + OUT_RING(((urb_clip_start + urb_clip_size) << UF1_CLIP_FENCE_SHIFT) | + ((urb_gs_start + urb_gs_size) << UF1_GS_FENCE_SHIFT) | + ((urb_vs_start + urb_vs_size) << UF1_VS_FENCE_SHIFT)); + OUT_RING(((urb_cs_start + urb_cs_size) << UF2_CS_FENCE_SHIFT) | + ((urb_vfe_start + urb_vfe_size) << UF2_VFE_FENCE_SHIFT) | + ((urb_sf_start + urb_sf_size) << UF2_SF_FENCE_SHIFT)); + + OUT_RING(STATE3D_DRAWING_RECTANGLE_BRW | 2); + OUT_RING(0x00000000); /* ymin, xmin */ + OUT_RING((pScrn->virtualX - 1) | + (pScrn->virtualY - 1) << 16); /* ymax, xmax */ + OUT_RING(0x00000000); /* yorigin, xorigin */ + + /* XXX: Set the locations of the sampler/surface/etc. state */ + + ADVANCE_LP_RING(); + + /* XXX: Finally, emit some prims */ + + dxo = dstRegion->extents.x1; + dyo = dstRegion->extents.y1; + +#if 0 + pbox = REGION_RECTS(dstRegion); + nbox = REGION_NUM_RECTS(dstRegion); + while (nbox--) + { + int box_x1 = pbox->x1; + int box_y1 = pbox->y1; + int box_x2 = pbox->x2; + int box_y2 = pbox->y2; + int j; + float src_scale_x, src_scale_y; + CARD32 vb[40]; + float verts[4][2], tex[4][2], tex2[4][2]; + int vert_data_count; + + pbox++; + + src_scale_x = (float)src_w / (float)drw_w; + src_scale_y = (float)src_h / (float)drw_h; + + if (!planar) + vert_data_count = 32; + else + vert_data_count = 40; + + BEGIN_LP_RING(vert_data_count + 8); + OUT_RING(MI_NOOP); + OUT_RING(MI_NOOP); + OUT_RING(MI_NOOP); + OUT_RING(MI_NOOP); + OUT_RING(MI_NOOP); + OUT_RING(MI_NOOP); + OUT_RING(MI_NOOP); + + /* vertex data */ + OUT_RING(PRIMITIVE3D | PRIM3D_INLINE | PRIM3D_TRIFAN | + (vert_data_count - 1)); + verts[0][0] = box_x1; verts[0][1] = box_y1; + verts[1][0] = box_x2; verts[1][1] = box_y1; + verts[2][0] = box_x2; verts[2][1] = box_y2; + verts[3][0] = box_x1; verts[3][1] = box_y2; + + if (!planar) { + tex[0][0] = (box_x1 - dxo) * src_scale_x; + tex[0][1] = (box_y1 - dyo) * src_scale_y; + tex[1][0] = (box_x2 - dxo) * src_scale_x; + tex[1][1] = (box_y1 - dyo) * src_scale_y; + tex[2][0] = (box_x2 - dxo) * src_scale_x; + tex[2][1] = (box_y2 - dyo) * src_scale_y; + tex[3][0] = (box_x1 - dxo) * src_scale_x; + tex[3][1] = (box_y2 - dyo) * src_scale_y; + /* emit vertex buffer */ + draw_poly(vb, verts, tex, NULL); + for (j = 0; j < vert_data_count; j++) + OUT_RING(vb[j]); + } else { + tex[0][0] = (box_x1 - dxo) * src_scale_x / 2.0; + tex[0][1] = (box_y1 - dyo) * src_scale_y / 2.0; + tex[1][0] = (box_x2 - dxo) * src_scale_x / 2.0; + tex[1][1] = (box_y1 - dyo) * src_scale_y / 2.0; + tex[2][0] = (box_x2 - dxo) * src_scale_x / 2.0; + tex[2][1] = (box_y2 - dyo) * src_scale_y / 2.0; + tex[3][0] = (box_x1 - dxo) * src_scale_x / 2.0; + tex[3][1] = (box_y2 - dyo) * src_scale_y / 2.0; + tex2[0][0] = (box_x1 - dxo) * src_scale_x; + tex2[0][1] = (box_y1 - dyo) * src_scale_y; + tex2[1][0] = (box_x2 - dxo) * src_scale_x; + tex2[1][1] = (box_y1 - dyo) * src_scale_y; + tex2[2][0] = (box_x2 - dxo) * src_scale_x; + tex2[2][1] = (box_y2 - dyo) * src_scale_y; + tex2[3][0] = (box_x1 - dxo) * src_scale_x; + tex2[3][1] = (box_y2 - dyo) * src_scale_y; + /* emit vertex buffer */ + draw_poly(vb, verts, tex, tex2); + for (j = 0; j < vert_data_count; j++) + OUT_RING(vb[j]); + } + + ADVANCE_LP_RING(); + } +#endif + + if (pI830->AccelInfoRec) + pI830->AccelInfoRec->NeedToSync = TRUE; +} + static FBLinearPtr I830AllocateMemory(ScrnInfoPtr pScrn, FBLinearPtr linear, int size) { @@ -2749,7 +2992,7 @@ I830PutImage(ScrnInfoPtr pScrn, if (pPriv->textured) { pitchAlignMask = 3; } else { - if (IS_BROADWATER(pI830)) { + if (IS_BROADWATER(pI830)) pitchAlignMask = 255; else pitchAlignMask = 63; From ad7ec6a24b436d5492d38e4fa56845b229cf5fb8 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 18 May 2006 15:26:28 -0700 Subject: [PATCH 29/70] Checkpoint of BW textured video work, filling out vertex submission stuff and some more other state. --- src/i810_reg.h | 22 ++++++- src/i830_video.c | 154 +++++++++++++++++++++++++++++------------------ 2 files changed, 115 insertions(+), 61 deletions(-) diff --git a/src/i810_reg.h b/src/i810_reg.h index 5ccd8cc5..f949d3c0 100644 --- a/src/i810_reg.h +++ b/src/i810_reg.h @@ -1632,8 +1632,26 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define STATE3D_DRAWING_RECTANGLE_BRW (CMD_3D | (0x01<<24) | (0x00<<16)) -#define PRIMITIVE3D_BRW (CMD_3D | (0x03<<27) | (0x08<<16)) -#define PRIM3D_BRW_POINTLIST 0x0 +#define STATE3D_BASE_ADDRESS (CMD_3D | (0x01<<24) | (0x01<<16)) +#define BASE_ADDRESS_MODIFY (1 << 0) + +#define STATE3D_PIPELINED_POINTERS (CMD_3D | (0x00<<24) | (0x00<<16)) + +#define STATE3D_VERTEX_BUFFERS (CMD_3D | (0x03<<27) | (0x00<<24) | (0x08<<16)) +#define VB0_BUFFER_INDEX_SHIFT 27 +#define VB0_VERTEXDATA (0 << 26) +#define VB0_INSTANCEDATA (1 << 26) +#define VB0_BUFFER_PITCH_SHIFT 0 + +#define STATE3D_VERTEX_ELEMENTS (CMD_3D | (0x00<<24) | (0x09<<16)) +#define VE0_VERTEX_BUFFER_INDEX_SHIFT 27 +#define VE0_VALID (1 << 26) +#define VE0_FORMAT_SHIFT 16 +#define VE0_OFFSET_SHIFT 0 + +#define PRIMITIVE3D_BRW (CMD_3D | (0x03<<27) | (0x03<<24) | (0x08<<16)) +/* Primitive types are in brw_defines.h */ +#define P3D0_TOPO_SHIFT 10 /* End regs for broadwater */ diff --git a/src/i830_video.c b/src/i830_video.c index d13b75fd..3f117728 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2115,6 +2115,14 @@ union intfloat { float f; }; +static inline CARD32 float_as_int(float f) +{ + union intfloat tmp; + + tmp.f = f; + return tmp.ui; +} + #define OUT_RING_F(x) do { \ union intfloat _tmp; \ _tmp.f = x; \ @@ -2632,6 +2640,9 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, struct brw_surface_state *src_surf_state; struct brw_sampler_state *src_sampler_state; struct brw_cc_unit_state *cc_state; + struct brw_vs_unit_state *vs_state; + CARD32 *vb; + Bool first_output = TRUE; ErrorF("BroadwaterDisplayVideoTextured: %dx%d (pitch %d)\n", width, height, video_pitch); @@ -2662,8 +2673,8 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, * here, but we should have synced the 3D engine if we've reached this point. */ - /* XXX: Allocate space for our state buffers, and set up the state structure - * pointers. + /* XXX: Allocate space for our state buffers and vb, and set up the state + * structure pointers. */ /* Set up the state buffer for the destination surface */ @@ -2703,11 +2714,14 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, src_sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP; src_sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP; + /* Set up the vertex shader to be disabled (passthrough) */ + memset(vs_state, 0, sizeof(*vs_state)); + vs_state->vs6.vs_enable = FALSE; + /* XXX: Set up binding table state */ /* XXX: Set up the VF for however we send our prims */ /* XXX: Set up the SF kernel to do coord interp */ /* XXX: Set up the SF state */ - /* XXX: Set up the clipper to do nothing for us, I think */ /* XXX: Set up the PS kernel (dispatched by WM) for convertiny YUV to RGB. * The 3D driver does this as: @@ -2737,7 +2751,6 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, OUT_RING(STATE3D_URB_FENCE | UF0_CS_REALLOC | - UF0_VFE_REALLOC | UF0_SF_REALLOC | UF0_CLIP_REALLOC | UF0_GS_REALLOC | @@ -2746,15 +2759,51 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, ((urb_gs_start + urb_gs_size) << UF1_GS_FENCE_SHIFT) | ((urb_vs_start + urb_vs_size) << UF1_VS_FENCE_SHIFT)); OUT_RING(((urb_cs_start + urb_cs_size) << UF2_CS_FENCE_SHIFT) | - ((urb_vfe_start + urb_vfe_size) << UF2_VFE_FENCE_SHIFT) | ((urb_sf_start + urb_sf_size) << UF2_SF_FENCE_SHIFT)); + OUT_RING(STATE3D_BASE_ADDRESS | 4); + OUT_RING(XXX | BASE_ADDRESS_MODIFY); /* general state base addr, 4k align */ + OUT_RING(XXX | BASE_ADDRESS_MODIFY); /* surf state base addr, 4k align */ + OUT_RING(0); /* media base addr, don't care */ + OUT_RING(0); /* general state max addr, disabled */ + OUT_RING(0); /* media object state max addr, disabled */ + + OUT_RING(STATE3D_PIPELINED_POINTERS | 5); + OUT_RING((char *)vs_state - general_state_base); /* 32 byte aligned */ + OUT_RING(0); /* disable GS, resulting in passthrough */ + OUT_RING(0); /* disable CLIP, resulting in passthrough */ + OUT_RING((char *)sf_state - general_state_base); /* 32 byte aligned */ + OUT_RING((char *)wm_state - general_state_base); /* 32 byte aligned */ + OUT_RING((char *)color_calc_state - general_state_base); /* 64 byte aligned */ + OUT_RING(STATE3D_DRAWING_RECTANGLE_BRW | 2); OUT_RING(0x00000000); /* ymin, xmin */ OUT_RING((pScrn->virtualX - 1) | (pScrn->virtualY - 1) << 16); /* ymax, xmax */ OUT_RING(0x00000000); /* yorigin, xorigin */ + OUT_RING(STATE3D_VERTEX_BUFFERS | 2); + OUT_RING((0 << VB0_BUFFER_INDEX_SHIFT) | + VB0_VERTEXDATA | + (16 << VB0_BUFFER_PITCH_SHIFT)); + OUT_RING(vb - pScrn->fbOffset); + OUT_RING(0xffffffff); /* Max index -- don't care */ + + /* Set up our vertex elements, sourced from the single vertex buffer. */ + OUT_RING(STATE3D_VERTEX_ELEMENTS | XXX); + /* offset 0: X,Y */ + OUT_RING((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) | + VE0_VALID | + (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | + (0 << VE0_OFFSET_SHIFT)); + /* offset 8: S0, S1 */ + OUT_RING(0); + OUT_RING((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) | + VE0_VALID | + (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | + (8 << VE0_OFFSET_SHIFT)); + OUT_RING(0); + /* XXX: Set the locations of the sampler/surface/etc. state */ ADVANCE_LP_RING(); @@ -2764,7 +2813,6 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, dxo = dstRegion->extents.x1; dyo = dstRegion->extents.y1; -#if 0 pbox = REGION_RECTS(dstRegion); nbox = REGION_NUM_RECTS(dstRegion); while (nbox--) @@ -2773,12 +2821,16 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, int box_y1 = pbox->y1; int box_x2 = pbox->x2; int box_y2 = pbox->y2; - int j; + int i; float src_scale_x, src_scale_y; CARD32 vb[40]; float verts[4][2], tex[4][2], tex2[4][2]; int vert_data_count; + if (!first_output) { + /* XXX: idle */ + } + pbox++; src_scale_x = (float)src_w / (float)drw_w; @@ -2789,62 +2841,46 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, else vert_data_count = 40; + OUT_RING(MI_NOOP); + OUT_RING(MI_NOOP); + OUT_RING(MI_NOOP); + OUT_RING(MI_NOOP); + OUT_RING(MI_NOOP); + OUT_RING(MI_NOOP); + OUT_RING(MI_NOOP); + + vb[i++] = box_x1; + vb[i++] = box_y1; + vb[i++] = box_x1 - dxo; + vb[i++] = box_y1 - dyo; + + vb[i++] = box_x2; + vb[i++] = box_y1; + vb[i++] = box_x2 - dxo; + vb[i++] = box_y1 - dyo; + + vb[i++] = box_x2; + vb[i++] = box_y2; + vb[i++] = box_x2 - dxo; + vb[i++] = box_y2 - dyo; + + vb[i++] = box_x1; + vb[i++] = box_y2; + vb[i++] = box_x1 - dxo; + vb[i++] = box_y2 - dyo; + BEGIN_LP_RING(vert_data_count + 8); - OUT_RING(MI_NOOP); - OUT_RING(MI_NOOP); - OUT_RING(MI_NOOP); - OUT_RING(MI_NOOP); - OUT_RING(MI_NOOP); - OUT_RING(MI_NOOP); - OUT_RING(MI_NOOP); - - /* vertex data */ - OUT_RING(PRIMITIVE3D | PRIM3D_INLINE | PRIM3D_TRIFAN | - (vert_data_count - 1)); - verts[0][0] = box_x1; verts[0][1] = box_y1; - verts[1][0] = box_x2; verts[1][1] = box_y1; - verts[2][0] = box_x2; verts[2][1] = box_y2; - verts[3][0] = box_x1; verts[3][1] = box_y2; - - if (!planar) { - tex[0][0] = (box_x1 - dxo) * src_scale_x; - tex[0][1] = (box_y1 - dyo) * src_scale_y; - tex[1][0] = (box_x2 - dxo) * src_scale_x; - tex[1][1] = (box_y1 - dyo) * src_scale_y; - tex[2][0] = (box_x2 - dxo) * src_scale_x; - tex[2][1] = (box_y2 - dyo) * src_scale_y; - tex[3][0] = (box_x1 - dxo) * src_scale_x; - tex[3][1] = (box_y2 - dyo) * src_scale_y; - /* emit vertex buffer */ - draw_poly(vb, verts, tex, NULL); - for (j = 0; j < vert_data_count; j++) - OUT_RING(vb[j]); - } else { - tex[0][0] = (box_x1 - dxo) * src_scale_x / 2.0; - tex[0][1] = (box_y1 - dyo) * src_scale_y / 2.0; - tex[1][0] = (box_x2 - dxo) * src_scale_x / 2.0; - tex[1][1] = (box_y1 - dyo) * src_scale_y / 2.0; - tex[2][0] = (box_x2 - dxo) * src_scale_x / 2.0; - tex[2][1] = (box_y2 - dyo) * src_scale_y / 2.0; - tex[3][0] = (box_x1 - dxo) * src_scale_x / 2.0; - tex[3][1] = (box_y2 - dyo) * src_scale_y / 2.0; - tex2[0][0] = (box_x1 - dxo) * src_scale_x; - tex2[0][1] = (box_y1 - dyo) * src_scale_y; - tex2[1][0] = (box_x2 - dxo) * src_scale_x; - tex2[1][1] = (box_y1 - dyo) * src_scale_y; - tex2[2][0] = (box_x2 - dxo) * src_scale_x; - tex2[2][1] = (box_y2 - dyo) * src_scale_y; - tex2[3][0] = (box_x1 - dxo) * src_scale_x; - tex2[3][1] = (box_y2 - dyo) * src_scale_y; - /* emit vertex buffer */ - draw_poly(vb, verts, tex, tex2); - for (j = 0; j < vert_data_count; j++) - OUT_RING(vb[j]); - } + OUT_RING(PRIMITIVE3D_BRW | (_3DPRIM_TRIFAN << P3D0_TOPO_SHIFT) | 4); + OUT_RING(4); /* vertex count per instance */ + OUT_RING(0); /* start vertex offset */ + OUT_RING(1); /* single instance */ + OUT_RING(0); /* start instance location */ + OUT_RING(0); /* index buffer offset, ignored */ ADVANCE_LP_RING(); + + first_output = FALSE; } -#endif if (pI830->AccelInfoRec) pI830->AccelInfoRec->NeedToSync = TRUE; From de06cd70a9edb8b56d05d3f505137f7c7f083c2f Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 18 May 2006 18:27:11 -0700 Subject: [PATCH 30/70] Checkpoint for filling out more 3D state. --- src/i810_reg.h | 7 ++++ src/i830_video.c | 101 ++++++++++++++++++++++++++++++++++++----------- 2 files changed, 85 insertions(+), 23 deletions(-) diff --git a/src/i810_reg.h b/src/i810_reg.h index f949d3c0..0e13932a 100644 --- a/src/i810_reg.h +++ b/src/i810_reg.h @@ -1648,6 +1648,13 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define VE0_VALID (1 << 26) #define VE0_FORMAT_SHIFT 16 #define VE0_OFFSET_SHIFT 0 +#define VE1_VFCOMPONENT_0_SHIFT 28 +#define VE1_VFCOMPONENT_1_SHIFT 24 +#define VE1_VFCOMPONENT_2_SHIFT 20 +#define VE1_VFCOMPONENT_3_SHIFT 16 +#define VE1_DESTINATION_ELEMENT_OFFSET_SHIFT 0 + +#define STATE3D_BINDING_TABLE_POINTERS (CMD_3D | (0x03<<27) | (0x00<<24) | (0x01<<16)) #define PRIMITIVE3D_BRW (CMD_3D | (0x03<<27) | (0x03<<24) | (0x08<<16)) /* Primitive types are in brw_defines.h */ diff --git a/src/i830_video.c b/src/i830_video.c index 3f117728..9b60112e 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2639,9 +2639,11 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, struct brw_surface_state *dest_surf_state; struct brw_surface_state *src_surf_state; struct brw_sampler_state *src_sampler_state; - struct brw_cc_unit_state *cc_state; struct brw_vs_unit_state *vs_state; - CARD32 *vb; + struct brw_sf_unit_state *sf_state; + struct brw_wm_unit_state *wm_state; + struct brw_cc_unit_state *cc_state; + CARD32 *vb, *cc_viewport, *binding_table; Bool first_output = TRUE; ErrorF("BroadwaterDisplayVideoTextured: %dx%d (pitch %d)\n", width, height, @@ -2706,6 +2708,11 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, src_surf_state->ss2.height = height; src_surf_state->ss3.pitch = video_pitch - 1; + /* Set up a binding table for our two surfaces. Only the PS will use it */ + /* XXX: are these offset from the right place? */ + binding_table[0] = (CARD32)((char *)dest_surf_state - pScrn->fbOffset); + binding_table[1] = (CARD32)((char *)src_surf_state - pScrn->fbOffset); + /* Set up the packed YUV source sampler. Doesn't do colorspace conversion. */ memset(src_sampler_state, 0, sizeof(*src_sampler_state)); @@ -2718,10 +2725,26 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, memset(vs_state, 0, sizeof(*vs_state)); vs_state->vs6.vs_enable = FALSE; - /* XXX: Set up binding table state */ - /* XXX: Set up the VF for however we send our prims */ - /* XXX: Set up the SF kernel to do coord interp */ - /* XXX: Set up the SF state */ + /* XXX: Set up the SF kernel to do coord interp: for each attribute, + * calculate dA/dx and dA/dy. Hand these interpolation coefficients + * back to SF which then hands pixels off to WM. + */ + + memset(sf_state, 0, sizeof(*sf_state)); + sf_state->thread0.kernel_start_pointer = XXX; + sf_state->thread0.grf_reg_count = XXX; + sf_state->thread1.single_program_flow = XXX; + sf_state->thread2.scratch_space_base_pointer = XXX; /* 1k aligned */ + sf_state->thread4.nr_urb_entries = 8; + sf_state->thread4.urb_entry_allocation_size = 11; + sf_state->thread4.max_threads = MIN(12, sf_state->thread4.nr_urb_entries / + 2) - 1; + sf_state->sf5.viewport_transform = FALSE; /* skip viewport */ + sf_state->sf6.cull_mode = BRW_CULLMODE_BOTH; + sf_state->sf6.scissor = + sf_state->sf6.dest_org_vbias = 0x8; + sf_state->sf6.dest_org_hbias = 0x8; + sf_state->sf7.trifan_pv = 2; /* XXX: Set up the PS kernel (dispatched by WM) for convertiny YUV to RGB. * The 3D driver does this as: @@ -2736,13 +2759,27 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, * */ - /* XXX: Set up the WM state. */ + wm_state->thread0.kernel_start_pointer = XXX; + wm_state->thread0.grf_reg_count = XXX; + wm_state->thread1.binding_table_entry_count = 2; + wm_state->thread2.scratch_space_base_pointer = XXX; + wm_state->thread2.per_thread_scratch_space = XXX; + wm_state->thread3.dispatch_grf_start_reg = XXX; + wm_state->thread3.urb_entry_read_length = XXX; + wm_state->thread3.const_urb_entry_read_length = XXX; + wm_state->wm4.sampler_state_pointer = + ((CARD8 *)src_sampler_state - general_state_base) >> 5; + wm_state->wm4.sampler_count = 1; /* 1-4 samplers used */ + wm_state->wm5.max_threads = 31; + wm_state->wm5.thread_dispatch_enable = 1; + wm_state->wm5.enable_16_pix = 1; - /* XXX: Set up CC_VIEWPORT, though we really don't care about its behavior. - */ + cc_viewport[0] = float_as_int(0.0); + cc_viewport[1] = float_as_int(0.0); memset(cc_state, 0, sizeof(*cc_state)); - /* XXX: Set pointer to CC_VIEWPORT */ + cc_state->cc4.cc_viewport_state_offset = + ((char *)cc_viewport - general_state_base) >> 5; BEGIN_LP_RING(XXX); OUT_RING(MI_FLUSH | MI_STATE_INSTRUCTION_CACHE_FLUSH); @@ -2761,55 +2798,73 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, OUT_RING(((urb_cs_start + urb_cs_size) << UF2_CS_FENCE_SHIFT) | ((urb_sf_start + urb_sf_size) << UF2_SF_FENCE_SHIFT)); + /* Set the general and surface state base addresses */ OUT_RING(STATE3D_BASE_ADDRESS | 4); - OUT_RING(XXX | BASE_ADDRESS_MODIFY); /* general state base addr, 4k align */ - OUT_RING(XXX | BASE_ADDRESS_MODIFY); /* surf state base addr, 4k align */ + OUT_RING((general_state_base - pScrn->fbOffset) | BASE_ADDRESS_MODIFY); + OUT_RING((surf_state_base - pScrn->fbOffset) | BASE_ADDRESS_MODIFY); OUT_RING(0); /* media base addr, don't care */ OUT_RING(0); /* general state max addr, disabled */ OUT_RING(0); /* media object state max addr, disabled */ + /* Set the pointers to the 3d pipeline state */ OUT_RING(STATE3D_PIPELINED_POINTERS | 5); OUT_RING((char *)vs_state - general_state_base); /* 32 byte aligned */ OUT_RING(0); /* disable GS, resulting in passthrough */ OUT_RING(0); /* disable CLIP, resulting in passthrough */ OUT_RING((char *)sf_state - general_state_base); /* 32 byte aligned */ OUT_RING((char *)wm_state - general_state_base); /* 32 byte aligned */ - OUT_RING((char *)color_calc_state - general_state_base); /* 64 byte aligned */ + OUT_RING((char *)cc_state - general_state_base); /* 64 byte aligned */ + /* Only the PS uses the binding table */ + OUT_RING(STATE3D_BINDING_TABLE_POINTERS | 4); + OUT_RING(0); /* vs */ + OUT_RING(0); /* gs */ + OUT_RING(0); /* clip */ + OUT_RING(0); /* sf */ + OUT_RING((char *)binding_table - surf_state_base); /* ps */ + + /* The drawing rectangle clipping is always on. Set it to values that + * shouldn't do any clipping. + */ OUT_RING(STATE3D_DRAWING_RECTANGLE_BRW | 2); OUT_RING(0x00000000); /* ymin, xmin */ OUT_RING((pScrn->virtualX - 1) | (pScrn->virtualY - 1) << 16); /* ymax, xmax */ OUT_RING(0x00000000); /* yorigin, xorigin */ + /* Set up the pointer to our vertex buffer */ OUT_RING(STATE3D_VERTEX_BUFFERS | 2); OUT_RING((0 << VB0_BUFFER_INDEX_SHIFT) | VB0_VERTEXDATA | (16 << VB0_BUFFER_PITCH_SHIFT)); - OUT_RING(vb - pScrn->fbOffset); + OUT_RING((CARD32)((char *)vb - pScrn->fbOffset)); OUT_RING(0xffffffff); /* Max index -- don't care */ /* Set up our vertex elements, sourced from the single vertex buffer. */ OUT_RING(STATE3D_VERTEX_ELEMENTS | XXX); - /* offset 0: X,Y */ + /* offset 0: X,Y -> {X, Y, 0.0, 0.0} */ OUT_RING((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) | VE0_VALID | (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | (0 << VE0_OFFSET_SHIFT)); - /* offset 8: S0, S1 */ - OUT_RING(0); + OUT_RING((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | + (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | + (BRW_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT) | + (BRW_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT) | + (0 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT)); + /* offset 8: S0, T0 -> {S0, T0, 0.0, 0.0} */ OUT_RING((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) | VE0_VALID | (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | (8 << VE0_OFFSET_SHIFT)); - OUT_RING(0); - - /* XXX: Set the locations of the sampler/surface/etc. state */ + OUT_RING((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | + (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | + (BRW_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT) | + (BRW_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT) | + (4 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT)); ADVANCE_LP_RING(); - /* XXX: Finally, emit some prims */ - dxo = dstRegion->extents.x1; dyo = dstRegion->extents.y1; @@ -2869,7 +2924,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, vb[i++] = box_x1 - dxo; vb[i++] = box_y2 - dyo; - BEGIN_LP_RING(vert_data_count + 8); + BEGIN_LP_RING(XXX); OUT_RING(PRIMITIVE3D_BRW | (_3DPRIM_TRIFAN << P3D0_TOPO_SHIFT) | 4); OUT_RING(4); /* vertex count per instance */ OUT_RING(0); /* start vertex offset */ From 3640117bd9f2073ff54dc474f0cdefff49742584 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Fri, 19 May 2006 17:10:04 -0700 Subject: [PATCH 31/70] Set up the state buffer in framebuffer. --- src/i830_video.c | 120 ++++++++++++++++++++++++++++++++++++----------- 1 file changed, 92 insertions(+), 28 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index 9b60112e..27d6c798 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -119,6 +119,9 @@ static int I830QueryImageAttributesTextured(ScrnInfoPtr, int, unsigned short *, static void I830BlockHandler(int, pointer, pointer, pointer); +static FBLinearPtr +I830AllocateMemory(ScrnInfoPtr pScrn, FBLinearPtr linear, int size); + #define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, TRUE) static Atom xvBrightness, xvContrast, xvColorKey, xvPipe, xvDoubleBuffer; @@ -2115,14 +2118,6 @@ union intfloat { float f; }; -static inline CARD32 float_as_int(float f) -{ - union intfloat tmp; - - tmp.f = f; - return tmp.ui; -} - #define OUT_RING_F(x) do { \ union intfloat _tmp; \ _tmp.f = x; \ @@ -2643,8 +2638,17 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, struct brw_sf_unit_state *sf_state; struct brw_wm_unit_state *wm_state; struct brw_cc_unit_state *cc_state; - CARD32 *vb, *cc_viewport, *binding_table; + struct brw_cc_viewport *cc_viewport; + CARD32 *vb, *binding_table; Bool first_output = TRUE; + int surf_state_base_offset, general_state_base_offset; + int dest_surf_offset, src_surf_offset, src_sampler_offset, vs_offset; + int sf_offset, wm_offset, cc_offset, vb_offset, cc_viewport_offset; + int binding_table_offset; + int next_offset, total_state_size; + int vb_size = (4 * 4) * 4; /* 4 DWORDS per vertex */ + FBLinearPtr state_area; + char *state_base; ErrorF("BroadwaterDisplayVideoTextured: %dx%d (pitch %d)\n", width, height, video_pitch); @@ -2657,6 +2661,66 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, */ *pI830->used3D |= 1 << 30; + next_offset = 0; + + /* Set up our layout of state in framebuffer. First the general state: */ + vs_offset = ALIGN(next_offset, 64); + general_state_base_offset = vs_offset; + next_offset = vs_offset + sizeof(*vs_state); + sf_offset = ALIGN(next_offset, 32); + next_offset = sf_offset + sizeof(*sf_state); + wm_offset = ALIGN(next_offset, 32); + next_offset = wm_offset + sizeof(*wm_state); + cc_offset = ALIGN(next_offset, 32); + next_offset = cc_offset + sizeof(*cc_state); + + /* XXX: Add space for SF and PS kernels */ + + cc_viewport_offset = ALIGN(next_offset, 32); + next_offset = cc_viewport_offset + sizeof(*cc_viewport); + + src_sampler_offset = ALIGN(next_offset, 32); + next_offset = src_sampler_offset + sizeof(*src_sampler_state); + + /* Align VB to native size of elements, for safety */ + vb_offset = ALIGN(next_offset, 8); + next_offset = vb_offset + vb_size; + + /* And then the general state: */ + dest_surf_offset = ALIGN(next_offset, 32); + surf_state_base_offset = dest_surf_offset; + next_offset = dest_surf_offset + sizeof(*dest_surf_state); + src_surf_offset = ALIGN(next_offset, 32); + next_offset = src_surf_offset + sizeof(*src_surf_state); + binding_table_offset = ALIGN(next_offset, 32); + next_offset = binding_table_offset + (2 * 4); + + /* Allocate an area in framebuffer for our state layout we just set up */ + total_state_size = next_offset; + state_area = I830AllocateMemory(pScrn, NULL, (total_state_size + 32) / + pI830->cpp); + if (state_area == NULL) { + ErrorF("Failed to allocate %d bytes for state\n", total_state_size); + return; + } + + state_base = (char *)(pI830->FrontBuffer.Start + pPriv->linear->offset * + pI830->cpp); + /* Set up our pointers to state structures in framebuffer. It would probably + * be a good idea to fill these structures out in system memory and then dump + * them there, instead. + */ + vs_state = (void *)(state_base + vs_offset); + sf_state = (void *)(state_base + sf_offset); + wm_state = (void *)(state_base + wm_offset); + cc_state = (void *)(state_base + cc_offset); + cc_viewport = (void *)(state_base + cc_viewport_offset); + dest_surf_state = (void *)(state_base + dest_surf_offset); + src_surf_state = (void *)(state_base + src_surf_offset); + src_sampler_state = (void *)(state_base + src_sampler_offset); + binding_table = (void *)(state_base + binding_table_offset); + vb = (void *)(state_base + vb_offset); + /* Set up a default static partitioning of the URB, which is supposed to * allow anything we would want to do, at potentially lower performance. */ @@ -2672,11 +2736,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, urb_cs_size = 2 * 32; /* We'll be poking the state buffers that could be in use by the 3d hardware - * here, but we should have synced the 3D engine if we've reached this point. - */ - - /* XXX: Allocate space for our state buffers and vb, and set up the state - * structure pointers. + * here, but we should have synced the 3D engine already in I830PutImage. */ /* Set up the state buffer for the destination surface */ @@ -2710,8 +2770,8 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, /* Set up a binding table for our two surfaces. Only the PS will use it */ /* XXX: are these offset from the right place? */ - binding_table[0] = (CARD32)((char *)dest_surf_state - pScrn->fbOffset); - binding_table[1] = (CARD32)((char *)src_surf_state - pScrn->fbOffset); + binding_table[0] = dest_surf_state_offset - surf_state_base_offset; + binding_table[1] = src_surf_state_offset - surf_state_base_offset; /* Set up the packed YUV source sampler. Doesn't do colorspace conversion. */ @@ -2768,18 +2828,18 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, wm_state->thread3.urb_entry_read_length = XXX; wm_state->thread3.const_urb_entry_read_length = XXX; wm_state->wm4.sampler_state_pointer = - ((CARD8 *)src_sampler_state - general_state_base) >> 5; + (src_sampler_offset - general_state_base_offset) >> 5; wm_state->wm4.sampler_count = 1; /* 1-4 samplers used */ wm_state->wm5.max_threads = 31; wm_state->wm5.thread_dispatch_enable = 1; wm_state->wm5.enable_16_pix = 1; - cc_viewport[0] = float_as_int(0.0); - cc_viewport[1] = float_as_int(0.0); + cc_viewport->min_depth = 0.0; + cc_viewport->max_depth = 0.0; memset(cc_state, 0, sizeof(*cc_state)); cc_state->cc4.cc_viewport_state_offset = - ((char *)cc_viewport - general_state_base) >> 5; + (cc_viewport_offset - general_state_base_offset) >> 5; BEGIN_LP_RING(XXX); OUT_RING(MI_FLUSH | MI_STATE_INSTRUCTION_CACHE_FLUSH); @@ -2800,20 +2860,22 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, /* Set the general and surface state base addresses */ OUT_RING(STATE3D_BASE_ADDRESS | 4); - OUT_RING((general_state_base - pScrn->fbOffset) | BASE_ADDRESS_MODIFY); - OUT_RING((surf_state_base - pScrn->fbOffset) | BASE_ADDRESS_MODIFY); + OUT_RING((pPriv->linear->offset * pI830->cpp + general_state_base_offset) | + BASE_ADDRESS_MODIFY); + OUT_RING((pPriv->linear->offset * pI830->cpp + surf_state_base_offset) | + BASE_ADDRESS_MODIFY); OUT_RING(0); /* media base addr, don't care */ OUT_RING(0); /* general state max addr, disabled */ OUT_RING(0); /* media object state max addr, disabled */ /* Set the pointers to the 3d pipeline state */ OUT_RING(STATE3D_PIPELINED_POINTERS | 5); - OUT_RING((char *)vs_state - general_state_base); /* 32 byte aligned */ + OUT_RING(vs_offset - general_state_base_offset); /* 32 byte aligned */ OUT_RING(0); /* disable GS, resulting in passthrough */ OUT_RING(0); /* disable CLIP, resulting in passthrough */ - OUT_RING((char *)sf_state - general_state_base); /* 32 byte aligned */ - OUT_RING((char *)wm_state - general_state_base); /* 32 byte aligned */ - OUT_RING((char *)cc_state - general_state_base); /* 64 byte aligned */ + OUT_RING(sf_offset - general_state_base_offset); /* 32 byte aligned */ + OUT_RING(wm_offset - general_state_base_offset); /* 32 byte aligned */ + OUT_RING(cc_offset - general_state_base_offset); /* 64 byte aligned */ /* Only the PS uses the binding table */ OUT_RING(STATE3D_BINDING_TABLE_POINTERS | 4); @@ -2821,7 +2883,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, OUT_RING(0); /* gs */ OUT_RING(0); /* clip */ OUT_RING(0); /* sf */ - OUT_RING((char *)binding_table - surf_state_base); /* ps */ + OUT_RING(binding_table_offset - surf_state_base_offset); /* ps */ /* The drawing rectangle clipping is always on. Set it to values that * shouldn't do any clipping. @@ -2837,7 +2899,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, OUT_RING((0 << VB0_BUFFER_INDEX_SHIFT) | VB0_VERTEXDATA | (16 << VB0_BUFFER_PITCH_SHIFT)); - OUT_RING((CARD32)((char *)vb - pScrn->fbOffset)); + OUT_RING(pPriv->linear->offset * pI830->cpp + vb_offset); OUT_RING(0xffffffff); /* Max index -- don't care */ /* Set up our vertex elements, sourced from the single vertex buffer. */ @@ -2937,6 +2999,8 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, first_output = FALSE; } + xf86FreeOffscreenLinear(state_area); + if (pI830->AccelInfoRec) pI830->AccelInfoRec->NeedToSync = TRUE; } From bce209cd3f60cb5d51aadc5fc8ec1a4151435ec3 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Fri, 19 May 2006 17:13:37 -0700 Subject: [PATCH 32/70] Put in code for idling accelerator on subsequent cliprects. --- src/i830_video.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/src/i830_video.c b/src/i830_video.c index 27d6c798..aa263b1d 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2945,7 +2945,13 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, int vert_data_count; if (!first_output) { - /* XXX: idle */ + /* Since we use the same little vertex buffer over and over, sync for + * subsequent rectangles. + */ + if (pI830->AccelInfoRec && pI830->AccelInfoRec->NeedToSync) { + (*pI830->AccelInfoRec->Sync)(pScrn); + pI830->AccelInfoRec->NeedToSync = FALSE; + } } pbox++; From 1549accb6f52498fef3dcbd87bb72d89fcd5bccd Mon Sep 17 00:00:00 2001 From: Keith his master's voice Packard Date: Thu, 25 May 2006 16:10:31 -0700 Subject: [PATCH 33/70] Scale video source vertices. Allocate space for kernels --- src/i830_video.c | 85 ++++++++++++++++++++++++++++++++++++++++-------- src/intel_acpi.c | 2 ++ 2 files changed, 74 insertions(+), 13 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index aa263b1d..054a9f90 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2612,6 +2612,54 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, pI830->AccelInfoRec->NeedToSync = TRUE; } +static const struct brw_instruction sf_kernel_static[] = { + { + header: { + opcode: BRW_OPCODE_SEND + }, + bits1: { da1: { + dest_reg_file: BRW_MESSAGE_REGISTER_FILE, + dest_reg_type: BRW_REGISTER_TYPE_D, + src0_reg_file: BRW_IMMEDIATE_VALUE, + src1_reg_file: BRW_ARCHITECTURE_REGISTER_FILE, + src1_reg_type: BRW_REGISTER_TYPE_D, + dest_subreg_nr: 0, + dest_reg_nr: 0, + dest_horiz_stride: 1, + dest_address_mode: BRW_ADDRESS_DIRECT + } }, + bits2: { da1: { + } }, + bits3: { generic: { + end_of_thread: 1 + } } + } +}; + +static const struct brw_instruction ps_kernel_static[] = { + { + header: { + opcode: BRW_OPCODE_SEND + }, + bits1: { da1: { + dest_reg_file: BRW_MESSAGE_REGISTER_FILE, + dest_reg_type: BRW_REGISTER_TYPE_D, + src0_reg_file: BRW_IMMEDIATE_VALUE, + src1_reg_file: BRW_ARCHITECTURE_REGISTER_FILE, + src1_reg_type: BRW_REGISTER_TYPE_D, + dest_subreg_nr: 0, + dest_reg_nr: 0, + dest_horiz_stride: 1, + dest_address_mode: BRW_ADDRESS_DIRECT + } }, + bits2: { da1: { + } }, + bits3: { generic: { + end_of_thread: 1 + } } + } +}; + static void BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, RegionPtr dstRegion, @@ -2639,11 +2687,14 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, struct brw_wm_unit_state *wm_state; struct brw_cc_unit_state *cc_state; struct brw_cc_viewport *cc_viewport; + struct brw_instruction *sf_kernel; + struct brw_instruction *ps_kernel; CARD32 *vb, *binding_table; Bool first_output = TRUE; int surf_state_base_offset, general_state_base_offset; int dest_surf_offset, src_surf_offset, src_sampler_offset, vs_offset; int sf_offset, wm_offset, cc_offset, vb_offset, cc_viewport_offset; + int sf_kernel_offset, ps_kernel_offset; int binding_table_offset; int next_offset, total_state_size; int vb_size = (4 * 4) * 4; /* 4 DWORDS per vertex */ @@ -2674,8 +2725,11 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, cc_offset = ALIGN(next_offset, 32); next_offset = cc_offset + sizeof(*cc_state); - /* XXX: Add space for SF and PS kernels */ - + sf_kernel_offset = ALIGN(next_offset, 64); + next_offset = sf_kernel_offset + sizeof (sf_kernel_static); + ps_kernel_offset = ALIGN(next_offset, 64); + next_offset = ps_kernel_offset + sizeof (ps_kernel_static); + cc_viewport_offset = ALIGN(next_offset, 32); next_offset = cc_viewport_offset + sizeof(*cc_viewport); @@ -2714,6 +2768,8 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, sf_state = (void *)(state_base + sf_offset); wm_state = (void *)(state_base + wm_offset); cc_state = (void *)(state_base + cc_offset); + sf_kernel = (void *)(state_base + sf_kernel_offset); + ps_kernel = (void *)(state_base + ps_kernel_offset); cc_viewport = (void *)(state_base + cc_viewport_offset); dest_surf_state = (void *)(state_base + dest_surf_offset); src_surf_state = (void *)(state_base + src_surf_offset); @@ -2801,12 +2857,12 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, 2) - 1; sf_state->sf5.viewport_transform = FALSE; /* skip viewport */ sf_state->sf6.cull_mode = BRW_CULLMODE_BOTH; - sf_state->sf6.scissor = + sf_state->sf6.scissor = XXX; sf_state->sf6.dest_org_vbias = 0x8; sf_state->sf6.dest_org_hbias = 0x8; sf_state->sf7.trifan_pv = 2; - /* XXX: Set up the PS kernel (dispatched by WM) for convertiny YUV to RGB. + /* XXX: Set up the PS kernel (dispatched by WM) for converting YUV to RGB. * The 3D driver does this as: * CONST C0 = { -.5, -.0625, -.5, 1.164 } @@ -2841,7 +2897,10 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, cc_state->cc4.cc_viewport_state_offset = (cc_viewport_offset - general_state_base_offset) >> 5; - BEGIN_LP_RING(XXX); + memcpy (sf_kernel, sf_kernel_static, sizeof (sf_kernel_static)); + memcpy (ps_kernel, ps_kernel_static, sizeof (ps_kernel_static)); + + BEGIN_LP_RING(17); OUT_RING(MI_FLUSH | MI_STATE_INSTRUCTION_CACHE_FLUSH); OUT_RING(STATE3D_PIPELINE_SELECT | PIPELINE_SELECT_3D); @@ -2974,23 +3033,23 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, vb[i++] = box_x1; vb[i++] = box_y1; - vb[i++] = box_x1 - dxo; - vb[i++] = box_y1 - dyo; + vb[i++] = (box_x1 - dxo) * src_scale_x; + vb[i++] = (box_y1 - dyo) * src_scale_y; vb[i++] = box_x2; vb[i++] = box_y1; - vb[i++] = box_x2 - dxo; - vb[i++] = box_y1 - dyo; + vb[i++] = (box_x2 - dxo) * src_scale_x; + vb[i++] = (box_y1 - dyo) * src_scale_y; vb[i++] = box_x2; vb[i++] = box_y2; - vb[i++] = box_x2 - dxo; - vb[i++] = box_y2 - dyo; + vb[i++] = (box_x2 - dxo) * src_scale_x; + vb[i++] = (box_y2 - dyo) * src_scale_y; vb[i++] = box_x1; vb[i++] = box_y2; - vb[i++] = box_x1 - dxo; - vb[i++] = box_y2 - dyo; + vb[i++] = (box_x1 - dxo) * src_scale_x; + vb[i++] = (box_y2 - dyo) * src_scale_y; BEGIN_LP_RING(XXX); OUT_RING(PRIMITIVE3D_BRW | (_3DPRIM_TRIFAN << P3D0_TOPO_SHIFT) | 4); diff --git a/src/intel_acpi.c b/src/intel_acpi.c index 1cd6c97b..51331fa7 100644 --- a/src/intel_acpi.c +++ b/src/intel_acpi.c @@ -113,8 +113,10 @@ I830HandlePMEvents(int fd, pointer data) pmEvent events[MAX_NO_EVENTS]; int i,j,n; +#if 0 if (!I830ACPIGetEventFromOs) return; +#endif if ((n = I830ACPIGetEventFromOs(fd,events,MAX_NO_EVENTS))) { do { From f5fe700b9a943c956bcfcc3a0d2de13c23b978bc Mon Sep 17 00:00:00 2001 From: Keith his master's voice Packard Date: Fri, 26 May 2006 13:47:39 -0700 Subject: [PATCH 34/70] Prepare real SF kernel and fake WM kernel --- src/i830_video.c | 178 ++++++++++++++++++++++++++++++----------------- 1 file changed, 116 insertions(+), 62 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index 054a9f90..bc97ee29 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2612,52 +2612,106 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, pI830->AccelInfoRec->NeedToSync = TRUE; } -static const struct brw_instruction sf_kernel_static[] = { - { - header: { - opcode: BRW_OPCODE_SEND - }, - bits1: { da1: { - dest_reg_file: BRW_MESSAGE_REGISTER_FILE, - dest_reg_type: BRW_REGISTER_TYPE_D, - src0_reg_file: BRW_IMMEDIATE_VALUE, - src1_reg_file: BRW_ARCHITECTURE_REGISTER_FILE, - src1_reg_type: BRW_REGISTER_TYPE_D, - dest_subreg_nr: 0, - dest_reg_nr: 0, - dest_horiz_stride: 1, - dest_address_mode: BRW_ADDRESS_DIRECT - } }, - bits2: { da1: { - } }, - bits3: { generic: { - end_of_thread: 1 - } } - } +/* + * this program computes dA/dx and dA/dy for the texture coordinates along + * with the base texture coordinate. It was extracted from the Mesa driver + */ + +#define SF_KERNEL_NUM_GRF 10 + +static const CARD32 sf_kernel_static[][4] = { +/* send 0 (1) g6<1>F g1.8<0,1,0>F math mlen 1 rlen 1 { align1 + } */ + { 0x00000031, 0x20c01fbd, 0x00000028, 0x01110081 }, +/* mov (2) g3.8<1>F g2<2,2,1>F { align1 + } */ + { 0x00200001, 0x206803bd, 0x00450040, 0x00000000 }, +/* mov (2) g4.8<1>F g2.8<2,2,1>F { align1 + } */ + { 0x00200001, 0x208803bd, 0x00450048, 0x00000000 }, +/* mov (2) g5.8<1>F g2.16<2,2,1>F { align1 + } */ + { 0x00200001, 0x20a803bd, 0x00450050, 0x00000000 }, +/* mov (1) a48<1>UW 240 { align1 + } */ + { 0x00000001, 0x26002168, 0x00000000, 0x000000f0 }, +/* mul (8) g3<1>F g3<8,8,1>F g2.4<0,1,0>F { align1 predreg+ } */ + { 0x00610041, 0x206077bd, 0x008d0060, 0x00000044 }, +/* mul (8) g4<1>F g4<8,8,1>F g2.12<0,1,0>F { align1 predreg+ } */ + { 0x00610041, 0x208077bd, 0x008d0080, 0x0000004c }, +/* mul (8) g5<1>F g5<8,8,1>F g2.20<0,1,0>F { align1 predreg+ } */ + { 0x00610041, 0x20a077bd, 0x008d00a0, 0x00000054 }, +/* add (8) g7<1>F g4<8,8,1>F g3<8,8,1>F { align1 + } */ + { 0x00600040, 0x20e077bd, 0x008d0080, 0x008d4060 }, +/* add (8) g8<1>F g5<8,8,1>F g3<8,8,1>F { align1 + } */ + { 0x00600040, 0x210077bd, 0x008d00a0, 0x008d4060 }, +/* mul (8) a0<1>F g7<8,8,1>F g1.24<0,1,0>F { align1 + } */ + { 0x00600041, 0x200077bc, 0x008d00e0, 0x00000038 }, +/* mac (8) g9<1>F g8<8,8,1>F g1.20<0,1,0>F { align1 + } */ + { 0x00600048, 0x212077bd, 0x008d0100, 0x00004034 }, +/* mul (8) m1<1>F g9<8,8,1>F g6<0,1,0>F { align1 + } */ + { 0x00600041, 0x202077be, 0x008d0120, 0x000000c0 }, +/* mul (8) a0<1>F g8<8,8,1>F g1.12<0,1,0>F { align1 + } */ + { 0x00600041, 0x200077bc, 0x008d0100, 0x0000002c }, +/* mac (8) g9<1>F g7<8,8,1>F g1.16<0,1,0>F { align1 + } */ + { 0x00600048, 0x212077bd, 0x008d00e0, 0x00004030 }, +/* mul (8) m2<1>F g9<8,8,1>F g6<0,1,0>F { align1 + } */ + { 0x00600041, 0x204077be, 0x008d0120, 0x000000c0 }, +/* mov (8) m3<1>F g3<8,8,1>F { align1 + } */ + { 0x00600001, 0x206003be, 0x008d0060, 0x00000000 }, +/* send 0 (8) a0<1>F g0<8,8,1>F urb mlen 4 rlen 0 write +0 transpose used complete EOT{ align1 + } */ + { 0x00600031, 0x20001fbc, 0x008d0000, 0x8640c800 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, }; -static const struct brw_instruction ps_kernel_static[] = { - { - header: { - opcode: BRW_OPCODE_SEND - }, - bits1: { da1: { - dest_reg_file: BRW_MESSAGE_REGISTER_FILE, - dest_reg_type: BRW_REGISTER_TYPE_D, - src0_reg_file: BRW_IMMEDIATE_VALUE, - src1_reg_file: BRW_ARCHITECTURE_REGISTER_FILE, - src1_reg_type: BRW_REGISTER_TYPE_D, - dest_subreg_nr: 0, - dest_reg_nr: 0, - dest_horiz_stride: 1, - dest_address_mode: BRW_ADDRESS_DIRECT - } }, - bits2: { da1: { - } }, - bits3: { generic: { - end_of_thread: 1 - } } - } +#define PS_KERNEL_NUM_GRF 10 + +static const CARD32 ps_kernel_static[][4] = { +/* mov (8) m2<1>F g2<16,16,1>UW { align1 + } */ + { 0x00600001, 0x2040013e, 0x00b10040, 0x00000000 }, +/* mov (8) m6<1>F g3<16,16,1>UW { align1 sechalf + } */ + { 0x00601001, 0x20c0013e, 0x00b10060, 0x00000000 }, +/* mov (8) m3<1>F g3<16,16,1>UW { align1 + } */ + { 0x00600001, 0x2060013e, 0x00b10060, 0x00000000 }, +/* mov (8) m7<1>F g4<16,16,1>UW { align1 sechalf + } */ + { 0x00601001, 0x20e0013e, 0x00b10080, 0x00000000 }, +/* mov (8) m4<1>F g4<16,16,1>UW { align1 + } */ + { 0x00600001, 0x2080013e, 0x00b10080, 0x00000000 }, +/* mov (8) m8<1>F g5<16,16,1>UW { align1 sechalf + } */ + { 0x00601001, 0x2100013e, 0x00b100a0, 0x00000000 }, +/* mov (8) m5<1>F g5<16,16,1>UW { align1 + } */ + { 0x00600001, 0x20a0013e, 0x00b100a0, 0x00000000 }, +/* mov (8) m9<1>F g6<16,16,1>UW { align1 sechalf + } */ + { 0x00601001, 0x2120013e, 0x00b100c0, 0x00000000 }, +/* mov (8) m1<1>F g1<8,8,1>F { align1 mask_disable + } */ + { 0x00600201, 0x202003be, 0x008d0020, 0x00000000 }, +/* send 0 (16) a0<1>UW g0<8,8,1>UW write mlen 10 rlen 0 EOT{ align1 + } */ { 0x00800031, 0x20001d28, 0x008d0000, 0x85a04800 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, }; static void @@ -2826,8 +2880,8 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, /* Set up a binding table for our two surfaces. Only the PS will use it */ /* XXX: are these offset from the right place? */ - binding_table[0] = dest_surf_state_offset - surf_state_base_offset; - binding_table[1] = src_surf_state_offset - surf_state_base_offset; + binding_table[0] = dest_surf_offset - surf_state_base_offset; + binding_table[1] = src_surf_offset - surf_state_base_offset; /* Set up the packed YUV source sampler. Doesn't do colorspace conversion. */ @@ -2841,23 +2895,23 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, memset(vs_state, 0, sizeof(*vs_state)); vs_state->vs6.vs_enable = FALSE; - /* XXX: Set up the SF kernel to do coord interp: for each attribute, + /* Set up the SF kernel to do coord interp: for each attribute, * calculate dA/dx and dA/dy. Hand these interpolation coefficients * back to SF which then hands pixels off to WM. */ memset(sf_state, 0, sizeof(*sf_state)); - sf_state->thread0.kernel_start_pointer = XXX; - sf_state->thread0.grf_reg_count = XXX; - sf_state->thread1.single_program_flow = XXX; - sf_state->thread2.scratch_space_base_pointer = XXX; /* 1k aligned */ + sf_state->thread0.kernel_start_pointer = sf_kernel_offset - general_state_base_offset; + sf_state->thread0.grf_reg_count = ((SF_KERNEL_NUM_GRF + 15) / 16) - 1; + sf_state->thread1.single_program_flow = 1; /* XXX */ + sf_state->thread2.scratch_space_base_pointer = 0; /* XXX 1k aligned */ sf_state->thread4.nr_urb_entries = 8; sf_state->thread4.urb_entry_allocation_size = 11; sf_state->thread4.max_threads = MIN(12, sf_state->thread4.nr_urb_entries / 2) - 1; sf_state->sf5.viewport_transform = FALSE; /* skip viewport */ sf_state->sf6.cull_mode = BRW_CULLMODE_BOTH; - sf_state->sf6.scissor = XXX; + sf_state->sf6.scissor = 0; /* XXX */ sf_state->sf6.dest_org_vbias = 0x8; sf_state->sf6.dest_org_hbias = 0x8; sf_state->sf7.trifan_pv = 2; @@ -2875,18 +2929,18 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, * */ - wm_state->thread0.kernel_start_pointer = XXX; - wm_state->thread0.grf_reg_count = XXX; + wm_state->thread0.kernel_start_pointer = ps_kernel_offset - general_state_base_offset; + wm_state->thread0.grf_reg_count = ((PS_KERNEL_NUM_GRF + 15) / 16) - 1; wm_state->thread1.binding_table_entry_count = 2; - wm_state->thread2.scratch_space_base_pointer = XXX; - wm_state->thread2.per_thread_scratch_space = XXX; - wm_state->thread3.dispatch_grf_start_reg = XXX; - wm_state->thread3.urb_entry_read_length = XXX; - wm_state->thread3.const_urb_entry_read_length = XXX; + wm_state->thread2.scratch_space_base_pointer = 0; /* XXX */ + wm_state->thread2.per_thread_scratch_space = 0; /* XXX */ + wm_state->thread3.dispatch_grf_start_reg = 0; /* XXX */ + wm_state->thread3.urb_entry_read_length = 4; /* XXX */ + wm_state->thread3.const_urb_entry_read_length = 0; /* XXX */ wm_state->wm4.sampler_state_pointer = (src_sampler_offset - general_state_base_offset) >> 5; wm_state->wm4.sampler_count = 1; /* 1-4 samplers used */ - wm_state->wm5.max_threads = 31; + wm_state->wm5.max_threads = 0; wm_state->wm5.thread_dispatch_enable = 1; wm_state->wm5.enable_16_pix = 1; @@ -2962,7 +3016,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, OUT_RING(0xffffffff); /* Max index -- don't care */ /* Set up our vertex elements, sourced from the single vertex buffer. */ - OUT_RING(STATE3D_VERTEX_ELEMENTS | XXX); + OUT_RING(STATE3D_VERTEX_ELEMENTS | 3); /* offset 0: X,Y -> {X, Y, 0.0, 0.0} */ OUT_RING((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) | VE0_VALID | @@ -3051,7 +3105,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, vb[i++] = (box_x1 - dxo) * src_scale_x; vb[i++] = (box_y2 - dyo) * src_scale_y; - BEGIN_LP_RING(XXX); + BEGIN_LP_RING(6); OUT_RING(PRIMITIVE3D_BRW | (_3DPRIM_TRIFAN << P3D0_TOPO_SHIFT) | 4); OUT_RING(4); /* vertex count per instance */ OUT_RING(0); /* start vertex offset */ From 9ec7cf22e3f03c13524bb2d15711699dfcc02984 Mon Sep 17 00:00:00 2001 From: Keith his master's voice Packard Date: Fri, 26 May 2006 21:30:55 -0700 Subject: [PATCH 35/70] Use broadwater video code on broadwater hardware. Pad ring to even length. compute state base as address rather than offset --- src/i830_video.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index bc97ee29..dca6a78e 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -66,6 +66,7 @@ THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include #include +#include #include "xf86.h" #include "xf86_OSproc.h" @@ -2714,6 +2715,9 @@ static const CARD32 ps_kernel_static[][4] = { { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, }; +#define ALIGN(i,m) (((i) + (m) - 1) & ~((m) - 1)) +#define MIN(a,b) ((a) < (b) ? (a) : (b)) + static void BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, RegionPtr dstRegion, @@ -2812,7 +2816,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, return; } - state_base = (char *)(pI830->FrontBuffer.Start + pPriv->linear->offset * + state_base = (char *)(pI830->FbBase + pPriv->linear->offset * pI830->cpp); /* Set up our pointers to state structures in framebuffer. It would probably * be a good idea to fill these structures out in system memory and then dump @@ -2954,7 +2958,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, memcpy (sf_kernel, sf_kernel_static, sizeof (sf_kernel_static)); memcpy (ps_kernel, ps_kernel_static, sizeof (ps_kernel_static)); - BEGIN_LP_RING(17); + BEGIN_LP_RING(38); OUT_RING(MI_FLUSH | MI_STATE_INSTRUCTION_CACHE_FLUSH); OUT_RING(STATE3D_PIPELINE_SELECT | PIPELINE_SELECT_3D); @@ -3038,6 +3042,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, (BRW_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT) | (4 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT)); + OUT_RING(0); /* pad to quadword */ ADVANCE_LP_RING(); dxo = dstRegion->extents.x1; @@ -3085,6 +3090,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, OUT_RING(MI_NOOP); OUT_RING(MI_NOOP); + i = 0; vb[i++] = box_x1; vb[i++] = box_y1; vb[i++] = (box_x1 - dxo) * src_scale_x; @@ -3407,6 +3413,10 @@ I830PutImage(ScrnInfoPtr pScrn, I830DisplayVideo(pScrn, destId, width, height, dstPitch, x1, y1, x2, y2, &dstBox, src_w, src_h, drw_w, drw_h); + } else if (IS_BROADWATER(pI830)) { + BroadwaterDisplayVideoTextured (pScrn, pPriv, destId, clipBoxes, width, height, + dstPitch, x1, y1, x2, y2, + src_w, src_h, drw_w, drw_h, pDraw); } else { I915DisplayVideoTextured(pScrn, pPriv, destId, clipBoxes, width, height, dstPitch, x1, y1, x2, y2, From 462a860af89ed855fe2b718342fcaf9c169af3fb Mon Sep 17 00:00:00 2001 From: Keith his master's voice Packard Date: Sat, 27 May 2006 00:17:25 -0700 Subject: [PATCH 36/70] Rename BRW instructions, check video instruction generation. Doesnt lock up, but doesnt display anything either --- src/i810_reg.h | 66 ++++++++++++++++++++++------ src/i830_video.c | 110 ++++++++++++++++++++++++++--------------------- 2 files changed, 114 insertions(+), 62 deletions(-) diff --git a/src/i810_reg.h b/src/i810_reg.h index 0e13932a..19edad46 100644 --- a/src/i810_reg.h +++ b/src/i810_reg.h @@ -1612,11 +1612,50 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. /* * New regs for broadwater -- we need to split this file up sensibly somehow. */ -#define STATE3D_PIPELINE_SELECT (CMD_3D | (0x01<<24) | (0x04<<16)) +#define BRW_3D(Pipeline,Opcode,Subopcode) (CMD_3D | \ + ((Pipeline) << 27) | \ + ((Opcode) << 24) | \ + ((Subopcode) << 16)) + +#define BRW_URB_FENCE BRW_3D(0, 0, 0) +#define BRW_CS_URB_STATE BRW_3D(0, 0, 1) +#define BRW_CONSTANT_BUFFER BRW_3D(0, 0, 2) +#define BRW_STATE_PREFETCH BRW_3D(0, 0, 3) + +#define BRW_STATE_BASE_ADDRESS BRW_3D(0, 1, 1) +#define BRW_STATE_SIP BRW_3D(0, 1, 2) +#define BRW_PIPELINE_SELECT BRW_3D(0, 1, 4) + +#define BRW_MEDIA_STATE_POINTERS BRW_3D(2, 0, 0) +#define BRW_MEDIA_OBJECT BRW_3D(2, 1, 0) + +#define BRW_3DSTATE_PIPELINED_POINTERS BRW_3D(3, 0, 0) +#define BRW_3DSTATE_BINDING_TABLE_POINTERS BRW_3D(3, 0, 1) +#define BRW_3DSTATE_VERTEX_BUFFERS BRW_3D(3, 0, 8) +#define BRW_3DSTATE_VERTEX_ELEMENTS BRW_3D(3, 0, 9) +#define BRW_3DSTATE_INDEX_BUFFER BRW_3D(3, 0, 0xa) +#define BRW_3DSTATE_VF_STATISTICS BRW_3D(3, 0, 0xb) + +#define BRW_3DSTATE_DRAWING_RECTANGLE BRW_3D(3, 1, 0) +#define BRW_3DSTATE_CONSTANT_COLOR BRW_3D(3, 1, 1) +#define BRW_3DSTATE_SAMPLER_PALETTE_LOAD BRW_3D(3, 1, 2) +#define BRW_3DSTATE_CHROMA_KEY BRW_3D(3, 1, 4) +#define BRW_3DSTATE_DEPTH_BUFFER BRW_3D(3, 1, 5) +#define BRW_3DSTATE_POLY_STIPPLE_OFFSET BRW_3D(3, 1, 6) +#define BRW_3DSTATE_POLY_STIPPLE_PATTERN BRW_3D(3, 1, 7) +#define BRW_3DSTATE_LINE_STIPPLE BRW_3D(3, 1, 8) +#define BRW_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP BRW_3D(3, 1, 9) +/* These two are BLC and CTG only, not BW or CL */ +#define BRW_3DSTATE_AA_LINE_PARAMS BRW_3D(3, 1, 0xa) +#define BRW_3DSTATE_GS_SVB_INDEX BRW_3D(3, 1, 0xb) + +#define BRW_PIPE_CONTROL BRW_3D(3, 2, 0) + +#define BRW_3DPRIMITIVE BRW_3D(3, 3, 0) + #define PIPELINE_SELECT_3D 0 #define PIPELINE_SELECT_MEDIA 1 -#define STATE3D_URB_FENCE (CMD_3D | (0x00<<24) | (0x00<<16)) #define UF0_CS_REALLOC (1 << 13) #define UF0_VFE_REALLOC (1 << 12) #define UF0_SF_REALLOC (1 << 11) @@ -1630,20 +1669,22 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define UF2_VFE_FENCE_SHIFT 10 #define UF2_SF_FENCE_SHIFT 0 -#define STATE3D_DRAWING_RECTANGLE_BRW (CMD_3D | (0x01<<24) | (0x00<<16)) - -#define STATE3D_BASE_ADDRESS (CMD_3D | (0x01<<24) | (0x01<<16)) +/* for BRW_STATE_BASE_ADDRESS */ #define BASE_ADDRESS_MODIFY (1 << 0) -#define STATE3D_PIPELINED_POINTERS (CMD_3D | (0x00<<24) | (0x00<<16)) +/* for BRW_3DSTATE_PIPELINED_POINTERS */ +#define BRW_GS_DISABLE 0 +#define BRW_GS_ENABLE 1 +#define BRW_CLIP_DISABLE 0 +#define BRW_CLIP_ENABLE 1 -#define STATE3D_VERTEX_BUFFERS (CMD_3D | (0x03<<27) | (0x00<<24) | (0x08<<16)) +/* VERTEX_BUFFER_STATE Structure */ #define VB0_BUFFER_INDEX_SHIFT 27 #define VB0_VERTEXDATA (0 << 26) #define VB0_INSTANCEDATA (1 << 26) #define VB0_BUFFER_PITCH_SHIFT 0 -#define STATE3D_VERTEX_ELEMENTS (CMD_3D | (0x00<<24) | (0x09<<16)) +/* VERTEX_ELEMENT_STATE Structure */ #define VE0_VERTEX_BUFFER_INDEX_SHIFT 27 #define VE0_VALID (1 << 26) #define VE0_FORMAT_SHIFT 16 @@ -1654,11 +1695,12 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define VE1_VFCOMPONENT_3_SHIFT 16 #define VE1_DESTINATION_ELEMENT_OFFSET_SHIFT 0 -#define STATE3D_BINDING_TABLE_POINTERS (CMD_3D | (0x03<<27) | (0x00<<24) | (0x01<<16)) - -#define PRIMITIVE3D_BRW (CMD_3D | (0x03<<27) | (0x03<<24) | (0x08<<16)) +/* 3DPRIMITIVE bits */ +#define BRW_3DPRIMITIVE_VERTEX_SEQUENTIAL (0 << 15) +#define BRW_3DPRIMITIVE_VERTEX_RANDOM (1 << 15) /* Primitive types are in brw_defines.h */ -#define P3D0_TOPO_SHIFT 10 +#define BRW_3DPRIMITIVE_TOPOLOGY_SHIFT 10 + /* End regs for broadwater */ diff --git a/src/i830_video.c b/src/i830_video.c index dca6a78e..225f9a9f 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2618,9 +2618,12 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, * with the base texture coordinate. It was extracted from the Mesa driver */ -#define SF_KERNEL_NUM_GRF 10 +#define SF_KERNEL_NUM_GRF 10 +#define SF_KERNEL_NUM_URB 8 +#define SF_MAX_THREADS static const CARD32 sf_kernel_static[][4] = { +#if 0 /* send 0 (1) g6<1>F g1.8<0,1,0>F math mlen 1 rlen 1 { align1 + } */ { 0x00000031, 0x20c01fbd, 0x00000028, 0x01110081 }, /* mov (2) g3.8<1>F g2<2,2,1>F { align1 + } */ @@ -2655,6 +2658,7 @@ static const CARD32 sf_kernel_static[][4] = { { 0x00600041, 0x204077be, 0x008d0120, 0x000000c0 }, /* mov (8) m3<1>F g3<8,8,1>F { align1 + } */ { 0x00600001, 0x206003be, 0x008d0060, 0x00000000 }, +#endif /* send 0 (8) a0<1>F g0<8,8,1>F urb mlen 4 rlen 0 write +0 transpose used complete EOT{ align1 + } */ { 0x00600031, 0x20001fbc, 0x008d0000, 0x8640c800 }, /* nop (4) g0<1>UD { align1 + } */ @@ -2676,6 +2680,8 @@ static const CARD32 sf_kernel_static[][4] = { }; #define PS_KERNEL_NUM_GRF 10 +#define PS_KERNEL_NUM_URB 8 +#define WM_MAX_THREADS MIN(12, PS_KERNEL_NUM_URB / 2) static const CARD32 ps_kernel_static[][4] = { /* mov (8) m2<1>F g2<16,16,1>UW { align1 + } */ @@ -2696,7 +2702,8 @@ static const CARD32 ps_kernel_static[][4] = { { 0x00601001, 0x2120013e, 0x00b100c0, 0x00000000 }, /* mov (8) m1<1>F g1<8,8,1>F { align1 mask_disable + } */ { 0x00600201, 0x202003be, 0x008d0020, 0x00000000 }, -/* send 0 (16) a0<1>UW g0<8,8,1>UW write mlen 10 rlen 0 EOT{ align1 + } */ { 0x00800031, 0x20001d28, 0x008d0000, 0x85a04800 }, +/* send 0 (16) a0<1>UW g0<8,8,1>UW write mlen 10 rlen 0 EOT{ align1 + } */ + { 0x00800031, 0x20001d28, 0x008d0000, 0x85a04800 }, /* nop (4) g0<1>UD { align1 + } */ { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, /* nop (4) g0<1>UD { align1 + } */ @@ -2749,15 +2756,16 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, struct brw_instruction *ps_kernel; CARD32 *vb, *binding_table; Bool first_output = TRUE; - int surf_state_base_offset, general_state_base_offset; int dest_surf_offset, src_surf_offset, src_sampler_offset, vs_offset; int sf_offset, wm_offset, cc_offset, vb_offset, cc_viewport_offset; + int wm_scratch_offset; int sf_kernel_offset, ps_kernel_offset; int binding_table_offset; int next_offset, total_state_size; int vb_size = (4 * 4) * 4; /* 4 DWORDS per vertex */ FBLinearPtr state_area; char *state_base; + int state_base_offset; ErrorF("BroadwaterDisplayVideoTextured: %dx%d (pitch %d)\n", width, height, video_pitch); @@ -2774,12 +2782,13 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, /* Set up our layout of state in framebuffer. First the general state: */ vs_offset = ALIGN(next_offset, 64); - general_state_base_offset = vs_offset; next_offset = vs_offset + sizeof(*vs_state); sf_offset = ALIGN(next_offset, 32); next_offset = sf_offset + sizeof(*sf_state); wm_offset = ALIGN(next_offset, 32); next_offset = wm_offset + sizeof(*wm_state); + wm_scratch_offset = ALIGN(next_offset, 1024); + next_offset = wm_scratch_offset + 1024 * WM_MAX_THREADS; cc_offset = ALIGN(next_offset, 32); next_offset = cc_offset + sizeof(*cc_state); @@ -2800,7 +2809,6 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, /* And then the general state: */ dest_surf_offset = ALIGN(next_offset, 32); - surf_state_base_offset = dest_surf_offset; next_offset = dest_surf_offset + sizeof(*dest_surf_state); src_surf_offset = ALIGN(next_offset, 32); next_offset = src_surf_offset + sizeof(*src_surf_state); @@ -2809,15 +2817,16 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, /* Allocate an area in framebuffer for our state layout we just set up */ total_state_size = next_offset; - state_area = I830AllocateMemory(pScrn, NULL, (total_state_size + 32) / + state_area = I830AllocateMemory(pScrn, NULL, (total_state_size + 64) / pI830->cpp); if (state_area == NULL) { ErrorF("Failed to allocate %d bytes for state\n", total_state_size); return; } - state_base = (char *)(pI830->FbBase + pPriv->linear->offset * - pI830->cpp); + state_base_offset = pI830->FrontBuffer.Start + pPriv->linear->offset * pI830->cpp; + state_base_offset = ALIGN(state_base_offset, 64); + state_base = (char *)(pI830->FbBase + state_base_offset); /* Set up our pointers to state structures in framebuffer. It would probably * be a good idea to fill these structures out in system memory and then dump * them there, instead. @@ -2884,8 +2893,8 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, /* Set up a binding table for our two surfaces. Only the PS will use it */ /* XXX: are these offset from the right place? */ - binding_table[0] = dest_surf_offset - surf_state_base_offset; - binding_table[1] = src_surf_offset - surf_state_base_offset; + binding_table[0] = state_base_offset + dest_surf_offset; + binding_table[1] = state_base_offset + src_surf_offset; /* Set up the packed YUV source sampler. Doesn't do colorspace conversion. */ @@ -2905,14 +2914,14 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, */ memset(sf_state, 0, sizeof(*sf_state)); - sf_state->thread0.kernel_start_pointer = sf_kernel_offset - general_state_base_offset; + sf_state->thread0.kernel_start_pointer = state_base_offset + sf_kernel_offset; sf_state->thread0.grf_reg_count = ((SF_KERNEL_NUM_GRF + 15) / 16) - 1; sf_state->thread1.single_program_flow = 1; /* XXX */ - sf_state->thread2.scratch_space_base_pointer = 0; /* XXX 1k aligned */ - sf_state->thread4.nr_urb_entries = 8; + sf_state->thread2.per_thread_scratch_space = 0; + sf_state->thread2.scratch_space_base_pointer = 0; /* not used in our kernel */ + sf_state->thread4.nr_urb_entries = SF_KERNEL_NUM_URB; sf_state->thread4.urb_entry_allocation_size = 11; - sf_state->thread4.max_threads = MIN(12, sf_state->thread4.nr_urb_entries / - 2) - 1; + sf_state->thread4.max_threads = WM_MAX_THREADS - 1; sf_state->sf5.viewport_transform = FALSE; /* skip viewport */ sf_state->sf6.cull_mode = BRW_CULLMODE_BOTH; sf_state->sf6.scissor = 0; /* XXX */ @@ -2933,7 +2942,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, * */ - wm_state->thread0.kernel_start_pointer = ps_kernel_offset - general_state_base_offset; + wm_state->thread0.kernel_start_pointer = state_base_offset + ps_kernel_offset; wm_state->thread0.grf_reg_count = ((PS_KERNEL_NUM_GRF + 15) / 16) - 1; wm_state->thread1.binding_table_entry_count = 2; wm_state->thread2.scratch_space_base_pointer = 0; /* XXX */ @@ -2941,8 +2950,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, wm_state->thread3.dispatch_grf_start_reg = 0; /* XXX */ wm_state->thread3.urb_entry_read_length = 4; /* XXX */ wm_state->thread3.const_urb_entry_read_length = 0; /* XXX */ - wm_state->wm4.sampler_state_pointer = - (src_sampler_offset - general_state_base_offset) >> 5; + wm_state->wm4.sampler_state_pointer = (state_base_offset + src_sampler_offset) >> 5; wm_state->wm4.sampler_count = 1; /* 1-4 samplers used */ wm_state->wm5.max_threads = 0; wm_state->wm5.thread_dispatch_enable = 1; @@ -2952,8 +2960,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, cc_viewport->max_depth = 0.0; memset(cc_state, 0, sizeof(*cc_state)); - cc_state->cc4.cc_viewport_state_offset = - (cc_viewport_offset - general_state_base_offset) >> 5; + cc_state->cc4.cc_viewport_state_offset = (state_base_offset + cc_viewport_offset) >> 5; memcpy (sf_kernel, sf_kernel_static, sizeof (sf_kernel_static)); memcpy (ps_kernel, ps_kernel_static, sizeof (ps_kernel_static)); @@ -2961,66 +2968,65 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, BEGIN_LP_RING(38); OUT_RING(MI_FLUSH | MI_STATE_INSTRUCTION_CACHE_FLUSH); - OUT_RING(STATE3D_PIPELINE_SELECT | PIPELINE_SELECT_3D); + OUT_RING(BRW_PIPELINE_SELECT | PIPELINE_SELECT_3D); - OUT_RING(STATE3D_URB_FENCE | + OUT_RING(BRW_URB_FENCE | UF0_CS_REALLOC | UF0_SF_REALLOC | UF0_CLIP_REALLOC | UF0_GS_REALLOC | - UF0_VS_REALLOC); + UF0_VS_REALLOC | + 1); OUT_RING(((urb_clip_start + urb_clip_size) << UF1_CLIP_FENCE_SHIFT) | ((urb_gs_start + urb_gs_size) << UF1_GS_FENCE_SHIFT) | ((urb_vs_start + urb_vs_size) << UF1_VS_FENCE_SHIFT)); OUT_RING(((urb_cs_start + urb_cs_size) << UF2_CS_FENCE_SHIFT) | ((urb_sf_start + urb_sf_size) << UF2_SF_FENCE_SHIFT)); - /* Set the general and surface state base addresses */ - OUT_RING(STATE3D_BASE_ADDRESS | 4); - OUT_RING((pPriv->linear->offset * pI830->cpp + general_state_base_offset) | - BASE_ADDRESS_MODIFY); - OUT_RING((pPriv->linear->offset * pI830->cpp + surf_state_base_offset) | - BASE_ADDRESS_MODIFY); + /* Zero out the two base address registers so all offsets are absolute */ + OUT_RING(BRW_STATE_BASE_ADDRESS | 4); + OUT_RING(0 | BASE_ADDRESS_MODIFY); /* Generate state base address */ + OUT_RING(0 | BASE_ADDRESS_MODIFY); /* Surface state base address */ OUT_RING(0); /* media base addr, don't care */ OUT_RING(0); /* general state max addr, disabled */ OUT_RING(0); /* media object state max addr, disabled */ /* Set the pointers to the 3d pipeline state */ - OUT_RING(STATE3D_PIPELINED_POINTERS | 5); - OUT_RING(vs_offset - general_state_base_offset); /* 32 byte aligned */ - OUT_RING(0); /* disable GS, resulting in passthrough */ - OUT_RING(0); /* disable CLIP, resulting in passthrough */ - OUT_RING(sf_offset - general_state_base_offset); /* 32 byte aligned */ - OUT_RING(wm_offset - general_state_base_offset); /* 32 byte aligned */ - OUT_RING(cc_offset - general_state_base_offset); /* 64 byte aligned */ + OUT_RING(BRW_3DSTATE_PIPELINED_POINTERS | 5); + OUT_RING(state_base_offset + vs_offset); /* 32 byte aligned */ + OUT_RING(BRW_GS_DISABLE); /* disable GS, resulting in passthrough */ + OUT_RING(BRW_CLIP_DISABLE); /* disable CLIP, resulting in passthrough */ + OUT_RING(state_base_offset + sf_offset); /* 32 byte aligned */ + OUT_RING(state_base_offset + wm_offset); /* 32 byte aligned */ + OUT_RING(state_base_offset + cc_offset); /* 64 byte aligned */ /* Only the PS uses the binding table */ - OUT_RING(STATE3D_BINDING_TABLE_POINTERS | 4); + OUT_RING(BRW_3DSTATE_BINDING_TABLE_POINTERS | 4); OUT_RING(0); /* vs */ OUT_RING(0); /* gs */ OUT_RING(0); /* clip */ OUT_RING(0); /* sf */ - OUT_RING(binding_table_offset - surf_state_base_offset); /* ps */ + OUT_RING(state_base_offset + binding_table_offset); /* ps */ /* The drawing rectangle clipping is always on. Set it to values that * shouldn't do any clipping. */ - OUT_RING(STATE3D_DRAWING_RECTANGLE_BRW | 2); + OUT_RING(BRW_3DSTATE_DRAWING_RECTANGLE | 2); /* XXX 3 for BLC or CTG */ OUT_RING(0x00000000); /* ymin, xmin */ OUT_RING((pScrn->virtualX - 1) | (pScrn->virtualY - 1) << 16); /* ymax, xmax */ OUT_RING(0x00000000); /* yorigin, xorigin */ /* Set up the pointer to our vertex buffer */ - OUT_RING(STATE3D_VERTEX_BUFFERS | 2); + OUT_RING(BRW_3DSTATE_VERTEX_BUFFERS | 2); OUT_RING((0 << VB0_BUFFER_INDEX_SHIFT) | VB0_VERTEXDATA | - (16 << VB0_BUFFER_PITCH_SHIFT)); - OUT_RING(pPriv->linear->offset * pI830->cpp + vb_offset); - OUT_RING(0xffffffff); /* Max index -- don't care */ + ((4 * 4) << VB0_BUFFER_PITCH_SHIFT)); /* four 32-bit floats per vertex */ + OUT_RING(state_base_offset + vb_offset); + OUT_RING(4); /* four corners to our rectangle */ /* Set up our vertex elements, sourced from the single vertex buffer. */ - OUT_RING(STATE3D_VERTEX_ELEMENTS | 3); + OUT_RING(BRW_3DSTATE_VERTEX_ELEMENTS | 3); /* offset 0: X,Y -> {X, Y, 0.0, 0.0} */ OUT_RING((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) | VE0_VALID | @@ -3052,10 +3058,10 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, nbox = REGION_NUM_RECTS(dstRegion); while (nbox--) { - int box_x1 = pbox->x1; - int box_y1 = pbox->y1; - int box_x2 = pbox->x2; - int box_y2 = pbox->y2; + int box_x1 = pbox->x1 - pbox->x1; + int box_y1 = pbox->y1 - pbox->y1; + int box_x2 = pbox->x2 - pbox->x1; + int box_y2 = pbox->y2 - pbox->y1; int i; float src_scale_x, src_scale_y; CARD32 vb[40]; @@ -3112,8 +3118,12 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, vb[i++] = (box_y2 - dyo) * src_scale_y; BEGIN_LP_RING(6); - OUT_RING(PRIMITIVE3D_BRW | (_3DPRIM_TRIFAN << P3D0_TOPO_SHIFT) | 4); - OUT_RING(4); /* vertex count per instance */ + OUT_RING(BRW_3DPRIMITIVE | + BRW_3DPRIMITIVE_VERTEX_SEQUENTIAL | + (_3DPRIM_TRIFAN << BRW_3DPRIMITIVE_TOPOLOGY_SHIFT) | + (0 << 9) | + 4); + OUT_RING(4); /* vertex count per instance XXX should this be 3 or 6? */ OUT_RING(0); /* start vertex offset */ OUT_RING(1); /* single instance */ OUT_RING(0); /* start instance location */ From 01101196b16010ac3dadab647bfe7000a53fa94d Mon Sep 17 00:00:00 2001 From: Keith his master's voice Packard Date: Sat, 27 May 2006 01:05:09 -0700 Subject: [PATCH 37/70] flesh out cc state. set cull mode to none. enable sf kernel --- src/i830_video.c | 26 +++++++++++++++++--------- 1 file changed, 17 insertions(+), 9 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index 225f9a9f..4c1a145c 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2623,7 +2623,6 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, #define SF_MAX_THREADS static const CARD32 sf_kernel_static[][4] = { -#if 0 /* send 0 (1) g6<1>F g1.8<0,1,0>F math mlen 1 rlen 1 { align1 + } */ { 0x00000031, 0x20c01fbd, 0x00000028, 0x01110081 }, /* mov (2) g3.8<1>F g2<2,2,1>F { align1 + } */ @@ -2658,7 +2657,6 @@ static const CARD32 sf_kernel_static[][4] = { { 0x00600041, 0x204077be, 0x008d0120, 0x000000c0 }, /* mov (8) m3<1>F g3<8,8,1>F { align1 + } */ { 0x00600001, 0x206003be, 0x008d0060, 0x00000000 }, -#endif /* send 0 (8) a0<1>F g0<8,8,1>F urb mlen 4 rlen 0 write +0 transpose used complete EOT{ align1 + } */ { 0x00600031, 0x20001fbc, 0x008d0000, 0x8640c800 }, /* nop (4) g0<1>UD { align1 + } */ @@ -2870,7 +2868,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, } else { dest_surf_state->ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8X8_UNORM; } - dest_surf_state->ss1.base_addr = pI830->bufferOffset; + dest_surf_state->ss1.base_addr = pI830->FrontBuffer.Start; dest_surf_state->ss2.width = pScrn->virtualX - 1; dest_surf_state->ss2.height = pScrn->virtualY - 1; dest_surf_state->ss3.pitch = pI830->displayWidth * pI830->cpp; @@ -2923,11 +2921,11 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, sf_state->thread4.urb_entry_allocation_size = 11; sf_state->thread4.max_threads = WM_MAX_THREADS - 1; sf_state->sf5.viewport_transform = FALSE; /* skip viewport */ - sf_state->sf6.cull_mode = BRW_CULLMODE_BOTH; + sf_state->sf6.cull_mode = BRW_CULLMODE_NONE; sf_state->sf6.scissor = 0; /* XXX */ sf_state->sf6.dest_org_vbias = 0x8; sf_state->sf6.dest_org_hbias = 0x8; - sf_state->sf7.trifan_pv = 2; + sf_state->sf7.trifan_pv = 0; /* XXX: Set up the PS kernel (dispatched by WM) for converting YUV to RGB. * The 3D driver does this as: @@ -2944,6 +2942,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, wm_state->thread0.kernel_start_pointer = state_base_offset + ps_kernel_offset; wm_state->thread0.grf_reg_count = ((PS_KERNEL_NUM_GRF + 15) / 16) - 1; + wm_state->thread1.single_program_flow = 1; /* XXX */ wm_state->thread1.binding_table_entry_count = 2; wm_state->thread2.scratch_space_base_pointer = 0; /* XXX */ wm_state->thread2.per_thread_scratch_space = 0; /* XXX */ @@ -2955,12 +2954,21 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, wm_state->wm5.max_threads = 0; wm_state->wm5.thread_dispatch_enable = 1; wm_state->wm5.enable_16_pix = 1; + wm_state->wm5.enable_8_pix = 0; cc_viewport->min_depth = 0.0; cc_viewport->max_depth = 0.0; memset(cc_state, 0, sizeof(*cc_state)); + cc_state->cc0.stencil_enable = 0; /* disable stencil */ + cc_state->cc2.depth_test = 0; /* disable depth test */ + cc_state->cc2.logicop_enable = 1; /* enable logic op */ + cc_state->cc3.ia_blend_enable = 0; /* blend alpha just like colors */ + cc_state->cc3.blend_enable = 0; /* disable color blend */ + cc_state->cc3.alpha_test = 0; /* disable alpha test */ cc_state->cc4.cc_viewport_state_offset = (state_base_offset + cc_viewport_offset) >> 5; + cc_state->cc5.dither_enable = 0; /* disable dither */ + cc_state->cc5.logicop_func = 0xf; /* WHITE */ memcpy (sf_kernel, sf_kernel_static, sizeof (sf_kernel_static)); memcpy (ps_kernel, ps_kernel_static, sizeof (ps_kernel_static)); @@ -3058,10 +3066,10 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, nbox = REGION_NUM_RECTS(dstRegion); while (nbox--) { - int box_x1 = pbox->x1 - pbox->x1; - int box_y1 = pbox->y1 - pbox->y1; - int box_x2 = pbox->x2 - pbox->x1; - int box_y2 = pbox->y2 - pbox->y1; + int box_x1 = pbox->x1; + int box_y1 = pbox->y1; + int box_x2 = pbox->x2; + int box_y2 = pbox->y2; int i; float src_scale_x, src_scale_y; CARD32 vb[40]; From 9c111d89fe19f1773af2eefb000e1c2389b4b6e1 Mon Sep 17 00:00:00 2001 From: Keith his master's voice Packard Date: Sat, 27 May 2006 19:52:13 -0700 Subject: [PATCH 38/70] Push all of the obvious Mesa state setting into the video code --- src/brw_structs.h | 5 +- src/i810_reg.h | 45 ++++++ src/i830_video.c | 390 ++++++++++++++++++++++++++++++++-------------- 3 files changed, 321 insertions(+), 119 deletions(-) diff --git a/src/brw_structs.h b/src/brw_structs.h index 1c59716a..49383c1c 100644 --- a/src/brw_structs.h +++ b/src/brw_structs.h @@ -923,7 +923,8 @@ struct brw_surface_state GLuint cube_neg_y:1; GLuint cube_pos_x:1; GLuint cube_neg_x:1; - GLuint pad:4; + GLuint pad:3; + GLuint render_cache_read_mode:1; GLuint mipmap_layout_mode:1; GLuint vert_line_stride_ofs:1; GLuint vert_line_stride:1; @@ -943,7 +944,7 @@ struct brw_surface_state } ss1; struct { - GLuint pad:2; + GLuint render_target_rotation:2; GLuint mip_count:4; GLuint width:13; GLuint height:13; diff --git a/src/i810_reg.h b/src/i810_reg.h index 19edad46..c0960894 100644 --- a/src/i810_reg.h +++ b/src/i810_reg.h @@ -1596,6 +1596,8 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define MI_INHIBIT_RENDER_CACHE_FLUSH (1<<2) #define MI_STATE_INSTRUCTION_CACHE_FLUSH (1<<1) #define MI_INVALIDATE_MAP_CACHE (1<<0) +/* broadwater flush bits */ +#define BRW_MI_GLOBAL_SNAPSHOT_RESET (1 << 3) /* Noop */ #define MI_NOOP 0x00 @@ -1678,6 +1680,18 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define BRW_CLIP_DISABLE 0 #define BRW_CLIP_ENABLE 1 +/* for BRW_PIPE_CONTROL */ +#define BRW_PIPE_CONTROL_NOWRITE (0 << 14) +#define BRW_PIPE_CONTROL_WRITE_QWORD (1 << 14) +#define BRW_PIPE_CONTROL_WRITE_DEPTH (2 << 14) +#define BRW_PIPE_CONTROL_WRITE_TIME (3 << 14) +#define BRW_PIPE_CONTROL_DEPTH_STALL (1 << 13) +#define BRW_PIPE_CONTROL_WC_FLUSH (1 << 12) +#define BRW_PIPE_CONTROL_IS_FLUSH (1 << 11) +#define BRW_PIPE_CONTROL_NOTIFY_ENABLE (1 << 8) +#define BRW_PIPE_CONTROL_GLOBAL_GTT (1 << 2) +#define BRW_PIPE_CONTROL_LOCAL_PGTT (0 << 2) + /* VERTEX_BUFFER_STATE Structure */ #define VB0_BUFFER_INDEX_SHIFT 27 #define VB0_VERTEXDATA (0 << 26) @@ -1701,6 +1715,37 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. /* Primitive types are in brw_defines.h */ #define BRW_3DPRIMITIVE_TOPOLOGY_SHIFT 10 +#define BRW_SVG_CTL 0x7400 + +#define BRW_SVG_CTL_GS_BA (0 << 8) +#define BRW_SVG_CTL_SS_BA (1 << 8) +#define BRW_SVG_CTL_IO_BA (2 << 8) +#define BRW_SVG_CTL_GS_AUB (3 << 8) +#define BRW_SVG_CTL_IO_AUB (4 << 8) +#define BRW_SVG_CTL_SIP (5 << 8) + +#define BRW_SVG_RDATA 0x7404 +#define BRW_SVG_WORK_CTL 0x7408 + +#define BRW_VF_CTL 0x7500 + +#define BRW_VF_CTL_SNAPSHOT_COMPLETE (1 << 31) +#define BRW_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID (0 << 8) +#define BRW_VF_CTL_SNAPSHOT_MUX_SELECT_VF_DEBUG (1 << 8) +#define BRW_VF_CTL_SNAPSHOT_TYPE_VERTEX_SEQUENCE (0 << 4) +#define BRW_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX (1 << 4) +#define BRW_VF_CTL_SKIP_INITIAL_PRIMITIVES (1 << 3) +#define BRW_VF_CTL_MAX_PRIMITIVES_LIMIT_ENABLE (1 << 2) +#define BRW_VF_CTL_VERTEX_RANGE_LIMIT_ENABLE (1 << 1) +#define BRW_VF_CTL_SNAPSHOT_ENABLE (1 << 0) + +#define BRW_VF_STRG_VAL 0x7504 +#define BRW_VF_STR_VL_OVR 0x7508 +#define BRW_VF_VC_OVR 0x750c +#define BRW_VF_STR_PSKIP 0x7510 +#define BRW_VF_MAX_PRIM 0x7514 +#define BRW_VF_RDATA 0x7518 + /* End regs for broadwater */ diff --git a/src/i830_video.c b/src/i830_video.c index 4c1a145c..5174338c 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2620,7 +2620,7 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, #define SF_KERNEL_NUM_GRF 10 #define SF_KERNEL_NUM_URB 8 -#define SF_MAX_THREADS +#define SF_MAX_THREADS 1 static const CARD32 sf_kernel_static[][4] = { /* send 0 (1) g6<1>F g1.8<0,1,0>F math mlen 1 rlen 1 { align1 + } */ @@ -2679,7 +2679,7 @@ static const CARD32 sf_kernel_static[][4] = { #define PS_KERNEL_NUM_GRF 10 #define PS_KERNEL_NUM_URB 8 -#define WM_MAX_THREADS MIN(12, PS_KERNEL_NUM_URB / 2) +#define PS_MAX_THREADS 1 /* MIN(12, PS_KERNEL_NUM_URB / 2) */ static const CARD32 ps_kernel_static[][4] = { /* mov (8) m2<1>F g2<16,16,1>UW { align1 + } */ @@ -2723,6 +2723,43 @@ static const CARD32 ps_kernel_static[][4] = { #define ALIGN(i,m) (((i) + (m) - 1) & ~((m) - 1)) #define MIN(a,b) ((a) < (b) ? (a) : (b)) +#define WM_BINDING_TABLE_ENTRIES 2 + +static CARD32 float_to_uint (float f) { + union {CARD32 i; float f;} x; + x.f = f; + return x.i; +} + +static struct { + CARD32 svg_ctl; + char *name; +} svg_ctl_bits[] = { + { BRW_SVG_CTL_GS_BA, "General State Base Address" }, + { BRW_SVG_CTL_SS_BA, "Surface State Base Address" }, + { BRW_SVG_CTL_IO_BA, "Indirect Object Base Address" }, + { BRW_SVG_CTL_GS_AUB, "Generate State Access Upper Bound" }, + { BRW_SVG_CTL_IO_AUB, "Indirect Object Access Upper Bound" }, + { BRW_SVG_CTL_SIP, "System Instruction Pointer" }, + { 0, 0 }, +}; + +static void +brw_debug (ScrnInfoPtr pScrn, char *when) +{ + I830Ptr pI830 = I830PTR(pScrn); + int i; + CARD32 v; + + I830Sync (pScrn); + ErrorF("brw_debug: %s\n", when); + for (i = 0; svg_ctl_bits[i].name; i++) { + OUTREG(BRW_SVG_CTL, svg_ctl_bits[i].svg_ctl); + v = INREG(BRW_SVG_RDATA); + ErrorF("\t%34.34s: 0x%08x\n", svg_ctl_bits[i].name, v); + } +} + static void BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, RegionPtr dstRegion, @@ -2765,9 +2802,15 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, char *state_base; int state_base_offset; +#if 0 ErrorF("BroadwaterDisplayVideoTextured: %dx%d (pitch %d)\n", width, height, video_pitch); +#endif + /* enable debug */ + OUTREG (INST_PM, + (1 << (16 + 4)) | + (1 << 4)); assert((id == FOURCC_UYVY) || (id == FOURCC_YUY2)); /* Tell the rotation code that we have stomped its invariant state by @@ -2786,7 +2829,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, wm_offset = ALIGN(next_offset, 32); next_offset = wm_offset + sizeof(*wm_state); wm_scratch_offset = ALIGN(next_offset, 1024); - next_offset = wm_scratch_offset + 1024 * WM_MAX_THREADS; + next_offset = wm_scratch_offset + 1024 * PS_MAX_THREADS; cc_offset = ALIGN(next_offset, 32); next_offset = cc_offset + sizeof(*cc_state); @@ -2811,7 +2854,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, src_surf_offset = ALIGN(next_offset, 32); next_offset = src_surf_offset + sizeof(*src_surf_state); binding_table_offset = ALIGN(next_offset, 32); - next_offset = binding_table_offset + (2 * 4); + next_offset = binding_table_offset + (WM_BINDING_TABLE_ENTRIES * 4); /* Allocate an area in framebuffer for our state layout we just set up */ total_state_size = next_offset; @@ -2845,37 +2888,83 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, /* Set up a default static partitioning of the URB, which is supposed to * allow anything we would want to do, at potentially lower performance. */ +#define URB_VS_ENTRIES 8 +#define URB_VS_ENTRY_SIZE 5 + +#define URB_GS_ENTRIES 4 +#define URB_GS_ENTRY_SIZE 5 + +#define URB_CLIP_ENTRIES 6 +#define URB_CLIP_ENTRY_SIZE 5 + +#define URB_SF_ENTRIES 8 +#define URB_SF_ENTRY_SIZE 11 + +#define URB_CS_ENTRIES 2 +#define URB_CS_ENTRY_SIZE 32 + urb_vs_start = 0; - urb_vs_size = 8 * 5; + urb_vs_size = URB_VS_ENTRIES * URB_VS_ENTRY_SIZE; urb_gs_start = urb_vs_start + urb_vs_size; - urb_gs_size = 4 * 5; + urb_gs_size = URB_GS_ENTRIES * URB_GS_ENTRY_SIZE; urb_clip_start = urb_gs_start + urb_gs_size; - urb_clip_size = 6 * 5; + urb_clip_size = URB_CLIP_ENTRIES * URB_CLIP_ENTRY_SIZE; urb_sf_start = urb_clip_start + urb_clip_size; - urb_sf_size = 8 * 11; + urb_sf_size = URB_SF_ENTRIES * URB_SF_ENTRY_SIZE; urb_cs_start = urb_sf_start + urb_sf_size; - urb_cs_size = 2 * 32; + urb_cs_size = URB_CS_ENTRIES * URB_CS_ENTRY_SIZE; /* We'll be poking the state buffers that could be in use by the 3d hardware * here, but we should have synced the 3D engine already in I830PutImage. */ + memset (cc_viewport, 0, sizeof (*cc_viewport)); + cc_viewport->min_depth = -1.e35; + cc_viewport->max_depth = 1.e35; + + /* Color calculator state */ + memset(cc_state, 0, sizeof(*cc_state)); + cc_state->cc0.stencil_enable = 0; /* disable stencil */ + cc_state->cc2.depth_test = 0; /* disable depth test */ + cc_state->cc2.logicop_enable = 1; /* enable logic op */ + cc_state->cc3.ia_blend_enable = 0; /* blend alpha just like colors */ + cc_state->cc3.blend_enable = 0; /* disable color blend */ + cc_state->cc3.alpha_test = 0; /* disable alpha test */ + cc_state->cc4.cc_viewport_state_offset = (state_base_offset + cc_viewport_offset) >> 5; + cc_state->cc5.dither_enable = 0; /* disable dither */ + cc_state->cc5.logicop_func = 0xc; /* COPYPEN */ + cc_state->cc5.statistics_enable = 1; + /* Set up the state buffer for the destination surface */ memset(dest_surf_state, 0, sizeof(*dest_surf_state)); dest_surf_state->ss0.surface_type = BRW_SURFACE_2D; + dest_surf_state->ss0.data_return_format = BRW_SURFACERETURNFORMAT_FLOAT32; if (pI830->cpp == 2) { dest_surf_state->ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM; } else { dest_surf_state->ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8X8_UNORM; } + dest_surf_state->ss0.writedisable_alpha = 0; + dest_surf_state->ss0.writedisable_red = 0; + dest_surf_state->ss0.writedisable_green = 0; + dest_surf_state->ss0.writedisable_blue = 0; + dest_surf_state->ss0.color_blend = 1; + dest_surf_state->ss0.vert_line_stride = 0; + dest_surf_state->ss0.vert_line_stride_ofs = 0; + dest_surf_state->ss0.mipmap_layout_mode = 0; + dest_surf_state->ss0.render_cache_read_mode = 0; + dest_surf_state->ss1.base_addr = pI830->FrontBuffer.Start; - dest_surf_state->ss2.width = pScrn->virtualX - 1; dest_surf_state->ss2.height = pScrn->virtualY - 1; - dest_surf_state->ss3.pitch = pI830->displayWidth * pI830->cpp; + dest_surf_state->ss2.width = pScrn->virtualX - 1; + dest_surf_state->ss2.mip_count = 0; + dest_surf_state->ss2.render_target_rotation = 0; + dest_surf_state->ss3.pitch = (pI830->displayWidth * pI830->cpp) - 1; /* Set up the source surface state buffer */ memset(src_surf_state, 0, sizeof(*src_surf_state)); src_surf_state->ss0.surface_type = BRW_SURFACE_2D; + src_surf_state->ss0.data_return_format = BRW_SURFACERETURNFORMAT_FLOAT32; switch (id) { case FOURCC_YUY2: src_surf_state->ss0.surface_format = BRW_SURFACEFORMAT_YCRCB_NORMAL; @@ -2884,9 +2973,21 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, src_surf_state->ss0.surface_format = BRW_SURFACEFORMAT_YCRCB_SWAPY; break; } + src_surf_state->ss0.writedisable_alpha = 0; + src_surf_state->ss0.writedisable_red = 0; + src_surf_state->ss0.writedisable_green = 0; + src_surf_state->ss0.writedisable_blue = 0; + src_surf_state->ss0.color_blend = 1; + src_surf_state->ss0.vert_line_stride = 0; + src_surf_state->ss0.vert_line_stride_ofs = 0; + src_surf_state->ss0.mipmap_layout_mode = 0; + src_surf_state->ss0.render_cache_read_mode = 0; + src_surf_state->ss1.base_addr = pPriv->YBuf0offset; - src_surf_state->ss2.width = width; - src_surf_state->ss2.height = height; + src_surf_state->ss2.width = width - 1; + src_surf_state->ss2.height = height - 1; + src_surf_state->ss2.mip_count = 0; + src_surf_state->ss2.render_target_rotation = 0; src_surf_state->ss3.pitch = video_pitch - 1; /* Set up a binding table for our two surfaces. Only the PS will use it */ @@ -2899,33 +3000,43 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, memset(src_sampler_state, 0, sizeof(*src_sampler_state)); src_sampler_state->ss0.min_filter = BRW_MAPFILTER_LINEAR; src_sampler_state->ss0.mag_filter = BRW_MAPFILTER_LINEAR; + src_sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP; src_sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP; src_sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP; /* Set up the vertex shader to be disabled (passthrough) */ memset(vs_state, 0, sizeof(*vs_state)); - vs_state->vs6.vs_enable = FALSE; + vs_state->thread4.nr_urb_entries = URB_VS_ENTRIES; + vs_state->thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1; + vs_state->thread4.stats_enable = 1; + vs_state->vs6.vs_enable = 0; + vs_state->vs6.vert_cache_disable = 1; /* Set up the SF kernel to do coord interp: for each attribute, * calculate dA/dx and dA/dy. Hand these interpolation coefficients * back to SF which then hands pixels off to WM. */ + memcpy (sf_kernel, sf_kernel_static, sizeof (sf_kernel_static)); memset(sf_state, 0, sizeof(*sf_state)); sf_state->thread0.kernel_start_pointer = state_base_offset + sf_kernel_offset; - sf_state->thread0.grf_reg_count = ((SF_KERNEL_NUM_GRF + 15) / 16) - 1; + sf_state->thread0.grf_reg_count = ((SF_KERNEL_NUM_GRF & ~15) / 16); sf_state->thread1.single_program_flow = 1; /* XXX */ sf_state->thread2.per_thread_scratch_space = 0; sf_state->thread2.scratch_space_base_pointer = 0; /* not used in our kernel */ - sf_state->thread4.nr_urb_entries = SF_KERNEL_NUM_URB; - sf_state->thread4.urb_entry_allocation_size = 11; - sf_state->thread4.max_threads = WM_MAX_THREADS - 1; + sf_state->thread3.urb_entry_read_length = 4; /* XXX */ + sf_state->thread3.dispatch_grf_start_reg = 3; /* XXX */ + sf_state->thread3.urb_entry_read_offset = 1; /* XXX */ + sf_state->thread4.nr_urb_entries = URB_SF_ENTRIES; + sf_state->thread4.urb_entry_allocation_size = URB_SF_ENTRY_SIZE - 1; + sf_state->thread4.max_threads = MIN(12, URB_SF_ENTRIES / 2) - 1; + sf_state->thread4.stats_enable = 1; sf_state->sf5.viewport_transform = FALSE; /* skip viewport */ sf_state->sf6.cull_mode = BRW_CULLMODE_NONE; - sf_state->sf6.scissor = 0; /* XXX */ + sf_state->sf6.scissor = 0; + sf_state->sf7.trifan_pv = 2; sf_state->sf6.dest_org_vbias = 0x8; sf_state->sf6.dest_org_hbias = 0x8; - sf_state->sf7.trifan_pv = 0; /* XXX: Set up the PS kernel (dispatched by WM) for converting YUV to RGB. * The 3D driver does this as: @@ -2940,8 +3051,10 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, * */ + memcpy (ps_kernel, ps_kernel_static, sizeof (ps_kernel_static)); + memset (wm_state, 0, sizeof (*wm_state)); wm_state->thread0.kernel_start_pointer = state_base_offset + ps_kernel_offset; - wm_state->thread0.grf_reg_count = ((PS_KERNEL_NUM_GRF + 15) / 16) - 1; + wm_state->thread0.grf_reg_count = ((PS_KERNEL_NUM_GRF & ~15) / 16); wm_state->thread1.single_program_flow = 1; /* XXX */ wm_state->thread1.binding_table_entry_count = 2; wm_state->thread2.scratch_space_base_pointer = 0; /* XXX */ @@ -2949,35 +3062,105 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, wm_state->thread3.dispatch_grf_start_reg = 0; /* XXX */ wm_state->thread3.urb_entry_read_length = 4; /* XXX */ wm_state->thread3.const_urb_entry_read_length = 0; /* XXX */ + wm_state->thread3.urb_entry_read_offset = 0; /* XXX */ + wm_state->wm4.stats_enable = 1; wm_state->wm4.sampler_state_pointer = (state_base_offset + src_sampler_offset) >> 5; wm_state->wm4.sampler_count = 1; /* 1-4 samplers used */ - wm_state->wm5.max_threads = 0; + wm_state->wm5.max_threads = 0; /* XXX should be PS_MAX_THREADS */ wm_state->wm5.thread_dispatch_enable = 1; wm_state->wm5.enable_16_pix = 1; wm_state->wm5.enable_8_pix = 0; + wm_state->wm5.early_depth_test = 1; - cc_viewport->min_depth = 0.0; - cc_viewport->max_depth = 0.0; - - memset(cc_state, 0, sizeof(*cc_state)); - cc_state->cc0.stencil_enable = 0; /* disable stencil */ - cc_state->cc2.depth_test = 0; /* disable depth test */ - cc_state->cc2.logicop_enable = 1; /* enable logic op */ - cc_state->cc3.ia_blend_enable = 0; /* blend alpha just like colors */ - cc_state->cc3.blend_enable = 0; /* disable color blend */ - cc_state->cc3.alpha_test = 0; /* disable alpha test */ - cc_state->cc4.cc_viewport_state_offset = (state_base_offset + cc_viewport_offset) >> 5; - cc_state->cc5.dither_enable = 0; /* disable dither */ - cc_state->cc5.logicop_func = 0xf; /* WHITE */ - - memcpy (sf_kernel, sf_kernel_static, sizeof (sf_kernel_static)); - memcpy (ps_kernel, ps_kernel_static, sizeof (ps_kernel_static)); + { + BEGIN_LP_RING(2); + OUT_RING(MI_FLUSH | + MI_STATE_INSTRUCTION_CACHE_FLUSH | + /* BRW_MI_GLOBAL_SNAPSHOT_RESET */ 0); + OUT_RING(MI_NOOP); + ADVANCE_LP_RING(); + } - BEGIN_LP_RING(38); - OUT_RING(MI_FLUSH | MI_STATE_INSTRUCTION_CACHE_FLUSH); - +/* brw_debug (pScrn, "before base address modify"); */ + { BEGIN_LP_RING(12); + /* Match Mesa driver setup */ OUT_RING(BRW_PIPELINE_SELECT | PIPELINE_SELECT_3D); + /* Mesa does this. Who knows... */ + OUT_RING(BRW_CS_URB_STATE | 0); + OUT_RING((0 << 4) | /* URB Entry Allocation Size */ + (0 << 0)); /* Number of URB Entries */ + + /* Zero out the two base address registers so all offsets are absolute */ + OUT_RING(BRW_STATE_BASE_ADDRESS | 4); + OUT_RING(0 | BASE_ADDRESS_MODIFY); /* Generate state base address */ + OUT_RING(0 | BASE_ADDRESS_MODIFY); /* Surface state base address */ + OUT_RING(0 | BASE_ADDRESS_MODIFY); /* media base addr, don't care */ + OUT_RING(0x10000000 | BASE_ADDRESS_MODIFY); /* general state max addr, disabled */ + OUT_RING(1); /* media object state max addr, disabled */ + + /* Set system instruction pointer to zero */ + OUT_RING(BRW_STATE_SIP | 0); + OUT_RING(0); /* system instruction pointer */ + + OUT_RING(MI_NOOP); + ADVANCE_LP_RING(); } + +/* brw_debug (pScrn, "after base address modify"); */ + + { BEGIN_LP_RING(42); + /* Enable VF statistics */ + OUT_RING(BRW_3DSTATE_VF_STATISTICS | 1); + + /* Pipe control */ + OUT_RING(BRW_PIPE_CONTROL | + BRW_PIPE_CONTROL_NOWRITE | + BRW_PIPE_CONTROL_IS_FLUSH | + 2); + OUT_RING(0); /* Destination address */ + OUT_RING(0); /* Immediate data low DW */ + OUT_RING(0); /* Immediate data high DW */ + + /* Binding table pointers */ + OUT_RING(BRW_3DSTATE_BINDING_TABLE_POINTERS | 4); + OUT_RING(0); /* vs */ + OUT_RING(0); /* gs */ + OUT_RING(0); /* clip */ + OUT_RING(0); /* sf */ + /* Only the PS uses the binding table */ + OUT_RING(state_base_offset + binding_table_offset); /* ps */ + + /* Blend constant color (magenta is fun) */ + OUT_RING(BRW_3DSTATE_CONSTANT_COLOR | 3); + OUT_RING(float_to_uint (1.0)); + OUT_RING(float_to_uint (0.0)); + OUT_RING(float_to_uint (1.0)); + OUT_RING(float_to_uint (1.0)); + + /* The drawing rectangle clipping is always on. Set it to values that + * shouldn't do any clipping. + */ + OUT_RING(BRW_3DSTATE_DRAWING_RECTANGLE | 2); /* XXX 3 for BLC or CTG */ + OUT_RING(0x00000000); /* ymin, xmin */ + OUT_RING((pScrn->virtualX - 1) | + (pScrn->virtualY - 1) << 16); /* ymax, xmax */ + OUT_RING(0x00000000); /* yorigin, xorigin */ + + /* skip the depth buffer */ + /* skip the polygon stipple */ + /* skip the polygon stipple offset */ + /* skip the line stipple */ + + /* Set the pointers to the 3d pipeline state */ + OUT_RING(BRW_3DSTATE_PIPELINED_POINTERS | 5); + OUT_RING(state_base_offset + vs_offset); /* 32 byte aligned */ + OUT_RING(BRW_GS_DISABLE); /* disable GS, resulting in passthrough */ + OUT_RING(BRW_CLIP_DISABLE); /* disable CLIP, resulting in passthrough */ + OUT_RING(state_base_offset + sf_offset); /* 32 byte aligned */ + OUT_RING(state_base_offset + wm_offset); /* 32 byte aligned */ + OUT_RING(state_base_offset + cc_offset); /* 64 byte aligned */ + + /* URB fence */ OUT_RING(BRW_URB_FENCE | UF0_CS_REALLOC | UF0_SF_REALLOC | @@ -2991,73 +3174,44 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, OUT_RING(((urb_cs_start + urb_cs_size) << UF2_CS_FENCE_SHIFT) | ((urb_sf_start + urb_sf_size) << UF2_SF_FENCE_SHIFT)); - /* Zero out the two base address registers so all offsets are absolute */ - OUT_RING(BRW_STATE_BASE_ADDRESS | 4); - OUT_RING(0 | BASE_ADDRESS_MODIFY); /* Generate state base address */ - OUT_RING(0 | BASE_ADDRESS_MODIFY); /* Surface state base address */ - OUT_RING(0); /* media base addr, don't care */ - OUT_RING(0); /* general state max addr, disabled */ - OUT_RING(0); /* media object state max addr, disabled */ - - /* Set the pointers to the 3d pipeline state */ - OUT_RING(BRW_3DSTATE_PIPELINED_POINTERS | 5); - OUT_RING(state_base_offset + vs_offset); /* 32 byte aligned */ - OUT_RING(BRW_GS_DISABLE); /* disable GS, resulting in passthrough */ - OUT_RING(BRW_CLIP_DISABLE); /* disable CLIP, resulting in passthrough */ - OUT_RING(state_base_offset + sf_offset); /* 32 byte aligned */ - OUT_RING(state_base_offset + wm_offset); /* 32 byte aligned */ - OUT_RING(state_base_offset + cc_offset); /* 64 byte aligned */ - - /* Only the PS uses the binding table */ - OUT_RING(BRW_3DSTATE_BINDING_TABLE_POINTERS | 4); - OUT_RING(0); /* vs */ - OUT_RING(0); /* gs */ - OUT_RING(0); /* clip */ - OUT_RING(0); /* sf */ - OUT_RING(state_base_offset + binding_table_offset); /* ps */ - - /* The drawing rectangle clipping is always on. Set it to values that - * shouldn't do any clipping. - */ - OUT_RING(BRW_3DSTATE_DRAWING_RECTANGLE | 2); /* XXX 3 for BLC or CTG */ - OUT_RING(0x00000000); /* ymin, xmin */ - OUT_RING((pScrn->virtualX - 1) | - (pScrn->virtualY - 1) << 16); /* ymax, xmax */ - OUT_RING(0x00000000); /* yorigin, xorigin */ - + /* Constant buffer state */ + OUT_RING(BRW_CS_URB_STATE | 0); + OUT_RING(((URB_CS_ENTRY_SIZE - 1) << 4) | /* URB Entry Allocation Size */ + (URB_CS_ENTRIES << 0)); /* Number of URB Entries */ + /* Set up the pointer to our vertex buffer */ OUT_RING(BRW_3DSTATE_VERTEX_BUFFERS | 2); OUT_RING((0 << VB0_BUFFER_INDEX_SHIFT) | VB0_VERTEXDATA | ((4 * 4) << VB0_BUFFER_PITCH_SHIFT)); /* four 32-bit floats per vertex */ OUT_RING(state_base_offset + vb_offset); - OUT_RING(4); /* four corners to our rectangle */ + OUT_RING(3); /* four corners to our rectangle */ /* Set up our vertex elements, sourced from the single vertex buffer. */ OUT_RING(BRW_3DSTATE_VERTEX_ELEMENTS | 3); - /* offset 0: X,Y -> {X, Y, 0.0, 0.0} */ + /* offset 0: X,Y -> {X, Y, 1.0, 1.0} */ OUT_RING((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) | VE0_VALID | (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | (0 << VE0_OFFSET_SHIFT)); OUT_RING((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | - (BRW_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT) | - (BRW_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT) | + (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | + (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) | (0 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT)); - /* offset 8: S0, T0 -> {S0, T0, 0.0, 0.0} */ + /* offset 8: S0, T0 -> {S0, T0, 1.0, 1.0} */ OUT_RING((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) | VE0_VALID | (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | (8 << VE0_OFFSET_SHIFT)); OUT_RING((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | - (BRW_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT) | - (BRW_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT) | + (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | + (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) | (4 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT)); - OUT_RING(0); /* pad to quadword */ - ADVANCE_LP_RING(); + OUT_RING(MI_NOOP); /* pad to quadword */ + ADVANCE_LP_RING(); } dxo = dstRegion->extents.x1; dyo = dstRegion->extents.y1; @@ -3072,9 +3226,6 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, int box_y2 = pbox->y2; int i; float src_scale_x, src_scale_y; - CARD32 vb[40]; - float verts[4][2], tex[4][2], tex2[4][2]; - int vert_data_count; if (!first_output) { /* Since we use the same little vertex buffer over and over, sync for @@ -3091,30 +3242,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, src_scale_x = (float)src_w / (float)drw_w; src_scale_y = (float)src_h / (float)drw_h; - if (!planar) - vert_data_count = 32; - else - vert_data_count = 40; - - OUT_RING(MI_NOOP); - OUT_RING(MI_NOOP); - OUT_RING(MI_NOOP); - OUT_RING(MI_NOOP); - OUT_RING(MI_NOOP); - OUT_RING(MI_NOOP); - OUT_RING(MI_NOOP); - i = 0; - vb[i++] = box_x1; - vb[i++] = box_y1; - vb[i++] = (box_x1 - dxo) * src_scale_x; - vb[i++] = (box_y1 - dyo) * src_scale_y; - - vb[i++] = box_x2; - vb[i++] = box_y1; - vb[i++] = (box_x2 - dxo) * src_scale_x; - vb[i++] = (box_y1 - dyo) * src_scale_y; - vb[i++] = box_x2; vb[i++] = box_y2; vb[i++] = (box_x2 - dxo) * src_scale_x; @@ -3125,27 +3253,51 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, vb[i++] = (box_x1 - dxo) * src_scale_x; vb[i++] = (box_y2 - dyo) * src_scale_y; + vb[i++] = box_x1; + vb[i++] = box_y1; + vb[i++] = (box_x1 - dxo) * src_scale_x; + vb[i++] = (box_y1 - dyo) * src_scale_y; + + OUTREG(BRW_VF_CTL, + BRW_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID | + BRW_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX | + BRW_VF_CTL_SNAPSHOT_ENABLE); + OUTREG(BRW_VF_STRG_VAL, 0); + BEGIN_LP_RING(6); OUT_RING(BRW_3DPRIMITIVE | BRW_3DPRIMITIVE_VERTEX_SEQUENTIAL | - (_3DPRIM_TRIFAN << BRW_3DPRIMITIVE_TOPOLOGY_SHIFT) | - (0 << 9) | + (_3DPRIM_TRILIST << BRW_3DPRIMITIVE_TOPOLOGY_SHIFT) | + (0 << 9) | /* CTG - indirect vertex count */ 4); - OUT_RING(4); /* vertex count per instance XXX should this be 3 or 6? */ + OUT_RING(3); /* vertex count per instance */ OUT_RING(0); /* start vertex offset */ OUT_RING(1); /* single instance */ OUT_RING(0); /* start instance location */ OUT_RING(0); /* index buffer offset, ignored */ - ADVANCE_LP_RING(); + int j; + CARD32 ctl = 0; + + for (j = 0; j < 100000; j++) { + ctl = INREG(BRW_VF_CTL); + if (ctl & BRW_VF_CTL_SNAPSHOT_COMPLETE) + break; + } + CARD32 rdata = INREG(BRW_VF_RDATA); + + ErrorF ("VF_CTL: 0x%08x VF_RDATA: 0x%08x\n", ctl, rdata); + first_output = FALSE; + if (pI830->AccelInfoRec) + pI830->AccelInfoRec->NeedToSync = TRUE; } - xf86FreeOffscreenLinear(state_area); - if (pI830->AccelInfoRec) - pI830->AccelInfoRec->NeedToSync = TRUE; + (*pI830->AccelInfoRec->Sync)(pScrn); +/* I830PrintErrorState (pScrn); */ + xf86FreeOffscreenLinear(state_area); } static FBLinearPtr @@ -3322,7 +3474,9 @@ I830PutImage(ScrnInfoPtr pScrn, } break; } +#if 0 ErrorF("srcPitch: %d, dstPitch: %d, size: %d\n", srcPitch, dstPitch, size); +#endif /* size is multiplied by 2 because we have two buffers that are flipping */ pPriv->linear = I830AllocateMemory(pScrn, pPriv->linear, @@ -3454,7 +3608,9 @@ I830QueryImageAttributes(ScrnInfoPtr pScrn, I830Ptr pI830 = I830PTR(pScrn); int size, tmp; +#if 0 ErrorF("I830QueryImageAttributes: w is %d, h is %d\n", *w, *h); +#endif if (!textured) { if (IS_845G(pI830) || IS_I830(pI830)) { From 79a514412bda7e38e018c105a603970c4a9d758a Mon Sep 17 00:00:00 2001 From: Keith his master's voice Packard Date: Sun, 28 May 2006 16:09:59 -0700 Subject: [PATCH 39/70] dump out piles of debug. Create VS thread just to see how it works --- src/brw_structs.h | 16 +++- src/i810_reg.h | 103 +++++++++++++++++++++- src/i830_video.c | 211 ++++++++++++++++++++++++++++++++++++++++++---- 3 files changed, 311 insertions(+), 19 deletions(-) diff --git a/src/brw_structs.h b/src/brw_structs.h index 49383c1c..c9c07510 100644 --- a/src/brw_structs.h +++ b/src/brw_structs.h @@ -658,7 +658,21 @@ struct brw_cc_unit_state struct brw_sf_unit_state { struct thread0 thread0; - struct thread1 thread1; + struct { + GLuint pad0:7; + GLuint sw_exception_enable:1; + GLuint pad1:3; + GLuint mask_stack_exception_enable:1; + GLuint pad2:1; + GLuint illegal_op_exception_enable:1; + GLuint pad3:2; + GLuint floating_point_mode:1; + GLuint thread_priority:1; + GLuint binding_table_entry_count:8; + GLuint pad4:5; + GLuint single_program_flow:1; + } sf1; + struct thread2 thread2; struct thread3 thread3; diff --git a/src/i810_reg.h b/src/i810_reg.h index c0960894..716275e6 100644 --- a/src/i810_reg.h +++ b/src/i810_reg.h @@ -1746,8 +1746,109 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define BRW_VF_MAX_PRIM 0x7514 #define BRW_VF_RDATA 0x7518 -/* End regs for broadwater */ +#define BRW_VS_CTL 0x7600 +#define BRW_VS_CTL_SNAPSHOT_COMPLETE (1 << 31) +#define BRW_VS_CTL_SNAPSHOT_MUX_VERTEX_0 (0 << 8) +#define BRW_VS_CTL_SNAPSHOT_MUX_VERTEX_1 (1 << 8) +#define BRW_VS_CTL_SNAPSHOT_MUX_VALID_COUNT (2 << 8) +#define BRW_VS_CTL_SNAPSHOT_MUX_VS_KERNEL_POINTER (3 << 8) +#define BRW_VS_CTL_SNAPSHOT_ALL_THREADS (1 << 2) +#define BRW_VS_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) +#define BRW_VS_CTL_SNAPSHOT_ENABLE (1 << 0) +#define BRW_VS_STRG_VAL 0x7604 +#define BRW_VS_RDATA 0x7608 + +#define BRW_SF_CTL 0x7b00 +#define BRW_SF_CTL_SNAPSHOT_COMPLETE (1 << 31) +#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_0_FF_ID (0 << 8) +#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_0_REL_COUNT (1 << 8) +#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_1_FF_ID (2 << 8) +#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_1_REL_COUNT (3 << 8) +#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_2_FF_ID (4 << 8) +#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_2_REL_COUNT (5 << 8) +#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT (6 << 8) +#define BRW_SF_CTL_SNAPSHOT_MUX_SF_KERNEL_POINTER (7 << 8) +#define BRW_SF_CTL_MIN_MAX_PRIMITIVE_RANGE_ENABLE (1 << 4) +#define BRW_SF_CTL_DEBUG_CLIP_RECTANGLE_ENABLE (1 << 3) +#define BRW_SF_CTL_SNAPSHOT_ALL_THREADS (1 << 2) +#define BRW_SF_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) +#define BRW_SF_CTL_SNAPSHOT_ENABLE (1 << 0) + +#define BRW_SF_STRG_VAL 0x7b04 +#define BRW_SF_RDATA 0x7b18 + +#define BRW_WIZ_CTL 0x7c00 +#define BRW_WIZ_CTL_SNAPSHOT_COMPLETE (1 << 31) +#define BRW_WIZ_CTL_SUBSPAN_INSTANCE_SHIFT 16 +#define BRW_WIZ_CTL_SNAPSHOT_MUX_WIZ_KERNEL_POINTER (0 << 8) +#define BRW_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE (1 << 8) +#define BRW_WIZ_CTL_SNAPSHOT_MUX_PRIMITIVE_SEQUENCE (2 << 8) +#define BRW_WIZ_CTL_SINGLE_SUBSPAN_DISPATCH (1 << 6) +#define BRW_WIZ_CTL_IGNORE_COLOR_SCOREBOARD_STALLS (1 << 5) +#define BRW_WIZ_CTL_ENABLE_SUBSPAN_INSTANCE_COMPARE (1 << 4) +#define BRW_WIZ_CTL_USE_UPSTREAM_SNAPSHOT_FLAG (1 << 3) +#define BRW_WIZ_CTL_SNAPSHOT_ALL_THREADS (1 << 2) +#define BRW_WIZ_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) +#define BRW_WIZ_CTL_SNAPSHOT_ENABLE (1 << 0) + +#define BRW_WIZ_STRG_VAL 0x7c04 +#define BRW_WIZ_RDATA 0x7c18 + +#define BRW_TS_CTL 0x7e00 +#define BRW_TS_CTL_SNAPSHOT_COMPLETE (1 << 31) +#define BRW_TS_CTL_SNAPSHOT_MESSAGE_ERROR (0 << 8) +#define BRW_TS_CTL_SNAPSHOT_INTERFACE_DESCRIPTOR (3 << 8) +#define BRW_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS (1 << 2) +#define BRW_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS (1 << 1) +#define BRW_TS_CTL_SNAPSHOT_ENABLE (1 << 0) + +#define BRW_TS_STRG_VAL 0x7e04 +#define BRW_TS_RDATA 0x7e08 + +#define BRW_TD_CTL 0x8000 +#define BRW_TD_CTL_MUX_SHIFT 8 +#define BRW_TD_CTL_EXTERNAL_HALT_R0_DEBUG_MATCH (1 << 7) +#define BRW_TD_CTL_FORCE_EXTERNAL_HALT (1 << 6) +#define BRW_TD_CTL_EXCEPTION_MASK_OVERRIDE (1 << 5) +#define BRW_TD_CTL_FORCE_THREAD_BREAKPOINT_ENABLE (1 << 4) +#define BRW_TD_CTL_BREAKPOINT_ENABLE (1 << 2) +#define BRW_TD_CTL2 0x8004 +#define BRW_TD_CTL2_ILLEGAL_OPCODE_EXCEPTION_OVERRIDE (1 << 28) +#define BRW_TD_CTL2_MASKSTACK_EXCEPTION_OVERRIDE (1 << 26) +#define BRW_TD_CTL2_SOFTWARE_EXCEPTION_OVERRIDE (1 << 25) +#define BRW_TD_CTL2_ACTIVE_THREAD_LIMIT_SHIFT 16 +#define BRW_TD_CTL2_ACTIVE_THREAD_LIMIT_ENABLE (1 << 8) +#define BRW_TD_CTL2_THREAD_SPAWNER_EXECUTION_MASK_ENABLE (1 << 7) +#define BRW_TD_CTL2_WIZ_EXECUTION_MASK_ENABLE (1 << 6) +#define BRW_TD_CTL2_SF_EXECUTION_MASK_ENABLE (1 << 5) +#define BRW_TD_CTL2_CLIPPER_EXECUTION_MASK_ENABLE (1 << 4) +#define BRW_TD_CTL2_GS_EXECUTION_MASK_ENABLE (1 << 3) +#define BRW_TD_CTL2_VS_EXECUTION_MASK_ENABLE (1 << 0) +#define BRW_TD_VF_VS_EMSK 0x8008 +#define BRW_TD_GS_EMSK 0x800c +#define BRW_TD_CLIP_EMSK 0x8010 +#define BRW_TD_SF_EMSK 0x8014 +#define BRW_TD_WIZ_EMSK 0x8018 +#define BRW_TD_0_6_EHTRG_VAL 0x801c +#define BRW_TD_0_7_EHTRG_VAL 0x8020 +#define BRW_TD_0_6_EHTRG_MSK 0x8024 +#define BRW_TD_0_7_EHTRG_MSK 0x8028 +#define BRW_TD_RDATA 0x802c +#define BRW_TD_TS_EMSK 0x8030 + +#define BRW_EU_CTL 0x8800 +#define BRW_EU_CTL_SELECT_SHIFT 16 +#define BRW_EU_CTL_DATA_MUX_SHIFT 8 +#define BRW_EU_ATT_0 0x8810 +#define BRW_EU_ATT_1 0x8814 +#define BRW_EU_ATT_DATA_0 0x8820 +#define BRW_EU_ATT_DATA_1 0x8824 +#define BRW_EU_ATT_CLR_0 0x8830 +#define BRW_EU_ATT_CLR_1 0x8834 +#define BRW_EU_RDATA 0x8840 + +/* End regs for broadwater */ #define MAX_DISPLAY_PIPES 2 diff --git a/src/i830_video.c b/src/i830_video.c index 5174338c..bbbcd41e 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2613,6 +2613,48 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, pI830->AccelInfoRec->NeedToSync = TRUE; } +static const CARD32 sip_kernel_static[][4] = { +/* wait (1) a0<1>UW a145<0,1,0>UW { align1 + } */ + { 0x00000030, 0x20000108, 0x00001220, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +}; + +static const CARD32 vs_kernel_static[][4] = { +/* wait (1) a0<1>UW a145<0,1,0>UW { align1 + } */ + { 0x00000030, 0x20000108, 0x00001220, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +}; + /* * this program computes dA/dx and dA/dy for the texture coordinates along * with the base texture coordinate. It was extracted from the Mesa driver @@ -2623,6 +2665,9 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, #define SF_MAX_THREADS 1 static const CARD32 sf_kernel_static[][4] = { +/* wait (1) a0<1>UW a145<0,1,0>UW { align1 + } */ + { 0x00000030, 0x20000108, 0x00001220, 0x00000000 }, +#if 0 /* send 0 (1) g6<1>F g1.8<0,1,0>F math mlen 1 rlen 1 { align1 + } */ { 0x00000031, 0x20c01fbd, 0x00000028, 0x01110081 }, /* mov (2) g3.8<1>F g2<2,2,1>F { align1 + } */ @@ -2657,6 +2702,7 @@ static const CARD32 sf_kernel_static[][4] = { { 0x00600041, 0x204077be, 0x008d0120, 0x000000c0 }, /* mov (8) m3<1>F g3<8,8,1>F { align1 + } */ { 0x00600001, 0x206003be, 0x008d0060, 0x00000000 }, +#endif /* send 0 (8) a0<1>F g0<8,8,1>F urb mlen 4 rlen 0 write +0 transpose used complete EOT{ align1 + } */ { 0x00600031, 0x20001fbc, 0x008d0000, 0x8640c800 }, /* nop (4) g0<1>UD { align1 + } */ @@ -2682,6 +2728,7 @@ static const CARD32 sf_kernel_static[][4] = { #define PS_MAX_THREADS 1 /* MIN(12, PS_KERNEL_NUM_URB / 2) */ static const CARD32 ps_kernel_static[][4] = { +#if 0 /* mov (8) m2<1>F g2<16,16,1>UW { align1 + } */ { 0x00600001, 0x2040013e, 0x00b10040, 0x00000000 }, /* mov (8) m6<1>F g3<16,16,1>UW { align1 sechalf + } */ @@ -2700,6 +2747,7 @@ static const CARD32 ps_kernel_static[][4] = { { 0x00601001, 0x2120013e, 0x00b100c0, 0x00000000 }, /* mov (8) m1<1>F g1<8,8,1>F { align1 mask_disable + } */ { 0x00600201, 0x202003be, 0x008d0020, 0x00000000 }, +#endif /* send 0 (16) a0<1>UW g0<8,8,1>UW write mlen 10 rlen 0 EOT{ align1 + } */ { 0x00800031, 0x20001d28, 0x008d0000, 0x85a04800 }, /* nop (4) g0<1>UD { align1 + } */ @@ -2787,14 +2835,17 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, struct brw_wm_unit_state *wm_state; struct brw_cc_unit_state *cc_state; struct brw_cc_viewport *cc_viewport; + struct brw_instruction *vs_kernel; struct brw_instruction *sf_kernel; struct brw_instruction *ps_kernel; + struct brw_instruction *sip_kernel; CARD32 *vb, *binding_table; Bool first_output = TRUE; int dest_surf_offset, src_surf_offset, src_sampler_offset, vs_offset; int sf_offset, wm_offset, cc_offset, vb_offset, cc_viewport_offset; int wm_scratch_offset; - int sf_kernel_offset, ps_kernel_offset; + int vs_kernel_offset; + int sf_kernel_offset, ps_kernel_offset, sip_kernel_offset; int binding_table_offset; int next_offset, total_state_size; int vb_size = (4 * 4) * 4; /* 4 DWORDS per vertex */ @@ -2811,6 +2862,8 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, OUTREG (INST_PM, (1 << (16 + 4)) | (1 << 4)); + ErrorF ("INST_PM 0x%08x\n", INREG(INST_PM)); + assert((id == FOURCC_UYVY) || (id == FOURCC_YUY2)); /* Tell the rotation code that we have stomped its invariant state by @@ -2837,6 +2890,10 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, next_offset = sf_kernel_offset + sizeof (sf_kernel_static); ps_kernel_offset = ALIGN(next_offset, 64); next_offset = ps_kernel_offset + sizeof (ps_kernel_static); + sip_kernel_offset = ALIGN(next_offset, 64); + next_offset = sip_kernel_offset + sizeof (sip_kernel_static); + vs_kernel_offset = ALIGN(next_offset, 64); + next_offset = vs_kernel_offset + sizeof (vs_kernel_static); cc_viewport_offset = ALIGN(next_offset, 32); next_offset = cc_viewport_offset + sizeof(*cc_viewport); @@ -2878,7 +2935,8 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, cc_state = (void *)(state_base + cc_offset); sf_kernel = (void *)(state_base + sf_kernel_offset); ps_kernel = (void *)(state_base + ps_kernel_offset); - cc_viewport = (void *)(state_base + cc_viewport_offset); + sip_kernel = (void *)(state_base + sip_kernel_offset); +cc_viewport = (void *)(state_base + cc_viewport_offset); dest_surf_state = (void *)(state_base + dest_surf_offset); src_surf_state = (void *)(state_base + src_surf_offset); src_sampler_state = (void *)(state_base + src_sampler_offset); @@ -2935,6 +2993,9 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, cc_state->cc5.logicop_func = 0xc; /* COPYPEN */ cc_state->cc5.statistics_enable = 1; + /* Upload system kernel */ + memcpy (sip_kernel, sip_kernel_static, sizeof (sip_kernel_static)); + /* Set up the state buffer for the destination surface */ memset(dest_surf_state, 0, sizeof(*dest_surf_state)); dest_surf_state->ss0.surface_type = BRW_SURFACE_2D; @@ -3005,11 +3066,17 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, src_sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP; /* Set up the vertex shader to be disabled (passthrough) */ + memcpy(vs_kernel, vs_kernel_static, sizeof (vs_kernel_static)); + memset(vs_state, 0, sizeof(*vs_state)); + vs_state->thread0.kernel_start_pointer = + (state_base_offset + vs_kernel_offset) >> 6; + vs_state->thread0.grf_reg_count = 1; + vs_state->thread1.single_program_flow = 1; vs_state->thread4.nr_urb_entries = URB_VS_ENTRIES; vs_state->thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1; vs_state->thread4.stats_enable = 1; - vs_state->vs6.vs_enable = 0; + vs_state->vs6.vs_enable = 1; vs_state->vs6.vert_cache_disable = 1; /* Set up the SF kernel to do coord interp: for each attribute, @@ -3019,14 +3086,22 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, memcpy (sf_kernel, sf_kernel_static, sizeof (sf_kernel_static)); memset(sf_state, 0, sizeof(*sf_state)); - sf_state->thread0.kernel_start_pointer = state_base_offset + sf_kernel_offset; + ErrorF ("sf kernel: 0x%08x\n", state_base_offset + sf_kernel_offset); + sf_state->thread0.kernel_start_pointer = + (state_base_offset + sf_kernel_offset) >> 6; sf_state->thread0.grf_reg_count = ((SF_KERNEL_NUM_GRF & ~15) / 16); - sf_state->thread1.single_program_flow = 1; /* XXX */ + sf_state->sf1.single_program_flow = 1; /* XXX */ + sf_state->sf1.binding_table_entry_count = 0; + sf_state->sf1.thread_priority = 0; + sf_state->sf1.floating_point_mode = 1; /* Mesa does this */ + sf_state->sf1.illegal_op_exception_enable = 1; + sf_state->sf1.mask_stack_exception_enable = 1; + sf_state->sf1.sw_exception_enable = 1; sf_state->thread2.per_thread_scratch_space = 0; sf_state->thread2.scratch_space_base_pointer = 0; /* not used in our kernel */ - sf_state->thread3.urb_entry_read_length = 4; /* XXX */ - sf_state->thread3.dispatch_grf_start_reg = 3; /* XXX */ + sf_state->thread3.urb_entry_read_length = 1; /* XXX */ sf_state->thread3.urb_entry_read_offset = 1; /* XXX */ + sf_state->thread3.dispatch_grf_start_reg = 3; /* XXX */ sf_state->thread4.nr_urb_entries = URB_SF_ENTRIES; sf_state->thread4.urb_entry_allocation_size = URB_SF_ENTRY_SIZE - 1; sf_state->thread4.max_threads = MIN(12, URB_SF_ENTRIES / 2) - 1; @@ -3052,8 +3127,10 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, */ memcpy (ps_kernel, ps_kernel_static, sizeof (ps_kernel_static)); + ErrorF ("ps kernel: 0x%08x\n", state_base_offset + ps_kernel_offset); memset (wm_state, 0, sizeof (*wm_state)); - wm_state->thread0.kernel_start_pointer = state_base_offset + ps_kernel_offset; + wm_state->thread0.kernel_start_pointer = + (state_base_offset + ps_kernel_offset) >> 6; wm_state->thread0.grf_reg_count = ((PS_KERNEL_NUM_GRF & ~15) / 16); wm_state->thread1.single_program_flow = 1; /* XXX */ wm_state->thread1.binding_table_entry_count = 2; @@ -3076,7 +3153,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, BEGIN_LP_RING(2); OUT_RING(MI_FLUSH | MI_STATE_INSTRUCTION_CACHE_FLUSH | - /* BRW_MI_GLOBAL_SNAPSHOT_RESET */ 0); + BRW_MI_GLOBAL_SNAPSHOT_RESET); OUT_RING(MI_NOOP); ADVANCE_LP_RING(); } @@ -3099,9 +3176,9 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, OUT_RING(0x10000000 | BASE_ADDRESS_MODIFY); /* general state max addr, disabled */ OUT_RING(1); /* media object state max addr, disabled */ - /* Set system instruction pointer to zero */ + /* Set system instruction pointer */ OUT_RING(BRW_STATE_SIP | 0); - OUT_RING(0); /* system instruction pointer */ + OUT_RING(state_base_offset + sip_kernel_offset); /* system instruction pointer */ OUT_RING(MI_NOOP); ADVANCE_LP_RING(); } @@ -3194,8 +3271,8 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, VE0_VALID | (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | (0 << VE0_OFFSET_SHIFT)); - OUT_RING((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | - (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | + OUT_RING((BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_0_SHIFT) | + (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_1_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) | (0 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT)); @@ -3258,12 +3335,52 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, vb[i++] = (box_x1 - dxo) * src_scale_x; vb[i++] = (box_y1 - dyo) * src_scale_y; + ErrorF ("before EU_ATT 0x%08x%08x EU_ATT_DATA 0x%08x%08x\n", + INREG(BRW_EU_ATT_1), INREG(BRW_EU_ATT_0), + INREG(BRW_EU_ATT_DATA_1), INREG(BRW_EU_ATT_DATA_0)); + OUTREG(BRW_VF_CTL, BRW_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID | BRW_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX | BRW_VF_CTL_SNAPSHOT_ENABLE); OUTREG(BRW_VF_STRG_VAL, 0); +#if 0 + OUTREG(BRW_VS_CTL, + BRW_VS_CTL_SNAPSHOT_ALL_THREADS | + BRW_VS_CTL_SNAPSHOT_MUX_VALID_COUNT | + BRW_VS_CTL_THREAD_SNAPSHOT_ENABLE); + + OUTREG(BRW_VS_STRG_VAL, 0); +#endif + + OUTREG(BRW_SF_CTL, + BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT | + BRW_SF_CTL_SNAPSHOT_ALL_THREADS | + BRW_SF_CTL_THREAD_SNAPSHOT_ENABLE); + OUTREG(BRW_SF_STRG_VAL, 0); + + OUTREG(BRW_WIZ_CTL, + BRW_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE | + BRW_WIZ_CTL_SNAPSHOT_ALL_THREADS | + BRW_WIZ_CTL_SNAPSHOT_ENABLE); + OUTREG(BRW_WIZ_STRG_VAL, + (box_x1) | (box_y1 << 16)); + + OUTREG(BRW_TS_CTL, + BRW_TS_CTL_SNAPSHOT_MESSAGE_ERROR | + BRW_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS | + BRW_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS | + BRW_TS_CTL_SNAPSHOT_ENABLE); + + { static int first = 1; + if (first) + first = 0; + else + OUTREG(BRW_TD_CTL, + BRW_TD_CTL_FORCE_EXTERNAL_HALT); + } + BEGIN_LP_RING(6); OUT_RING(BRW_3DPRIMITIVE | BRW_3DPRIMITIVE_VERTEX_SEQUENTIAL | @@ -3278,17 +3395,77 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, ADVANCE_LP_RING(); int j; - CARD32 ctl = 0; + CARD32 ctl = 0, rdata; for (j = 0; j < 100000; j++) { ctl = INREG(BRW_VF_CTL); if (ctl & BRW_VF_CTL_SNAPSHOT_COMPLETE) break; } - CARD32 rdata = INREG(BRW_VF_RDATA); - + + rdata = INREG(BRW_VF_RDATA); + OUTREG(BRW_VF_CTL, 0); ErrorF ("VF_CTL: 0x%08x VF_RDATA: 0x%08x\n", ctl, rdata); +#if 0 + for (j = 0; j < 1000000; j++) { + ctl = INREG(BRW_VS_CTL); + if (ctl & BRW_VS_CTL_SNAPSHOT_COMPLETE) + break; + } + + rdata = INREG(BRW_VS_RDATA); + OUTREG(BRW_VS_CTL, 0); + ErrorF ("VS_CTL: 0x%08x VS_RDATA: 0x%08x\n", ctl, rdata); +#endif + + for (j = 0; j < 1000000; j++) { + ctl = INREG(BRW_SF_CTL); + if (ctl & BRW_SF_CTL_SNAPSHOT_COMPLETE) + break; + } + + int k; + + for (k = 0; k <= 7; k++) { + OUTREG(BRW_SF_CTL, + BRW_SF_CTL_SNAPSHOT_COMPLETE | + (k << 8)); + rdata = INREG(BRW_SF_RDATA); + ErrorF ("SF_CTL: 0x%08x SF_RDATA(%d): 0x%08x\n", ctl, k, rdata); + } + + OUTREG(BRW_SF_CTL, 0); + + for (j = 0; j < 100000; j++) { + ctl = INREG(BRW_WIZ_CTL); + if (ctl & BRW_WIZ_CTL_SNAPSHOT_COMPLETE) + break; + } + + rdata = INREG(BRW_WIZ_RDATA); + OUTREG(BRW_WIZ_CTL, 0); + ErrorF ("WIZ_CTL: 0x%08x WIZ_RDATA: 0x%08x\n", ctl, rdata); + + for (j = 0; j < 100000; j++) { + ctl = INREG(BRW_TS_CTL); + if (ctl & BRW_TS_CTL_SNAPSHOT_COMPLETE) + break; + } + + rdata = INREG(BRW_TS_RDATA); + OUTREG(BRW_TS_CTL, 0); + ErrorF ("TS_CTL: 0x%08x TS_RDATA: 0x%08x\n", ctl, rdata); + + ErrorF ("after EU_ATT 0x%08x%08x EU_ATT_DATA 0x%08x%08x\n", + INREG(BRW_EU_ATT_1), INREG(BRW_EU_ATT_0), + INREG(BRW_EU_ATT_DATA_1), INREG(BRW_EU_ATT_DATA_0)); + + for (j = 0; j < 256; j++) { + OUTREG(BRW_TD_CTL, j << BRW_TD_CTL_MUX_SHIFT); + rdata = INREG(BRW_TD_RDATA); + ErrorF ("TD_RDATA(%d): 0x%08x\n", j, rdata); + } first_output = FALSE; if (pI830->AccelInfoRec) pI830->AccelInfoRec->NeedToSync = TRUE; @@ -3296,7 +3473,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, if (pI830->AccelInfoRec) (*pI830->AccelInfoRec->Sync)(pScrn); -/* I830PrintErrorState (pScrn); */ + I830PrintErrorState (pScrn); xf86FreeOffscreenLinear(state_area); } From 2e16c79dc2f24b0a04111aa6236a44870c6c64df Mon Sep 17 00:00:00 2001 From: Keith his master's voice Packard Date: Sun, 28 May 2006 20:31:23 -0700 Subject: [PATCH 40/70] Lots more debug code. Appears to execute pixel shader thread now though. hurray! --- src/i830_video.c | 147 +++++++++++++++++++++++++++++++---------------- 1 file changed, 97 insertions(+), 50 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index bbbcd41e..956cbbeb 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2632,27 +2632,35 @@ static const CARD32 sip_kernel_static[][4] = { { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, /* nop (4) g0<1>UD { align1 + } */ { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, }; static const CARD32 vs_kernel_static[][4] = { -/* wait (1) a0<1>UW a145<0,1,0>UW { align1 + } */ - { 0x00000030, 0x20000108, 0x00001220, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, + /* mov (8) m1<1>F g1<8,8,1>F { align1 + } */ + { 0x00600001, 0x202003be, 0x008d0020, 0x00000000 }, + /* mov (1) g0.8<1>D 0 { align1 mask_disable + } */ + { 0x00000201, 0x200810e5, 0x00000000, 0x00000000 }, + /* send 0 (8) a0<1>UW g0<8,8,1>F write mlen 3 rlen 0 { align1 + } */ + { 0x00600031, 0x20001fa8, 0x008d0000, 0x053003ff }, + /* send 0 (8) a0<1>F g0<8,8,1>F urb mlen 2 rlen 0 write +0 noswizzle used complete EOT{ align1 + } */ + { 0x00600031, 0x20001fbc, 0x008d0000, 0x8620c000 }, + /* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, + /* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, + /* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, + /* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, + /* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, + /* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, + /* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, + /* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, }; /* @@ -2665,9 +2673,6 @@ static const CARD32 vs_kernel_static[][4] = { #define SF_MAX_THREADS 1 static const CARD32 sf_kernel_static[][4] = { -/* wait (1) a0<1>UW a145<0,1,0>UW { align1 + } */ - { 0x00000030, 0x20000108, 0x00001220, 0x00000000 }, -#if 0 /* send 0 (1) g6<1>F g1.8<0,1,0>F math mlen 1 rlen 1 { align1 + } */ { 0x00000031, 0x20c01fbd, 0x00000028, 0x01110081 }, /* mov (2) g3.8<1>F g2<2,2,1>F { align1 + } */ @@ -2702,7 +2707,6 @@ static const CARD32 sf_kernel_static[][4] = { { 0x00600041, 0x204077be, 0x008d0120, 0x000000c0 }, /* mov (8) m3<1>F g3<8,8,1>F { align1 + } */ { 0x00600001, 0x206003be, 0x008d0060, 0x00000000 }, -#endif /* send 0 (8) a0<1>F g0<8,8,1>F urb mlen 4 rlen 0 write +0 transpose used complete EOT{ align1 + } */ { 0x00600031, 0x20001fbc, 0x008d0000, 0x8640c800 }, /* nop (4) g0<1>UD { align1 + } */ @@ -2728,7 +2732,7 @@ static const CARD32 sf_kernel_static[][4] = { #define PS_MAX_THREADS 1 /* MIN(12, PS_KERNEL_NUM_URB / 2) */ static const CARD32 ps_kernel_static[][4] = { -#if 0 +#if 1 /* mov (8) m2<1>F g2<16,16,1>UW { align1 + } */ { 0x00600001, 0x2040013e, 0x00b10040, 0x00000000 }, /* mov (8) m6<1>F g3<16,16,1>UW { align1 sechalf + } */ @@ -2748,6 +2752,8 @@ static const CARD32 ps_kernel_static[][4] = { /* mov (8) m1<1>F g1<8,8,1>F { align1 mask_disable + } */ { 0x00600201, 0x202003be, 0x008d0020, 0x00000000 }, #endif +/* wait (1) a0<1>UW a145<0,1,0>UW { align1 + } */ + { 0x00000030, 0x20000108, 0x00001220, 0x00000000 }, /* send 0 (16) a0<1>UW g0<8,8,1>UW write mlen 10 rlen 0 EOT{ align1 + } */ { 0x00800031, 0x20001d28, 0x008d0000, 0x85a04800 }, /* nop (4) g0<1>UD { align1 + } */ @@ -2839,7 +2845,8 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, struct brw_instruction *sf_kernel; struct brw_instruction *ps_kernel; struct brw_instruction *sip_kernel; - CARD32 *vb, *binding_table; + float *vb; + CARD32 *binding_table; Bool first_output = TRUE; int dest_surf_offset, src_surf_offset, src_sampler_offset, vs_offset; int sf_offset, wm_offset, cc_offset, vb_offset, cc_viewport_offset; @@ -2853,6 +2860,15 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, char *state_base; int state_base_offset; + int vs_scratch_offset; +#define VS_SCRATCH_SIZE 1024 +#define VS_SCRATCH_NUM (VS_SCRATCH_SIZE / sizeof (float)) + char *vs_scratch; + int vs_scratch_surface_state_offset; + struct brw_surface_state *vs_scratch_surface_state; + int vs_binding_table_offset; + CARD32 *vs_binding_table; + #if 0 ErrorF("BroadwaterDisplayVideoTextured: %dx%d (pitch %d)\n", width, height, video_pitch); @@ -2894,6 +2910,12 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, next_offset = sip_kernel_offset + sizeof (sip_kernel_static); vs_kernel_offset = ALIGN(next_offset, 64); next_offset = vs_kernel_offset + sizeof (vs_kernel_static); + vs_scratch_offset = ALIGN(next_offset, 1024); + next_offset = vs_scratch_offset + VS_SCRATCH_SIZE; + vs_scratch_surface_state_offset = ALIGN(next_offset, 32); + next_offset = vs_scratch_surface_state_offset + sizeof (struct brw_surface_state); + vs_binding_table_offset = ALIGN(next_offset, 32); + next_offset = vs_binding_table_offset + 1 * 4; cc_viewport_offset = ALIGN(next_offset, 32); next_offset = cc_viewport_offset + sizeof(*cc_viewport); @@ -2936,7 +2958,12 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, sf_kernel = (void *)(state_base + sf_kernel_offset); ps_kernel = (void *)(state_base + ps_kernel_offset); sip_kernel = (void *)(state_base + sip_kernel_offset); -cc_viewport = (void *)(state_base + cc_viewport_offset); + vs_kernel = (void *)(state_base + vs_kernel_offset); + vs_scratch = (void *)(state_base + vs_scratch_offset); + vs_scratch_surface_state = (void *)(state_base + vs_scratch_surface_state_offset); + vs_binding_table = (void *)(state_base + vs_binding_table_offset); + + cc_viewport = (void *)(state_base + cc_viewport_offset); dest_surf_state = (void *)(state_base + dest_surf_offset); src_surf_state = (void *)(state_base + src_surf_offset); src_sampler_state = (void *)(state_base + src_sampler_offset); @@ -3066,9 +3093,19 @@ cc_viewport = (void *)(state_base + cc_viewport_offset); src_sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP; /* Set up the vertex shader to be disabled (passthrough) */ + vs_binding_table[0] = state_base_offset + vs_scratch_surface_state_offset; + memset (vs_scratch_surface_state, 0, sizeof (*vs_scratch_surface_state)); + vs_scratch_surface_state->ss0.surface_type = BRW_SURFACE_BUFFER; + vs_scratch_surface_state->ss0.surface_format = BRW_SURFACEFORMAT_R32_FLOAT; + vs_scratch_surface_state->ss1.base_addr = state_base_offset + vs_scratch_offset; + vs_scratch_surface_state->ss2.height = (VS_SCRATCH_NUM - 1) >> 7; + vs_scratch_surface_state->ss2.width = (VS_SCRATCH_NUM - 1) & 0x7f; + vs_scratch_surface_state->ss3.pitch = 3; + memcpy(vs_kernel, vs_kernel_static, sizeof (vs_kernel_static)); memset(vs_state, 0, sizeof(*vs_state)); + ErrorF ("vs kernel: 0x%08x\n", state_base_offset + vs_kernel_offset); vs_state->thread0.kernel_start_pointer = (state_base_offset + vs_kernel_offset) >> 6; vs_state->thread0.grf_reg_count = 1; @@ -3076,7 +3113,7 @@ cc_viewport = (void *)(state_base + cc_viewport_offset); vs_state->thread4.nr_urb_entries = URB_VS_ENTRIES; vs_state->thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1; vs_state->thread4.stats_enable = 1; - vs_state->vs6.vs_enable = 1; + vs_state->vs6.vs_enable = 0; vs_state->vs6.vert_cache_disable = 1; /* Set up the SF kernel to do coord interp: for each attribute, @@ -3174,7 +3211,7 @@ cc_viewport = (void *)(state_base + cc_viewport_offset); OUT_RING(0 | BASE_ADDRESS_MODIFY); /* Surface state base address */ OUT_RING(0 | BASE_ADDRESS_MODIFY); /* media base addr, don't care */ OUT_RING(0x10000000 | BASE_ADDRESS_MODIFY); /* general state max addr, disabled */ - OUT_RING(1); /* media object state max addr, disabled */ + OUT_RING(0x10000000 | BASE_ADDRESS_MODIFY); /* media object state max addr, disabled */ /* Set system instruction pointer */ OUT_RING(BRW_STATE_SIP | 0); @@ -3200,7 +3237,7 @@ cc_viewport = (void *)(state_base + cc_viewport_offset); /* Binding table pointers */ OUT_RING(BRW_3DSTATE_BINDING_TABLE_POINTERS | 4); - OUT_RING(0); /* vs */ + OUT_RING(state_base_offset + vs_binding_table_offset); /* vs */ OUT_RING(0); /* gs */ OUT_RING(0); /* clip */ OUT_RING(0); /* sf */ @@ -3271,8 +3308,8 @@ cc_viewport = (void *)(state_base + cc_viewport_offset); VE0_VALID | (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | (0 << VE0_OFFSET_SHIFT)); - OUT_RING((BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_0_SHIFT) | - (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_1_SHIFT) | + OUT_RING((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | + (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) | (0 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT)); @@ -3320,21 +3357,23 @@ cc_viewport = (void *)(state_base + cc_viewport_offset); src_scale_y = (float)src_h / (float)drw_h; i = 0; - vb[i++] = box_x2; - vb[i++] = box_y2; + vb[i++] = (float) box_x2; + vb[i++] = (float) box_y2; vb[i++] = (box_x2 - dxo) * src_scale_x; vb[i++] = (box_y2 - dyo) * src_scale_y; - vb[i++] = box_x1; - vb[i++] = box_y2; + vb[i++] = (float) box_x1; + vb[i++] = (float) box_y2; vb[i++] = (box_x1 - dxo) * src_scale_x; vb[i++] = (box_y2 - dyo) * src_scale_y; - vb[i++] = box_x1; - vb[i++] = box_y1; + vb[i++] = (float) box_x1; + vb[i++] = (float) box_y1; vb[i++] = (box_x1 - dxo) * src_scale_x; vb[i++] = (box_y1 - dyo) * src_scale_y; + memset (vs_scratch, 1, VS_SCRATCH_SIZE); + ErrorF ("before EU_ATT 0x%08x%08x EU_ATT_DATA 0x%08x%08x\n", INREG(BRW_EU_ATT_1), INREG(BRW_EU_ATT_0), INREG(BRW_EU_ATT_DATA_1), INREG(BRW_EU_ATT_DATA_0)); @@ -3345,7 +3384,7 @@ cc_viewport = (void *)(state_base + cc_viewport_offset); BRW_VF_CTL_SNAPSHOT_ENABLE); OUTREG(BRW_VF_STRG_VAL, 0); -#if 0 +#if 1 OUTREG(BRW_VS_CTL, BRW_VS_CTL_SNAPSHOT_ALL_THREADS | BRW_VS_CTL_SNAPSHOT_MUX_VALID_COUNT | @@ -3367,19 +3406,13 @@ cc_viewport = (void *)(state_base + cc_viewport_offset); OUTREG(BRW_WIZ_STRG_VAL, (box_x1) | (box_y1 << 16)); +#if 0 OUTREG(BRW_TS_CTL, BRW_TS_CTL_SNAPSHOT_MESSAGE_ERROR | BRW_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS | BRW_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS | BRW_TS_CTL_SNAPSHOT_ENABLE); - - { static int first = 1; - if (first) - first = 0; - else - OUTREG(BRW_TD_CTL, - BRW_TD_CTL_FORCE_EXTERNAL_HALT); - } +#endif BEGIN_LP_RING(6); OUT_RING(BRW_3DPRIMITIVE | @@ -3394,7 +3427,7 @@ cc_viewport = (void *)(state_base + cc_viewport_offset); OUT_RING(0); /* index buffer offset, ignored */ ADVANCE_LP_RING(); - int j; + int j, k; CARD32 ctl = 0, rdata; for (j = 0; j < 100000; j++) { @@ -3407,7 +3440,7 @@ cc_viewport = (void *)(state_base + cc_viewport_offset); OUTREG(BRW_VF_CTL, 0); ErrorF ("VF_CTL: 0x%08x VF_RDATA: 0x%08x\n", ctl, rdata); -#if 0 +#if 1 for (j = 0; j < 1000000; j++) { ctl = INREG(BRW_VS_CTL); if (ctl & BRW_VS_CTL_SNAPSHOT_COMPLETE) @@ -3415,8 +3448,15 @@ cc_viewport = (void *)(state_base + cc_viewport_offset); } rdata = INREG(BRW_VS_RDATA); + for (k = 0; k <= 3; k++) { + OUTREG(BRW_VS_CTL, + BRW_VS_CTL_SNAPSHOT_COMPLETE | + (k << 8)); + rdata = INREG(BRW_VS_RDATA); + ErrorF ("VS_CTL: 0x%08x VS_RDATA(%d): 0x%08x\n", ctl, k, rdata); + } + OUTREG(BRW_VS_CTL, 0); - ErrorF ("VS_CTL: 0x%08x VS_RDATA: 0x%08x\n", ctl, rdata); #endif for (j = 0; j < 1000000; j++) { @@ -3425,8 +3465,6 @@ cc_viewport = (void *)(state_base + cc_viewport_offset); break; } - int k; - for (k = 0; k <= 7; k++) { OUTREG(BRW_SF_CTL, BRW_SF_CTL_SNAPSHOT_COMPLETE | @@ -3461,11 +3499,20 @@ cc_viewport = (void *)(state_base + cc_viewport_offset); INREG(BRW_EU_ATT_1), INREG(BRW_EU_ATT_0), INREG(BRW_EU_ATT_DATA_1), INREG(BRW_EU_ATT_DATA_0)); + for (j = 0; j < 32; j += 8) + ErrorF (" vs_scratch(%2d): %02x %02x %02x %02x %02x %02x %02x %02x\n", + j, + vs_scratch[j+0], vs_scratch[j+1], + vs_scratch[j+2], vs_scratch[j+3], + vs_scratch[j+4], vs_scratch[j+5], + vs_scratch[j+6], vs_scratch[j+7]); +#if 0 for (j = 0; j < 256; j++) { OUTREG(BRW_TD_CTL, j << BRW_TD_CTL_MUX_SHIFT); rdata = INREG(BRW_TD_RDATA); ErrorF ("TD_RDATA(%d): 0x%08x\n", j, rdata); } +#endif first_output = FALSE; if (pI830->AccelInfoRec) pI830->AccelInfoRec->NeedToSync = TRUE; From ddf3e5b2737399dca6d401f91db51a51f93b6373 Mon Sep 17 00:00:00 2001 From: Keith his master's voice Packard Date: Sun, 28 May 2006 21:03:39 -0700 Subject: [PATCH 41/70] Using tiny rectangle, still locks up in pixel shader program somehow --- src/i830_video.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index 956cbbeb..ee4f2a27 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2732,7 +2732,6 @@ static const CARD32 sf_kernel_static[][4] = { #define PS_MAX_THREADS 1 /* MIN(12, PS_KERNEL_NUM_URB / 2) */ static const CARD32 ps_kernel_static[][4] = { -#if 1 /* mov (8) m2<1>F g2<16,16,1>UW { align1 + } */ { 0x00600001, 0x2040013e, 0x00b10040, 0x00000000 }, /* mov (8) m6<1>F g3<16,16,1>UW { align1 sechalf + } */ @@ -2751,9 +2750,6 @@ static const CARD32 ps_kernel_static[][4] = { { 0x00601001, 0x2120013e, 0x00b100c0, 0x00000000 }, /* mov (8) m1<1>F g1<8,8,1>F { align1 mask_disable + } */ { 0x00600201, 0x202003be, 0x008d0020, 0x00000000 }, -#endif -/* wait (1) a0<1>UW a145<0,1,0>UW { align1 + } */ - { 0x00000030, 0x20000108, 0x00001220, 0x00000000 }, /* send 0 (16) a0<1>UW g0<8,8,1>UW write mlen 10 rlen 0 EOT{ align1 + } */ { 0x00800031, 0x20001d28, 0x008d0000, 0x85a04800 }, /* nop (4) g0<1>UD { align1 + } */ @@ -3169,7 +3165,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, wm_state->thread0.kernel_start_pointer = (state_base_offset + ps_kernel_offset) >> 6; wm_state->thread0.grf_reg_count = ((PS_KERNEL_NUM_GRF & ~15) / 16); - wm_state->thread1.single_program_flow = 1; /* XXX */ + wm_state->thread1.single_program_flow = 0; /* XXX */ wm_state->thread1.binding_table_entry_count = 2; wm_state->thread2.scratch_space_base_pointer = 0; /* XXX */ wm_state->thread2.per_thread_scratch_space = 0; /* XXX */ @@ -3351,6 +3347,10 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, } } + /* just paint 4 pixels */ + box_x2 = box_x1 + 2; + box_y2 = box_y1 + 2; + pbox++; src_scale_x = (float)src_w / (float)drw_w; @@ -3384,7 +3384,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, BRW_VF_CTL_SNAPSHOT_ENABLE); OUTREG(BRW_VF_STRG_VAL, 0); -#if 1 +#if 0 OUTREG(BRW_VS_CTL, BRW_VS_CTL_SNAPSHOT_ALL_THREADS | BRW_VS_CTL_SNAPSHOT_MUX_VALID_COUNT | @@ -3417,7 +3417,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, BEGIN_LP_RING(6); OUT_RING(BRW_3DPRIMITIVE | BRW_3DPRIMITIVE_VERTEX_SEQUENTIAL | - (_3DPRIM_TRILIST << BRW_3DPRIMITIVE_TOPOLOGY_SHIFT) | + (_3DPRIM_RECTLIST << BRW_3DPRIMITIVE_TOPOLOGY_SHIFT) | (0 << 9) | /* CTG - indirect vertex count */ 4); OUT_RING(3); /* vertex count per instance */ @@ -3440,7 +3440,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, OUTREG(BRW_VF_CTL, 0); ErrorF ("VF_CTL: 0x%08x VF_RDATA: 0x%08x\n", ctl, rdata); -#if 1 +#if 0 for (j = 0; j < 1000000; j++) { ctl = INREG(BRW_VS_CTL); if (ctl & BRW_VS_CTL_SNAPSHOT_COMPLETE) @@ -3457,6 +3457,13 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, } OUTREG(BRW_VS_CTL, 0); + for (j = 0; j < 32; j += 8) + ErrorF (" vs_scratch(%2d): %02x %02x %02x %02x %02x %02x %02x %02x\n", + j, + vs_scratch[j+0], vs_scratch[j+1], + vs_scratch[j+2], vs_scratch[j+3], + vs_scratch[j+4], vs_scratch[j+5], + vs_scratch[j+6], vs_scratch[j+7]); #endif for (j = 0; j < 1000000; j++) { @@ -3499,13 +3506,6 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, INREG(BRW_EU_ATT_1), INREG(BRW_EU_ATT_0), INREG(BRW_EU_ATT_DATA_1), INREG(BRW_EU_ATT_DATA_0)); - for (j = 0; j < 32; j += 8) - ErrorF (" vs_scratch(%2d): %02x %02x %02x %02x %02x %02x %02x %02x\n", - j, - vs_scratch[j+0], vs_scratch[j+1], - vs_scratch[j+2], vs_scratch[j+3], - vs_scratch[j+4], vs_scratch[j+5], - vs_scratch[j+6], vs_scratch[j+7]); #if 0 for (j = 0; j < 256; j++) { OUTREG(BRW_TD_CTL, j << BRW_TD_CTL_MUX_SHIFT); From bb0ad04d46eba2fed57a888ff960d2436ec7d70d Mon Sep 17 00:00:00 2001 From: Keith his master's voice Packard Date: Sun, 28 May 2006 22:59:58 -0700 Subject: [PATCH 42/70] Ok, finally something sensible up on the screen. Replace PS kernel with constant data source (pink). Dodge g0/g1 so URB data doesn't land on top of thread data. Flip source/dest coordinates (dunno why they're fetched this way). --- src/i830_video.c | 71 ++++++++++++++++++++++++------------------------ 1 file changed, 36 insertions(+), 35 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index ee4f2a27..6e507aa0 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2727,29 +2727,29 @@ static const CARD32 sf_kernel_static[][4] = { { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, }; -#define PS_KERNEL_NUM_GRF 10 +#define PS_KERNEL_NUM_GRF 20 #define PS_KERNEL_NUM_URB 8 #define PS_MAX_THREADS 1 /* MIN(12, PS_KERNEL_NUM_URB / 2) */ static const CARD32 ps_kernel_static[][4] = { -/* mov (8) m2<1>F g2<16,16,1>UW { align1 + } */ - { 0x00600001, 0x2040013e, 0x00b10040, 0x00000000 }, -/* mov (8) m6<1>F g3<16,16,1>UW { align1 sechalf + } */ - { 0x00601001, 0x20c0013e, 0x00b10060, 0x00000000 }, -/* mov (8) m3<1>F g3<16,16,1>UW { align1 + } */ - { 0x00600001, 0x2060013e, 0x00b10060, 0x00000000 }, -/* mov (8) m7<1>F g4<16,16,1>UW { align1 sechalf + } */ - { 0x00601001, 0x20e0013e, 0x00b10080, 0x00000000 }, -/* mov (8) m4<1>F g4<16,16,1>UW { align1 + } */ - { 0x00600001, 0x2080013e, 0x00b10080, 0x00000000 }, -/* mov (8) m8<1>F g5<16,16,1>UW { align1 sechalf + } */ - { 0x00601001, 0x2100013e, 0x00b100a0, 0x00000000 }, -/* mov (8) m5<1>F g5<16,16,1>UW { align1 + } */ - { 0x00600001, 0x20a0013e, 0x00b100a0, 0x00000000 }, -/* mov (8) m9<1>F g6<16,16,1>UW { align1 sechalf + } */ - { 0x00601001, 0x2120013e, 0x00b100c0, 0x00000000 }, -/* mov (8) m1<1>F g1<8,8,1>F { align1 mask_disable + } */ - { 0x00600201, 0x202003be, 0x008d0020, 0x00000000 }, +/* mov (8) m2<1>F 1{ align1 + } */ + { 0x00600001, 0x204073fe, 0x00000000, 0x3f800000 }, +/* mov (8) m3<1>F 0.5{ align1 + } */ + { 0x00600001, 0x206073fe, 0x00000000, 0x3f000000 }, +/* mov (8) m4<1>F 0.75{ align1 + } */ + { 0x00600001, 0x208073fe, 0x00000000, 0x3f400000 }, +/* mov (8) m5<1>F 1{ align1 + } */ + { 0x00600001, 0x20a073fe, 0x00000000, 0x3f800000 }, +/* mov (8) m6<1>F 1{ align1 + } */ + { 0x00600001, 0x20c073fe, 0x00000000, 0x3f800000 }, +/* mov (8) m7<1>F 0.5{ align1 + } */ + { 0x00600001, 0x20e073fe, 0x00000000, 0x3f000000 }, +/* mov (8) m8<1>F 0.75{ align1 + } */ + { 0x00600001, 0x210073fe, 0x00000000, 0x3f400000 }, +/* mov (8) m9<1>F 1{ align1 + } */ + { 0x00600001, 0x212073fe, 0x00000000, 0x3f800000 }, +/* mov (8) m1<1>UD g1<8,8,1>UD { align1 mask_disable + } */ + { 0x00600201, 0x20200022, 0x008d0020, 0x00000000 }, /* send 0 (16) a0<1>UW g0<8,8,1>UW write mlen 10 rlen 0 EOT{ align1 + } */ { 0x00800031, 0x20001d28, 0x008d0000, 0x85a04800 }, /* nop (4) g0<1>UD { align1 + } */ @@ -3008,13 +3008,16 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, cc_state->cc0.stencil_enable = 0; /* disable stencil */ cc_state->cc2.depth_test = 0; /* disable depth test */ cc_state->cc2.logicop_enable = 1; /* enable logic op */ - cc_state->cc3.ia_blend_enable = 0; /* blend alpha just like colors */ + cc_state->cc3.ia_blend_enable = 1; /* blend alpha just like colors */ cc_state->cc3.blend_enable = 0; /* disable color blend */ cc_state->cc3.alpha_test = 0; /* disable alpha test */ cc_state->cc4.cc_viewport_state_offset = (state_base_offset + cc_viewport_offset) >> 5; cc_state->cc5.dither_enable = 0; /* disable dither */ - cc_state->cc5.logicop_func = 0xc; /* COPYPEN */ + cc_state->cc5.logicop_func = 0xc; /* WHITE */ cc_state->cc5.statistics_enable = 1; + cc_state->cc5.ia_blend_function = BRW_BLENDFUNCTION_ADD; + cc_state->cc5.ia_src_blend_factor = BRW_BLENDFACTOR_ONE; + cc_state->cc5.ia_dest_blend_factor = BRW_BLENDFACTOR_ONE; /* Upload system kernel */ memcpy (sip_kernel, sip_kernel_static, sizeof (sip_kernel_static)); @@ -3165,17 +3168,18 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, wm_state->thread0.kernel_start_pointer = (state_base_offset + ps_kernel_offset) >> 6; wm_state->thread0.grf_reg_count = ((PS_KERNEL_NUM_GRF & ~15) / 16); - wm_state->thread1.single_program_flow = 0; /* XXX */ + wm_state->thread1.single_program_flow = 1; /* XXX */ wm_state->thread1.binding_table_entry_count = 2; wm_state->thread2.scratch_space_base_pointer = 0; /* XXX */ wm_state->thread2.per_thread_scratch_space = 0; /* XXX */ - wm_state->thread3.dispatch_grf_start_reg = 0; /* XXX */ - wm_state->thread3.urb_entry_read_length = 4; /* XXX */ + wm_state->thread3.dispatch_grf_start_reg = 10; /* XXX */ + wm_state->thread3.urb_entry_read_length = 2; /* XXX */ wm_state->thread3.const_urb_entry_read_length = 0; /* XXX */ + wm_state->thread3.const_urb_entry_read_offset = 0; /* XXX */ wm_state->thread3.urb_entry_read_offset = 0; /* XXX */ wm_state->wm4.stats_enable = 1; wm_state->wm4.sampler_state_pointer = (state_base_offset + src_sampler_offset) >> 5; - wm_state->wm4.sampler_count = 1; /* 1-4 samplers used */ + wm_state->wm4.sampler_count = 0; /* XXX 1-4 samplers used */ wm_state->wm5.max_threads = 0; /* XXX should be PS_MAX_THREADS */ wm_state->wm5.thread_dispatch_enable = 1; wm_state->wm5.enable_16_pix = 1; @@ -3326,6 +3330,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, dxo = dstRegion->extents.x1; dyo = dstRegion->extents.y1; + ErrorF ("region origin %d, %d\n", dxo, dyo); pbox = REGION_RECTS(dstRegion); nbox = REGION_NUM_RECTS(dstRegion); while (nbox--) @@ -3347,30 +3352,26 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, } } - /* just paint 4 pixels */ - box_x2 = box_x1 + 2; - box_y2 = box_y1 + 2; - pbox++; src_scale_x = (float)src_w / (float)drw_w; src_scale_y = (float)src_h / (float)drw_h; i = 0; - vb[i++] = (float) box_x2; - vb[i++] = (float) box_y2; vb[i++] = (box_x2 - dxo) * src_scale_x; vb[i++] = (box_y2 - dyo) * src_scale_y; - - vb[i++] = (float) box_x1; + vb[i++] = (float) box_x2; vb[i++] = (float) box_y2; + vb[i++] = (box_x1 - dxo) * src_scale_x; vb[i++] = (box_y2 - dyo) * src_scale_y; - vb[i++] = (float) box_x1; - vb[i++] = (float) box_y1; + vb[i++] = (float) box_y2; + vb[i++] = (box_x1 - dxo) * src_scale_x; vb[i++] = (box_y1 - dyo) * src_scale_y; + vb[i++] = (float) box_x1; + vb[i++] = (float) box_y1; memset (vs_scratch, 1, VS_SCRATCH_SIZE); From 3f158fd610a3363a23daa7205bcd9f213686cf1c Mon Sep 17 00:00:00 2001 From: Keith his master's voice Packard Date: Mon, 29 May 2006 18:05:57 -0700 Subject: [PATCH 43/70] Nice texture coordinate gradient, broken slightly in y --- src/i830_video.c | 176 ++++++++++++++++++++++++++++++++++++++++------- 1 file changed, 151 insertions(+), 25 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index 6e507aa0..33e716f2 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2673,6 +2673,69 @@ static const CARD32 vs_kernel_static[][4] = { #define SF_MAX_THREADS 1 static const CARD32 sf_kernel_static[][4] = { +#if 1 +/* send 0 (4) g6<1>F g1.12<4,4,1>F math mlen 1 rlen 1 { align1 + } */ + { 0x00400031, 0x20c01fbd, 0x0069002c, 0x01110081 }, +/* add (8) g7<1>F g4<8,8,1>F g3<8,8,1>F { align1 + } */ + { 0x00600040, 0x20e077bd, 0x008d0080, 0x008d4060 }, +/* mul (1) g7<1>F g7<0,1,0>F g6<0,1,0>F { align1 + } */ + { 0x00000041, 0x20e077bd, 0x000000e0, 0x000000c0 }, +/* mov (1) g7.4<1>F g6.12<0,1,0>F { align1 + } */ + { 0x00000001, 0x20e403bd, 0x000000cc, 0x00000000 }, +/* mov (8) m1<1>F g7<0,1,0>F { align1 + } */ + { 0x00600001, 0x202003be, 0x000000e0, 0x00000000 }, +/* mov (8) m2<1>F g7.4<0,1,0>F { align1 + } */ + { 0x00600001, 0x204003be, 0x000000e4, 0x00000000 }, +/* mov (8) m3<1>F g3<8,8,1>F { align1 + } */ + { 0x00600001, 0x206003be, 0x008d0060, 0x00000000 }, +/* send 0 (8) a0<1>F g0<8,8,1>F urb mlen 4 rlen 0 write +0 noswizzle used complete EOT{ align1 + } */ + { 0x00600031, 0x20001fbc, 0x008d0000, 0x8640c000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, + +#endif +#if 0 +/* mov (8) m1<1>F 0.00138889{ align1 + } */ + { 0x00600001, 0x202073fe, 0x00000000, 0x3ab60b61 }, +/* mov (8) m2<1>F 0.00208333{ align1 + } */ + { 0x00600001, 0x204073fe, 0x00000000, 0x3b088889 }, +/* mov (8) m3<1>F g3<8,8,1>F { align1 + } */ + { 0x00600001, 0x206003be, 0x008d0060, 0x00000000 }, +/* send 0 (8) a0<1>F g0<8,8,1>F urb mlen 4 rlen 0 write +0 noswizzle used complete EOT{ align1 + } */ + { 0x00600031, 0x20001fbc, 0x008d0000, 0x8640c000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +#endif + +#if 0 /* send 0 (1) g6<1>F g1.8<0,1,0>F math mlen 1 rlen 1 { align1 + } */ { 0x00000031, 0x20c01fbd, 0x00000028, 0x01110081 }, /* mov (2) g3.8<1>F g2<2,2,1>F { align1 + } */ @@ -2725,27 +2788,58 @@ static const CARD32 sf_kernel_static[][4] = { { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, /* nop (4) g0<1>UD { align1 + } */ { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +#endif }; +/* + * Ok, this kernel picks up the required data flow values in g0 and g1 + * and passes those along in m0 and m1. In m2-m9, it sticks constant + * values (bright pink). + */ + +/* + * I am reasonably sure these values are bogus + * but, they do appear to work. Learning precisely what + * values belong here should improve performance by + * increasing the number of threads that will be able to run + * in parallel. + */ + #define PS_KERNEL_NUM_GRF 20 #define PS_KERNEL_NUM_URB 8 #define PS_MAX_THREADS 1 /* MIN(12, PS_KERNEL_NUM_URB / 2) */ static const CARD32 ps_kernel_static[][4] = { -/* mov (8) m2<1>F 1{ align1 + } */ - { 0x00600001, 0x204073fe, 0x00000000, 0x3f800000 }, -/* mov (8) m3<1>F 0.5{ align1 + } */ - { 0x00600001, 0x206073fe, 0x00000000, 0x3f000000 }, -/* mov (8) m4<1>F 0.75{ align1 + } */ - { 0x00600001, 0x208073fe, 0x00000000, 0x3f400000 }, +/* mov (8) g2<1>F g1.8<0,1,0>UW { align1 + } */ + { 0x00600001, 0x2040013d, 0x00000028, 0x00000000 }, +/* add (8) g2<1>F g2<8,8,1>F g1<0,1,0>F { align1 + } */ + { 0x00600040, 0x204077bd, 0x008d0040, 0x00004020 }, +/* mul (8) g2<1>F g2<8,8,1>F g10<0,1,0>F { align1 + } */ + { 0x00600041, 0x204077bd, 0x008d0040, 0x00000140 }, +/* add (8) g2<1>F g2<8,8,1>F g12<0,1,0>F { align1 + } */ + { 0x00600040, 0x204077bd, 0x008d0040, 0x00000180 }, +/* mov (8) g3<1>F g1.10<0,1,0>UW { align1 + } */ + { 0x00600001, 0x2060013d, 0x0000002a, 0x00000000 }, +/* add (8) g3<1>F g3<8,8,1>F g1.4<0,1,0>F { align1 + } */ + { 0x00600040, 0x206077bd, 0x008d0060, 0x00004024 }, +/* mul (8) g3<1>F g3<8,8,1>F g11<0,1,0>F { align1 + } */ + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000160 }, +/* add (8) g3<1>F g3<8,8,1>F g12.4<0,1,0>F { align1 + } */ + { 0x00600040, 0x206077bd, 0x008d0060, 0x00000184 }, +/* mov (8) m2<1>F g2<8,8,1>F { align1 + } */ + { 0x00600001, 0x204003be, 0x008d0040, 0x00000000 }, +/* mov (8) m3<1>F g3<8,8,1>F { align1 + } */ + { 0x00600001, 0x206003be, 0x008d0060, 0x00000000 }, +/* mov (8) m4<1>F 0{ align1 + } */ + { 0x00600001, 0x208073fe, 0x00000000, 0x00000000 }, /* mov (8) m5<1>F 1{ align1 + } */ { 0x00600001, 0x20a073fe, 0x00000000, 0x3f800000 }, -/* mov (8) m6<1>F 1{ align1 + } */ - { 0x00600001, 0x20c073fe, 0x00000000, 0x3f800000 }, -/* mov (8) m7<1>F 0.5{ align1 + } */ - { 0x00600001, 0x20e073fe, 0x00000000, 0x3f000000 }, -/* mov (8) m8<1>F 0.75{ align1 + } */ - { 0x00600001, 0x210073fe, 0x00000000, 0x3f400000 }, +/* mov (8) m6<1>F g2<8,8,1>F { align1 + } */ + { 0x00600001, 0x20c003be, 0x008d0040, 0x00000000 }, +/* mov (8) m7<1>F g3<8,8,1>F { align1 + } */ + { 0x00600001, 0x20e003be, 0x008d0060, 0x00000000 }, +/* mov (8) m8<1>F 0{ align1 + } */ + { 0x00600001, 0x210073fe, 0x00000000, 0x00000000 }, /* mov (8) m9<1>F 1{ align1 + } */ { 0x00600001, 0x212073fe, 0x00000000, 0x3f800000 }, /* mov (8) m1<1>UD g1<8,8,1>UD { align1 mask_disable + } */ @@ -2810,6 +2904,10 @@ brw_debug (ScrnInfoPtr pScrn, char *when) } } +#define WATCH_SF 0 +#define WATCH_WIZ 0 +#define WATCH_STATS 0 + static void BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, RegionPtr dstRegion, @@ -2874,7 +2972,9 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, OUTREG (INST_PM, (1 << (16 + 4)) | (1 << 4)); +#if 0 ErrorF ("INST_PM 0x%08x\n", INREG(INST_PM)); +#endif assert((id == FOURCC_UYVY) || (id == FOURCC_YUY2)); @@ -3051,7 +3151,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, /* Set up the source surface state buffer */ memset(src_surf_state, 0, sizeof(*src_surf_state)); src_surf_state->ss0.surface_type = BRW_SURFACE_2D; - src_surf_state->ss0.data_return_format = BRW_SURFACERETURNFORMAT_FLOAT32; +/* src_surf_state->ss0.data_return_format = BRW_SURFACERETURNFORMAT_FLOAT32; */ switch (id) { case FOURCC_YUY2: src_surf_state->ss0.surface_format = BRW_SURFACEFORMAT_YCRCB_NORMAL; @@ -3104,7 +3204,9 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, memcpy(vs_kernel, vs_kernel_static, sizeof (vs_kernel_static)); memset(vs_state, 0, sizeof(*vs_state)); +#if 0 ErrorF ("vs kernel: 0x%08x\n", state_base_offset + vs_kernel_offset); +#endif vs_state->thread0.kernel_start_pointer = (state_base_offset + vs_kernel_offset) >> 6; vs_state->thread0.grf_reg_count = 1; @@ -3122,25 +3224,29 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, memcpy (sf_kernel, sf_kernel_static, sizeof (sf_kernel_static)); memset(sf_state, 0, sizeof(*sf_state)); +#if 0 ErrorF ("sf kernel: 0x%08x\n", state_base_offset + sf_kernel_offset); +#endif sf_state->thread0.kernel_start_pointer = (state_base_offset + sf_kernel_offset) >> 6; sf_state->thread0.grf_reg_count = ((SF_KERNEL_NUM_GRF & ~15) / 16); sf_state->sf1.single_program_flow = 1; /* XXX */ sf_state->sf1.binding_table_entry_count = 0; sf_state->sf1.thread_priority = 0; - sf_state->sf1.floating_point_mode = 1; /* Mesa does this */ + sf_state->sf1.floating_point_mode = 0; /* Mesa does this */ sf_state->sf1.illegal_op_exception_enable = 1; sf_state->sf1.mask_stack_exception_enable = 1; sf_state->sf1.sw_exception_enable = 1; sf_state->thread2.per_thread_scratch_space = 0; sf_state->thread2.scratch_space_base_pointer = 0; /* not used in our kernel */ - sf_state->thread3.urb_entry_read_length = 1; /* XXX */ - sf_state->thread3.urb_entry_read_offset = 1; /* XXX */ - sf_state->thread3.dispatch_grf_start_reg = 3; /* XXX */ - sf_state->thread4.nr_urb_entries = URB_SF_ENTRIES; - sf_state->thread4.urb_entry_allocation_size = URB_SF_ENTRY_SIZE - 1; + sf_state->thread3.const_urb_entry_read_length = 0; /* no const URBs */ + sf_state->thread3.const_urb_entry_read_offset = 0; /* no const URBs */ + sf_state->thread3.urb_entry_read_length = 1; /* 1 URB per vertex */ + sf_state->thread3.urb_entry_read_offset = 0; + sf_state->thread3.dispatch_grf_start_reg = 3; sf_state->thread4.max_threads = MIN(12, URB_SF_ENTRIES / 2) - 1; + sf_state->thread4.urb_entry_allocation_size = URB_SF_ENTRY_SIZE - 1; + sf_state->thread4.nr_urb_entries = URB_SF_ENTRIES; sf_state->thread4.stats_enable = 1; sf_state->sf5.viewport_transform = FALSE; /* skip viewport */ sf_state->sf6.cull_mode = BRW_CULLMODE_NONE; @@ -3163,7 +3269,9 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, */ memcpy (ps_kernel, ps_kernel_static, sizeof (ps_kernel_static)); +#if 0 ErrorF ("ps kernel: 0x%08x\n", state_base_offset + ps_kernel_offset); +#endif memset (wm_state, 0, sizeof (*wm_state)); wm_state->thread0.kernel_start_pointer = (state_base_offset + ps_kernel_offset) >> 6; @@ -3173,13 +3281,13 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, wm_state->thread2.scratch_space_base_pointer = 0; /* XXX */ wm_state->thread2.per_thread_scratch_space = 0; /* XXX */ wm_state->thread3.dispatch_grf_start_reg = 10; /* XXX */ - wm_state->thread3.urb_entry_read_length = 2; /* XXX */ + wm_state->thread3.urb_entry_read_length = 3; /* XXX */ wm_state->thread3.const_urb_entry_read_length = 0; /* XXX */ wm_state->thread3.const_urb_entry_read_offset = 0; /* XXX */ wm_state->thread3.urb_entry_read_offset = 0; /* XXX */ wm_state->wm4.stats_enable = 1; wm_state->wm4.sampler_state_pointer = (state_base_offset + src_sampler_offset) >> 5; - wm_state->wm4.sampler_count = 0; /* XXX 1-4 samplers used */ + wm_state->wm4.sampler_count = 1; /* XXX 1-4 samplers used */ wm_state->wm5.max_threads = 0; /* XXX should be PS_MAX_THREADS */ wm_state->wm5.thread_dispatch_enable = 1; wm_state->wm5.enable_16_pix = 1; @@ -3330,7 +3438,6 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, dxo = dstRegion->extents.x1; dyo = dstRegion->extents.y1; - ErrorF ("region origin %d, %d\n", dxo, dyo); pbox = REGION_RECTS(dstRegion); nbox = REGION_NUM_RECTS(dstRegion); while (nbox--) @@ -3354,8 +3461,9 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, pbox++; - src_scale_x = (float)src_w / (float)drw_w; - src_scale_y = (float)src_h / (float)drw_h; + /* Use normalized texture coordinates */ + src_scale_x = (float)1.0 / (float)drw_w; + src_scale_y = (float)1.0 / (float)drw_h; i = 0; vb[i++] = (box_x2 - dxo) * src_scale_x; @@ -3373,8 +3481,11 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, vb[i++] = (float) box_x1; vb[i++] = (float) box_y1; +#if 0 memset (vs_scratch, 1, VS_SCRATCH_SIZE); +#endif +#if 0 ErrorF ("before EU_ATT 0x%08x%08x EU_ATT_DATA 0x%08x%08x\n", INREG(BRW_EU_ATT_1), INREG(BRW_EU_ATT_0), INREG(BRW_EU_ATT_DATA_1), INREG(BRW_EU_ATT_DATA_0)); @@ -3384,6 +3495,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, BRW_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX | BRW_VF_CTL_SNAPSHOT_ENABLE); OUTREG(BRW_VF_STRG_VAL, 0); +#endif #if 0 OUTREG(BRW_VS_CTL, @@ -3394,18 +3506,22 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, OUTREG(BRW_VS_STRG_VAL, 0); #endif +#if WATCH_SF OUTREG(BRW_SF_CTL, BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT | BRW_SF_CTL_SNAPSHOT_ALL_THREADS | BRW_SF_CTL_THREAD_SNAPSHOT_ENABLE); OUTREG(BRW_SF_STRG_VAL, 0); - +#endif + +#if WATCH_WIZ OUTREG(BRW_WIZ_CTL, BRW_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE | BRW_WIZ_CTL_SNAPSHOT_ALL_THREADS | BRW_WIZ_CTL_SNAPSHOT_ENABLE); OUTREG(BRW_WIZ_STRG_VAL, (box_x1) | (box_y1 << 16)); +#endif #if 0 OUTREG(BRW_TS_CTL, @@ -3431,6 +3547,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, int j, k; CARD32 ctl = 0, rdata; +#if 0 for (j = 0; j < 100000; j++) { ctl = INREG(BRW_VF_CTL); if (ctl & BRW_VF_CTL_SNAPSHOT_COMPLETE) @@ -3440,6 +3557,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, rdata = INREG(BRW_VF_RDATA); OUTREG(BRW_VF_CTL, 0); ErrorF ("VF_CTL: 0x%08x VF_RDATA: 0x%08x\n", ctl, rdata); +#endif #if 0 for (j = 0; j < 1000000; j++) { @@ -3467,6 +3585,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, vs_scratch[j+6], vs_scratch[j+7]); #endif +#if WATCH_SF for (j = 0; j < 1000000; j++) { ctl = INREG(BRW_SF_CTL); if (ctl & BRW_SF_CTL_SNAPSHOT_COMPLETE) @@ -3482,7 +3601,9 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, } OUTREG(BRW_SF_CTL, 0); +#endif +#if WATCH_WIZ for (j = 0; j < 100000; j++) { ctl = INREG(BRW_WIZ_CTL); if (ctl & BRW_WIZ_CTL_SNAPSHOT_COMPLETE) @@ -3492,7 +3613,9 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, rdata = INREG(BRW_WIZ_RDATA); OUTREG(BRW_WIZ_CTL, 0); ErrorF ("WIZ_CTL: 0x%08x WIZ_RDATA: 0x%08x\n", ctl, rdata); +#endif +#if 0 for (j = 0; j < 100000; j++) { ctl = INREG(BRW_TS_CTL); if (ctl & BRW_TS_CTL_SNAPSHOT_COMPLETE) @@ -3506,6 +3629,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, ErrorF ("after EU_ATT 0x%08x%08x EU_ATT_DATA 0x%08x%08x\n", INREG(BRW_EU_ATT_1), INREG(BRW_EU_ATT_0), INREG(BRW_EU_ATT_DATA_1), INREG(BRW_EU_ATT_DATA_0)); +#endif #if 0 for (j = 0; j < 256; j++) { @@ -3521,7 +3645,9 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, if (pI830->AccelInfoRec) (*pI830->AccelInfoRec->Sync)(pScrn); +#if WATCH_STATS I830PrintErrorState (pScrn); +#endif xf86FreeOffscreenLinear(state_area); } From 5d3424492f9586a4c5a28962a9757f48f2c12e83 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 2 Aug 2006 17:34:12 -0700 Subject: [PATCH 44/70] Replace SF kernel with the one from broadwater-video HEAD. --- src/i830_video.c | 112 +++++++---------------------------------------- 1 file changed, 15 insertions(+), 97 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index 33e716f2..01a028d3 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2673,122 +2673,40 @@ static const CARD32 vs_kernel_static[][4] = { #define SF_MAX_THREADS 1 static const CARD32 sf_kernel_static[][4] = { -#if 1 -/* send 0 (4) g6<1>F g1.12<4,4,1>F math mlen 1 rlen 1 { align1 + } */ - { 0x00400031, 0x20c01fbd, 0x0069002c, 0x01110081 }, +/* send 0 (1) g6<1>F g1.12<0,1,0>F math mlen 1 rlen 1 { align1 + } */ + { 0x00000031, 0x20c01fbd, 0x0000002c, 0x01110081 }, +/* send 0 (1) g6.4<1>F g1.20<0,1,0>F math mlen 1 rlen 1 { align1 + } */ + { 0x00000031, 0x20c41fbd, 0x00000034, 0x01110081 }, /* add (8) g7<1>F g4<8,8,1>F g3<8,8,1>F { align1 + } */ { 0x00600040, 0x20e077bd, 0x008d0080, 0x008d4060 }, /* mul (1) g7<1>F g7<0,1,0>F g6<0,1,0>F { align1 + } */ { 0x00000041, 0x20e077bd, 0x000000e0, 0x000000c0 }, -/* mov (1) g7.4<1>F g6.12<0,1,0>F { align1 + } */ - { 0x00000001, 0x20e403bd, 0x000000cc, 0x00000000 }, +/* mul (1) g7.4<1>F g7.4<0,1,0>F g6.4<0,1,0>F { align1 + } */ + { 0x00000041, 0x20e477bd, 0x000000e4, 0x000000c4 }, /* mov (8) m1<1>F g7<0,1,0>F { align1 + } */ { 0x00600001, 0x202003be, 0x000000e0, 0x00000000 }, /* mov (8) m2<1>F g7.4<0,1,0>F { align1 + } */ { 0x00600001, 0x204003be, 0x000000e4, 0x00000000 }, /* mov (8) m3<1>F g3<8,8,1>F { align1 + } */ { 0x00600001, 0x206003be, 0x008d0060, 0x00000000 }, -/* send 0 (8) a0<1>F g0<8,8,1>F urb mlen 4 rlen 0 write +0 noswizzle used complete EOT{ align1 + } */ - { 0x00600031, 0x20001fbc, 0x008d0000, 0x8640c000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, - -#endif -#if 0 -/* mov (8) m1<1>F 0.00138889{ align1 + } */ - { 0x00600001, 0x202073fe, 0x00000000, 0x3ab60b61 }, -/* mov (8) m2<1>F 0.00208333{ align1 + } */ - { 0x00600001, 0x204073fe, 0x00000000, 0x3b088889 }, -/* mov (8) m3<1>F g3<8,8,1>F { align1 + } */ - { 0x00600001, 0x206003be, 0x008d0060, 0x00000000 }, -/* send 0 (8) a0<1>F g0<8,8,1>F urb mlen 4 rlen 0 write +0 noswizzle used complete EOT{ align1 + } */ - { 0x00600031, 0x20001fbc, 0x008d0000, 0x8640c000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -#endif - -#if 0 -/* send 0 (1) g6<1>F g1.8<0,1,0>F math mlen 1 rlen 1 { align1 + } */ - { 0x00000031, 0x20c01fbd, 0x00000028, 0x01110081 }, -/* mov (2) g3.8<1>F g2<2,2,1>F { align1 + } */ - { 0x00200001, 0x206803bd, 0x00450040, 0x00000000 }, -/* mov (2) g4.8<1>F g2.8<2,2,1>F { align1 + } */ - { 0x00200001, 0x208803bd, 0x00450048, 0x00000000 }, -/* mov (2) g5.8<1>F g2.16<2,2,1>F { align1 + } */ - { 0x00200001, 0x20a803bd, 0x00450050, 0x00000000 }, -/* mov (1) a48<1>UW 240 { align1 + } */ - { 0x00000001, 0x26002168, 0x00000000, 0x000000f0 }, -/* mul (8) g3<1>F g3<8,8,1>F g2.4<0,1,0>F { align1 predreg+ } */ - { 0x00610041, 0x206077bd, 0x008d0060, 0x00000044 }, -/* mul (8) g4<1>F g4<8,8,1>F g2.12<0,1,0>F { align1 predreg+ } */ - { 0x00610041, 0x208077bd, 0x008d0080, 0x0000004c }, -/* mul (8) g5<1>F g5<8,8,1>F g2.20<0,1,0>F { align1 predreg+ } */ - { 0x00610041, 0x20a077bd, 0x008d00a0, 0x00000054 }, -/* add (8) g7<1>F g4<8,8,1>F g3<8,8,1>F { align1 + } */ - { 0x00600040, 0x20e077bd, 0x008d0080, 0x008d4060 }, -/* add (8) g8<1>F g5<8,8,1>F g3<8,8,1>F { align1 + } */ - { 0x00600040, 0x210077bd, 0x008d00a0, 0x008d4060 }, -/* mul (8) a0<1>F g7<8,8,1>F g1.24<0,1,0>F { align1 + } */ - { 0x00600041, 0x200077bc, 0x008d00e0, 0x00000038 }, -/* mac (8) g9<1>F g8<8,8,1>F g1.20<0,1,0>F { align1 + } */ - { 0x00600048, 0x212077bd, 0x008d0100, 0x00004034 }, -/* mul (8) m1<1>F g9<8,8,1>F g6<0,1,0>F { align1 + } */ - { 0x00600041, 0x202077be, 0x008d0120, 0x000000c0 }, -/* mul (8) a0<1>F g8<8,8,1>F g1.12<0,1,0>F { align1 + } */ - { 0x00600041, 0x200077bc, 0x008d0100, 0x0000002c }, -/* mac (8) g9<1>F g7<8,8,1>F g1.16<0,1,0>F { align1 + } */ - { 0x00600048, 0x212077bd, 0x008d00e0, 0x00004030 }, -/* mul (8) m2<1>F g9<8,8,1>F g6<0,1,0>F { align1 + } */ - { 0x00600041, 0x204077be, 0x008d0120, 0x000000c0 }, -/* mov (8) m3<1>F g3<8,8,1>F { align1 + } */ - { 0x00600001, 0x206003be, 0x008d0060, 0x00000000 }, /* send 0 (8) a0<1>F g0<8,8,1>F urb mlen 4 rlen 0 write +0 transpose used complete EOT{ align1 + } */ - { 0x00600031, 0x20001fbc, 0x008d0000, 0x8640c800 }, + { 0x00600031, 0x20001fbc, 0x008d0000, 0x8640c800 }, /* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, /* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, /* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, /* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, /* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, /* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, /* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, /* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -#endif + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, }; /* From 21b62df7c34217be5dd95985c35e33be11c25846 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 2 Aug 2006 17:36:49 -0700 Subject: [PATCH 45/70] Move the WM kernel to a separate file. --- src/i830_video.c | 53 +----------------------------------------------- src/wm_prog.h | 53 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 54 insertions(+), 52 deletions(-) create mode 100644 src/wm_prog.h diff --git a/src/i830_video.c b/src/i830_video.c index 01a028d3..a3f8b62b 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2728,58 +2728,7 @@ static const CARD32 sf_kernel_static[][4] = { #define PS_MAX_THREADS 1 /* MIN(12, PS_KERNEL_NUM_URB / 2) */ static const CARD32 ps_kernel_static[][4] = { -/* mov (8) g2<1>F g1.8<0,1,0>UW { align1 + } */ - { 0x00600001, 0x2040013d, 0x00000028, 0x00000000 }, -/* add (8) g2<1>F g2<8,8,1>F g1<0,1,0>F { align1 + } */ - { 0x00600040, 0x204077bd, 0x008d0040, 0x00004020 }, -/* mul (8) g2<1>F g2<8,8,1>F g10<0,1,0>F { align1 + } */ - { 0x00600041, 0x204077bd, 0x008d0040, 0x00000140 }, -/* add (8) g2<1>F g2<8,8,1>F g12<0,1,0>F { align1 + } */ - { 0x00600040, 0x204077bd, 0x008d0040, 0x00000180 }, -/* mov (8) g3<1>F g1.10<0,1,0>UW { align1 + } */ - { 0x00600001, 0x2060013d, 0x0000002a, 0x00000000 }, -/* add (8) g3<1>F g3<8,8,1>F g1.4<0,1,0>F { align1 + } */ - { 0x00600040, 0x206077bd, 0x008d0060, 0x00004024 }, -/* mul (8) g3<1>F g3<8,8,1>F g11<0,1,0>F { align1 + } */ - { 0x00600041, 0x206077bd, 0x008d0060, 0x00000160 }, -/* add (8) g3<1>F g3<8,8,1>F g12.4<0,1,0>F { align1 + } */ - { 0x00600040, 0x206077bd, 0x008d0060, 0x00000184 }, -/* mov (8) m2<1>F g2<8,8,1>F { align1 + } */ - { 0x00600001, 0x204003be, 0x008d0040, 0x00000000 }, -/* mov (8) m3<1>F g3<8,8,1>F { align1 + } */ - { 0x00600001, 0x206003be, 0x008d0060, 0x00000000 }, -/* mov (8) m4<1>F 0{ align1 + } */ - { 0x00600001, 0x208073fe, 0x00000000, 0x00000000 }, -/* mov (8) m5<1>F 1{ align1 + } */ - { 0x00600001, 0x20a073fe, 0x00000000, 0x3f800000 }, -/* mov (8) m6<1>F g2<8,8,1>F { align1 + } */ - { 0x00600001, 0x20c003be, 0x008d0040, 0x00000000 }, -/* mov (8) m7<1>F g3<8,8,1>F { align1 + } */ - { 0x00600001, 0x20e003be, 0x008d0060, 0x00000000 }, -/* mov (8) m8<1>F 0{ align1 + } */ - { 0x00600001, 0x210073fe, 0x00000000, 0x00000000 }, -/* mov (8) m9<1>F 1{ align1 + } */ - { 0x00600001, 0x212073fe, 0x00000000, 0x3f800000 }, -/* mov (8) m1<1>UD g1<8,8,1>UD { align1 mask_disable + } */ - { 0x00600201, 0x20200022, 0x008d0020, 0x00000000 }, -/* send 0 (16) a0<1>UW g0<8,8,1>UW write mlen 10 rlen 0 EOT{ align1 + } */ - { 0x00800031, 0x20001d28, 0x008d0000, 0x85a04800 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -/* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +#include "wm_prog.h" }; #define ALIGN(i,m) (((i) + (m) - 1) & ~((m) - 1)) diff --git a/src/wm_prog.h b/src/wm_prog.h new file mode 100644 index 00000000..9fe775c8 --- /dev/null +++ b/src/wm_prog.h @@ -0,0 +1,53 @@ +/* wm_program */ +/* mov (8) g2<1>F g1.8<0,1,0>UW { align1 + } */ + { 0x00600001, 0x2040013d, 0x00000028, 0x00000000 }, +/* add (8) g2<1>F g2<8,8,1>F g1<0,1,0>F { align1 + } */ + { 0x00600040, 0x204077bd, 0x008d0040, 0x00004020 }, +/* mul (8) g2<1>F g2<8,8,1>F g10<0,1,0>F { align1 + } */ + { 0x00600041, 0x204077bd, 0x008d0040, 0x00000140 }, +/* add (8) g2<1>F g2<8,8,1>F g12<0,1,0>F { align1 + } */ + { 0x00600040, 0x204077bd, 0x008d0040, 0x00000180 }, +/* mov (8) g3<1>F g1.10<0,1,0>UW { align1 + } */ + { 0x00600001, 0x2060013d, 0x0000002a, 0x00000000 }, +/* add (8) g3<1>F g3<8,8,1>F g1.4<0,1,0>F { align1 + } */ + { 0x00600040, 0x206077bd, 0x008d0060, 0x00004024 }, +/* mul (8) g3<1>F g3<8,8,1>F g11<0,1,0>F { align1 + } */ + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000160 }, +/* add (8) g3<1>F g3<8,8,1>F g12.4<0,1,0>F { align1 + } */ + { 0x00600040, 0x206077bd, 0x008d0060, 0x00000184 }, +/* mov (8) m2<1>F g2<8,8,1>F { align1 + } */ + { 0x00600001, 0x204003be, 0x008d0040, 0x00000000 }, +/* mov (8) m3<1>F g3<8,8,1>F { align1 + } */ + { 0x00600001, 0x206003be, 0x008d0060, 0x00000000 }, +/* mov (8) m4<1>F 0{ align1 + } */ + { 0x00600001, 0x208073fe, 0x00000000, 0x00000000 }, +/* mov (8) m5<1>F 1{ align1 + } */ + { 0x00600001, 0x20a073fe, 0x00000000, 0x3f800000 }, +/* mov (8) m6<1>F g2<8,8,1>F { align1 + } */ + { 0x00600001, 0x20c003be, 0x008d0040, 0x00000000 }, +/* mov (8) m7<1>F g3<8,8,1>F { align1 + } */ + { 0x00600001, 0x20e003be, 0x008d0060, 0x00000000 }, +/* mov (8) m8<1>F 0{ align1 + } */ + { 0x00600001, 0x210073fe, 0x00000000, 0x00000000 }, +/* mov (8) m9<1>F 1{ align1 + } */ + { 0x00600001, 0x212073fe, 0x00000000, 0x3f800000 }, +/* mov (8) m1<1>UD g1<8,8,1>UD { align1 mask_disable + } */ + { 0x00600201, 0x20200022, 0x008d0020, 0x00000000 }, +/* send 0 (16) a0<1>UW g0<8,8,1>UW write mlen 10 rlen 0 EOT{ align1 + } */ + { 0x00800031, 0x20001d28, 0x008d0000, 0x85a04800 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, +/* nop (4) g0<1>UD { align1 + } */ + { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, From ba896c779c697e1d7458028798ec49013bd9da9f Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 2 Aug 2006 17:47:37 -0700 Subject: [PATCH 46/70] Updated grf/urb state for WM. --- src/i830_video.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index a3f8b62b..8d95a341 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -3147,8 +3147,8 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, wm_state->thread1.binding_table_entry_count = 2; wm_state->thread2.scratch_space_base_pointer = 0; /* XXX */ wm_state->thread2.per_thread_scratch_space = 0; /* XXX */ - wm_state->thread3.dispatch_grf_start_reg = 10; /* XXX */ - wm_state->thread3.urb_entry_read_length = 3; /* XXX */ + wm_state->thread3.dispatch_grf_start_reg = 3; /* XXX */ + wm_state->thread3.urb_entry_read_length = 1; /* XXX */ wm_state->thread3.const_urb_entry_read_length = 0; /* XXX */ wm_state->thread3.const_urb_entry_read_offset = 0; /* XXX */ wm_state->thread3.urb_entry_read_offset = 0; /* XXX */ From 524460ea1f02bb6e8e2239d7763334666012cec4 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 2 Aug 2006 17:47:55 -0700 Subject: [PATCH 47/70] Updated WM kernel to load video and do colorspace conversion. --- src/wm_prog.h | 177 +++++++++++++++++++++++++++++++++++++++++--------- 1 file changed, 145 insertions(+), 32 deletions(-) diff --git a/src/wm_prog.h b/src/wm_prog.h index 9fe775c8..0d0c36af 100644 --- a/src/wm_prog.h +++ b/src/wm_prog.h @@ -1,36 +1,148 @@ /* wm_program */ -/* mov (8) g2<1>F g1.8<0,1,0>UW { align1 + } */ - { 0x00600001, 0x2040013d, 0x00000028, 0x00000000 }, -/* add (8) g2<1>F g2<8,8,1>F g1<0,1,0>F { align1 + } */ - { 0x00600040, 0x204077bd, 0x008d0040, 0x00004020 }, -/* mul (8) g2<1>F g2<8,8,1>F g10<0,1,0>F { align1 + } */ - { 0x00600041, 0x204077bd, 0x008d0040, 0x00000140 }, -/* add (8) g2<1>F g2<8,8,1>F g12<0,1,0>F { align1 + } */ - { 0x00600040, 0x204077bd, 0x008d0040, 0x00000180 }, -/* mov (8) g3<1>F g1.10<0,1,0>UW { align1 + } */ - { 0x00600001, 0x2060013d, 0x0000002a, 0x00000000 }, -/* add (8) g3<1>F g3<8,8,1>F g1.4<0,1,0>F { align1 + } */ - { 0x00600040, 0x206077bd, 0x008d0060, 0x00004024 }, -/* mul (8) g3<1>F g3<8,8,1>F g11<0,1,0>F { align1 + } */ - { 0x00600041, 0x206077bd, 0x008d0060, 0x00000160 }, -/* add (8) g3<1>F g3<8,8,1>F g12.4<0,1,0>F { align1 + } */ - { 0x00600040, 0x206077bd, 0x008d0060, 0x00000184 }, -/* mov (8) m2<1>F g2<8,8,1>F { align1 + } */ - { 0x00600001, 0x204003be, 0x008d0040, 0x00000000 }, -/* mov (8) m3<1>F g3<8,8,1>F { align1 + } */ - { 0x00600001, 0x206003be, 0x008d0060, 0x00000000 }, -/* mov (8) m4<1>F 0{ align1 + } */ - { 0x00600001, 0x208073fe, 0x00000000, 0x00000000 }, -/* mov (8) m5<1>F 1{ align1 + } */ - { 0x00600001, 0x20a073fe, 0x00000000, 0x3f800000 }, -/* mov (8) m6<1>F g2<8,8,1>F { align1 + } */ - { 0x00600001, 0x20c003be, 0x008d0040, 0x00000000 }, -/* mov (8) m7<1>F g3<8,8,1>F { align1 + } */ - { 0x00600001, 0x20e003be, 0x008d0060, 0x00000000 }, -/* mov (8) m8<1>F 0{ align1 + } */ - { 0x00600001, 0x210073fe, 0x00000000, 0x00000000 }, -/* mov (8) m9<1>F 1{ align1 + } */ - { 0x00600001, 0x212073fe, 0x00000000, 0x3f800000 }, +/* mov (1) g4<1>F g1.8<0,1,0>UW { align1 + } */ + { 0x00000001, 0x2080013d, 0x00000028, 0x00000000 }, +/* add (1) g4.4<1>F g1.8<0,1,0>UW 1 { align1 + } */ + { 0x00000040, 0x20840d3d, 0x00000028, 0x00000001 }, +/* mov (1) g4.8<1>F g1.8<0,1,0>UW { align1 + } */ + { 0x00000001, 0x2088013d, 0x00000028, 0x00000000 }, +/* add (1) g4.12<1>F g1.8<0,1,0>UW 1 { align1 + } */ + { 0x00000040, 0x208c0d3d, 0x00000028, 0x00000001 }, +/* mov (1) g6<1>F g1.10<0,1,0>UW { align1 + } */ + { 0x00000001, 0x20c0013d, 0x0000002a, 0x00000000 }, +/* mov (1) g6.4<1>F g1.10<0,1,0>UW { align1 + } */ + { 0x00000001, 0x20c4013d, 0x0000002a, 0x00000000 }, +/* add (1) g6.8<1>F g1.10<0,1,0>UW 1 { align1 + } */ + { 0x00000040, 0x20c80d3d, 0x0000002a, 0x00000001 }, +/* add (1) g6.12<1>F g1.10<0,1,0>UW 1 { align1 + } */ + { 0x00000040, 0x20cc0d3d, 0x0000002a, 0x00000001 }, +/* mov (1) g4.16<1>F g1.12<0,1,0>UW { align1 + } */ + { 0x00000001, 0x2090013d, 0x0000002c, 0x00000000 }, +/* add (1) g4.20<1>F g1.12<0,1,0>UW 1 { align1 + } */ + { 0x00000040, 0x20940d3d, 0x0000002c, 0x00000001 }, +/* mov (1) g4.24<1>F g1.12<0,1,0>UW { align1 + } */ + { 0x00000001, 0x2098013d, 0x0000002c, 0x00000000 }, +/* add (1) g4.28<1>F g1.12<0,1,0>UW 1 { align1 + } */ + { 0x00000040, 0x209c0d3d, 0x0000002c, 0x00000001 }, +/* mov (1) g6.16<1>F g1.14<0,1,0>UW { align1 + } */ + { 0x00000001, 0x20d0013d, 0x0000002e, 0x00000000 }, +/* mov (1) g6.20<1>F g1.14<0,1,0>UW { align1 + } */ + { 0x00000001, 0x20d4013d, 0x0000002e, 0x00000000 }, +/* add (1) g6.24<1>F g1.14<0,1,0>UW 1 { align1 + } */ + { 0x00000040, 0x20d80d3d, 0x0000002e, 0x00000001 }, +/* add (1) g6.28<1>F g1.14<0,1,0>UW 1 { align1 + } */ + { 0x00000040, 0x20dc0d3d, 0x0000002e, 0x00000001 }, +/* mov (1) g5<1>F g1.16<0,1,0>UW { align1 + } */ + { 0x00000001, 0x20a0013d, 0x00000030, 0x00000000 }, +/* add (1) g5.4<1>F g1.16<0,1,0>UW 1 { align1 + } */ + { 0x00000040, 0x20a40d3d, 0x00000030, 0x00000001 }, +/* mov (1) g5.8<1>F g1.16<0,1,0>UW { align1 + } */ + { 0x00000001, 0x20a8013d, 0x00000030, 0x00000000 }, +/* add (1) g5.12<1>F g1.16<0,1,0>UW 1 { align1 + } */ + { 0x00000040, 0x20ac0d3d, 0x00000030, 0x00000001 }, +/* mov (1) g7<1>F g1.18<0,1,0>UW { align1 + } */ + { 0x00000001, 0x20e0013d, 0x00000032, 0x00000000 }, +/* mov (1) g7.4<1>F g1.18<0,1,0>UW { align1 + } */ + { 0x00000001, 0x20e4013d, 0x00000032, 0x00000000 }, +/* add (1) g7.8<1>F g1.18<0,1,0>UW 1 { align1 + } */ + { 0x00000040, 0x20e80d3d, 0x00000032, 0x00000001 }, +/* add (1) g7.12<1>F g1.18<0,1,0>UW 1 { align1 + } */ + { 0x00000040, 0x20ec0d3d, 0x00000032, 0x00000001 }, +/* mov (1) g5.16<1>F g1.20<0,1,0>UW { align1 + } */ + { 0x00000001, 0x20b0013d, 0x00000034, 0x00000000 }, +/* add (1) g5.20<1>F g1.20<0,1,0>UW 1 { align1 + } */ + { 0x00000040, 0x20b40d3d, 0x00000034, 0x00000001 }, +/* mov (1) g5.24<1>F g1.20<0,1,0>UW { align1 + } */ + { 0x00000001, 0x20b8013d, 0x00000034, 0x00000000 }, +/* add (1) g5.28<1>F g1.20<0,1,0>UW 1 { align1 + } */ + { 0x00000040, 0x20bc0d3d, 0x00000034, 0x00000001 }, +/* mov (1) g7.16<1>F g1.22<0,1,0>UW { align1 + } */ + { 0x00000001, 0x20f0013d, 0x00000036, 0x00000000 }, +/* mov (1) g7.20<1>F g1.22<0,1,0>UW { align1 + } */ + { 0x00000001, 0x20f4013d, 0x00000036, 0x00000000 }, +/* add (1) g7.24<1>F g1.22<0,1,0>UW 1 { align1 + } */ + { 0x00000040, 0x20f80d3d, 0x00000036, 0x00000001 }, +/* add (1) g7.28<1>F g1.22<0,1,0>UW 1 { align1 + } */ + { 0x00000040, 0x20fc0d3d, 0x00000036, 0x00000001 }, +/* add (8) g4<1>F g4<8,8,1>F g1<0,1,0>F { align1 + } */ + { 0x00600040, 0x208077bd, 0x008d0080, 0x00004020 }, +/* add (8) g5<1>F g5<8,8,1>F g1<0,1,0>F { align1 + } */ + { 0x00600040, 0x20a077bd, 0x008d00a0, 0x00004020 }, +/* mul (8) g4<1>F g4<8,8,1>F g3<0,1,0>F { align1 + } */ + { 0x00600041, 0x208077bd, 0x008d0080, 0x00000060 }, +/* mul (8) g5<1>F g5<8,8,1>F g3<0,1,0>F { align1 + } */ + { 0x00600041, 0x20a077bd, 0x008d00a0, 0x00000060 }, +/* add (8) g4<1>F g4<8,8,1>F g3.12<0,1,0>F { align1 + } */ + { 0x00600040, 0x208077bd, 0x008d0080, 0x0000006c }, +/* add (8) g5<1>F g5<8,8,1>F g3.12<0,1,0>F { align1 + } */ + { 0x00600040, 0x20a077bd, 0x008d00a0, 0x0000006c }, +/* add (8) g6<1>F g6<8,8,1>F g1.4<0,1,0>F { align1 + } */ + { 0x00600040, 0x20c077bd, 0x008d00c0, 0x00004024 }, +/* add (8) g7<1>F g7<8,8,1>F g1.4<0,1,0>F { align1 + } */ + { 0x00600040, 0x20e077bd, 0x008d00e0, 0x00004024 }, +/* mul (8) g6<1>F g6<8,8,1>F g3.20<0,1,0>F { align1 + } */ + { 0x00600041, 0x20c077bd, 0x008d00c0, 0x00000074 }, +/* mul (8) g7<1>F g7<8,8,1>F g3.20<0,1,0>F { align1 + } */ + { 0x00600041, 0x20e077bd, 0x008d00e0, 0x00000074 }, +/* add (8) g6<1>F g6<8,8,1>F g3.28<0,1,0>F { align1 + } */ + { 0x00600040, 0x20c077bd, 0x008d00c0, 0x0000007c }, +/* add (8) g7<1>F g7<8,8,1>F g3.28<0,1,0>F { align1 + } */ + { 0x00600040, 0x20e077bd, 0x008d00e0, 0x0000007c }, +/* mov (8) m1<1>F g4<8,8,1>F { align1 + } */ + { 0x00600001, 0x202003be, 0x008d0080, 0x00000000 }, +/* mov (8) m2<1>F g5<8,8,1>F { align1 + } */ + { 0x00600001, 0x204003be, 0x008d00a0, 0x00000000 }, +/* mov (8) m3<1>F g6<8,8,1>F { align1 + } */ + { 0x00600001, 0x206003be, 0x008d00c0, 0x00000000 }, +/* mov (8) m4<1>F g7<8,8,1>F { align1 + } */ + { 0x00600001, 0x208003be, 0x008d00e0, 0x00000000 }, +/* send 0 (16) g12<1>UW g8<8,8,1>UW sampler mlen 5 rlen 8 { align1 + } */ + { 0x00800031, 0x21801d29, 0x008d0100, 0x02580001 }, +/* mov (8) g19<1>UW g19<8,8,1>UW { align1 + } */ + { 0x00600001, 0x22600129, 0x008d0260, 0x00000000 }, +/* add (8) g14<1>F g14<8,8,1>F -0.0627451{ align1 + } */ + { 0x00600040, 0x21c07fbd, 0x008d01c0, 0xbd808081 }, +/* add (8) g16<1>F g16<8,8,1>F -0.501961{ align1 + } */ + { 0x00600040, 0x22007fbd, 0x008d0200, 0xbf008081 }, +/* add (8) g12<1>F g12<8,8,1>F -0.501961{ align1 + } */ + { 0x00600040, 0x21807fbd, 0x008d0180, 0xbf008081 }, +/* mul (8) g14<1>F g14<8,8,1>F 1.164{ align1 + } */ + { 0x00600041, 0x21c07fbd, 0x008d01c0, 0x3f94fdf4 }, +/* mul (8) a0<1>F g16<8,8,1>F 1.596{ align1 + } */ + { 0x00600041, 0x20007fbc, 0x008d0200, 0x3fcc49ba }, +/* mac (8) m2<1>F g14<8,8,1>F 1{ align1 + Saturate } */ + { 0x80600048, 0x20407fbe, 0x008d01c0, 0x3f800000 }, +/* mul (8) a0<1>F g16<8,8,1>F -0.813{ align1 + } */ + { 0x00600041, 0x20007fbc, 0x008d0200, 0xbf5020c5 }, +/* mac (8) a0<1>F g12<8,8,1>F -0.392{ align1 + } */ + { 0x00600048, 0x20007fbc, 0x008d0180, 0xbec8b439 }, +/* mac (8) m3<1>F g14<8,8,1>F 1{ align1 + Saturate } */ + { 0x80600048, 0x20607fbe, 0x008d01c0, 0x3f800000 }, +/* mul (8) a0<1>F g12<8,8,1>F 2.017{ align1 + } */ + { 0x00600041, 0x20007fbc, 0x008d0180, 0x40011687 }, +/* mac (8) m4<1>F g14<8,8,1>F 1{ align1 + Saturate } */ + { 0x80600048, 0x20807fbe, 0x008d01c0, 0x3f800000 }, +/* add (8) g15<1>F g15<8,8,1>F -0.0627451{ align1 + } */ + { 0x00600040, 0x21e07fbd, 0x008d01e0, 0xbd808081 }, +/* add (8) g17<1>F g17<8,8,1>F -0.501961{ align1 + } */ + { 0x00600040, 0x22207fbd, 0x008d0220, 0xbf008081 }, +/* add (8) g13<1>F g13<8,8,1>F -0.501961{ align1 + } */ + { 0x00600040, 0x21a07fbd, 0x008d01a0, 0xbf008081 }, +/* mul (8) g15<1>F g15<8,8,1>F 1.164{ align1 + } */ + { 0x00600041, 0x21e07fbd, 0x008d01e0, 0x3f94fdf4 }, +/* mul (8) a0<1>F g17<8,8,1>F 1.596{ align1 + } */ + { 0x00600041, 0x20007fbc, 0x008d0220, 0x3fcc49ba }, +/* mac (8) m6<1>F g15<8,8,1>F 1{ align1 + Saturate } */ + { 0x80600048, 0x20c07fbe, 0x008d01e0, 0x3f800000 }, +/* mul (8) a0<1>F g17<8,8,1>F -0.813{ align1 + } */ + { 0x00600041, 0x20007fbc, 0x008d0220, 0xbf5020c5 }, +/* mac (8) a0<1>F g13<8,8,1>F -0.392{ align1 + } */ + { 0x00600048, 0x20007fbc, 0x008d01a0, 0xbec8b439 }, +/* mac (8) m7<1>F g15<8,8,1>F 1{ align1 + Saturate } */ + { 0x80600048, 0x20e07fbe, 0x008d01e0, 0x3f800000 }, +/* mul (8) a0<1>F g13<8,8,1>F 2.017{ align1 + } */ + { 0x00600041, 0x20007fbc, 0x008d01a0, 0x40011687 }, +/* mac (8) m8<1>F g15<8,8,1>F 1{ align1 + Saturate } */ + { 0x80600048, 0x21007fbe, 0x008d01e0, 0x3f800000 }, /* mov (8) m1<1>UD g1<8,8,1>UD { align1 mask_disable + } */ { 0x00600201, 0x20200022, 0x008d0020, 0x00000000 }, /* send 0 (16) a0<1>UW g0<8,8,1>UW write mlen 10 rlen 0 EOT{ align1 + } */ @@ -51,3 +163,4 @@ { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, /* nop (4) g0<1>UD { align1 + } */ { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, + From bc2c842d93de04d48c7de60482814db346bd0b78 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 2 Aug 2006 18:10:01 -0700 Subject: [PATCH 48/70] Allocate space for the 965's state at the end of the video buffer. Fixes corruption in the first few lines of the video. Based on 1b506798d98d911be733543da2c40cb451a28912 --- src/i830_video.c | 30 ++++++++++++++++++++---------- 1 file changed, 20 insertions(+), 10 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index 8d95a341..1b22e112 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -133,6 +133,11 @@ static Atom xvGamma0, xvGamma1, xvGamma2, xvGamma3, xvGamma4, xvGamma5; #define IMAGE_MAX_WIDTH_LEGACY 1024 #define IMAGE_MAX_HEIGHT_LEGACY 1080 +/* + * Broadwater requires a bit of extra video memory for state information + */ +#define BRW_LINEAR_EXTRA (32*1024) + #if !VIDEO_DEBUG #define ErrorF Edummy static void @@ -2817,7 +2822,6 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, int binding_table_offset; int next_offset, total_state_size; int vb_size = (4 * 4) * 4; /* 4 DWORDS per vertex */ - FBLinearPtr state_area; char *state_base; int state_base_offset; @@ -2900,15 +2904,16 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, /* Allocate an area in framebuffer for our state layout we just set up */ total_state_size = next_offset; - state_area = I830AllocateMemory(pScrn, NULL, (total_state_size + 64) / - pI830->cpp); - if (state_area == NULL) { - ErrorF("Failed to allocate %d bytes for state\n", total_state_size); - return; - } + assert (total_state_size < BRW_LINEAR_EXTRA); - state_base_offset = pI830->FrontBuffer.Start + pPriv->linear->offset * pI830->cpp; + /* + * Use the extra space allocated at the end of the Xv buffer + */ + state_base_offset = (pPriv->YBuf0offset + + pPriv->linear->size * pI830->cpp - + BRW_LINEAR_EXTRA); state_base_offset = ALIGN(state_base_offset, 64); + state_base = (char *)(pI830->FbBase + state_base_offset); /* Set up our pointers to state structures in framebuffer. It would probably * be a good idea to fill these structures out in system memory and then dump @@ -3515,7 +3520,6 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, #if WATCH_STATS I830PrintErrorState (pScrn); #endif - xf86FreeOffscreenLinear(state_area); } static FBLinearPtr @@ -3594,6 +3598,7 @@ I830PutImage(ScrnInfoPtr pScrn, int top, left, npixels, nlines, size, loops; BoxRec dstBox; int pitchAlignMask; + int extraLinear; DPRINTF(PFX, "I830PutImage: src: (%d,%d)(%d,%d), dst: (%d,%d)(%d,%d)\n" "width %d, height %d\n", src_x, src_y, src_w, src_h, drw_x, drw_y, @@ -3696,9 +3701,14 @@ I830PutImage(ScrnInfoPtr pScrn, ErrorF("srcPitch: %d, dstPitch: %d, size: %d\n", srcPitch, dstPitch, size); #endif + if (IS_BROADWATER(pI830)) + extraLinear = BRW_LINEAR_EXTRA; + else + extraLinear = 0; + /* size is multiplied by 2 because we have two buffers that are flipping */ pPriv->linear = I830AllocateMemory(pScrn, pPriv->linear, - (pPriv->doubleBuffer ? size * 2 : size) / pI830->cpp); + extraLinear + (pPriv->doubleBuffer ? size * 2 : size) / pI830->cpp); if(!pPriv->linear || pPriv->linear->offset < (pScrn->virtualX * pScrn->virtualY)) return BadAlloc; From aafa48cb85cd03c735fb968a4275c19e1a68cd02 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 2 Aug 2006 18:26:26 -0700 Subject: [PATCH 49/70] Fix wm prog to correct the ordering of the Cr and Cb channels. --- src/wm_prog.h | 40 ++++++++++++++++++++-------------------- 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/src/wm_prog.h b/src/wm_prog.h index 0d0c36af..a8391c4d 100644 --- a/src/wm_prog.h +++ b/src/wm_prog.h @@ -101,46 +101,46 @@ { 0x00600001, 0x22600129, 0x008d0260, 0x00000000 }, /* add (8) g14<1>F g14<8,8,1>F -0.0627451{ align1 + } */ { 0x00600040, 0x21c07fbd, 0x008d01c0, 0xbd808081 }, -/* add (8) g16<1>F g16<8,8,1>F -0.501961{ align1 + } */ - { 0x00600040, 0x22007fbd, 0x008d0200, 0xbf008081 }, /* add (8) g12<1>F g12<8,8,1>F -0.501961{ align1 + } */ { 0x00600040, 0x21807fbd, 0x008d0180, 0xbf008081 }, +/* add (8) g16<1>F g16<8,8,1>F -0.501961{ align1 + } */ + { 0x00600040, 0x22007fbd, 0x008d0200, 0xbf008081 }, /* mul (8) g14<1>F g14<8,8,1>F 1.164{ align1 + } */ { 0x00600041, 0x21c07fbd, 0x008d01c0, 0x3f94fdf4 }, -/* mul (8) a0<1>F g16<8,8,1>F 1.596{ align1 + } */ - { 0x00600041, 0x20007fbc, 0x008d0200, 0x3fcc49ba }, +/* mul (8) a0<1>F g12<8,8,1>F 1.596{ align1 + } */ + { 0x00600041, 0x20007fbc, 0x008d0180, 0x3fcc49ba }, /* mac (8) m2<1>F g14<8,8,1>F 1{ align1 + Saturate } */ { 0x80600048, 0x20407fbe, 0x008d01c0, 0x3f800000 }, -/* mul (8) a0<1>F g16<8,8,1>F -0.813{ align1 + } */ - { 0x00600041, 0x20007fbc, 0x008d0200, 0xbf5020c5 }, -/* mac (8) a0<1>F g12<8,8,1>F -0.392{ align1 + } */ - { 0x00600048, 0x20007fbc, 0x008d0180, 0xbec8b439 }, +/* mul (8) a0<1>F g12<8,8,1>F -0.813{ align1 + } */ + { 0x00600041, 0x20007fbc, 0x008d0180, 0xbf5020c5 }, +/* mac (8) a0<1>F g16<8,8,1>F -0.392{ align1 + } */ + { 0x00600048, 0x20007fbc, 0x008d0200, 0xbec8b439 }, /* mac (8) m3<1>F g14<8,8,1>F 1{ align1 + Saturate } */ { 0x80600048, 0x20607fbe, 0x008d01c0, 0x3f800000 }, -/* mul (8) a0<1>F g12<8,8,1>F 2.017{ align1 + } */ - { 0x00600041, 0x20007fbc, 0x008d0180, 0x40011687 }, +/* mul (8) a0<1>F g16<8,8,1>F 2.017{ align1 + } */ + { 0x00600041, 0x20007fbc, 0x008d0200, 0x40011687 }, /* mac (8) m4<1>F g14<8,8,1>F 1{ align1 + Saturate } */ { 0x80600048, 0x20807fbe, 0x008d01c0, 0x3f800000 }, /* add (8) g15<1>F g15<8,8,1>F -0.0627451{ align1 + } */ { 0x00600040, 0x21e07fbd, 0x008d01e0, 0xbd808081 }, -/* add (8) g17<1>F g17<8,8,1>F -0.501961{ align1 + } */ - { 0x00600040, 0x22207fbd, 0x008d0220, 0xbf008081 }, /* add (8) g13<1>F g13<8,8,1>F -0.501961{ align1 + } */ { 0x00600040, 0x21a07fbd, 0x008d01a0, 0xbf008081 }, +/* add (8) g17<1>F g17<8,8,1>F -0.501961{ align1 + } */ + { 0x00600040, 0x22207fbd, 0x008d0220, 0xbf008081 }, /* mul (8) g15<1>F g15<8,8,1>F 1.164{ align1 + } */ { 0x00600041, 0x21e07fbd, 0x008d01e0, 0x3f94fdf4 }, -/* mul (8) a0<1>F g17<8,8,1>F 1.596{ align1 + } */ - { 0x00600041, 0x20007fbc, 0x008d0220, 0x3fcc49ba }, +/* mul (8) a0<1>F g13<8,8,1>F 1.596{ align1 + } */ + { 0x00600041, 0x20007fbc, 0x008d01a0, 0x3fcc49ba }, /* mac (8) m6<1>F g15<8,8,1>F 1{ align1 + Saturate } */ { 0x80600048, 0x20c07fbe, 0x008d01e0, 0x3f800000 }, -/* mul (8) a0<1>F g17<8,8,1>F -0.813{ align1 + } */ - { 0x00600041, 0x20007fbc, 0x008d0220, 0xbf5020c5 }, -/* mac (8) a0<1>F g13<8,8,1>F -0.392{ align1 + } */ - { 0x00600048, 0x20007fbc, 0x008d01a0, 0xbec8b439 }, +/* mul (8) a0<1>F g13<8,8,1>F -0.813{ align1 + } */ + { 0x00600041, 0x20007fbc, 0x008d01a0, 0xbf5020c5 }, +/* mac (8) a0<1>F g17<8,8,1>F -0.392{ align1 + } */ + { 0x00600048, 0x20007fbc, 0x008d0220, 0xbec8b439 }, /* mac (8) m7<1>F g15<8,8,1>F 1{ align1 + Saturate } */ { 0x80600048, 0x20e07fbe, 0x008d01e0, 0x3f800000 }, -/* mul (8) a0<1>F g13<8,8,1>F 2.017{ align1 + } */ - { 0x00600041, 0x20007fbc, 0x008d01a0, 0x40011687 }, +/* mul (8) a0<1>F g17<8,8,1>F 2.017{ align1 + } */ + { 0x00600041, 0x20007fbc, 0x008d0220, 0x40011687 }, /* mac (8) m8<1>F g15<8,8,1>F 1{ align1 + Saturate } */ { 0x80600048, 0x21007fbe, 0x008d01e0, 0x3f800000 }, /* mov (8) m1<1>UD g1<8,8,1>UD { align1 mask_disable + } */ From 33acbdca0a0f82725e5bf7887b325726403a6ffd Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 2 Aug 2006 19:09:19 -0700 Subject: [PATCH 50/70] Remove the VS kernel and binding table. The VS URB entries have to remain as they're used to store the VF output which isn't modified by a VS program. --- src/i830_video.c | 86 +----------------------------------------------- 1 file changed, 1 insertion(+), 85 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index 1b22e112..df661516 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2641,33 +2641,6 @@ static const CARD32 sip_kernel_static[][4] = { { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, }; -static const CARD32 vs_kernel_static[][4] = { - /* mov (8) m1<1>F g1<8,8,1>F { align1 + } */ - { 0x00600001, 0x202003be, 0x008d0020, 0x00000000 }, - /* mov (1) g0.8<1>D 0 { align1 mask_disable + } */ - { 0x00000201, 0x200810e5, 0x00000000, 0x00000000 }, - /* send 0 (8) a0<1>UW g0<8,8,1>F write mlen 3 rlen 0 { align1 + } */ - { 0x00600031, 0x20001fa8, 0x008d0000, 0x053003ff }, - /* send 0 (8) a0<1>F g0<8,8,1>F urb mlen 2 rlen 0 write +0 noswizzle used complete EOT{ align1 + } */ - { 0x00600031, 0x20001fbc, 0x008d0000, 0x8620c000 }, - /* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, - /* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, - /* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, - /* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, - /* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, - /* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, - /* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, - /* nop (4) g0<1>UD { align1 + } */ - { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 }, -}; - /* * this program computes dA/dx and dA/dy for the texture coordinates along * with the base texture coordinate. It was extracted from the Mesa driver @@ -2807,7 +2780,6 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, struct brw_wm_unit_state *wm_state; struct brw_cc_unit_state *cc_state; struct brw_cc_viewport *cc_viewport; - struct brw_instruction *vs_kernel; struct brw_instruction *sf_kernel; struct brw_instruction *ps_kernel; struct brw_instruction *sip_kernel; @@ -2817,7 +2789,6 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, int dest_surf_offset, src_surf_offset, src_sampler_offset, vs_offset; int sf_offset, wm_offset, cc_offset, vb_offset, cc_viewport_offset; int wm_scratch_offset; - int vs_kernel_offset; int sf_kernel_offset, ps_kernel_offset, sip_kernel_offset; int binding_table_offset; int next_offset, total_state_size; @@ -2825,15 +2796,6 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, char *state_base; int state_base_offset; - int vs_scratch_offset; -#define VS_SCRATCH_SIZE 1024 -#define VS_SCRATCH_NUM (VS_SCRATCH_SIZE / sizeof (float)) - char *vs_scratch; - int vs_scratch_surface_state_offset; - struct brw_surface_state *vs_scratch_surface_state; - int vs_binding_table_offset; - CARD32 *vs_binding_table; - #if 0 ErrorF("BroadwaterDisplayVideoTextured: %dx%d (pitch %d)\n", width, height, video_pitch); @@ -2875,15 +2837,6 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, next_offset = ps_kernel_offset + sizeof (ps_kernel_static); sip_kernel_offset = ALIGN(next_offset, 64); next_offset = sip_kernel_offset + sizeof (sip_kernel_static); - vs_kernel_offset = ALIGN(next_offset, 64); - next_offset = vs_kernel_offset + sizeof (vs_kernel_static); - vs_scratch_offset = ALIGN(next_offset, 1024); - next_offset = vs_scratch_offset + VS_SCRATCH_SIZE; - vs_scratch_surface_state_offset = ALIGN(next_offset, 32); - next_offset = vs_scratch_surface_state_offset + sizeof (struct brw_surface_state); - vs_binding_table_offset = ALIGN(next_offset, 32); - next_offset = vs_binding_table_offset + 1 * 4; - cc_viewport_offset = ALIGN(next_offset, 32); next_offset = cc_viewport_offset + sizeof(*cc_viewport); @@ -2926,10 +2879,6 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, sf_kernel = (void *)(state_base + sf_kernel_offset); ps_kernel = (void *)(state_base + ps_kernel_offset); sip_kernel = (void *)(state_base + sip_kernel_offset); - vs_kernel = (void *)(state_base + vs_kernel_offset); - vs_scratch = (void *)(state_base + vs_scratch_offset); - vs_scratch_surface_state = (void *)(state_base + vs_scratch_surface_state_offset); - vs_binding_table = (void *)(state_base + vs_binding_table_offset); cc_viewport = (void *)(state_base + cc_viewport_offset); dest_surf_state = (void *)(state_base + dest_surf_offset); @@ -3064,30 +3013,8 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, src_sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP; /* Set up the vertex shader to be disabled (passthrough) */ - vs_binding_table[0] = state_base_offset + vs_scratch_surface_state_offset; - memset (vs_scratch_surface_state, 0, sizeof (*vs_scratch_surface_state)); - vs_scratch_surface_state->ss0.surface_type = BRW_SURFACE_BUFFER; - vs_scratch_surface_state->ss0.surface_format = BRW_SURFACEFORMAT_R32_FLOAT; - vs_scratch_surface_state->ss1.base_addr = state_base_offset + vs_scratch_offset; - vs_scratch_surface_state->ss2.height = (VS_SCRATCH_NUM - 1) >> 7; - vs_scratch_surface_state->ss2.width = (VS_SCRATCH_NUM - 1) & 0x7f; - vs_scratch_surface_state->ss3.pitch = 3; - - memcpy(vs_kernel, vs_kernel_static, sizeof (vs_kernel_static)); - memset(vs_state, 0, sizeof(*vs_state)); -#if 0 - ErrorF ("vs kernel: 0x%08x\n", state_base_offset + vs_kernel_offset); -#endif - vs_state->thread0.kernel_start_pointer = - (state_base_offset + vs_kernel_offset) >> 6; - vs_state->thread0.grf_reg_count = 1; - vs_state->thread1.single_program_flow = 1; - vs_state->thread4.nr_urb_entries = URB_VS_ENTRIES; - vs_state->thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1; - vs_state->thread4.stats_enable = 1; vs_state->vs6.vs_enable = 0; - vs_state->vs6.vert_cache_disable = 1; /* Set up the SF kernel to do coord interp: for each attribute, * calculate dA/dx and dA/dy. Hand these interpolation coefficients @@ -3217,7 +3144,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, /* Binding table pointers */ OUT_RING(BRW_3DSTATE_BINDING_TABLE_POINTERS | 4); - OUT_RING(state_base_offset + vs_binding_table_offset); /* vs */ + OUT_RING(0); /* vs */ OUT_RING(0); /* gs */ OUT_RING(0); /* clip */ OUT_RING(0); /* sf */ @@ -3353,10 +3280,6 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, vb[i++] = (float) box_x1; vb[i++] = (float) box_y1; -#if 0 - memset (vs_scratch, 1, VS_SCRATCH_SIZE); -#endif - #if 0 ErrorF ("before EU_ATT 0x%08x%08x EU_ATT_DATA 0x%08x%08x\n", INREG(BRW_EU_ATT_1), INREG(BRW_EU_ATT_0), @@ -3448,13 +3371,6 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, } OUTREG(BRW_VS_CTL, 0); - for (j = 0; j < 32; j += 8) - ErrorF (" vs_scratch(%2d): %02x %02x %02x %02x %02x %02x %02x %02x\n", - j, - vs_scratch[j+0], vs_scratch[j+1], - vs_scratch[j+2], vs_scratch[j+3], - vs_scratch[j+4], vs_scratch[j+5], - vs_scratch[j+6], vs_scratch[j+7]); #endif #if WATCH_SF From befa655168fb8dcb6806592eb44f7ac49f191822 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 2 Aug 2006 19:11:38 -0700 Subject: [PATCH 51/70] Reduce URB_VS_ENTRY_SIZE to 1 as our vertices are under 8 floats. --- src/i830_video.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/i830_video.c b/src/i830_video.c index df661516..9ae9ce5f 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2891,7 +2891,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, * allow anything we would want to do, at potentially lower performance. */ #define URB_VS_ENTRIES 8 -#define URB_VS_ENTRY_SIZE 5 +#define URB_VS_ENTRY_SIZE 1 #define URB_GS_ENTRIES 4 #define URB_GS_ENTRY_SIZE 5 From a076d35bed6f13cf943a0f8948176aa0c999e2da Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 2 Aug 2006 19:16:03 -0700 Subject: [PATCH 52/70] No GS URB allocation is necessary when the function is disabled. --- src/i830_video.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index 9ae9ce5f..769c45fa 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2893,8 +2893,8 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, #define URB_VS_ENTRIES 8 #define URB_VS_ENTRY_SIZE 1 -#define URB_GS_ENTRIES 4 -#define URB_GS_ENTRY_SIZE 5 +#define URB_GS_ENTRIES 0 +#define URB_GS_ENTRY_SIZE 0 #define URB_CLIP_ENTRIES 6 #define URB_CLIP_ENTRY_SIZE 5 From 1d45668d7a42bfa5d7f5bfb68d8bae38bda0936b Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 2 Aug 2006 19:18:20 -0700 Subject: [PATCH 53/70] We only need 3 vertices to fit in the URB, since we only dispatch 3. --- src/i830_video.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/i830_video.c b/src/i830_video.c index 769c45fa..9308323c 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2890,7 +2890,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, /* Set up a default static partitioning of the URB, which is supposed to * allow anything we would want to do, at potentially lower performance. */ -#define URB_VS_ENTRIES 8 +#define URB_VS_ENTRIES 3 #define URB_VS_ENTRY_SIZE 1 #define URB_GS_ENTRIES 0 From 82037a12758c41a304f2e0bbd033d3345cccbe1a Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 2 Aug 2006 19:33:28 -0700 Subject: [PATCH 54/70] Remove CS URB allocation since we don't use any constants. --- src/i830_video.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index 9308323c..97c9d271 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2902,8 +2902,8 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, #define URB_SF_ENTRIES 8 #define URB_SF_ENTRY_SIZE 11 -#define URB_CS_ENTRIES 2 -#define URB_CS_ENTRY_SIZE 32 +#define URB_CS_ENTRIES 0 +#define URB_CS_ENTRY_SIZE 0 urb_vs_start = 0; urb_vs_size = URB_VS_ENTRIES * URB_VS_ENTRY_SIZE; From b57ccb682cb3dea3e26c6f1b0c709e63dfde0d31 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 2 Aug 2006 19:46:15 -0700 Subject: [PATCH 55/70] Replace the SF max threads setting with a define for easier tweaking. Tweak it to 1 for now. --- src/i830_video.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/i830_video.c b/src/i830_video.c index 97c9d271..a8ffca7d 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2648,7 +2648,11 @@ static const CARD32 sip_kernel_static[][4] = { #define SF_KERNEL_NUM_GRF 10 #define SF_KERNEL_NUM_URB 8 +#if 0 +#define SF_MAX_THREADS MIN(12, URB_SF_ENTRIES / 2) +#else #define SF_MAX_THREADS 1 +#endif static const CARD32 sf_kernel_static[][4] = { /* send 0 (1) g6<1>F g1.12<0,1,0>F math mlen 1 rlen 1 { align1 + } */ @@ -3043,7 +3047,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, sf_state->thread3.urb_entry_read_length = 1; /* 1 URB per vertex */ sf_state->thread3.urb_entry_read_offset = 0; sf_state->thread3.dispatch_grf_start_reg = 3; - sf_state->thread4.max_threads = MIN(12, URB_SF_ENTRIES / 2) - 1; + sf_state->thread4.max_threads = SF_MAX_THREADS - 1; sf_state->thread4.urb_entry_allocation_size = URB_SF_ENTRY_SIZE - 1; sf_state->thread4.nr_urb_entries = URB_SF_ENTRIES; sf_state->thread4.stats_enable = 1; From defe2795429484ffe4c1438bafb86bb5e5469ba9 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 2 Aug 2006 20:32:41 -0700 Subject: [PATCH 56/70] Correct the VS setup, and allocate a correct, minimal number of URB entries. The VS number of URB entries and URB entry size are always used, even when the VS is disabled. Similarly, the cache enable bit is always used. --- src/i830_video.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index a8ffca7d..f2b12b81 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2891,10 +2891,12 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, binding_table = (void *)(state_base + binding_table_offset); vb = (void *)(state_base + vb_offset); - /* Set up a default static partitioning of the URB, which is supposed to - * allow anything we would want to do, at potentially lower performance. + /* For 3D, the VS must have 8, 12, 16, 24, or 32 VUEs allocated to it. + * A VUE consists of a 256-bit vertex header followed by the vertex data, + * which in our case is 4 floats (128 bits), thus a single 512-bit URB + * entry. */ -#define URB_VS_ENTRIES 3 +#define URB_VS_ENTRIES 8 #define URB_VS_ENTRY_SIZE 1 #define URB_GS_ENTRIES 0 @@ -3018,7 +3020,10 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, /* Set up the vertex shader to be disabled (passthrough) */ memset(vs_state, 0, sizeof(*vs_state)); + vs_state->thread4.nr_urb_entries = URB_VS_ENTRIES; + vs_state->thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1; vs_state->vs6.vs_enable = 0; + vs_state->vs6.vert_cache_disable = 1; /* Set up the SF kernel to do coord interp: for each attribute, * calculate dA/dx and dA/dy. Hand these interpolation coefficients From bc6a2bb7576a7c1e7971f6d1e0b893b2ada1aaa3 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 2 Aug 2006 20:34:57 -0700 Subject: [PATCH 57/70] Remove the clip URB allocation. Previously, the VS was misconfigured and exceeding its allocation, which the (unused) clip was providing padding for. --- src/i830_video.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index f2b12b81..5e5c937f 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2902,8 +2902,8 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, #define URB_GS_ENTRIES 0 #define URB_GS_ENTRY_SIZE 0 -#define URB_CLIP_ENTRIES 6 -#define URB_CLIP_ENTRY_SIZE 5 +#define URB_CLIP_ENTRIES 0 +#define URB_CLIP_ENTRY_SIZE 0 #define URB_SF_ENTRIES 8 #define URB_SF_ENTRY_SIZE 11 From 7a64e14624514ef31f6fa9f15e8804c45f930212 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 2 Aug 2006 20:48:13 -0700 Subject: [PATCH 58/70] Crank down the SF allocation and comment on why this is a fine lower limit. --- src/i830_video.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index 5e5c937f..76b35fcb 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2905,8 +2905,13 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, #define URB_CLIP_ENTRIES 0 #define URB_CLIP_ENTRY_SIZE 0 -#define URB_SF_ENTRIES 8 -#define URB_SF_ENTRY_SIZE 11 + /* The SF kernel we use outputs only 4 256-bit registers, leading to an + * entry size of 2 512-bit URBs. We don't need to have many entries to + * output as we're generally working on large rectangles and don't care + * about having WM threads running on different rectangles simultaneously. + */ +#define URB_SF_ENTRIES 1 +#define URB_SF_ENTRY_SIZE 2 #define URB_CS_ENTRIES 0 #define URB_CS_ENTRY_SIZE 0 From aefa6fdfc5300546caeb64ace14a7854d3dc7dae Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 2 Aug 2006 21:14:14 -0700 Subject: [PATCH 59/70] Clean up GRF allocation (which was wrong at 16-register boundaries). Also use PS_MAX_THREADS rather than hard-coding 1 thread, and remove the dead SF_KERNEL_NUM_URB macro. --- src/i830_video.c | 30 ++++++++++-------------------- 1 file changed, 10 insertions(+), 20 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index 76b35fcb..6ded1267 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2643,16 +2643,12 @@ static const CARD32 sip_kernel_static[][4] = { /* * this program computes dA/dx and dA/dy for the texture coordinates along - * with the base texture coordinate. It was extracted from the Mesa driver + * with the base texture coordinate. It was extracted from the Mesa driver. + * It uses about 10 GRF registers. */ -#define SF_KERNEL_NUM_GRF 10 -#define SF_KERNEL_NUM_URB 8 -#if 0 -#define SF_MAX_THREADS MIN(12, URB_SF_ENTRIES / 2) -#else +#define SF_KERNEL_NUM_GRF 16 #define SF_MAX_THREADS 1 -#endif static const CARD32 sf_kernel_static[][4] = { /* send 0 (1) g6<1>F g1.12<0,1,0>F math mlen 1 rlen 1 { align1 + } */ @@ -2697,17 +2693,11 @@ static const CARD32 sf_kernel_static[][4] = { * values (bright pink). */ -/* - * I am reasonably sure these values are bogus - * but, they do appear to work. Learning precisely what - * values belong here should improve performance by - * increasing the number of threads that will be able to run - * in parallel. - */ +/* Our PS kernel uses less than 32 GRF registers (about 20) */ +#define PS_KERNEL_NUM_GRF 32 +#define PS_MAX_THREADS 1 -#define PS_KERNEL_NUM_GRF 20 -#define PS_KERNEL_NUM_URB 8 -#define PS_MAX_THREADS 1 /* MIN(12, PS_KERNEL_NUM_URB / 2) */ +#define BRW_GRF_BLOCKS(nreg) ((nreg + 15) / 16 - 1) static const CARD32 ps_kernel_static[][4] = { #include "wm_prog.h" @@ -3042,7 +3032,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, #endif sf_state->thread0.kernel_start_pointer = (state_base_offset + sf_kernel_offset) >> 6; - sf_state->thread0.grf_reg_count = ((SF_KERNEL_NUM_GRF & ~15) / 16); + sf_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(SF_KERNEL_NUM_GRF); sf_state->sf1.single_program_flow = 1; /* XXX */ sf_state->sf1.binding_table_entry_count = 0; sf_state->sf1.thread_priority = 0; @@ -3088,7 +3078,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, memset (wm_state, 0, sizeof (*wm_state)); wm_state->thread0.kernel_start_pointer = (state_base_offset + ps_kernel_offset) >> 6; - wm_state->thread0.grf_reg_count = ((PS_KERNEL_NUM_GRF & ~15) / 16); + wm_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(PS_KERNEL_NUM_GRF); wm_state->thread1.single_program_flow = 1; /* XXX */ wm_state->thread1.binding_table_entry_count = 2; wm_state->thread2.scratch_space_base_pointer = 0; /* XXX */ @@ -3101,7 +3091,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, wm_state->wm4.stats_enable = 1; wm_state->wm4.sampler_state_pointer = (state_base_offset + src_sampler_offset) >> 5; wm_state->wm4.sampler_count = 1; /* XXX 1-4 samplers used */ - wm_state->wm5.max_threads = 0; /* XXX should be PS_MAX_THREADS */ + wm_state->wm5.max_threads = PS_MAX_THREADS - 1; wm_state->wm5.thread_dispatch_enable = 1; wm_state->wm5.enable_16_pix = 1; wm_state->wm5.enable_8_pix = 0; From f9e94c17c55e4c75802d8574c908744e286e7843 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 2 Aug 2006 21:18:19 -0700 Subject: [PATCH 60/70] Set the WM scratch space that we had already allocated. It appears to be required, even if the kernel doesn't use any scratch space. --- src/i830_video.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index 6ded1267..e4950424 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -3081,8 +3081,12 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, wm_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(PS_KERNEL_NUM_GRF); wm_state->thread1.single_program_flow = 1; /* XXX */ wm_state->thread1.binding_table_entry_count = 2; - wm_state->thread2.scratch_space_base_pointer = 0; /* XXX */ - wm_state->thread2.per_thread_scratch_space = 0; /* XXX */ + /* Though we never use the scratch space in our WM kernel, it has to be + * set, and the minimum allocation is 1024 bytes. + */ + wm_state->thread2.scratch_space_base_pointer = (state_base_offset + + wm_scratch_offset) >> 10; + wm_state->thread2.per_thread_scratch_space = 0; /* 1024 bytes */ wm_state->thread3.dispatch_grf_start_reg = 3; /* XXX */ wm_state->thread3.urb_entry_read_length = 1; /* XXX */ wm_state->thread3.const_urb_entry_read_length = 0; /* XXX */ From ad2c70b4121121f1fb53190ea49edf2323c804a9 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 3 Aug 2006 12:47:19 -0700 Subject: [PATCH 61/70] Remove some stale XXX-prefixed comments. --- src/i830_video.c | 19 +++---------------- 1 file changed, 3 insertions(+), 16 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index e4950424..7a426db6 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -3058,19 +3058,6 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, sf_state->sf6.dest_org_vbias = 0x8; sf_state->sf6.dest_org_hbias = 0x8; - /* XXX: Set up the PS kernel (dispatched by WM) for converting YUV to RGB. - * The 3D driver does this as: - * - CONST C0 = { -.5, -.0625, -.5, 1.164 } - CONST C1 = { 1.596, -0.813, 2.018, -.391 } - UYV = TEX ... - UYV.xyz = ADD UYV, C0 - UYV.y = MUL UYV.y, C0.w - RGB.xyz = MAD UYV.xxz, C1, UYV.y - RGB.y = MAD UYV.z, C1.w, RGB.y - * - */ - memcpy (ps_kernel, ps_kernel_static, sizeof (ps_kernel_static)); #if 0 ErrorF ("ps kernel: 0x%08x\n", state_base_offset + ps_kernel_offset); @@ -3088,13 +3075,13 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, wm_scratch_offset) >> 10; wm_state->thread2.per_thread_scratch_space = 0; /* 1024 bytes */ wm_state->thread3.dispatch_grf_start_reg = 3; /* XXX */ + wm_state->thread3.const_urb_entry_read_length = 0; + wm_state->thread3.const_urb_entry_read_offset = 0; wm_state->thread3.urb_entry_read_length = 1; /* XXX */ - wm_state->thread3.const_urb_entry_read_length = 0; /* XXX */ - wm_state->thread3.const_urb_entry_read_offset = 0; /* XXX */ wm_state->thread3.urb_entry_read_offset = 0; /* XXX */ wm_state->wm4.stats_enable = 1; wm_state->wm4.sampler_state_pointer = (state_base_offset + src_sampler_offset) >> 5; - wm_state->wm4.sampler_count = 1; /* XXX 1-4 samplers used */ + wm_state->wm4.sampler_count = 1; /* 1-4 samplers used */ wm_state->wm5.max_threads = PS_MAX_THREADS - 1; wm_state->wm5.thread_dispatch_enable = 1; wm_state->wm5.enable_16_pix = 1; From 4525379d95ff292d7322e1a7a516c0bedd1f7543 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 3 Aug 2006 16:03:15 -0700 Subject: [PATCH 62/70] Make the sampler's payload be the WM payload rather than uninitialized data. The sampler's payload happens to be in the same format as the WM payload, though most of the fields are ignored. This appears to fix the program in the presence of multiple PS threads. --- src/wm_prog.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/wm_prog.h b/src/wm_prog.h index a8391c4d..297ddcbf 100644 --- a/src/wm_prog.h +++ b/src/wm_prog.h @@ -95,8 +95,8 @@ { 0x00600001, 0x206003be, 0x008d00c0, 0x00000000 }, /* mov (8) m4<1>F g7<8,8,1>F { align1 + } */ { 0x00600001, 0x208003be, 0x008d00e0, 0x00000000 }, -/* send 0 (16) g12<1>UW g8<8,8,1>UW sampler mlen 5 rlen 8 { align1 + } */ - { 0x00800031, 0x21801d29, 0x008d0100, 0x02580001 }, +/* send 0 (16) g12<1>UW g0<8,8,1>UW sampler mlen 5 rlen 8 { align1 + } */ + { 0x00800031, 0x21801d29, 0x008d0000, 0x02580001 }, /* mov (8) g19<1>UW g19<8,8,1>UW { align1 + } */ { 0x00600001, 0x22600129, 0x008d0260, 0x00000000 }, /* add (8) g14<1>F g14<8,8,1>F -0.0627451{ align1 + } */ From d56ffa5f35e3cf4262d66469052b2122fdb24027 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 3 Aug 2006 16:03:50 -0700 Subject: [PATCH 63/70] Bump PS_MAX_THREADS to 32 now that the program doesn't fail. --- src/i830_video.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/i830_video.c b/src/i830_video.c index 7a426db6..107818bc 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2695,7 +2695,7 @@ static const CARD32 sf_kernel_static[][4] = { /* Our PS kernel uses less than 32 GRF registers (about 20) */ #define PS_KERNEL_NUM_GRF 32 -#define PS_MAX_THREADS 1 +#define PS_MAX_THREADS 32 #define BRW_GRF_BLOCKS(nreg) ((nreg + 15) / 16 - 1) From 760021e3983f7783900075b8c9603bd4fbe7e0a2 Mon Sep 17 00:00:00 2001 From: Alan Hourihane Date: Thu, 3 Aug 2006 17:08:39 -0700 Subject: [PATCH 64/70] Add current Tungsten Graphics code drop for i965 support. --- src/common.h | 23 +++- src/i810_driver.c | 12 ++ src/i810_reg.h | 75 ++++++++++- src/i830.h | 11 +- src/i830_accel.c | 75 ++++++++++- src/i830_common.h | 8 +- src/i830_cursor.c | 104 +++++++++++----- src/i830_dri.c | 39 ++++-- src/i830_dri.h | 30 ----- src/i830_driver.c | 312 ++++++++++++++++++++++++++++++++++++++++------ src/i830_memory.c | 79 +++++++++--- src/i830_video.c | 122 +++++++++++------- 12 files changed, 705 insertions(+), 185 deletions(-) diff --git a/src/common.h b/src/common.h index 31e67b90..1e3327c6 100644 --- a/src/common.h +++ b/src/common.h @@ -277,6 +277,26 @@ extern int I810_DEBUG; #define PCI_CHIP_I945_GM_BRIDGE 0x27A0 #endif +#ifndef PCI_CHIP_I965_G_1 +#define PCI_CHIP_I965_G_1 0x2982 +#define PCI_CHIP_I965_G_1_BRIDGE 0x2980 +#endif + +#ifndef PCI_CHIP_I965_Q +#define PCI_CHIP_I965_Q 0x2992 +#define PCI_CHIP_I965_Q_BRIDGE 0x2990 +#endif + +#ifndef PCI_CHIP_I965_G +#define PCI_CHIP_I965_G 0x29A2 +#define PCI_CHIP_I965_G_BRIDGE 0x29A0 +#endif + +#ifndef PCI_CHIP_I946_GZ +#define PCI_CHIP_I946_GZ 0x2972 +#define PCI_CHIP_I946_GZ_BRIDGE 0x2970 +#endif + #define IS_I810(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I810 || \ pI810->PciInfo->chipType == PCI_CHIP_I810_DC100 || \ pI810->PciInfo->chipType == PCI_CHIP_I810_E) @@ -292,7 +312,8 @@ extern int I810_DEBUG; #define IS_I915GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I915_GM) #define IS_I945G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I945_G) #define IS_I945GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I945_GM) -#define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810)) +#define IS_I965G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I965_G || pI810->PciInfo->chipType == PCI_CHIP_I965_G_1 || pI810->PciInfo->chipType == PCI_CHIP_I965_Q || pI810->PciInfo->chipType == PCI_CHIP_I946_GZ) +#define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810) || IS_I965G(pI810)) #define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || IS_I915GM(pI810) || IS_I945GM(pI810)) diff --git a/src/i810_driver.c b/src/i810_driver.c index 7d854df2..cef6d180 100644 --- a/src/i810_driver.c +++ b/src/i810_driver.c @@ -140,6 +140,10 @@ static SymTabRec I810Chipsets[] = { {PCI_CHIP_I915_GM, "915GM"}, {PCI_CHIP_I945_G, "945G"}, {PCI_CHIP_I945_GM, "945GM"}, + {PCI_CHIP_I965_G, "965G"}, + {PCI_CHIP_I965_G_1, "965G"}, + {PCI_CHIP_I965_Q, "965Q"}, + {PCI_CHIP_I946_GZ, "946GZ"}, {-1, NULL} }; @@ -159,6 +163,10 @@ static PciChipsets I810PciChipsets[] = { {PCI_CHIP_I915_GM, PCI_CHIP_I915_GM, RES_SHARED_VGA}, {PCI_CHIP_I945_G, PCI_CHIP_I945_G, RES_SHARED_VGA}, {PCI_CHIP_I945_GM, PCI_CHIP_I945_GM, RES_SHARED_VGA}, + {PCI_CHIP_I965_G, PCI_CHIP_I965_G, RES_SHARED_VGA}, + {PCI_CHIP_I965_G_1, PCI_CHIP_I965_G_1, RES_SHARED_VGA}, + {PCI_CHIP_I965_Q, PCI_CHIP_I965_Q, RES_SHARED_VGA}, + {PCI_CHIP_I946_GZ, PCI_CHIP_I946_GZ, RES_SHARED_VGA}, {-1, -1, RES_UNDEFINED } }; @@ -578,6 +586,10 @@ I810Probe(DriverPtr drv, int flags) case PCI_CHIP_I915_GM: case PCI_CHIP_I945_G: case PCI_CHIP_I945_GM: + case PCI_CHIP_I965_G: + case PCI_CHIP_I965_G_1: + case PCI_CHIP_I965_Q: + case PCI_CHIP_I946_GZ: xf86SetEntitySharable(usedChips[i]); /* Allocate an entity private if necessary */ diff --git a/src/i810_reg.h b/src/i810_reg.h index e52375f8..ffa53d3a 100644 --- a/src/i810_reg.h +++ b/src/i810_reg.h @@ -293,8 +293,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define STATE_VAR_UPDATE_DISABLE 0x02 #define PAL_STIP_DISABLE 0x01 -#define INST_DONE 0x2090 -#define INST_PS 0x20c4 #define MEMMODE 0x20dc @@ -303,6 +301,66 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ #define IPEIR 0x2088 #define IPEHR 0x208C +#define INST_DONE 0x2090 +#define INST_PS 0x20c4 +#define IPEIR_I965 0x2064 /* i965 */ +#define IPEHR_I965 0x2068 /* i965 */ +#define INST_DONE_I965 0x206c +#define INST_PS_I965 0x2070 +#define ACTHD 0x2074 +#define DMA_FADD_P 0x2078 +#define INST_DONE_1 0x207c + +#define CACHE_MODE_0 0x2120 +#define CACHE_MODE_1 0x2124 +#define MI_ARB_STATE 0x20e4 + +#define WIZ_CTL 0x7c00 +#define WIZ_CTL_SINGLE_SUBSPAN (1<<6) +#define WIZ_CTL_IGNORE_STALLS (1<<5) + +#define SVG_WORK_CTL 0x7408 + +#define TS_CTL 0x7e00 +#define TS_MUX_ERR_CODE (0<<8) +#define TS_MUX_URB_0 (1<<8) +#define TS_MUX_DISPATCH_ID_0 (10<<8) +#define TS_MUX_ERR_CODE_VALID (15<<8) +#define TS_MUX_TID_0 (16<<8) +#define TS_MUX_EUID_0 (18<<8) +#define TS_MUX_FFID_0 (22<<8) +#define TS_MUX_EOT (26<<8) +#define TS_MUX_SIDEBAND_0 (27<<8) +#define TS_SNAP_ALL_CHILD (1<<2) +#define TS_SNAP_ALL_ROOT (1<<1) +#define TS_SNAP_ENABLE (1<<0) + +#define TS_DEBUG_DATA 0x7e0c + +#define TD_CTL 0x8000 +#define TD_CTL2 0x8004 + + +#define ECOSKPD 0x21d0 +#define EXCC 0x2028 + +/* I965 debug regs: + */ +#define IA_VERTICES_COUNT_QW 0x2310 +#define IA_PRIMITIVES_COUNT_QW 0x2318 +#define VS_INVOCATION_COUNT_QW 0x2320 +#define GS_INVOCATION_COUNT_QW 0x2328 +#define GS_PRIMITIVES_COUNT_QW 0x2330 +#define CL_INVOCATION_COUNT_QW 0x2338 +#define CL_PRIMITIVES_COUNT_QW 0x2340 +#define PS_INVOCATION_COUNT_QW 0x2348 +#define PS_DEPTH_COUNT_QW 0x2350 +#define TIMESTAMP_QW 0x2358 +#define CLKCMP_QW 0x2360 + + + + /* General error reporting regs, p296 @@ -366,6 +424,13 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define FENCE 0x2000 #define FENCE_NR 8 +#define FENCE_NEW 0x3000 +#define FENCE_NEW_NR 16 + +#define FENCE_LINEAR 0 +#define FENCE_XMAJOR 1 +#define FENCE_YMAJOR 2 + #define I915G_FENCE_START_MASK 0x0ff00000 #define I830_FENCE_START_MASK 0x07f80000 @@ -772,6 +837,12 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define DSPBPOS 0x7118C #define DSPBSIZE 0x71190 +#define DSPASURF 0x7019C +#define DSPATILEOFF 0x701A4 + +#define DSPBSURF 0x7119C +#define DSPBTILEOFF 0x711A4 + /* Various masks for reserved bits, etc. */ #define I830_FWATER1_MASK (~((1<<11)|(1<<10)|(1<<9)| \ (1<<8)|(1<<26)|(1<<25)|(1<<24)|(1<<5)|(1<<4)|(1<<3)| \ diff --git a/src/i830.h b/src/i830.h index 14e921d1..0234ff55 100644 --- a/src/i830.h +++ b/src/i830.h @@ -141,7 +141,7 @@ typedef struct { } I830RingBuffer; typedef struct { - unsigned int Fence[8]; + unsigned int Fence[FENCE_NEW_NR * 2]; } I830RegRec, *I830RegPtr; typedef struct { @@ -238,6 +238,12 @@ typedef struct _I830Rec { int TexGranularity; int drmMinor; Bool have3DWindows; + + unsigned int front_tiled; + unsigned int back_tiled; + unsigned int depth_tiled; + unsigned int rotated_tiled; + unsigned int rotated2_tiled; #endif Bool NeedRingBufferLow; @@ -377,6 +383,9 @@ typedef struct _I830Rec { Bool devicePresence; OsTimerPtr devicesTimer; + + CARD32 savedAsurf; + CARD32 savedBsurf; } I830Rec; #define I830PTR(p) ((I830Ptr)((p)->driverPrivate)) diff --git a/src/i830_accel.c b/src/i830_accel.c index a11f64b9..aa43cbec 100644 --- a/src/i830_accel.c +++ b/src/i830_accel.c @@ -133,6 +133,7 @@ void I830Sync(ScrnInfoPtr pScrn) { I830Ptr pI830 = I830PTR(pScrn); + int flags = MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE; if (I810_DEBUG & (DEBUG_VERBOSE_ACCEL | DEBUG_VERBOSE_SYNC)) ErrorF("I830Sync\n"); @@ -147,13 +148,17 @@ I830Sync(ScrnInfoPtr pScrn) if (pI830->entityPrivate && !pI830->entityPrivate->RingRunning) return; + if (IS_I965G(pI830)) + flags = 0; + /* Send a flush instruction and then wait till the ring is empty. * This is stronger than waiting for the blitter to finish as it also * flushes the internal graphics caches. */ + { BEGIN_LP_RING(2); - OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE); + OUT_RING(MI_FLUSH | flags); OUT_RING(MI_NOOP); /* pad to quadword */ ADVANCE_LP_RING(); } @@ -168,9 +173,13 @@ void I830EmitFlush(ScrnInfoPtr pScrn) { I830Ptr pI830 = I830PTR(pScrn); + int flags = MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE; + + if (IS_I965G(pI830)) + flags = 0; BEGIN_LP_RING(2); - OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE); + OUT_RING(MI_FLUSH | flags); OUT_RING(MI_NOOP); /* pad to quadword */ ADVANCE_LP_RING(); } @@ -386,6 +395,28 @@ I830AccelInit(ScreenPtr pScreen) return XAAInit(pScreen, infoPtr); } +static unsigned int +CheckTiling(ScrnInfoPtr pScrn) +{ + I830Ptr pI830 = I830PTR(pScrn); + unsigned int tiled = 0; + + /* Check tiling */ + if (IS_I965G(pI830)) { + if (pI830->bufferOffset == pScrn->fbOffset && pI830->front_tiled == FENCE_XMAJOR) + tiled = 1; + if (pI830->bufferOffset == pI830->RotatedMem.Start && pI830->rotated_tiled == FENCE_XMAJOR) + tiled = 1; + if (pI830->bufferOffset == pI830->BackBuffer.Start && pI830->back_tiled == FENCE_XMAJOR) + tiled = 1; + /* not really supported as it's always YMajor tiled */ + if (pI830->bufferOffset == pI830->DepthBuffer.Start && pI830->depth_tiled == FENCE_XMAJOR) + tiled = 1; + } + + return tiled; +} + void I830SetupForSolidFill(ScrnInfoPtr pScrn, int color, int rop, unsigned int planemask) @@ -439,6 +470,9 @@ I830SubsequentSolidFillRect(ScrnInfoPtr pScrn, int x, int y, int w, int h) ADVANCE_LP_RING(); } + + if (IS_I965G(pI830)) + I830EmitFlush(pScrn); } void @@ -473,6 +507,7 @@ I830SubsequentScreenToScreenCopy(ScrnInfoPtr pScrn, int src_x1, int src_y1, { I830Ptr pI830 = I830PTR(pScrn); int dst_x2, dst_y2; + unsigned int tiled = CheckTiling(pScrn); if (I810_DEBUG & DEBUG_VERBOSE_ACCEL) ErrorF("I830SubsequentScreenToScreenCopy %d,%d - %d,%d %dx%d\n", @@ -481,14 +516,18 @@ I830SubsequentScreenToScreenCopy(ScrnInfoPtr pScrn, int src_x1, int src_y1, dst_x2 = dst_x1 + w; dst_y2 = dst_y1 + h; + if (tiled) + pI830->BR[13] = ((pI830->BR[13] & 0xFFFF) >> 2) | + (pI830->BR[13] & 0xFFFF0000); + { BEGIN_LP_RING(8); if (pScrn->bitsPerPixel == 32) { OUT_RING(XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); + XY_SRC_COPY_BLT_WRITE_RGB | tiled << 15 | tiled << 11); } else { - OUT_RING(XY_SRC_COPY_BLT_CMD); + OUT_RING(XY_SRC_COPY_BLT_CMD | tiled << 15 | tiled << 11); } OUT_RING(pI830->BR[13]); OUT_RING((dst_y1 << 16) | (dst_x1 & 0xffff)); @@ -500,6 +539,9 @@ I830SubsequentScreenToScreenCopy(ScrnInfoPtr pScrn, int src_x1, int src_y1, ADVANCE_LP_RING(); } + + if (IS_I965G(pI830)) + I830EmitFlush(pScrn); } static void @@ -541,6 +583,7 @@ I830SubsequentMono8x8PatternFillRect(ScrnInfoPtr pScrn, int pattx, int patty, { I830Ptr pI830 = I830PTR(pScrn); int x1, x2, y1, y2; + unsigned int tiled = CheckTiling(pScrn); x1 = x; x2 = x + w; @@ -550,16 +593,22 @@ I830SubsequentMono8x8PatternFillRect(ScrnInfoPtr pScrn, int pattx, int patty, if (I810_DEBUG & DEBUG_VERBOSE_ACCEL) ErrorF("I830SubsequentMono8x8PatternFillRect\n"); + if (tiled) + pI830->BR[13] = ((pI830->BR[13] & 0xFFFF) >> 2) | + (pI830->BR[13] & 0xFFFF0000); + { BEGIN_LP_RING(10); if (pScrn->bitsPerPixel == 32) { OUT_RING(XY_MONO_PAT_BLT_CMD | XY_MONO_PAT_BLT_WRITE_ALPHA | XY_MONO_PAT_BLT_WRITE_RGB | + tiled << 11 | ((patty << 8) & XY_MONO_PAT_VERT_SEED) | ((pattx << 12) & XY_MONO_PAT_HORT_SEED)); } else { OUT_RING(XY_MONO_PAT_BLT_CMD | + tiled << 11 | ((patty << 8) & XY_MONO_PAT_VERT_SEED) | ((pattx << 12) & XY_MONO_PAT_HORT_SEED)); } @@ -574,6 +623,9 @@ I830SubsequentMono8x8PatternFillRect(ScrnInfoPtr pScrn, int pattx, int patty, OUT_RING(0); ADVANCE_LP_RING(); } + + if (IS_I965G(pI830)) + I830EmitFlush(pScrn); } static void @@ -649,6 +701,7 @@ static void I830SubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno) { I830Ptr pI830 = I830PTR(pScrn); + unsigned int tiled = CheckTiling(pScrn); if (pI830->init == 0) { pI830->BR[12] = (pI830->AccelInfoRec->ScanlineColorExpandBuffers[0] - @@ -666,14 +719,19 @@ I830SubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno) ErrorF("I830SubsequentColorExpandScanline %d (addr %x)\n", bufno, pI830->BR[12]); + if (tiled) + pI830->BR[13] = ((pI830->BR[13] & 0xFFFF) >> 2) | + (pI830->BR[13] & 0xFFFF0000); + { BEGIN_LP_RING(8); if (pScrn->bitsPerPixel == 32) { OUT_RING(XY_MONO_SRC_BLT_CMD | XY_MONO_SRC_BLT_WRITE_ALPHA | + tiled << 11 | XY_MONO_SRC_BLT_WRITE_RGB); } else { - OUT_RING(XY_MONO_SRC_BLT_CMD); + OUT_RING(XY_MONO_SRC_BLT_CMD | tiled << 11); } OUT_RING(pI830->BR[13]); OUT_RING(0); /* x1 = 0, y1 = 0 */ @@ -690,6 +748,9 @@ I830SubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno) */ pI830->BR[9] += pScrn->displayWidth * pI830->cpp; I830GetNextScanlineColorExpandBuffer(pScrn); + + if (IS_I965G(pI830)) + I830EmitFlush(pScrn); } #if DO_SCANLINE_IMAGE_WRITE @@ -741,6 +802,7 @@ static void I830SubsequentImageWriteScanline(ScrnInfoPtr pScrn, int bufno) { I830Ptr pI830 = I830PTR(pScrn); + unsigned int tiled = CheckTiling(pScrn); if (pI830->init == 0) { pI830->BR[12] = (pI830->AccelInfoRec->ScanlineColorExpandBuffers[0] - @@ -763,9 +825,10 @@ I830SubsequentImageWriteScanline(ScrnInfoPtr pScrn, int bufno) if (pScrn->bitsPerPixel == 32) { OUT_RING(XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA | + tiled << 11 | XY_SRC_COPY_BLT_WRITE_RGB); } else { - OUT_RING(XY_SRC_COPY_BLT_CMD); + OUT_RING(XY_SRC_COPY_BLT_CMD | tiled << 11); } OUT_RING(pI830->BR[13]); OUT_RING(0); /* x1 = 0, y1 = 0 */ diff --git a/src/i830_common.h b/src/i830_common.h index a27bc011..c3ef4cde 100644 --- a/src/i830_common.h +++ b/src/i830_common.h @@ -84,7 +84,7 @@ typedef struct { drmTextureRegion texList[I830_NR_TEX_REGIONS+1]; int last_upload; /* last time texture was uploaded */ int last_enqueue; /* last time a buffer was enqueued */ - int last_dispatch; /* age of the most recently dispatched buffer */ + volatile int last_dispatch; /* age of the most recently dispatched buffer */ int ctxOwner; /* last context to upload state */ int texAge; int pf_enabled; /* is pageflipping allowed? */ @@ -115,6 +115,12 @@ typedef struct { int rotated_size; int rotated_pitch; int virtualX, virtualY; + + unsigned int front_tiled; + unsigned int back_tiled; + unsigned int depth_tiled; + unsigned int rotated_tiled; + unsigned int rotated2_tiled; } drmI830Sarea; /* Flags for perf_boxes diff --git a/src/i830_cursor.c b/src/i830_cursor.c index e465b98c..9f22a664 100644 --- a/src/i830_cursor.c +++ b/src/i830_cursor.c @@ -91,32 +91,46 @@ I830InitHWCursor(ScrnInfoPtr pScrn) temp = INREG(CURSOR_A_CONTROL); temp &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE | MCURSOR_MEM_TYPE_LOCAL | MCURSOR_PIPE_SELECT); + if(pI830->CursorIsARGB) + temp |= MCURSOR_GAMMA_ENABLE; temp |= CURSOR_MODE_DISABLE; temp |= (pI830->pipe << 28); - if(pI830->CursorIsARGB) - temp |= MCURSOR_GAMMA_ENABLE; /* Need to set control, then address. */ OUTREG(CURSOR_A_CONTROL, temp); - if (pI830->CursorIsARGB) - OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Physical); - else - OUTREG(CURSOR_A_BASE, pI830->CursorMem->Physical); + if (pI830->CursorNeedsPhysical) { + if (pI830->CursorIsARGB) + OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Physical); + else + OUTREG(CURSOR_A_BASE, pI830->CursorMem->Physical); + } else { + if (pI830->CursorIsARGB) + OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Start); + else + OUTREG(CURSOR_A_BASE, pI830->CursorMem->Start); + } if (pI830->Clone) { temp &= ~MCURSOR_PIPE_SELECT; temp |= (!pI830->pipe << 28); OUTREG(CURSOR_B_CONTROL, temp); - if (pI830->CursorIsARGB) - OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Physical); - else - OUTREG(CURSOR_B_BASE, pI830->CursorMem->Physical); + if (pI830->CursorNeedsPhysical) { + if (pI830->CursorIsARGB) + OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Physical); + else + OUTREG(CURSOR_B_BASE, pI830->CursorMem->Physical); + } else { + if (pI830->CursorIsARGB) + OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Start); + else + OUTREG(CURSOR_B_BASE, pI830->CursorMem->Start); + } } } else { temp = INREG(CURSOR_CONTROL); temp &= ~(CURSOR_FORMAT_MASK | CURSOR_GAMMA_ENABLE | CURSOR_ENABLE | CURSOR_STRIDE_MASK); temp |= (CURSOR_FORMAT_3C); - if (pI830->CursorIsARGB) - temp |= CURSOR_GAMMA_ENABLE; + if(pI830->CursorIsARGB) + temp |= CURSOR_GAMMA_ENABLE; /* This initialises the format and leave the cursor disabled. */ OUTREG(CURSOR_CONTROL, temp); /* Need to set address and size after disabling. */ @@ -451,15 +465,29 @@ I830SetCursorPosition(ScrnInfoPtr pScrn, int x, int y) /* have to upload the base for the new position */ if (IS_I9XX(pI830)) { - if (pI830->CursorIsARGB) - OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Physical); - else - OUTREG(CURSOR_A_BASE, pI830->CursorMem->Physical); - if (pI830->Clone) { + if (pI830->CursorNeedsPhysical) { if (pI830->CursorIsARGB) - OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Physical); + OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Physical); else - OUTREG(CURSOR_B_BASE, pI830->CursorMem->Physical); + OUTREG(CURSOR_A_BASE, pI830->CursorMem->Physical); + } else { + if (pI830->CursorIsARGB) + OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Start); + else + OUTREG(CURSOR_A_BASE, pI830->CursorMem->Start); + } + if (pI830->Clone) { + if (pI830->CursorNeedsPhysical) { + if (pI830->CursorIsARGB) + OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Physical); + else + OUTREG(CURSOR_B_BASE, pI830->CursorMem->Physical); + } else { + if (pI830->CursorIsARGB) + OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Start); + else + OUTREG(CURSOR_B_BASE, pI830->CursorMem->Start); + } } } } @@ -483,7 +511,7 @@ I830ShowCursor(ScrnInfoPtr pScrn) pI830->cursorOn = TRUE; if (IS_MOBILE(pI830) || IS_I9XX(pI830)) { temp = INREG(CURSOR_A_CONTROL); - temp &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT); + temp &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE | MCURSOR_PIPE_SELECT); if (pI830->CursorIsARGB) temp |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE; else @@ -491,22 +519,36 @@ I830ShowCursor(ScrnInfoPtr pScrn) temp |= (pI830->pipe << 28); /* Connect to correct pipe */ /* Need to set mode, then address. */ OUTREG(CURSOR_A_CONTROL, temp); - if (pI830->CursorIsARGB) - OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Physical); - else - OUTREG(CURSOR_A_BASE, pI830->CursorMem->Physical); + if (pI830->CursorNeedsPhysical) { + if (pI830->CursorIsARGB) + OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Physical); + else + OUTREG(CURSOR_A_BASE, pI830->CursorMem->Physical); + } else { + if (pI830->CursorIsARGB) + OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Start); + else + OUTREG(CURSOR_A_BASE, pI830->CursorMem->Start); + } if (pI830->Clone) { temp &= ~MCURSOR_PIPE_SELECT; temp |= (!pI830->pipe << 28); OUTREG(CURSOR_B_CONTROL, temp); - if (pI830->CursorIsARGB) - OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Physical); - else - OUTREG(CURSOR_B_BASE, pI830->CursorMem->Physical); + if (pI830->CursorNeedsPhysical) { + if (pI830->CursorIsARGB) + OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Physical); + else + OUTREG(CURSOR_B_BASE, pI830->CursorMem->Physical); + } else { + if (pI830->CursorIsARGB) + OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Start); + else + OUTREG(CURSOR_B_BASE, pI830->CursorMem->Start); + } } } else { temp = INREG(CURSOR_CONTROL); - temp &= ~(CURSOR_FORMAT_MASK); + temp &= ~(CURSOR_FORMAT_MASK | CURSOR_GAMMA_ENABLE); temp |= CURSOR_ENABLE; if (pI830->CursorIsARGB) temp |= CURSOR_FORMAT_ARGB | CURSOR_GAMMA_ENABLE; @@ -531,7 +573,7 @@ I830HideCursor(ScrnInfoPtr pScrn) pI830->cursorOn = FALSE; if (IS_MOBILE(pI830) || IS_I9XX(pI830)) { temp = INREG(CURSOR_A_CONTROL); - temp &= ~(CURSOR_MODE|MCURSOR_GAMMA_ENABLE); + temp &= ~CURSOR_MODE; temp |= CURSOR_MODE_DISABLE; OUTREG(CURSOR_A_CONTROL, temp); /* This is needed to flush the above change. */ @@ -548,7 +590,7 @@ I830HideCursor(ScrnInfoPtr pScrn) } } else { temp = INREG(CURSOR_CONTROL); - temp &= ~(CURSOR_ENABLE|CURSOR_GAMMA_ENABLE); + temp &= ~CURSOR_ENABLE; OUTREG(CURSOR_CONTROL, temp); } } diff --git a/src/i830_dri.c b/src/i830_dri.c index 7c5f7956..5c472899 100644 --- a/src/i830_dri.c +++ b/src/i830_dri.c @@ -83,6 +83,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. static char I830KernelDriverName[] = "i915"; static char I830ClientDriverName[] = "i915"; +static char I965ClientDriverName[] = "i965"; static Bool I830InitVisualConfigs(ScreenPtr pScreen); static Bool I830CreateContext(ScreenPtr pScreen, VisualPtr visual, @@ -475,7 +476,11 @@ I830DRIScreenInit(ScreenPtr pScreen) pI830->LockHeld = 0; pDRIInfo->drmDriverName = I830KernelDriverName; - pDRIInfo->clientDriverName = I830ClientDriverName; + if (IS_I965G(pI830)) + pDRIInfo->clientDriverName = I965ClientDriverName; + else + pDRIInfo->clientDriverName = I830ClientDriverName; + if (xf86LoaderCheckSymbol("DRICreatePCIBusID")) { pDRIInfo->busIdString = DRICreatePCIBusID(pI830->PciInfo); } else { @@ -488,7 +493,7 @@ I830DRIScreenInit(ScreenPtr pScreen) pDRIInfo->ddxDriverMajorVersion = I830_MAJOR_VERSION; pDRIInfo->ddxDriverMinorVersion = I830_MINOR_VERSION; pDRIInfo->ddxDriverPatchVersion = I830_PATCHLEVEL; -#if 1 /* temporary until this gets removed from the libdri layer */ +#if 1 /* Remove this soon - see bug 5714 */ pDRIInfo->frameBufferPhysicalAddress = (char *) pI830->LinearAddr + pI830->FrontBuffer.Start; pDRIInfo->frameBufferSize = ROUND_TO_PAGE(pScrn->displayWidth * @@ -623,12 +628,17 @@ I830DRIMapScreenRegions(ScrnInfoPtr pScrn, drmI830Sarea *sarea) ScreenPtr pScreen = pScrn->pScreen; I830Ptr pI830 = I830PTR(pScrn); +#if 1 /* Remove this soon - see bug 5714 */ + pI830->pDRIInfo->frameBufferSize = ROUND_TO_PAGE(pScrn->displayWidth * + pScrn->virtualY * pI830->cpp); +#endif + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[drm] Mapping front buffer\n"); if (drmAddMap(pI830->drmSubFD, (drm_handle_t)(sarea->front_offset + pI830->LinearAddr), sarea->front_size, - DRM_FRAME_BUFFER, /*DRM_AGP,*/ + DRM_AGP, 0, (drmAddress) &sarea->front_handle) < 0) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, @@ -684,12 +694,10 @@ I830DRIUnmapScreenRegions(ScrnInfoPtr pScrn, drmI830Sarea *sarea) { I830Ptr pI830 = I830PTR(pScrn); -#if 1 if (sarea->front_handle) { drmRmMap(pI830->drmSubFD, sarea->front_handle); sarea->front_handle = 0; } -#endif if (sarea->back_handle) { drmRmMap(pI830->drmSubFD, sarea->back_handle); sarea->back_handle = 0; @@ -785,7 +793,6 @@ I830DRIDoMappings(ScreenPtr pScreen) /* screen mappings probably failed */ xf86DrvMsg(pScreen->myNum, X_ERROR, "[drm] drmAddMap(screen mappings) failed. Disabling DRI\n"); - DRICloseScreen(pScreen); return FALSE; } @@ -824,9 +831,6 @@ I830DRIDoMappings(ScreenPtr pScreen) pI830DRI->mem = pScrn->videoRam * 1024; pI830DRI->cpp = pI830->cpp; - pI830DRI->fbOffset = pI830->FrontBuffer.Start; - pI830DRI->fbStride = pI830->backPitch; - pI830DRI->bitsPerPixel = pScrn->bitsPerPixel; pI830DRI->sarea_priv_offset = sizeof(XF86DRISAREARec); @@ -1166,8 +1170,10 @@ I830DRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg, I830SelectBuffer(pScrn, I830_SELECT_BACK); I830SubsequentScreenToScreenCopy(pScrn, x1, y1, destx, desty, w, h); - I830SelectBuffer(pScrn, I830_SELECT_DEPTH); - I830SubsequentScreenToScreenCopy(pScrn, x1, y1, destx, desty, w, h); + if (!IS_I965G(pI830)) { + I830SelectBuffer(pScrn, I830_SELECT_DEPTH); + I830SubsequentScreenToScreenCopy(pScrn, x1, y1, destx, desty, w, h); + } } I830SelectBuffer(pScrn, I830_SELECT_FRONT); I830EmitFlush(pScrn); @@ -1362,6 +1368,14 @@ I830UpdateDRIBuffers(ScrnInfoPtr pScrn, drmI830Sarea *sarea) I830DRIUnmapScreenRegions(pScrn, sarea); + sarea->front_tiled = pI830->front_tiled; + sarea->back_tiled = pI830->back_tiled; + sarea->depth_tiled = pI830->depth_tiled; + sarea->rotated_tiled = pI830->rotated_tiled; +#if 0 + sarea->rotated2_tiled = pI830->rotated2_tiled; +#endif + if (pI830->rotation == RR_Rotate_0) { sarea->front_offset = pI830->FrontBuffer.Start; /* Don't use FrontBuffer.Size here as it includes the pixmap cache area @@ -1421,7 +1435,8 @@ I830UpdateDRIBuffers(ScrnInfoPtr pScrn, drmI830Sarea *sarea) success = I830DRIMapScreenRegions(pScrn, sarea); - I830InitTextureHeap(pScrn, sarea); + if (success) + I830InitTextureHeap(pScrn, sarea); return success; } diff --git a/src/i830_dri.h b/src/i830_dri.h index 31232b80..11987d1d 100644 --- a/src/i830_dri.h +++ b/src/i830_dri.h @@ -18,21 +18,6 @@ typedef struct _I830DRIRec { drm_handle_t regs; drmSize regsSize; - drmSize backbufferSize; - drm_handle_t backbuffer; - - drmSize depthbufferSize; - drm_handle_t depthbuffer; - - drmSize rotatedSize; - drm_handle_t rotatedbuffer; - - drm_handle_t textures; - int textureSize; - - drm_handle_t agp_buffers; - drmSize agp_buf_size; - int deviceID; int width; int height; @@ -40,21 +25,6 @@ typedef struct _I830DRIRec { int cpp; int bitsPerPixel; - int fbOffset; - int fbStride; - - int backOffset; - int backPitch; - - int depthOffset; - int depthPitch; - - int rotatedOffset; - int rotatedPitch; - - int logTextureGranularity; - int textureOffset; - int irq; int sarea_priv_offset; } I830DRIRec, *I830DRIPtr; diff --git a/src/i830_driver.c b/src/i830_driver.c index 5ce88e14..d49e027d 100644 --- a/src/i830_driver.c +++ b/src/i830_driver.c @@ -150,6 +150,11 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. * 09/2005 Alan Hourihane * - Add Intel(R) 945GM support. * + * 10/2005 Alan Hourihane, Keith Whitwell, Brian Paul + * - Added Rotation support + * + * 12/2005 Alan Hourihane, Keith Whitwell + * - Add Intel(R) 965G support. */ #ifdef HAVE_CONFIG_H @@ -204,6 +209,10 @@ static SymTabRec I830BIOSChipsets[] = { {PCI_CHIP_I915_GM, "915GM"}, {PCI_CHIP_I945_G, "945G"}, {PCI_CHIP_I945_GM, "945GM"}, + {PCI_CHIP_I965_G, "965G"}, + {PCI_CHIP_I965_G_1, "965G"}, + {PCI_CHIP_I965_Q, "965Q"}, + {PCI_CHIP_I946_GZ, "946GZ"}, {-1, NULL} }; @@ -217,6 +226,10 @@ static PciChipsets I830BIOSPciChipsets[] = { {PCI_CHIP_I915_GM, PCI_CHIP_I915_GM, RES_SHARED_VGA}, {PCI_CHIP_I945_G, PCI_CHIP_I945_G, RES_SHARED_VGA}, {PCI_CHIP_I945_GM, PCI_CHIP_I945_GM, RES_SHARED_VGA}, + {PCI_CHIP_I965_G, PCI_CHIP_I965_G, RES_SHARED_VGA}, + {PCI_CHIP_I965_G_1, PCI_CHIP_I965_G_1, RES_SHARED_VGA}, + {PCI_CHIP_I965_Q, PCI_CHIP_I965_Q, RES_SHARED_VGA}, + {PCI_CHIP_I946_GZ, PCI_CHIP_I946_GZ, RES_SHARED_VGA}, {-1, -1, RES_UNDEFINED} }; @@ -272,7 +285,7 @@ static OptionInfoRec I830BIOSOptions[] = { static void I830DisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags); -static void I830BIOSAdjustFrame(int scrnIndex, int x, int y, int flags); +static void I830AdjustFrame(int scrnIndex, int x, int y, int flags); static Bool I830BIOSCloseScreen(int scrnIndex, ScreenPtr pScreen); static Bool I830BIOSSaveScreen(ScreenPtr pScreen, int unblack); static Bool I830BIOSEnterVT(int scrnIndex, int flags); @@ -1441,8 +1454,11 @@ I830DetectMemory(ScrnInfoPtr pScrn) gmch_ctrl = pciReadWord(bridge, I830_GMCH_CTRL); /* We need to reduce the stolen size, by the GTT and the popup. - * The GTT varying according the the FbMapSize and the popup is 4KB */ - range = (pI830->FbMapSize / (1024*1024)) + 4; + * The GTT varying according the the FbMapSize and the popup is 4KB. */ + if (IS_I965G(pI830)) + range = 512 + 4; /* Fixed 512KB size for i965 */ + else + range = (pI830->FbMapSize / MB(1)) + 4; if (IS_I85X(pI830) || IS_I865G(pI830) || IS_I9XX(pI830)) { switch (gmch_ctrl & I830_GMCH_GMS_MASK) { @@ -1859,7 +1875,7 @@ I830LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices, unsigned char r, g, b; CARD32 val, temp; int palreg; - int dspreg, dspbase; + int dspreg, dspbase, dspsurf; DPRINTF(PFX, "I830LoadPalette: numColors: %d\n", numColors); pI830 = I830PTR(pScrn); @@ -1868,10 +1884,12 @@ I830LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices, palreg = PALETTE_A; dspreg = DSPACNTR; dspbase = DSPABASE; + dspsurf = DSPASURF; } else { palreg = PALETTE_B; dspreg = DSPBCNTR; dspbase = DSPBBASE; + dspsurf = DSPBSURF; } /* To ensure gamma is enabled we need to turn off and on the plane */ @@ -1880,6 +1898,8 @@ I830LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices, OUTREG(dspbase, INREG(dspbase)); OUTREG(dspreg, temp | DISPPLANE_GAMMA_ENABLE); OUTREG(dspbase, INREG(dspbase)); + if (IS_I965G(pI830)) + OUTREG(dspsurf, INREG(dspsurf)); /* It seems that an initial read is needed. */ temp = INREG(palreg); @@ -2287,6 +2307,16 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags) case PCI_CHIP_I945_GM: chipname = "945GM"; break; + case PCI_CHIP_I965_G: + case PCI_CHIP_I965_G_1: + chipname = "965G"; + break; + case PCI_CHIP_I965_Q: + chipname = "965Q"; + break; + case PCI_CHIP_I946_GZ: + chipname = "946GZ"; + break; default: chipname = "unknown chipset"; break; @@ -3054,6 +3084,9 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags) else pI830->CursorNeedsPhysical = FALSE; + if (IS_I965G(pI830)) + pI830->CursorNeedsPhysical = FALSE; + /* Force ring buffer to be in low memory for all chipsets */ pI830->NeedRingBufferLow = TRUE; @@ -3608,8 +3641,12 @@ CheckInheritedState(ScrnInfoPtr pScrn) } #if 0 - if (errors) - I830PrintErrorState(pScrn); + if (errors) { + if (IS_I965G(pI830)) + I965PrintErrorState(pScrn); + else + I830PrintErrorState(pScrn); + } #endif if (fatal) @@ -3639,8 +3676,15 @@ ResetState(ScrnInfoPtr pScrn, Bool flush) pI830->entityPrivate->RingRunning = 0; /* Reset the fence registers to 0 */ - for (i = 0; i < 8; i++) - OUTREG(FENCE + i * 4, 0); + if (IS_I965G(pI830)) { + for (i = 0; i < FENCE_NEW_NR; i++) { + OUTREG(FENCE_NEW + i * 8, 0); + OUTREG(FENCE_NEW + 4 + i * 8, 0); + } + } else { + for (i = 0; i < FENCE_NR; i++) + OUTREG(FENCE + i * 4, 0); + } /* Flush the ring buffer (if enabled), then disable it. */ if (pI830->AccelInfoRec != NULL && flush) { @@ -3670,10 +3714,21 @@ SetFenceRegs(ScrnInfoPtr pScrn) if (!I830IsPrimary(pScrn)) return; - for (i = 0; i < 8; i++) { - OUTREG(FENCE + i * 4, pI830->ModeReg.Fence[i]); - if (I810_DEBUG & DEBUG_VERBOSE_VGA) - ErrorF("Fence Register : %x\n", pI830->ModeReg.Fence[i]); + if (IS_I965G(pI830)) { + for (i = 0; i < FENCE_NEW_NR; i++) { + OUTREG(FENCE_NEW + i * 8, pI830->ModeReg.Fence[i]); + OUTREG(FENCE_NEW + 4 + i * 8, pI830->ModeReg.Fence[i+FENCE_NEW_NR]); + if (I810_DEBUG & DEBUG_VERBOSE_VGA) { + ErrorF("Fence Start Register : %x\n", pI830->ModeReg.Fence[i]); + ErrorF("Fence End Register : %x\n", pI830->ModeReg.Fence[i+FENCE_NEW_NR]); + } + } + } else { + for (i = 0; i < FENCE_NR; i++) { + OUTREG(FENCE + i * 4, pI830->ModeReg.Fence[i]); + if (I810_DEBUG & DEBUG_VERBOSE_VGA) + ErrorF("Fence Register : %x\n", pI830->ModeReg.Fence[i]); + } } } @@ -3774,6 +3829,12 @@ SaveHWState(ScrnInfoPtr pScrn) vgaHWSave(pScrn, vgaReg, VGA_SR_FONTS); pVesa = pI830->vesa; + + if (IS_I965G(pI830)) { + pI830->savedAsurf = INREG(DSPASURF); + pI830->savedBsurf = INREG(DSPBSURF); + } + /* * This save/restore method doesn't work for 845G BIOS, or for some * other platforms. Enable it in all cases. @@ -3826,9 +3887,6 @@ RestoreHWState(ScrnInfoPtr pScrn) DPRINTF(PFX, "RestoreHWState\n"); -#ifdef XF86DRI - I830DRISetVBlankInterrupt (pScrn, FALSE); -#endif if (I830IsPrimary(pScrn) && pI830->pipe != pI830->origPipe) SetBIOSPipe(pScrn, pI830->origPipe); else @@ -3887,6 +3945,11 @@ RestoreHWState(ScrnInfoPtr pScrn) VBESetDisplayStart(pVbe, pVesa->x, pVesa->y, TRUE); + if (IS_I965G(pI830)) { + OUTREG(DSPASURF, pI830->savedAsurf); + OUTREG(DSPBSURF, pI830->savedBsurf); + } + vgaHWRestore(pScrn, vgaReg, VGA_SR_FONTS); vgaHWLock(hwp); @@ -4118,6 +4181,25 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) SetPipeAccess(pScrn); +#if 0 + { /* I965G ENABLE TILING */ + planeA = INREG(DSPACNTR) | 1<<10; + OUTREG(DSPACNTR, planeA); + /* flush the change. */ + temp = INREG(DSPABASE); + OUTREG(DSPABASE, temp); + } +#else + { /* I965G DISABLE TILING */ + planeA = INREG(DSPACNTR) & ~1<<10; + OUTREG(DSPACNTR, planeA); + /* flush the change. */ + temp = INREG(DSPABASE); + OUTREG(DSPABASE, temp); + OUTREG(DSPASURF, INREG(DSPASURF)); + } +#endif + if (I830VESASetVBEMode(pScrn, mode, data->block) == FALSE) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Set VBE Mode failed!\n"); return FALSE; @@ -4182,6 +4264,10 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) /* flush the change. */ temp = INREG(DSPABASE); OUTREG(DSPABASE, temp); + if (IS_I965G(pI830)) { + temp = INREG(DSPASURF); + OUTREG(DSPASURF, temp); + } } if (pI830->planeEnabled[1]) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Enabling plane B.\n"); @@ -4192,6 +4278,10 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) /* flush the change. */ temp = INREG(DSPBADDR); OUTREG(DSPBADDR, temp); + if (IS_I965G(pI830)) { + temp = INREG(DSPBSURF); + OUTREG(DSPBSURF, temp); + } } planeA = INREG(DSPACNTR); @@ -4224,6 +4314,7 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) CARD32 stridereg = !pI830->pipe ? DSPASTRIDE : DSPBSTRIDE; CARD32 basereg = !pI830->pipe ? DSPABASE : DSPBBASE; CARD32 sizereg = !pI830->pipe ? DSPASIZE : DSPBSIZE; + CARD32 surfreg = !pI830->pipe ? DSPASURF : DSPBSURF; I830Ptr pI8301 = I830PTR(pI830->entityPrivate->pScrn_1); temp = INREG(stridereg); @@ -4237,12 +4328,17 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) /* Trigger update */ temp = INREG(basereg); OUTREG(basereg, temp); + if (IS_I965G(pI830)) { + temp = INREG(surfreg); + OUTREG(surfreg, temp); + } if (pI830->entityPrivate && pI830->entityPrivate->pScrn_2) { I830Ptr pI8302 = I830PTR(pI830->entityPrivate->pScrn_2); stridereg = pI830->pipe ? DSPASTRIDE : DSPBSTRIDE; basereg = pI830->pipe ? DSPABASE : DSPBBASE; sizereg = pI830->pipe ? DSPASIZE : DSPBSIZE; + surfreg = pI830->pipe ? DSPASURF : DSPBSURF; temp = INREG(stridereg); if (temp / pI8302->cpp != (CARD32)(pI8302->displayWidth)) { @@ -4255,11 +4351,16 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) /* Trigger update */ temp = INREG(basereg); OUTREG(basereg, temp); + if (IS_I965G(pI830)) { + temp = INREG(surfreg); + OUTREG(surfreg, temp); + } } } else { CARD32 stridereg = pI830->pipe ? DSPASTRIDE : DSPBSTRIDE; CARD32 basereg = pI830->pipe ? DSPABASE : DSPBBASE; CARD32 sizereg = pI830->pipe ? DSPASIZE : DSPBSIZE; + CARD32 surfreg = pI830->pipe ? DSPASURF : DSPBSURF; I830Ptr pI8301 = I830PTR(pI830->entityPrivate->pScrn_1); I830Ptr pI8302 = I830PTR(pI830->entityPrivate->pScrn_2); @@ -4274,10 +4375,15 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) /* Trigger update */ temp = INREG(basereg); OUTREG(basereg, temp); + if (IS_I965G(pI830)) { + temp = INREG(surfreg); + OUTREG(surfreg, temp); + } stridereg = !pI830->pipe ? DSPASTRIDE : DSPBSTRIDE; basereg = !pI830->pipe ? DSPABASE : DSPBBASE; sizereg = !pI830->pipe ? DSPASIZE : DSPBSIZE; + surfreg = !pI830->pipe ? DSPASURF : DSPBSURF; temp = INREG(stridereg); if (temp / pI8302->cpp != ((CARD32)pI8302->displayWidth)) { @@ -4290,12 +4396,17 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) /* Trigger update */ temp = INREG(basereg); OUTREG(basereg, temp); + if (IS_I965G(pI830)) { + temp = INREG(surfreg); + OUTREG(surfreg, temp); + } } } else { for (i = 0; i < pI830->availablePipes; i++) { CARD32 stridereg = i ? DSPBSTRIDE : DSPASTRIDE; CARD32 basereg = i ? DSPBBASE : DSPABASE; CARD32 sizereg = i ? DSPBSIZE : DSPASIZE; + CARD32 surfreg = i ? DSPBSURF : DSPASURF; if (!pI830->planeEnabled[i]) continue; @@ -4308,9 +4419,12 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) OUTREG(stridereg, pI830->displayWidth * pI830->cpp); } OUTREG(sizereg, (pMode->HDisplay - 1) | ((pMode->VDisplay - 1) << 16)); - /* Trigger update */ temp = INREG(basereg); OUTREG(basereg, temp); + if (IS_I965G(pI830)) { + temp = INREG(surfreg); + OUTREG(surfreg, temp); + } } } @@ -4413,9 +4527,13 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) SetHWOperatingState(pScrn); #endif -#ifdef XF86DRI - I830DRISetVBlankInterrupt (pScrn, TRUE); +#if 0 + if (IS_I965G(pI830)) + I965PrintErrorState(pScrn); + else + I830PrintErrorState(pScrn); #endif + #ifdef XF86DRI if (didLock) I830DRIUnlock(pScrn); @@ -4469,6 +4587,59 @@ I830PrintErrorState(ScrnInfoPtr pScrn) INREG16(HWSTAM), INREG16(IER), INREG16(IMR), INREG16(IIR)); } +void +I965PrintErrorState(ScrnInfoPtr pScrn) +{ + I830Ptr pI830 = I830PTR(pScrn); + + ErrorF("pgetbl_ctl: 0x%lx pgetbl_err: 0x%lx\n", + INREG(PGETBL_CTL), INREG(PGE_ERR)); + + ErrorF("ipeir: %lx iphdr: %lx\n", INREG(IPEIR_I965), INREG(IPEHR_I965)); + + ErrorF("LP ring tail: %lx head: %lx len: %lx start %lx\n", + INREG(LP_RING + RING_TAIL), + INREG(LP_RING + RING_HEAD) & HEAD_ADDR, + INREG(LP_RING + RING_LEN), INREG(LP_RING + RING_START)); + + ErrorF("Err ID (eir): %x Err Status (esr): %x Err Mask (emr): %x\n", + INREG(EIR), INREG(ESR), INREG(EMR)); + + ErrorF("instdone: %x instdone_1: %x\n", INREG(INST_DONE_I965), INREG(INST_DONE_1)); + ErrorF("instpm: %x\n", INREG(INST_PM)); + + ErrorF("memmode: %lx instps: %lx\n", INREG(MEMMODE), INREG(INST_PS_I965)); + + ErrorF("HW Status mask (hwstam): %x\nIRQ enable (ier): %x imr: %x iir: %x\n", + INREG(HWSTAM), INREG(IER), INREG(IMR), INREG(IIR)); + + ErrorF("acthd: %lx dma_fadd_p: %lx\n", INREG(ACTHD), INREG(DMA_FADD_P)); + ErrorF("ecoskpd: %lx excc: %lx\n", INREG(ECOSKPD), INREG(EXCC)); + + ErrorF("cache_mode: %x/%x\n", INREG(CACHE_MODE_0), INREG(CACHE_MODE_1)); + ErrorF("mi_arb_state: %x\n", INREG(MI_ARB_STATE)); + + ErrorF("IA_VERTICES_COUNT_QW %x/%x\n", INREG(IA_VERTICES_COUNT_QW), INREG(IA_VERTICES_COUNT_QW+4)); + ErrorF("IA_PRIMITIVES_COUNT_QW %x/%x\n", INREG(IA_PRIMITIVES_COUNT_QW), INREG(IA_PRIMITIVES_COUNT_QW+4)); + + ErrorF("VS_INVOCATION_COUNT_QW %x/%x\n", INREG(VS_INVOCATION_COUNT_QW), INREG(VS_INVOCATION_COUNT_QW+4)); + + ErrorF("GS_INVOCATION_COUNT_QW %x/%x\n", INREG(GS_INVOCATION_COUNT_QW), INREG(GS_INVOCATION_COUNT_QW+4)); + ErrorF("GS_PRIMITIVES_COUNT_QW %x/%x\n", INREG(GS_PRIMITIVES_COUNT_QW), INREG(GS_PRIMITIVES_COUNT_QW+4)); + + ErrorF("CL_INVOCATION_COUNT_QW %x/%x\n", INREG(CL_INVOCATION_COUNT_QW), INREG(CL_INVOCATION_COUNT_QW+4)); + ErrorF("CL_PRIMITIVES_COUNT_QW %x/%x\n", INREG(CL_PRIMITIVES_COUNT_QW), INREG(CL_PRIMITIVES_COUNT_QW+4)); + + ErrorF("PS_INVOCATION_COUNT_QW %x/%x\n", INREG(PS_INVOCATION_COUNT_QW), INREG(PS_INVOCATION_COUNT_QW+4)); + ErrorF("PS_DEPTH_COUNT_QW %x/%x\n", INREG(PS_DEPTH_COUNT_QW), INREG(PS_DEPTH_COUNT_QW+4)); + + ErrorF("WIZ_CTL %x\n", INREG(WIZ_CTL)); + ErrorF("TS_CTL %x TS_DEBUG_DATA %x\n", INREG(TS_CTL), INREG(TS_DEBUG_DATA)); + ErrorF("TD_CTL %x / %x\n", INREG(TD_CTL), INREG(TD_CTL2)); + + +} + #ifdef I830DEBUG static void dump_DSPACNTR(ScrnInfoPtr pScrn) @@ -4762,6 +4933,9 @@ IntelEmitInvarientState(ScrnInfoPtr pScrn) I830Ptr pI830 = I830PTR(pScrn); CARD32 ctx_addr; + if (pI830->noAccel) + return; + ctx_addr = pI830->ContextMem.Start; /* Align to a 2k boundry */ ctx_addr = ((ctx_addr + 2048 - 1) / 2048) * 2048; @@ -4775,10 +4949,13 @@ IntelEmitInvarientState(ScrnInfoPtr pScrn) ADVANCE_LP_RING(); } - if (IS_I9XX(pI830)) - I915EmitInvarientState(pScrn); - else - I830EmitInvarientState(pScrn); + if (!IS_I965G(pI830)) + { + if (IS_I9XX(pI830)) + I915EmitInvarientState(pScrn); + else + I830EmitInvarientState(pScrn); + } } static Bool @@ -5183,6 +5360,20 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) I830_dump_registers(pScrn); #endif + if (IS_I965G(pI830)) { + /* turn off clock gating */ +#if 0 + OUTREG(0x6204, 0x70804000); + OUTREG(0x6208, 0x00000001); +#else + OUTREG(0x6204, 0x70000000); +#endif + /* Enable DAP stateless accesses. + * Required for all i965 steppings. + */ + OUTREG(SVG_WORK_CTL, 0x00000010); + } + pI830->starting = FALSE; pI830->closing = FALSE; pI830->suspended = FALSE; @@ -5214,7 +5405,7 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) } static void -I830BIOSAdjustFrame(int scrnIndex, int x, int y, int flags) +I830AdjustFrame(int scrnIndex, int x, int y, int flags) { ScrnInfoPtr pScrn; I830Ptr pI830; @@ -5225,7 +5416,7 @@ I830BIOSAdjustFrame(int scrnIndex, int x, int y, int flags) pI830 = I830PTR(pScrn); pVbe = pI830->pVbe; - DPRINTF(PFX, "I830BIOSAdjustFrame: y = %d (+ %d), x = %d (+ %d)\n", + DPRINTF(PFX, "I830AdjustFrame: y = %d (+ %d), x = %d (+ %d)\n", x, pI830->xoffset, y, pI830->yoffset); /* Sync the engine before adjust frame */ @@ -5248,16 +5439,36 @@ I830BIOSAdjustFrame(int scrnIndex, int x, int y, int flags) if (pI830->Clone) { if (!pI830->pipe == 0) { - OUTREG(DSPABASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); + if (!IS_I965G(pI830)) { + OUTREG(DSPABASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); + } else { + OUTREG(DSPABASE, 0); + OUTREG(DSPASURF, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); + } } else { - OUTREG(DSPBBASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); + if (!IS_I965G(pI830)) { + OUTREG(DSPBBASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); + } else { + OUTREG(DSPBBASE, 0); + OUTREG(DSPBSURF, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); + } } } if (pI830->pipe == 0) { - OUTREG(DSPABASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); + if (!IS_I965G(pI830)) { + OUTREG(DSPABASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); + } else { + OUTREG(DSPABASE, 0); + OUTREG(DSPASURF, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); + } } else { - OUTREG(DSPBBASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); + if (!IS_I965G(pI830)) { + OUTREG(DSPBBASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); + } else { + OUTREG(DSPBBASE, 0); + OUTREG(DSPBSURF, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); + } } } @@ -5332,6 +5543,8 @@ I830BIOSLeaveVT(int scrnIndex, int flags) #ifdef XF86DRI if (pI830->directRenderingOpen) { DRILock(screenInfo.screens[pScrn->scrnIndex], 0); + + I830DRISetVBlankInterrupt (pScrn, FALSE); drmCtlUninstHandler(pI830->drmSubFD); } @@ -5653,12 +5866,21 @@ I830BIOSEnterVT(int scrnIndex, int flags) #ifdef XF86DRI if (pI830->directRenderingEnabled) { if (!pI830->starting) { + ScreenPtr pScreen = pScrn->pScreen; + drmI830Sarea *sarea = (drmI830Sarea *) DRIGetSAREAPrivate(pScreen); + int i; + I830DRIResume(screenInfo.screens[scrnIndex]); + I830DRISetVBlankInterrupt (pScrn, TRUE); I830RefreshRing(pScrn); I830Sync(pScrn); DO_RING_IDLE(); + sarea->texAge++; + for(i = 0; i < I830_NR_TEX_REGIONS+1 ; i++) + sarea->texList[i].age = sarea->texAge; + DPRINTF(PFX, "calling dri unlock\n"); DRIUnlock(screenInfo.screens[pScrn->scrnIndex]); } @@ -5718,7 +5940,8 @@ I830BIOSSwitchMode(int scrnIndex, DisplayModePtr mode, int flags) * The extra WindowTable check detects a rotation at startup. */ if ( (!WindowTable[pScrn->scrnIndex] || pspix->devPrivate.ptr == NULL) && - !pI830->DGAactive && (pScrn->PointerMoved == I830PointerMoved) ) { + !pI830->DGAactive && (pScrn->PointerMoved == I830PointerMoved) && + !IS_I965G(pI830)) { if (!I830Rotate(pScrn, mode)) ret = FALSE; } @@ -5754,7 +5977,7 @@ I830BIOSSaveScreen(ScreenPtr pScreen, int mode) ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; I830Ptr pI830 = I830PTR(pScrn); Bool on = xf86IsUnblank(mode); - CARD32 temp, ctrl, base; + CARD32 temp, ctrl, base, surf; DPRINTF(PFX, "I830BIOSSaveScreen: %d, on is %s\n", mode, BOOLTOSTRING(on)); @@ -5762,9 +5985,11 @@ I830BIOSSaveScreen(ScreenPtr pScreen, int mode) if (pI830->pipe == 0) { ctrl = DSPACNTR; base = DSPABASE; + surf = DSPASURF; } else { ctrl = DSPBCNTR; base = DSPBADDR; + surf = DSPBSURF; } if (pI830->planeEnabled[pI830->pipe]) { temp = INREG(ctrl); @@ -5776,6 +6001,10 @@ I830BIOSSaveScreen(ScreenPtr pScreen, int mode) /* Flush changes */ temp = INREG(base); OUTREG(base, temp); + if (IS_I965G(pI830)) { + temp = INREG(surf); + OUTREG(surf, temp); + } } if (pI830->CursorInfoRec && !pI830->SWCursor && pI830->cursorOn) { @@ -6240,16 +6469,23 @@ I830CheckDevicesTimer(OsTimerPtr timer, CARD32 now, pointer arg) offset = pI8301->FrontBuffer2.Start + ((pScrn->frameY0 * pI830->displayWidth + pScrn->frameX0) * pI830->cpp); } - if (pI830->pipe == 0) - adjust = INREG(DSPABASE); - else - adjust = INREG(DSPBBASE); + if (IS_I965G(pI830)) { + if (pI830->pipe == 0) + adjust = INREG(DSPASURF); + else + adjust = INREG(DSPBSURF); + } else { + if (pI830->pipe == 0) + adjust = INREG(DSPABASE); + else + adjust = INREG(DSPBBASE); + } if (adjust != offset) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Fixing display offsets.\n"); - I830BIOSAdjustFrame(pScrn->pScreen->myNum, pScrn->frameX0, pScrn->frameY0, 0); + I830AdjustFrame(pScrn->pScreen->myNum, pScrn->frameX0, pScrn->frameY0, 0); } } @@ -6274,7 +6510,7 @@ I830CheckDevicesTimer(OsTimerPtr timer, CARD32 now, pointer arg) pI830->currentMode = NULL; I830BIOSSwitchMode(pScrn->pScreen->myNum, pScrn->currentMode, 0); - I830BIOSAdjustFrame(pScrn->pScreen->myNum, pScrn->frameX0, pScrn->frameY0, 0); + I830AdjustFrame(pScrn->pScreen->myNum, pScrn->frameX0, pScrn->frameY0, 0); if (xf86IsEntityShared(pScrn->entityList[0])) { ScrnInfoPtr pScrn2; @@ -6293,7 +6529,7 @@ I830CheckDevicesTimer(OsTimerPtr timer, CARD32 now, pointer arg) pI8302->currentMode = NULL; I830BIOSSwitchMode(pScrn2->pScreen->myNum, pScrn2->currentMode, 0); - I830BIOSAdjustFrame(pScrn2->pScreen->myNum, pScrn2->frameX0, pScrn2->frameY0, 0); + I830AdjustFrame(pScrn2->pScreen->myNum, pScrn2->frameX0, pScrn2->frameY0, 0); (*pScrn2->EnableDisableFBAccess) (pScrn2->pScreen->myNum, FALSE); (*pScrn2->EnableDisableFBAccess) (pScrn2->pScreen->myNum, TRUE); @@ -6342,7 +6578,7 @@ I830InitpScrn(ScrnInfoPtr pScrn) pScrn->PreInit = I830BIOSPreInit; pScrn->ScreenInit = I830BIOSScreenInit; pScrn->SwitchMode = I830BIOSSwitchMode; - pScrn->AdjustFrame = I830BIOSAdjustFrame; + pScrn->AdjustFrame = I830AdjustFrame; pScrn->EnterVT = I830BIOSEnterVT; pScrn->LeaveVT = I830BIOSLeaveVT; pScrn->FreeScreen = I830BIOSFreeScreen; diff --git a/src/i830_memory.c b/src/i830_memory.c index 433aa47d..f4a6325c 100644 --- a/src/i830_memory.c +++ b/src/i830_memory.c @@ -498,7 +498,7 @@ I830AllocateRotatedBuffer(ScrnInfoPtr pScrn, int flags) alloced = 0; if (tileable) { align = GetBestTileAlignment(size); - for (align = GetBestTileAlignment(size); align >= KB(512); align >>= 1) { + for (align = GetBestTileAlignment(size); align >= (IS_I9XX(pI830) ? MB(1) : KB(512)); align >>= 1) { alloced = I830AllocVidMem(pScrn, &(pI830->RotatedMem), &(pI830->StolenPool), size, align, flags | FROM_ANYWHERE | ALLOCATE_AT_TOP | @@ -563,7 +563,7 @@ I830AllocateRotated2Buffer(ScrnInfoPtr pScrn, int flags) alloced = 0; if (tileable) { align = GetBestTileAlignment(size); - for (align = GetBestTileAlignment(size); align >= KB(512); align >>= 1) { + for (align = GetBestTileAlignment(size); align >= (IS_I9XX(pI830) ? MB(1) : KB(512)); align >>= 1) { alloced = I830AllocVidMem(pScrn, &(pI830->RotatedMem2), &(pI830->StolenPool), size, align, flags | FROM_ANYWHERE | ALLOCATE_AT_TOP | @@ -731,7 +731,10 @@ I830Allocate2DMemory(ScrnInfoPtr pScrn, const int flags) tileable = !(flags & ALLOC_NO_TILING) && pI8302->allowPageFlip && IsTileable(pI830Ent->pScrn_2->displayWidth * pI8302->cpp); if (tileable) { - align = KB(512); + if (IS_I9XX(pI830)) + align = MB(1); + else + align = KB(512); alignflags = ALIGN_BOTH_ENDS; } else { align = KB(64); @@ -823,7 +826,10 @@ I830Allocate2DMemory(ScrnInfoPtr pScrn, const int flags) tileable = !(flags & ALLOC_NO_TILING) && pI830->allowPageFlip && IsTileable(pScrn->displayWidth * pI830->cpp); if (tileable) { - align = KB(512); + if (IS_I9XX(pI830)) + align = MB(1); + else + align = KB(512); alignflags = ALIGN_BOTH_ENDS; } else { align = KB(64); @@ -909,7 +915,10 @@ I830Allocate2DMemory(ScrnInfoPtr pScrn, const int flags) tileable = !(flags & ALLOC_NO_TILING) && pI830->allowPageFlip && IsTileable(pScrn->displayWidth * pI830->cpp); if (tileable) { - align = KB(512); + if (IS_I9XX(pI830)) + align = MB(1); + else + align = KB(512); alignflags = ALIGN_BOTH_ENDS; } else { align = KB(64); @@ -1147,7 +1156,7 @@ I830AllocateBackBuffer(ScrnInfoPtr pScrn, const int flags) alloced = 0; if (tileable) { align = GetBestTileAlignment(size); - for (align = GetBestTileAlignment(size); align >= KB(512); align >>= 1) { + for (align = GetBestTileAlignment(size); align >= (IS_I9XX(pI830) ? MB(1) : KB(512)); align >>= 1) { alloced = I830AllocVidMem(pScrn, &(pI830->BackBuffer), &(pI830->StolenPool), size, align, flags | FROM_ANYWHERE | ALLOCATE_AT_TOP | @@ -1210,7 +1219,7 @@ I830AllocateDepthBuffer(ScrnInfoPtr pScrn, const int flags) alloced = 0; if (tileable) { align = GetBestTileAlignment(size); - for (align = GetBestTileAlignment(size); align >= KB(512); align >>= 1) { + for (align = GetBestTileAlignment(size); align >= (IS_I9XX(pI830) ? MB(1) : KB(512)); align >>= 1) { alloced = I830AllocVidMem(pScrn, &(pI830->DepthBuffer), &(pI830->StolenPool), size, align, flags | FROM_ANYWHERE | ALLOCATE_AT_TOP | @@ -1644,7 +1653,7 @@ SetFence(ScrnInfoPtr pScrn, int nr, unsigned int start, unsigned int pitch, } static Bool -MakeTiles(ScrnInfoPtr pScrn, I830MemRange *pMem) +MakeTiles(ScrnInfoPtr pScrn, I830MemRange *pMem, unsigned int fence) { I830Ptr pI830 = I830PTR(pScrn); int pitch, ntiles, i; @@ -1662,6 +1671,31 @@ MakeTiles(ScrnInfoPtr pScrn, I830MemRange *pMem) } pitch = pScrn->displayWidth * pI830->cpp; + + if (IS_I965G(pI830)) { + I830RegPtr i830Reg = &pI830->ModeReg; + + switch (fence) { + case FENCE_XMAJOR: + i830Reg->Fence[nextTile] = (((pitch / 128) - 1) << 2) | pMem->Start | 1; + break; + case FENCE_YMAJOR: + /* YMajor can be 128B aligned but the current code dictates + * otherwise. This isn't a problem apart from memory waste. + * FIXME */ + i830Reg->Fence[nextTile] = (((pitch / 128) - 1) << 2) | pMem->Start | 1; + i830Reg->Fence[nextTile] |= (1<<1); + break; + default: + case FENCE_LINEAR: + break; + } + + i830Reg->Fence[nextTile+FENCE_NEW_NR] = pMem->End; + nextTile++; + return TRUE; + } + /* * Simply try to break the region up into at most four pieces of size * equal to the alignment. @@ -1703,20 +1737,27 @@ I830SetupMemoryTiling(ScrnInfoPtr pScrn) return; } + pI830->front_tiled = FENCE_LINEAR; + pI830->back_tiled = FENCE_LINEAR; + pI830->depth_tiled = FENCE_LINEAR; + pI830->rotated_tiled = FENCE_LINEAR; + pI830->rotated2_tiled = FENCE_LINEAR; + if (pI830->allowPageFlip) { if (pI830->allowPageFlip && pI830->FrontBuffer.Alignment >= KB(512)) { - if (MakeTiles(pScrn, &(pI830->FrontBuffer))) { + if (MakeTiles(pScrn, &(pI830->FrontBuffer), FENCE_XMAJOR)) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "Activating tiled memory for the FRONT buffer\n"); + "Activating tiled memory for the front buffer\n"); + pI830->front_tiled = FENCE_XMAJOR; } else { pI830->allowPageFlip = FALSE; xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "MakeTiles failed for the FRONT buffer\n"); + "MakeTiles failed for the front buffer\n"); } } else { pI830->allowPageFlip = FALSE; xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "Alignment bad for the FRONT buffer\n"); + "Alignment bad for the front buffer\n"); } } @@ -1727,9 +1768,10 @@ I830SetupMemoryTiling(ScrnInfoPtr pScrn) * value. */ if (pI830->BackBuffer.Alignment >= KB(512)) { - if (MakeTiles(pScrn, &(pI830->BackBuffer))) { + if (MakeTiles(pScrn, &(pI830->BackBuffer), FENCE_XMAJOR)) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Activating tiled memory for the back buffer.\n"); + pI830->back_tiled = FENCE_XMAJOR; } else { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "MakeTiles failed for the back buffer.\n"); @@ -1738,9 +1780,10 @@ I830SetupMemoryTiling(ScrnInfoPtr pScrn) } if (pI830->DepthBuffer.Alignment >= KB(512)) { - if (MakeTiles(pScrn, &(pI830->DepthBuffer))) { + if (MakeTiles(pScrn, &(pI830->DepthBuffer), FENCE_YMAJOR)) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "Activating tiled memory for the depth buffer.\n"); + "Activating tiled memory for the depth buffer.\n"); + pI830->depth_tiled = FENCE_YMAJOR; } else { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "MakeTiles failed for the depth buffer.\n"); @@ -1748,9 +1791,10 @@ I830SetupMemoryTiling(ScrnInfoPtr pScrn) } if (pI830->RotatedMem.Alignment >= KB(512)) { - if (MakeTiles(pScrn, &(pI830->RotatedMem))) { + if (MakeTiles(pScrn, &(pI830->RotatedMem), FENCE_XMAJOR)) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Activating tiled memory for the rotated buffer.\n"); + pI830->rotated_tiled = FENCE_XMAJOR; } else { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "MakeTiles failed for the rotated buffer.\n"); @@ -1759,9 +1803,10 @@ I830SetupMemoryTiling(ScrnInfoPtr pScrn) #if 0 if (pI830->RotatedMem2.Alignment >= KB(512)) { - if (MakeTiles(pScrn, &(pI830->RotatedMem2))) { + if (MakeTiles(pScrn, &(pI830->RotatedMem2), FENCE_XMAJOR)) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Activating tiled memory for the rotated2 buffer.\n"); + pI830->rotated2_tiled = FENCE_XMAJOR; } else { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "MakeTiles failed for the rotated buffer.\n"); diff --git a/src/i830_video.c b/src/i830_video.c index a608a7e3..300930d3 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -157,7 +157,10 @@ Edummy(const char *dummy, ...) OUT_RING(MI_NOOP); \ OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_FLIP_CONTINUE); \ } \ - OUT_RING(pI830->OverlayMem->Physical | OFC_UPDATE); \ + if (IS_I965G(pI830)) \ + OUT_RING(pI830->OverlayMem->Start | OFC_UPDATE); \ + else \ + OUT_RING(pI830->OverlayMem->Physical | OFC_UPDATE); \ ADVANCE_LP_RING(); \ ErrorF("OVERLAY_UPDATE\n"); \ } while(0) @@ -172,11 +175,17 @@ Edummy(const char *dummy, ...) OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); \ OUT_RING(MI_NOOP); \ OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_FLIP_CONTINUE); \ - OUT_RING(pI830->OverlayMem->Physical | OFC_UPDATE); \ + if (IS_I965G(pI830)) \ + OUT_RING(pI830->OverlayMem->Start | OFC_UPDATE); \ + else \ + OUT_RING(pI830->OverlayMem->Physical | OFC_UPDATE); \ OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); \ OUT_RING(MI_NOOP); \ OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_FLIP_OFF); \ - OUT_RING(pI830->OverlayMem->Physical | OFC_UPDATE); \ + if (IS_I965G(pI830)) \ + OUT_RING(pI830->OverlayMem->Start | OFC_UPDATE); \ + else \ + OUT_RING(pI830->OverlayMem->Physical | OFC_UPDATE); \ OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); \ OUT_RING(MI_NOOP); \ ADVANCE_LP_RING(); \ @@ -334,18 +343,18 @@ typedef struct { CARD32 OCONFIG; CARD32 OCMD; CARD32 RESERVED1; /* 0x6C */ - CARD32 AWINPOS; - CARD32 AWINSZ; - CARD32 RESERVED2; /* 0x78 */ - CARD32 RESERVED3; /* 0x7C */ - CARD32 RESERVED4; /* 0x80 */ - CARD32 RESERVED5; /* 0x84 */ - CARD32 RESERVED6; /* 0x88 */ - CARD32 RESERVED7; /* 0x8C */ - CARD32 RESERVED8; /* 0x90 */ - CARD32 RESERVED9; /* 0x94 */ - CARD32 RESERVEDA; /* 0x98 */ - CARD32 RESERVEDB; /* 0x9C */ + CARD32 OSTART_0Y; /* for i965 */ + CARD32 OSTART_1Y; /* for i965 */ + CARD32 OSTART_0U; + CARD32 OSTART_0V; + CARD32 OSTART_1U; + CARD32 OSTART_1V; + CARD32 OTILEOFF_0Y; + CARD32 OTILEOFF_1Y; + CARD32 OTILEOFF_0U; + CARD32 OTILEOFF_0V; + CARD32 OTILEOFF_1U; + CARD32 OTILEOFF_1V; CARD32 FASTHSCALE; /* 0xA0 */ CARD32 UVSCALEV; /* 0xA4 */ @@ -501,8 +510,10 @@ I830ResetVideo(ScrnInfoPtr pScrn) overlay->SHEIGHT = 0; overlay->OCLRC0 = (pPriv->contrast << 18) | (pPriv->brightness & 0xff); overlay->OCLRC1 = 0x00000080; /* saturation: bypass */ +#if 0 overlay->AWINPOS = 0; overlay->AWINSZ = 0; +#endif overlay->FASTHSCALE = 0; /* @@ -1647,14 +1658,31 @@ I830DisplayVideo(ScrnInfoPtr pScrn, int id, short width, short height, dstBox->x2, dstBox->y2); /* buffer locations */ - overlay->OBUF_0Y = pPriv->YBuf0offset; - overlay->OBUF_0U = pPriv->UBuf0offset; - overlay->OBUF_0V = pPriv->VBuf0offset; - - if(pPriv->doubleBuffer) { - overlay->OBUF_1Y = pPriv->YBuf1offset; - overlay->OBUF_1U = pPriv->UBuf1offset; - overlay->OBUF_1V = pPriv->VBuf1offset; + if (IS_I965G(pI830)) + { + overlay->OBUF_0Y = 0; + overlay->OBUF_0U = 0; + overlay->OBUF_0V = 0; + overlay->OSTART_0Y = pPriv->YBuf0offset; + overlay->OSTART_0U = pPriv->UBuf0offset; + overlay->OSTART_0V = pPriv->VBuf0offset; + if(pPriv->doubleBuffer) { + overlay->OBUF_1Y = 0; + overlay->OBUF_1U = 0; + overlay->OBUF_1V = 0; + overlay->OSTART_1Y = pPriv->YBuf1offset; + overlay->OSTART_1U = pPriv->UBuf1offset; + overlay->OSTART_1V = pPriv->VBuf1offset; + } + } else { + overlay->OBUF_0Y = pPriv->YBuf0offset; + overlay->OBUF_0U = pPriv->UBuf0offset; + overlay->OBUF_0V = pPriv->VBuf0offset; + if(pPriv->doubleBuffer) { + overlay->OBUF_1Y = pPriv->YBuf1offset; + overlay->OBUF_1U = pPriv->UBuf1offset; + overlay->OBUF_1V = pPriv->VBuf1offset; + } } ErrorF("Buffers: Y0: 0x%lx, U0: 0x%lx, V0: 0x%lx\n", overlay->OBUF_0Y, @@ -1967,10 +1995,10 @@ I830PutImage(ScrnInfoPtr pScrn, } #else if (pI830->rotation & (RR_Rotate_90 | RR_Rotate_270)) { - dstPitch = ((height / 2) + 511) & ~511; + dstPitch = ((height / 2) + 255) & ~255; size = dstPitch * width * 3; } else { - dstPitch = ((width / 2) + 511) & ~511; /* of chroma */ + dstPitch = ((width / 2) + 255) & ~255; /* of chroma */ size = dstPitch * height * 3; } #endif @@ -1989,10 +2017,10 @@ I830PutImage(ScrnInfoPtr pScrn, } #else if (pI830->rotation & (RR_Rotate_90 | RR_Rotate_270)) { - dstPitch = ((height << 1) + 511) & ~511; + dstPitch = ((height << 1) + 255) & ~255; size = dstPitch * width; } else { - dstPitch = ((width << 1) + 511) & ~511; /* of chroma */ + dstPitch = ((width << 1) + 255) & ~255; /* of chroma */ size = dstPitch * height; } #endif @@ -2526,27 +2554,29 @@ I830VideoSwitchModeAfter(ScrnInfoPtr pScrn, DisplayModePtr mode) } } - if (pPriv->pipe == 0) { - if (INREG(PIPEACONF) & PIPEACONF_DOUBLE_WIDE) { - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, - "Disabling XVideo output because Pipe A is in double-wide mode.\n"); - pPriv->overlayOK = FALSE; - } else if (!pPriv->overlayOK) { - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, - "Re-enabling XVideo output because Pipe A is now in single-wide mode.\n"); - pPriv->overlayOK = TRUE; + if (!IS_I965G(pI830)) { + if (pPriv->pipe == 0) { + if (INREG(PIPEACONF) & PIPEACONF_DOUBLE_WIDE) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Disabling XVideo output because Pipe A is in double-wide mode.\n"); + pPriv->overlayOK = FALSE; + } else if (!pPriv->overlayOK) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Re-enabling XVideo output because Pipe A is now in single-wide mode.\n"); + pPriv->overlayOK = TRUE; + } } - } - if (pPriv->pipe == 1) { - if (INREG(PIPEBCONF) & PIPEBCONF_DOUBLE_WIDE) { - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, - "Disabling XVideo output because Pipe B is in double-wide mode.\n"); - pPriv->overlayOK = FALSE; - } else if (!pPriv->overlayOK) { - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, - "Re-enabling XVideo output because Pipe B is now in single-wide mode.\n"); - pPriv->overlayOK = TRUE; + if (pPriv->pipe == 1) { + if (INREG(PIPEBCONF) & PIPEBCONF_DOUBLE_WIDE) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Disabling XVideo output because Pipe B is in double-wide mode.\n"); + pPriv->overlayOK = FALSE; + } else if (!pPriv->overlayOK) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Re-enabling XVideo output because Pipe B is now in single-wide mode.\n"); + pPriv->overlayOK = TRUE; + } } } From aa69018c01d2fa963fb940718dbd653d6ca2c9eb Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 3 Aug 2006 19:12:15 -0700 Subject: [PATCH 65/70] Turn off video debugging now that it appears to work fine. --- src/i830_video.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/i830_video.c b/src/i830_video.c index e3384dd8..fca82303 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -1,4 +1,4 @@ -#define VIDEO_DEBUG 1 +#define VIDEO_DEBUG 0 /*************************************************************************** Copyright 2000 Intel Corporation. All Rights Reserved. From 8d0a5138503586cbf980eb9464f2db91b72509c7 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 3 Aug 2006 19:16:59 -0700 Subject: [PATCH 66/70] Add parenthesis so that IS_I965G doesn't make the test pass for 8-bit. --- src/i830_video.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/i830_video.c b/src/i830_video.c index fca82303..64134dff 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -508,7 +508,7 @@ I830InitVideo(ScreenPtr pScreen) /* Set up textured video if we can do it at this depth and we are on * supported hardware. */ - if (pScrn->bitsPerPixel >= 16 && IS_I9XX(pI830) || IS_I965G(pI830)) { + if (pScrn->bitsPerPixel >= 16 && (IS_I9XX(pI830) || IS_I965G(pI830))) { texturedAdaptor = I830SetupImageVideoTextured(pScreen); if (texturedAdaptor != NULL) { adaptors[num_adaptors++] = texturedAdaptor; From 0fd4831fdcf4c8f43d80c66e43eff8942f89b324 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Fri, 4 Aug 2006 00:21:53 -0700 Subject: [PATCH 67/70] Disable dynamic front buffer mapping on i965. Moving front buffers should only be necessary for rotation. Currently, the server isn't ready for it, and the method attempted to work around it caused crashes with DRI. Since i965 doesn't support rotation yet, this should be harmless for now. --- src/i830_dri.c | 33 +++++++++++++++++++-------------- 1 file changed, 19 insertions(+), 14 deletions(-) diff --git a/src/i830_dri.c b/src/i830_dri.c index 00ff358e..af0db25f 100644 --- a/src/i830_dri.c +++ b/src/i830_dri.c @@ -664,21 +664,26 @@ I830DRIMapScreenRegions(ScrnInfoPtr pScrn, drmI830Sarea *sarea) pScrn->virtualY * pI830->cpp); #endif - xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "[drm] Mapping front buffer\n"); - if (drmAddMap(pI830->drmSubFD, - (drm_handle_t)(sarea->front_offset + pI830->LinearAddr), - sarea->front_size, - DRM_AGP, - 0, - (drmAddress) &sarea->front_handle) < 0) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "[drm] drmAddMap(front_handle) failed. Disabling DRI\n"); - DRICloseScreen(pScreen); - return FALSE; + /* The I965G isn't ready for the front buffer mapping to be moved around, + * because of issues with rmmap, it seems. + */ + if (!IS_I965G(pI830)) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "[drm] Mapping front buffer\n"); + if (drmAddMap(pI830->drmSubFD, + (drm_handle_t)(sarea->front_offset + pI830->LinearAddr), + sarea->front_size, + DRM_AGP, + 0, + (drmAddress) &sarea->front_handle) < 0) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "[drm] drmAddMap(front_handle) failed. Disabling DRI\n"); + DRICloseScreen(pScreen); + return FALSE; + } + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[drm] Front Buffer = 0x%08x\n", + (int)sarea->front_handle); } - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[drm] Front Buffer = 0x%08x\n", - (int)sarea->front_handle); if (drmAddMap(pI830->drmSubFD, (drm_handle_t)(sarea->back_offset + pI830->LinearAddr), From bc12208f6e145ec29c3ebe38ae04dc2ebca1b4cc Mon Sep 17 00:00:00 2001 From: Wang Zhenyu Date: Mon, 7 Aug 2006 13:27:00 +0800 Subject: [PATCH 68/70] Disable error register dumping in dri TransitionTo2d. This's for debug which might confuse QA. --- src/i830_dri.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/i830_dri.c b/src/i830_dri.c index af0db25f..445bbeca 100644 --- a/src/i830_dri.c +++ b/src/i830_dri.c @@ -1390,9 +1390,6 @@ I830DRITransitionTo2d(ScreenPtr pScreen) pI830->have3DWindows = 0; - - I830PrintErrorState(pScrn); - } From c3b3d479788fcea7e543f29acf83c85b8b148fbe Mon Sep 17 00:00:00 2001 From: Alan Hourihane Date: Tue, 8 Aug 2006 15:28:14 -0700 Subject: [PATCH 69/70] Intel bug #35: Fix accelerator syncing with DGA. Fixes glitches seen with Mark Vojkovich's "texture" demo. --- src/i830_dga.c | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) diff --git a/src/i830_dga.c b/src/i830_dga.c index 1129fa31..1a6e4e69 100644 --- a/src/i830_dga.c +++ b/src/i830_dga.c @@ -253,12 +253,25 @@ static void I830_Sync(ScrnInfoPtr pScrn) { I830Ptr pI830 = I830PTR(pScrn); + int flags = MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE; MARKER(); - if (pI830->AccelInfoRec) { - (*pI830->AccelInfoRec->Sync) (pScrn); - } + if (pI830->noAccel) + return; + + if (IS_I965G(pI830)) + flags = 0; + + BEGIN_LP_RING(2); + OUT_RING(MI_FLUSH | flags); + OUT_RING(MI_NOOP); /* pad to quadword */ + ADVANCE_LP_RING(); + + I830WaitLpRing(pScrn, pI830->LpRing->mem.Size - 8, 0); + + pI830->LpRing->space = pI830->LpRing->mem.Size - 8; + pI830->nextColorExpandBuf = 0; } static void From bc5f56568021d8c63313e2b6bf30710e7516c04a Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 8 Aug 2006 15:48:04 -0700 Subject: [PATCH 70/70] Intel bug #49: Fix video output at 32bpp by using B8G8R8A8 instead of B8G8R8X8. While here, don't overallocate video memory for the i965G state. --- src/i830_video.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/i830_video.c b/src/i830_video.c index 64134dff..940550de 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2960,7 +2960,7 @@ BroadwaterDisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, if (pI830->cpp == 2) { dest_surf_state->ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM; } else { - dest_surf_state->ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8X8_UNORM; + dest_surf_state->ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM; } dest_surf_state->ss0.writedisable_alpha = 0; dest_surf_state->ss0.writedisable_red = 0; @@ -3628,7 +3628,9 @@ I830PutImage(ScrnInfoPtr pScrn, /* size is multiplied by 2 because we have two buffers that are flipping */ pPriv->linear = I830AllocateMemory(pScrn, pPriv->linear, - extraLinear + (pPriv->doubleBuffer ? size * 2 : size) / pI830->cpp); + (extraLinear + + (pPriv->doubleBuffer ? size * 2 : size)) / + pI830->cpp); if(!pPriv->linear || pPriv->linear->offset < (pScrn->virtualX * pScrn->virtualY)) return BadAlloc;