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Fix DPLL programming in CRTC mode set 

The following patch fixes the display problem on internal development machines.
The code in commit 3c22ed633b (Jesse's force pipe
A enable patch) broke DPLL programming.  Moving the DPLL set back up in the
function solves the problem.

Fix for internal bug #309.
This commit is contained in:
Hong Liu 2008-02-28 13:51:18 +08:00 committed by Jesse Barnes
parent 4936e09702
commit d767eabe53
1 changed files with 8 additions and 8 deletions
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16
src/i830_display.c
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@ -1281,6 +1281,14 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
i830PrintPll("chosen", &clock);
}
if (dpll & DPLL_VCO_ENABLE)
{
OUTREG(fp_reg, fp);
OUTREG(dpll_reg, dpll & ~DPLL_VCO_ENABLE);
POSTING_READ(dpll_reg);
usleep(150);
}
/* The LVDS pin pair needs to be on before the DPLLs are enabled.
* This is an exception to the general rule that mode_set doesn't turn
* things on.
@ -1289,14 +1297,6 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
{
CARD32 lvds = INREG(LVDS);
if (dpll & DPLL_VCO_ENABLE)
{
OUTREG(fp_reg, fp);
OUTREG(dpll_reg, dpll & ~DPLL_VCO_ENABLE);
POSTING_READ(dpll_reg);
usleep(150);
}
lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP | LVDS_PIPEB_SELECT;
/* Set the B0-B3 data pairs corresponding to whether we're going to
* set the DPLLs for dual-channel mode or not.