Merge branch 'master' into exa
This commit is contained in:
commit
d7e5d996aa
|
|
@ -1,3 +1,8 @@
|
|||
2006-05-01 Matthieu Herrb <matthieu.herrb@laas.fr>
|
||||
|
||||
* src/common.h:
|
||||
Fix build on non-dri systems.
|
||||
|
||||
2006-04-07 Adam Jackson <ajax@freedesktop.org>
|
||||
|
||||
* configure.ac:
|
||||
|
|
|
|||
|
|
@ -55,6 +55,10 @@ i810_drv_la_SOURCES = \
|
|||
i830_video.c \
|
||||
i830_rotate.c \
|
||||
i830_randr.c \
|
||||
i830_3d.c \
|
||||
i830_reg.h \
|
||||
i915_3d.c \
|
||||
i915_reg.h \
|
||||
i830_exa.c \
|
||||
i830_xaa.c
|
||||
|
||||
|
|
|
|||
|
|
@ -80,10 +80,10 @@ extern const char *I810ddcSymbols[];
|
|||
extern const char *I810fbSymbols[];
|
||||
extern const char *I810xaaSymbols[];
|
||||
extern const char *I810shadowFBSymbols[];
|
||||
extern const char *I810shadowSymbols[];
|
||||
#ifdef XF86DRI
|
||||
extern const char *I810driSymbols[];
|
||||
extern const char *I810drmSymbols[];
|
||||
extern const char *I810shadowSymbols[];
|
||||
#endif
|
||||
|
||||
extern void I830DPRINTF_stub(const char *filename, int line,
|
||||
|
|
|
|||
|
|
@ -414,7 +414,7 @@ extern void I830PrintErrorState(ScrnInfoPtr pScrn);
|
|||
extern void I830Sync(ScrnInfoPtr pScrn);
|
||||
extern void I830InitHWCursor(ScrnInfoPtr pScrn);
|
||||
extern Bool I830CursorInit(ScreenPtr pScreen);
|
||||
extern void I830EmitInvarientState(ScrnInfoPtr pScrn);
|
||||
extern void IntelEmitInvarientState(ScrnInfoPtr pScrn);
|
||||
extern void I830SelectBuffer(ScrnInfoPtr pScrn, int buffer);
|
||||
|
||||
extern void I830RefreshRing(ScrnInfoPtr pScrn);
|
||||
|
|
|
|||
|
|
@ -0,0 +1,131 @@
|
|||
/**************************************************************************
|
||||
*
|
||||
* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
|
||||
* All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the
|
||||
* "Software"), to deal in the Software without restriction, including
|
||||
* without limitation the rights to use, copy, modify, merge, publish,
|
||||
* distribute, sub license, and/or sell copies of the Software, and to
|
||||
* permit persons to whom the Software is furnished to do so, subject to
|
||||
* the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the
|
||||
* next paragraph) shall be included in all copies or substantial portions
|
||||
* of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
|
||||
* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
|
||||
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
||||
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
||||
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
**************************************************************************/
|
||||
|
||||
#ifdef HAVE_CONFIG_H
|
||||
#include "config.h"
|
||||
#endif
|
||||
|
||||
#include "i830.h"
|
||||
#include "i830_dri.h"
|
||||
|
||||
#include "i830_reg.h"
|
||||
|
||||
#define CMD_3D (0x3<<29)
|
||||
|
||||
void I830EmitInvarientState( ScrnInfoPtr pScrn )
|
||||
{
|
||||
I830Ptr pI830 = I830PTR(pScrn);
|
||||
|
||||
BEGIN_LP_RING(38);
|
||||
|
||||
OUT_RING(_3DSTATE_MAP_CUBE | MAP_UNIT(0));
|
||||
OUT_RING(_3DSTATE_MAP_CUBE | MAP_UNIT(1));
|
||||
OUT_RING(_3DSTATE_MAP_CUBE | MAP_UNIT(2));
|
||||
OUT_RING(_3DSTATE_MAP_CUBE | MAP_UNIT(3));
|
||||
|
||||
OUT_RING(_3DSTATE_DFLT_DIFFUSE_CMD);
|
||||
OUT_RING(0);
|
||||
|
||||
OUT_RING(_3DSTATE_DFLT_SPEC_CMD);
|
||||
OUT_RING(0);
|
||||
|
||||
OUT_RING(_3DSTATE_DFLT_Z_CMD);
|
||||
OUT_RING(0);
|
||||
|
||||
OUT_RING(_3DSTATE_FOG_MODE_CMD);
|
||||
OUT_RING(FOGFUNC_ENABLE |
|
||||
FOG_LINEAR_CONST |
|
||||
FOGSRC_INDEX_Z |
|
||||
ENABLE_FOG_DENSITY);
|
||||
OUT_RING(0);
|
||||
OUT_RING(0);
|
||||
|
||||
|
||||
OUT_RING(_3DSTATE_MAP_TEX_STREAM_CMD |
|
||||
MAP_UNIT(0) |
|
||||
DISABLE_TEX_STREAM_BUMP |
|
||||
ENABLE_TEX_STREAM_COORD_SET |
|
||||
TEX_STREAM_COORD_SET(0) |
|
||||
ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(0));
|
||||
OUT_RING(_3DSTATE_MAP_TEX_STREAM_CMD |
|
||||
MAP_UNIT(1) |
|
||||
DISABLE_TEX_STREAM_BUMP |
|
||||
ENABLE_TEX_STREAM_COORD_SET |
|
||||
TEX_STREAM_COORD_SET(1) |
|
||||
ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(1));
|
||||
OUT_RING(_3DSTATE_MAP_TEX_STREAM_CMD |
|
||||
MAP_UNIT(2) |
|
||||
DISABLE_TEX_STREAM_BUMP |
|
||||
ENABLE_TEX_STREAM_COORD_SET |
|
||||
TEX_STREAM_COORD_SET(2) |
|
||||
ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(2));
|
||||
OUT_RING(_3DSTATE_MAP_TEX_STREAM_CMD |
|
||||
MAP_UNIT(3) |
|
||||
DISABLE_TEX_STREAM_BUMP |
|
||||
ENABLE_TEX_STREAM_COORD_SET |
|
||||
TEX_STREAM_COORD_SET(3) |
|
||||
ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(3));
|
||||
|
||||
OUT_RING(_3DSTATE_MAP_COORD_TRANSFORM);
|
||||
OUT_RING(DISABLE_TEX_TRANSFORM | TEXTURE_SET(0));
|
||||
OUT_RING(_3DSTATE_MAP_COORD_TRANSFORM);
|
||||
OUT_RING(DISABLE_TEX_TRANSFORM | TEXTURE_SET(1));
|
||||
OUT_RING(_3DSTATE_MAP_COORD_TRANSFORM);
|
||||
OUT_RING(DISABLE_TEX_TRANSFORM | TEXTURE_SET(2));
|
||||
OUT_RING(_3DSTATE_MAP_COORD_TRANSFORM);
|
||||
OUT_RING(DISABLE_TEX_TRANSFORM | TEXTURE_SET(3));
|
||||
|
||||
OUT_RING(_3DSTATE_RASTER_RULES_CMD |
|
||||
ENABLE_POINT_RASTER_RULE |
|
||||
OGL_POINT_RASTER_RULE |
|
||||
ENABLE_LINE_STRIP_PROVOKE_VRTX |
|
||||
ENABLE_TRI_FAN_PROVOKE_VRTX |
|
||||
ENABLE_TRI_STRIP_PROVOKE_VRTX |
|
||||
LINE_STRIP_PROVOKE_VRTX(1) |
|
||||
TRI_FAN_PROVOKE_VRTX(2) |
|
||||
TRI_STRIP_PROVOKE_VRTX(2));
|
||||
|
||||
OUT_RING(_3DSTATE_SCISSOR_ENABLE_CMD |
|
||||
DISABLE_SCISSOR_RECT);
|
||||
|
||||
OUT_RING(_3DSTATE_SCISSOR_RECT_0_CMD);
|
||||
OUT_RING(0);
|
||||
OUT_RING(0);
|
||||
|
||||
OUT_RING(_3DSTATE_VERTEX_TRANSFORM);
|
||||
OUT_RING(DISABLE_VIEWPORT_TRANSFORM | DISABLE_PERSPECTIVE_DIVIDE);
|
||||
|
||||
OUT_RING(_3DSTATE_W_STATE_CMD);
|
||||
OUT_RING(MAGIC_W_STATE_DWORD1);
|
||||
OUT_RING(0x3f800000 /* 1.0 in IEEE float */ );
|
||||
|
||||
|
||||
OUT_RING(_3DSTATE_COLOR_FACTOR_CMD);
|
||||
OUT_RING(0x80808080); /* .5 required in alpha for GL_DOT3_RGBA_EXT */
|
||||
|
||||
ADVANCE_LP_RING();
|
||||
}
|
||||
|
|
@ -1179,14 +1179,16 @@ I830DRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg,
|
|||
i830MarkSync(pScrn);
|
||||
}
|
||||
|
||||
extern I830EmitInvarientState(ScrnInfoPtr pScrn);
|
||||
extern I915EmitInvarientState(ScrnInfoPtr pScrn);
|
||||
|
||||
/* Initialize the first context */
|
||||
void
|
||||
I830EmitInvarientState(ScrnInfoPtr pScrn)
|
||||
IntelEmitInvarientState(ScrnInfoPtr pScrn)
|
||||
{
|
||||
I830Ptr pI830 = I830PTR(pScrn);
|
||||
CARD32 ctx_addr;
|
||||
|
||||
|
||||
ctx_addr = pI830->ContextMem.Start;
|
||||
/* Align to a 2k boundry */
|
||||
ctx_addr = ((ctx_addr + 2048 - 1) / 2048) * 2048;
|
||||
|
|
@ -1199,6 +1201,11 @@ I830EmitInvarientState(ScrnInfoPtr pScrn)
|
|||
CTXT_PALETTE_SAVE_DISABLE | CTXT_PALETTE_RESTORE_DISABLE);
|
||||
ADVANCE_LP_RING();
|
||||
}
|
||||
|
||||
if (IS_I9XX(pI830))
|
||||
I915EmitInvarientState(pScrn);
|
||||
else
|
||||
I830EmitInvarientState(pScrn);
|
||||
}
|
||||
|
||||
/* Use callbacks from dri.c to support pageflipping mode for a single
|
||||
|
|
|
|||
|
|
@ -9,8 +9,8 @@
|
|||
#define I830_MAX_DRAWABLES 256
|
||||
|
||||
#define I830_MAJOR_VERSION 1
|
||||
#define I830_MINOR_VERSION 5
|
||||
#define I830_PATCHLEVEL 1
|
||||
#define I830_MINOR_VERSION 6
|
||||
#define I830_PATCHLEVEL 0
|
||||
|
||||
#define I830_REG_SIZE 0x80000
|
||||
|
||||
|
|
|
|||
|
|
@ -970,7 +970,25 @@ I830Set640x480(ScrnInfoPtr pScrn)
|
|||
break;
|
||||
}
|
||||
m |= (1 << 15) | (1 << 14);
|
||||
return VBESetVBEMode(pI830->pVbe, m, NULL);
|
||||
if (VBESetVBEMode(pI830->pVbe, m, NULL))
|
||||
return TRUE;
|
||||
|
||||
/* if the first failed, let's try the next - usually 800x600 */
|
||||
m = 0x32;
|
||||
switch (pScrn->depth) {
|
||||
case 15:
|
||||
case 16:
|
||||
m = 0x42;
|
||||
break;
|
||||
case 24:
|
||||
m = 0x52;
|
||||
break;
|
||||
}
|
||||
m |= (1 << 15) | (1 << 14);
|
||||
if (VBESetVBEMode(pI830->pVbe, m, NULL))
|
||||
return TRUE;
|
||||
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
/* This is needed for SetDisplayDevices to work correctly on I915G.
|
||||
|
|
@ -2311,6 +2329,7 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
|
|||
from = X_CONFIG;
|
||||
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipID override: 0x%04X\n",
|
||||
pI830->pEnt->device->chipID);
|
||||
pI830->PciInfo->chipType = pI830->pEnt->device->chipID;
|
||||
} else {
|
||||
from = X_PROBED;
|
||||
pScrn->chipset = (char *)xf86TokenToString(I830BIOSChipsets,
|
||||
|
|
@ -4829,28 +4848,6 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
|
|||
hwp = VGAHWPTR(pScrn);
|
||||
|
||||
pScrn->displayWidth = pI830->displayWidth;
|
||||
switch (pI830->InitialRotation) {
|
||||
case 0:
|
||||
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Rotating to 0 degrees\n");
|
||||
pI830->rotation = RR_Rotate_0;
|
||||
break;
|
||||
case 90:
|
||||
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Rotating to 90 degrees\n");
|
||||
pI830->rotation = RR_Rotate_90;
|
||||
break;
|
||||
case 180:
|
||||
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Rotating to 180 degrees\n");
|
||||
pI830->rotation = RR_Rotate_180;
|
||||
break;
|
||||
case 270:
|
||||
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Rotating to 270 degrees\n");
|
||||
pI830->rotation = RR_Rotate_270;
|
||||
break;
|
||||
default:
|
||||
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Bad rotation setting - defaulting to 0 degrees\n");
|
||||
pI830->rotation = RR_Rotate_0;
|
||||
break;
|
||||
}
|
||||
|
||||
if (I830IsPrimary(pScrn)) {
|
||||
/* Rotated Buffer */
|
||||
|
|
@ -5192,12 +5189,13 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
|
|||
}
|
||||
#endif
|
||||
|
||||
/* Setup 3D engine, needed for rotation too */
|
||||
IntelEmitInvarientState(pScrn);
|
||||
|
||||
#ifdef XF86DRI
|
||||
if (pI830->directRenderingEnabled) {
|
||||
pI830->directRenderingOpen = TRUE;
|
||||
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "direct rendering: Enabled\n");
|
||||
/* Setup 3D engine */
|
||||
I830EmitInvarientState(pScrn);
|
||||
} else {
|
||||
if (driDisabled)
|
||||
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "direct rendering: Disabled\n");
|
||||
|
|
@ -5239,6 +5237,29 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
|
|||
pI830->closing = FALSE;
|
||||
pI830->suspended = FALSE;
|
||||
|
||||
switch (pI830->InitialRotation) {
|
||||
case 0:
|
||||
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Rotating to 0 degrees\n");
|
||||
pI830->rotation = RR_Rotate_0;
|
||||
break;
|
||||
case 90:
|
||||
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Rotating to 90 degrees\n");
|
||||
pI830->rotation = RR_Rotate_90;
|
||||
break;
|
||||
case 180:
|
||||
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Rotating to 180 degrees\n");
|
||||
pI830->rotation = RR_Rotate_180;
|
||||
break;
|
||||
case 270:
|
||||
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Rotating to 270 degrees\n");
|
||||
pI830->rotation = RR_Rotate_270;
|
||||
break;
|
||||
default:
|
||||
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Bad rotation setting - defaulting to 0 degrees\n");
|
||||
pI830->rotation = RR_Rotate_0;
|
||||
break;
|
||||
}
|
||||
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
|
|
@ -5357,7 +5378,7 @@ I830BIOSLeaveVT(int scrnIndex, int flags)
|
|||
|
||||
#ifdef XF86DRI
|
||||
if (pI830->directRenderingOpen) {
|
||||
I830DRILock(pScrn);
|
||||
DRILock(screenInfo.screens[pScrn->scrnIndex], 0);
|
||||
|
||||
drmCtlUninstHandler(pI830->drmSubFD);
|
||||
}
|
||||
|
|
@ -5615,9 +5636,7 @@ I830BIOSEnterVT(int scrnIndex, int flags)
|
|||
* the Video BIOS with our saved devices, and only when that fails,
|
||||
* we'll warm boot it.
|
||||
*/
|
||||
/* Check Pipe conf registers or possibly HTOTAL/VTOTAL for 0x00000000)*/
|
||||
CARD32 temp = pI830->pipe ? INREG(PIPEBCONF) : INREG(PIPEACONF);
|
||||
if (!I830Set640x480(pScrn) || !(temp & 0x80000000)) {
|
||||
if (!I830Set640x480(pScrn)) {
|
||||
xf86Int10InfoPtr pInt;
|
||||
|
||||
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
|
||||
|
|
@ -5686,18 +5705,20 @@ I830BIOSEnterVT(int scrnIndex, int flags)
|
|||
if (!pI830->starting) {
|
||||
I830DRIResume(screenInfo.screens[scrnIndex]);
|
||||
|
||||
I830EmitInvarientState(pScrn);
|
||||
I830RefreshRing(pScrn);
|
||||
I830Sync(pScrn);
|
||||
DO_RING_IDLE();
|
||||
|
||||
DPRINTF(PFX, "calling dri unlock\n");
|
||||
I830DRIUnlock(pScrn);
|
||||
DRIUnlock(screenInfo.screens[pScrn->scrnIndex]);
|
||||
}
|
||||
pI830->LockHeld = 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Needed for rotation */
|
||||
IntelEmitInvarientState(pScrn);
|
||||
|
||||
if (pI830->checkDevices)
|
||||
pI830->devicesTimer = TimerSet(NULL, 0, 1000, I830CheckDevicesTimer, pScrn);
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,637 @@
|
|||
/**************************************************************************
|
||||
*
|
||||
* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
|
||||
* All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the
|
||||
* "Software"), to deal in the Software without restriction, including
|
||||
* without limitation the rights to use, copy, modify, merge, publish,
|
||||
* distribute, sub license, and/or sell copies of the Software, and to
|
||||
* permit persons to whom the Software is furnished to do so, subject to
|
||||
* the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the
|
||||
* next paragraph) shall be included in all copies or substantial portions
|
||||
* of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
|
||||
* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
|
||||
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
||||
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
||||
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
**************************************************************************/
|
||||
|
||||
|
||||
#ifndef _I830_REG_H_
|
||||
#define _I830_REG_H_
|
||||
|
||||
#define I830_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value)
|
||||
|
||||
#define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
|
||||
#define AA_LINE_ECAAR_WIDTH_ENABLE (1<<16)
|
||||
#define AA_LINE_ECAAR_WIDTH_0_5 0
|
||||
#define AA_LINE_ECAAR_WIDTH_1_0 (1<<14)
|
||||
#define AA_LINE_ECAAR_WIDTH_2_0 (2<<14)
|
||||
#define AA_LINE_ECAAR_WIDTH_4_0 (3<<14)
|
||||
#define AA_LINE_REGION_WIDTH_ENABLE (1<<8)
|
||||
#define AA_LINE_REGION_WIDTH_0_5 0
|
||||
#define AA_LINE_REGION_WIDTH_1_0 (1<<6)
|
||||
#define AA_LINE_REGION_WIDTH_2_0 (2<<6)
|
||||
#define AA_LINE_REGION_WIDTH_4_0 (3<<6)
|
||||
#define AA_LINE_ENABLE ((1<<1) | 1)
|
||||
#define AA_LINE_DISABLE (1<<1)
|
||||
|
||||
#define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
|
||||
/* Dword 1 */
|
||||
#define BUF_3D_ID_COLOR_BACK (0x3<<24)
|
||||
#define BUF_3D_ID_DEPTH (0x7<<24)
|
||||
#define BUF_3D_USE_FENCE (1<<23)
|
||||
#define BUF_3D_TILED_SURFACE (1<<22)
|
||||
#define BUF_3D_TILE_WALK_X 0
|
||||
#define BUF_3D_TILE_WALK_Y (1<<21)
|
||||
#define BUF_3D_PITCH(x) (((x)/4)<<2)
|
||||
/* Dword 2 */
|
||||
#define BUF_3D_ADDR(x) ((x) & ~0x3)
|
||||
|
||||
|
||||
#define _3DSTATE_COLOR_FACTOR_CMD (CMD_3D | (0x1d<<24) | (0x1<<16))
|
||||
|
||||
#define _3DSTATE_COLOR_FACTOR_N_CMD(stage) (CMD_3D | (0x1d<<24) | \
|
||||
((0x90+(stage))<<16))
|
||||
|
||||
#define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
|
||||
|
||||
#define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16))
|
||||
|
||||
#define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16))
|
||||
|
||||
#define _3DSTATE_DFLT_Z_CMD (CMD_3D | (0x1d<<24) | (0x98<<16))
|
||||
|
||||
|
||||
#define _3DSTATE_DST_BUF_VARS_CMD (CMD_3D | (0x1d<<24) | (0x85<<16))
|
||||
/* Dword 1 */
|
||||
#define DSTORG_HORT_BIAS(x) ((x)<<20)
|
||||
#define DSTORG_VERT_BIAS(x) ((x)<<16)
|
||||
#define COLOR_4_2_2_CHNL_WRT_ALL 0
|
||||
#define COLOR_4_2_2_CHNL_WRT_Y (1<<12)
|
||||
#define COLOR_4_2_2_CHNL_WRT_CR (2<<12)
|
||||
#define COLOR_4_2_2_CHNL_WRT_CB (3<<12)
|
||||
#define COLOR_4_2_2_CHNL_WRT_CRCB (4<<12)
|
||||
#define COLR_BUF_8BIT 0
|
||||
#define COLR_BUF_RGB555 (1<<8)
|
||||
#define COLR_BUF_RGB565 (2<<8)
|
||||
#define COLR_BUF_ARGB8888 (3<<8)
|
||||
#define DEPTH_IS_Z 0
|
||||
#define DEPTH_IS_W (1<<6)
|
||||
#define DEPTH_FRMT_16_FIXED 0
|
||||
#define DEPTH_FRMT_16_FLOAT (1<<2)
|
||||
#define DEPTH_FRMT_24_FIXED_8_OTHER (2<<2)
|
||||
#define DEPTH_FRMT_24_FLOAT_8_OTHER (3<<2)
|
||||
#define VERT_LINE_STRIDE_1 (1<<1)
|
||||
#define VERT_LINE_STRIDE_0 0
|
||||
#define VERT_LINE_STRIDE_OFS_1 1
|
||||
#define VERT_LINE_STRIDE_OFS_0 0
|
||||
|
||||
|
||||
#define _3DSTATE_DRAW_RECT_CMD (CMD_3D|(0x1d<<24)|(0x80<<16)|3)
|
||||
/* Dword 1 */
|
||||
#define DRAW_RECT_DIS_DEPTH_OFS (1<<30)
|
||||
#define DRAW_DITHER_OFS_X(x) ((x)<<26)
|
||||
#define DRAW_DITHER_OFS_Y(x) ((x)<<24)
|
||||
/* Dword 2 */
|
||||
#define DRAW_YMIN(x) ((x)<<16)
|
||||
#define DRAW_XMIN(x) (x)
|
||||
/* Dword 3 */
|
||||
#define DRAW_YMAX(x) ((x)<<16)
|
||||
#define DRAW_XMAX(x) (x)
|
||||
/* Dword 4 */
|
||||
#define DRAW_YORG(x) ((x)<<16)
|
||||
#define DRAW_XORG(x) (x)
|
||||
|
||||
|
||||
#define _3DSTATE_ENABLES_1_CMD (CMD_3D|(0x3<<24))
|
||||
#define ENABLE_LOGIC_OP_MASK ((1<<23)|(1<<22))
|
||||
#define ENABLE_LOGIC_OP ((1<<23)|(1<<22))
|
||||
#define DISABLE_LOGIC_OP (1<<23)
|
||||
#define ENABLE_STENCIL_TEST ((1<<21)|(1<<20))
|
||||
#define DISABLE_STENCIL_TEST (1<<21)
|
||||
#define ENABLE_DEPTH_BIAS ((1<<11)|(1<<10))
|
||||
#define DISABLE_DEPTH_BIAS (1<<11)
|
||||
#define ENABLE_SPEC_ADD_MASK ((1<<9)|(1<<8))
|
||||
#define ENABLE_SPEC_ADD ((1<<9)|(1<<8))
|
||||
#define DISABLE_SPEC_ADD (1<<9)
|
||||
#define ENABLE_DIS_FOG_MASK ((1<<7)|(1<<6))
|
||||
#define ENABLE_FOG ((1<<7)|(1<<6))
|
||||
#define DISABLE_FOG (1<<7)
|
||||
#define ENABLE_DIS_ALPHA_TEST_MASK ((1<<5)|(1<<4))
|
||||
#define ENABLE_ALPHA_TEST ((1<<5)|(1<<4))
|
||||
#define DISABLE_ALPHA_TEST (1<<5)
|
||||
#define ENABLE_DIS_CBLEND_MASK ((1<<3)|(1<<2))
|
||||
#define ENABLE_COLOR_BLEND ((1<<3)|(1<<2))
|
||||
#define DISABLE_COLOR_BLEND (1<<3)
|
||||
#define ENABLE_DIS_DEPTH_TEST_MASK ((1<<1)|1)
|
||||
#define ENABLE_DEPTH_TEST ((1<<1)|1)
|
||||
#define DISABLE_DEPTH_TEST (1<<1)
|
||||
|
||||
/* _3DSTATE_ENABLES_2, p138 */
|
||||
#define _3DSTATE_ENABLES_2_CMD (CMD_3D|(0x4<<24))
|
||||
#define ENABLE_STENCIL_WRITE ((1<<21)|(1<<20))
|
||||
#define DISABLE_STENCIL_WRITE (1<<21)
|
||||
#define ENABLE_TEX_CACHE ((1<<17)|(1<<16))
|
||||
#define DISABLE_TEX_CACHE (1<<17)
|
||||
#define ENABLE_DITHER ((1<<9)|(1<<8))
|
||||
#define DISABLE_DITHER (1<<9)
|
||||
#define ENABLE_COLOR_MASK (1<<10)
|
||||
#define WRITEMASK_ALPHA (1<<7)
|
||||
#define WRITEMASK_ALPHA_SHIFT 7
|
||||
#define WRITEMASK_RED (1<<6)
|
||||
#define WRITEMASK_RED_SHIFT 6
|
||||
#define WRITEMASK_GREEN (1<<5)
|
||||
#define WRITEMASK_GREEN_SHIFT 5
|
||||
#define WRITEMASK_BLUE (1<<4)
|
||||
#define WRITEMASK_BLUE_SHIFT 4
|
||||
#define WRITEMASK_MASK ((1<<4)|(1<<5)|(1<<6)|(1<<7))
|
||||
#define ENABLE_COLOR_WRITE ((1<<3)|(1<<2))
|
||||
#define DISABLE_COLOR_WRITE (1<<3)
|
||||
#define ENABLE_DIS_DEPTH_WRITE_MASK 0x3
|
||||
#define ENABLE_DEPTH_WRITE ((1<<1)|1)
|
||||
#define DISABLE_DEPTH_WRITE (1<<1)
|
||||
|
||||
/* _3DSTATE_FOG_COLOR, p139 */
|
||||
#define _3DSTATE_FOG_COLOR_CMD (CMD_3D|(0x15<<24))
|
||||
#define FOG_COLOR_RED(x) ((x)<<16)
|
||||
#define FOG_COLOR_GREEN(x) ((x)<<8)
|
||||
#define FOG_COLOR_BLUE(x) (x)
|
||||
|
||||
/* _3DSTATE_FOG_MODE, p140 */
|
||||
#define _3DSTATE_FOG_MODE_CMD (CMD_3D|(0x1d<<24)|(0x89<<16)|2)
|
||||
/* Dword 1 */
|
||||
#define FOGFUNC_ENABLE (1<<31)
|
||||
#define FOGFUNC_VERTEX 0
|
||||
#define FOGFUNC_PIXEL_EXP (1<<28)
|
||||
#define FOGFUNC_PIXEL_EXP2 (2<<28)
|
||||
#define FOGFUNC_PIXEL_LINEAR (3<<28)
|
||||
#define FOGSRC_INDEX_Z (1<<27)
|
||||
#define FOGSRC_INDEX_W ((1<<27)|(1<<25))
|
||||
#define FOG_LINEAR_CONST (1<<24)
|
||||
#define FOG_CONST_1(x) ((x)<<4)
|
||||
#define ENABLE_FOG_DENSITY (1<<23)
|
||||
/* Dword 2 */
|
||||
#define FOG_CONST_2(x) (x)
|
||||
/* Dword 3 */
|
||||
#define FOG_DENSITY(x) (x)
|
||||
|
||||
/* _3DSTATE_INDEPENDENT_ALPHA_BLEND, p142 */
|
||||
#define _3DSTATE_INDPT_ALPHA_BLEND_CMD (CMD_3D|(0x0b<<24))
|
||||
#define ENABLE_INDPT_ALPHA_BLEND ((1<<23)|(1<<22))
|
||||
#define DISABLE_INDPT_ALPHA_BLEND (1<<23)
|
||||
#define ALPHA_BLENDFUNC_MASK 0x3f0000
|
||||
#define ENABLE_ALPHA_BLENDFUNC (1<<21)
|
||||
#define ABLENDFUNC_ADD 0
|
||||
#define ABLENDFUNC_SUB (1<<16)
|
||||
#define ABLENDFUNC_RVSE_SUB (2<<16)
|
||||
#define ABLENDFUNC_MIN (3<<16)
|
||||
#define ABLENDFUNC_MAX (4<<16)
|
||||
#define SRC_DST_ABLEND_MASK 0xfff
|
||||
#define ENABLE_SRC_ABLEND_FACTOR (1<<11)
|
||||
#define SRC_ABLEND_FACT(x) ((x)<<6)
|
||||
#define ENABLE_DST_ABLEND_FACTOR (1<<5)
|
||||
#define DST_ABLEND_FACT(x) (x)
|
||||
|
||||
|
||||
/* _3DSTATE_MAP_BLEND_ARG, p152 */
|
||||
#define _3DSTATE_MAP_BLEND_ARG_CMD(stage) (CMD_3D|(0x0e<<24)|((stage)<<20))
|
||||
|
||||
#define TEXPIPE_COLOR 0
|
||||
#define TEXPIPE_ALPHA (1<<18)
|
||||
#define TEXPIPE_KILL (2<<18)
|
||||
#define TEXBLEND_ARG0 0
|
||||
#define TEXBLEND_ARG1 (1<<15)
|
||||
#define TEXBLEND_ARG2 (2<<15)
|
||||
#define TEXBLEND_ARG3 (3<<15)
|
||||
#define TEXBLENDARG_MODIFY_PARMS (1<<6)
|
||||
#define TEXBLENDARG_REPLICATE_ALPHA (1<<5)
|
||||
#define TEXBLENDARG_INV_ARG (1<<4)
|
||||
#define TEXBLENDARG_ONE 0
|
||||
#define TEXBLENDARG_FACTOR 0x01
|
||||
#define TEXBLENDARG_ACCUM 0x02
|
||||
#define TEXBLENDARG_DIFFUSE 0x03
|
||||
#define TEXBLENDARG_SPEC 0x04
|
||||
#define TEXBLENDARG_CURRENT 0x05
|
||||
#define TEXBLENDARG_TEXEL0 0x06
|
||||
#define TEXBLENDARG_TEXEL1 0x07
|
||||
#define TEXBLENDARG_TEXEL2 0x08
|
||||
#define TEXBLENDARG_TEXEL3 0x09
|
||||
#define TEXBLENDARG_FACTOR_N 0x0e
|
||||
|
||||
/* _3DSTATE_MAP_BLEND_OP, p155 */
|
||||
#define _3DSTATE_MAP_BLEND_OP_CMD(stage) (CMD_3D|(0x0d<<24)|((stage)<<20))
|
||||
#if 0
|
||||
# define TEXPIPE_COLOR 0
|
||||
# define TEXPIPE_ALPHA (1<<18)
|
||||
# define TEXPIPE_KILL (2<<18)
|
||||
#endif
|
||||
#define ENABLE_TEXOUTPUT_WRT_SEL (1<<17)
|
||||
#define TEXOP_OUTPUT_CURRENT 0
|
||||
#define TEXOP_OUTPUT_ACCUM (1<<15)
|
||||
#define ENABLE_TEX_CNTRL_STAGE ((1<<12)|(1<<11))
|
||||
#define DISABLE_TEX_CNTRL_STAGE (1<<12)
|
||||
#define TEXOP_SCALE_SHIFT 9
|
||||
#define TEXOP_SCALE_1X (0 << TEXOP_SCALE_SHIFT)
|
||||
#define TEXOP_SCALE_2X (1 << TEXOP_SCALE_SHIFT)
|
||||
#define TEXOP_SCALE_4X (2 << TEXOP_SCALE_SHIFT)
|
||||
#define TEXOP_MODIFY_PARMS (1<<8)
|
||||
#define TEXOP_LAST_STAGE (1<<7)
|
||||
#define TEXBLENDOP_KILLPIXEL 0x02
|
||||
#define TEXBLENDOP_ARG1 0x01
|
||||
#define TEXBLENDOP_ARG2 0x02
|
||||
#define TEXBLENDOP_MODULATE 0x03
|
||||
#define TEXBLENDOP_ADD 0x06
|
||||
#define TEXBLENDOP_ADDSIGNED 0x07
|
||||
#define TEXBLENDOP_BLEND 0x08
|
||||
#define TEXBLENDOP_BLEND_AND_ADD 0x09
|
||||
#define TEXBLENDOP_SUBTRACT 0x0a
|
||||
#define TEXBLENDOP_DOT3 0x0b
|
||||
#define TEXBLENDOP_DOT4 0x0c
|
||||
#define TEXBLENDOP_MODULATE_AND_ADD 0x0d
|
||||
#define TEXBLENDOP_MODULATE_2X_AND_ADD 0x0e
|
||||
#define TEXBLENDOP_MODULATE_4X_AND_ADD 0x0f
|
||||
|
||||
/* _3DSTATE_MAP_BUMP_TABLE, p160 TODO */
|
||||
/* _3DSTATE_MAP_COLOR_CHROMA_KEY, p161 TODO */
|
||||
|
||||
#define _3DSTATE_MAP_COORD_TRANSFORM ((3<<29)|(0x1d<<24)|(0x8c<<16))
|
||||
#define DISABLE_TEX_TRANSFORM (1<<28)
|
||||
#define TEXTURE_SET(x) (x<<29)
|
||||
|
||||
#define _3DSTATE_VERTEX_TRANSFORM ((3<<29)|(0x1d<<24)|(0x8b<<16))
|
||||
#define DISABLE_VIEWPORT_TRANSFORM (1<<31)
|
||||
#define DISABLE_PERSPECTIVE_DIVIDE (1<<29)
|
||||
|
||||
|
||||
/* _3DSTATE_MAP_COORD_SET_BINDINGS, p162 */
|
||||
#define _3DSTATE_MAP_COORD_SETBIND_CMD (CMD_3D|(0x1d<<24)|(0x02<<16))
|
||||
#define TEXBIND_MASK3 ((1<<15)|(1<<14)|(1<<13)|(1<<12))
|
||||
#define TEXBIND_MASK2 ((1<<11)|(1<<10)|(1<<9)|(1<<8))
|
||||
#define TEXBIND_MASK1 ((1<<7)|(1<<6)|(1<<5)|(1<<4))
|
||||
#define TEXBIND_MASK0 ((1<<3)|(1<<2)|(1<<1)|1)
|
||||
|
||||
#define TEXBIND_SET3(x) ((x)<<12)
|
||||
#define TEXBIND_SET2(x) ((x)<<8)
|
||||
#define TEXBIND_SET1(x) ((x)<<4)
|
||||
#define TEXBIND_SET0(x) (x)
|
||||
|
||||
#define TEXCOORDSRC_KEEP 0
|
||||
#define TEXCOORDSRC_DEFAULT 0x01
|
||||
#define TEXCOORDSRC_VTXSET_0 0x08
|
||||
#define TEXCOORDSRC_VTXSET_1 0x09
|
||||
#define TEXCOORDSRC_VTXSET_2 0x0a
|
||||
#define TEXCOORDSRC_VTXSET_3 0x0b
|
||||
#define TEXCOORDSRC_VTXSET_4 0x0c
|
||||
#define TEXCOORDSRC_VTXSET_5 0x0d
|
||||
#define TEXCOORDSRC_VTXSET_6 0x0e
|
||||
#define TEXCOORDSRC_VTXSET_7 0x0f
|
||||
|
||||
#define MAP_UNIT(unit) ((unit)<<16)
|
||||
#define MAP_UNIT_MASK (0x7<<16)
|
||||
|
||||
/* _3DSTATE_MAP_COORD_SETS, p164 */
|
||||
#define _3DSTATE_MAP_COORD_SET_CMD (CMD_3D|(0x1c<<24)|(0x01<<19))
|
||||
#define ENABLE_TEXCOORD_PARAMS (1<<15)
|
||||
#define TEXCOORDS_ARE_NORMAL (1<<14)
|
||||
#define TEXCOORDS_ARE_IN_TEXELUNITS 0
|
||||
#define TEXCOORDTYPE_CARTESIAN 0
|
||||
#define TEXCOORDTYPE_HOMOGENEOUS (1<<11)
|
||||
#define TEXCOORDTYPE_VECTOR (2<<11)
|
||||
#define TEXCOORDTYPE_MASK (0x7<<11)
|
||||
#define ENABLE_ADDR_V_CNTL (1<<7)
|
||||
#define ENABLE_ADDR_U_CNTL (1<<3)
|
||||
#define TEXCOORD_ADDR_V_MODE(x) ((x)<<4)
|
||||
#define TEXCOORD_ADDR_U_MODE(x) (x)
|
||||
#define TEXCOORDMODE_WRAP 0
|
||||
#define TEXCOORDMODE_MIRROR 1
|
||||
#define TEXCOORDMODE_CLAMP 2
|
||||
#define TEXCOORDMODE_WRAP_SHORTEST 3
|
||||
#define TEXCOORDMODE_CLAMP_BORDER 4
|
||||
#define TEXCOORD_ADDR_V_MASK 0x70
|
||||
#define TEXCOORD_ADDR_U_MASK 0x7
|
||||
|
||||
/* _3DSTATE_MAP_CUBE, p168 TODO */
|
||||
#define _3DSTATE_MAP_CUBE (CMD_3D|(0x1c<<24)|(0x0a<<19))
|
||||
#define CUBE_NEGX_ENABLE (1<<5)
|
||||
#define CUBE_POSX_ENABLE (1<<4)
|
||||
#define CUBE_NEGY_ENABLE (1<<3)
|
||||
#define CUBE_POSY_ENABLE (1<<2)
|
||||
#define CUBE_NEGZ_ENABLE (1<<1)
|
||||
#define CUBE_POSZ_ENABLE (1<<0)
|
||||
|
||||
|
||||
/* _3DSTATE_MODES_1, p190 */
|
||||
#define _3DSTATE_MODES_1_CMD (CMD_3D|(0x08<<24))
|
||||
#define BLENDFUNC_MASK 0x3f0000
|
||||
#define ENABLE_COLR_BLND_FUNC (1<<21)
|
||||
#define BLENDFUNC_ADD 0
|
||||
#define BLENDFUNC_SUB (1<<16)
|
||||
#define BLENDFUNC_RVRSE_SUB (2<<16)
|
||||
#define BLENDFUNC_MIN (3<<16)
|
||||
#define BLENDFUNC_MAX (4<<16)
|
||||
#define SRC_DST_BLND_MASK 0xfff
|
||||
#define ENABLE_SRC_BLND_FACTOR (1<<11)
|
||||
#define ENABLE_DST_BLND_FACTOR (1<<5)
|
||||
#define SRC_BLND_FACT(x) ((x)<<6)
|
||||
#define DST_BLND_FACT(x) (x)
|
||||
|
||||
|
||||
/* _3DSTATE_MODES_2, p192 */
|
||||
#define _3DSTATE_MODES_2_CMD (CMD_3D|(0x0f<<24))
|
||||
#define ENABLE_GLOBAL_DEPTH_BIAS (1<<22)
|
||||
#define GLOBAL_DEPTH_BIAS(x) ((x)<<14)
|
||||
#define ENABLE_ALPHA_TEST_FUNC (1<<13)
|
||||
#define ENABLE_ALPHA_REF_VALUE (1<<8)
|
||||
#define ALPHA_TEST_FUNC(x) ((x)<<9)
|
||||
#define ALPHA_REF_VALUE(x) (x)
|
||||
|
||||
#define ALPHA_TEST_REF_MASK 0x3fff
|
||||
|
||||
/* _3DSTATE_MODES_3, p193 */
|
||||
#define _3DSTATE_MODES_3_CMD (CMD_3D|(0x02<<24))
|
||||
#define DEPTH_TEST_FUNC_MASK 0x1f0000
|
||||
#define ENABLE_DEPTH_TEST_FUNC (1<<20)
|
||||
/* Uses COMPAREFUNC */
|
||||
#define DEPTH_TEST_FUNC(x) ((x)<<16)
|
||||
#define ENABLE_ALPHA_SHADE_MODE (1<<11)
|
||||
#define ENABLE_FOG_SHADE_MODE (1<<9)
|
||||
#define ENABLE_SPEC_SHADE_MODE (1<<7)
|
||||
#define ENABLE_COLOR_SHADE_MODE (1<<5)
|
||||
#define ALPHA_SHADE_MODE(x) ((x)<<10)
|
||||
#define FOG_SHADE_MODE(x) ((x)<<8)
|
||||
#define SPEC_SHADE_MODE(x) ((x)<<6)
|
||||
#define COLOR_SHADE_MODE(x) ((x)<<4)
|
||||
#define CULLMODE_MASK 0xf
|
||||
#define ENABLE_CULL_MODE (1<<3)
|
||||
#define CULLMODE_BOTH 0
|
||||
#define CULLMODE_NONE 1
|
||||
#define CULLMODE_CW 2
|
||||
#define CULLMODE_CCW 3
|
||||
|
||||
#define SHADE_MODE_LINEAR 0
|
||||
#define SHADE_MODE_FLAT 0x1
|
||||
|
||||
/* _3DSTATE_MODES_4, p195 */
|
||||
#define _3DSTATE_MODES_4_CMD (CMD_3D|(0x16<<24))
|
||||
#define ENABLE_LOGIC_OP_FUNC (1<<23)
|
||||
#define LOGIC_OP_FUNC(x) ((x)<<18)
|
||||
#define LOGICOP_MASK ((1<<18)|(1<<19)|(1<<20)|(1<<21))
|
||||
#define LOGICOP_CLEAR 0
|
||||
#define LOGICOP_NOR 0x1
|
||||
#define LOGICOP_AND_INV 0x2
|
||||
#define LOGICOP_COPY_INV 0x3
|
||||
#define LOGICOP_AND_RVRSE 0x4
|
||||
#define LOGICOP_INV 0x5
|
||||
#define LOGICOP_XOR 0x6
|
||||
#define LOGICOP_NAND 0x7
|
||||
#define LOGICOP_AND 0x8
|
||||
#define LOGICOP_EQUIV 0x9
|
||||
#define LOGICOP_NOOP 0xa
|
||||
#define LOGICOP_OR_INV 0xb
|
||||
#define LOGICOP_COPY 0xc
|
||||
#define LOGICOP_OR_RVRSE 0xd
|
||||
#define LOGICOP_OR 0xe
|
||||
#define LOGICOP_SET 0xf
|
||||
#define MODE4_ENABLE_STENCIL_TEST_MASK ((1<<17)|(0xff00))
|
||||
#define ENABLE_STENCIL_TEST_MASK (1<<17)
|
||||
#define STENCIL_TEST_MASK(x) ((x)<<8)
|
||||
#define MODE4_ENABLE_STENCIL_WRITE_MASK ((1<<16)|(0x00ff))
|
||||
#define ENABLE_STENCIL_WRITE_MASK (1<<16)
|
||||
#define STENCIL_WRITE_MASK(x) ((x)&0xff)
|
||||
|
||||
/* _3DSTATE_MODES_5, p196 */
|
||||
#define _3DSTATE_MODES_5_CMD (CMD_3D|(0x0c<<24))
|
||||
#define ENABLE_SPRITE_POINT_TEX (1<<23)
|
||||
#define SPRITE_POINT_TEX_ON (1<<22)
|
||||
#define SPRITE_POINT_TEX_OFF 0
|
||||
#define FLUSH_RENDER_CACHE (1<<18)
|
||||
#define FLUSH_TEXTURE_CACHE (1<<16)
|
||||
#define FIXED_LINE_WIDTH_MASK 0xfc00
|
||||
#define ENABLE_FIXED_LINE_WIDTH (1<<15)
|
||||
#define FIXED_LINE_WIDTH(x) ((x)<<10)
|
||||
#define FIXED_POINT_WIDTH_MASK 0x3ff
|
||||
#define ENABLE_FIXED_POINT_WIDTH (1<<9)
|
||||
#define FIXED_POINT_WIDTH(x) (x)
|
||||
|
||||
/* _3DSTATE_RASTERIZATION_RULES, p198 */
|
||||
#define _3DSTATE_RASTER_RULES_CMD (CMD_3D|(0x07<<24))
|
||||
#define ENABLE_POINT_RASTER_RULE (1<<15)
|
||||
#define OGL_POINT_RASTER_RULE (1<<13)
|
||||
#define ENABLE_LINE_STRIP_PROVOKE_VRTX (1<<8)
|
||||
#define ENABLE_TRI_FAN_PROVOKE_VRTX (1<<5)
|
||||
#define ENABLE_TRI_STRIP_PROVOKE_VRTX (1<<2)
|
||||
#define LINE_STRIP_PROVOKE_VRTX(x) ((x)<<6)
|
||||
#define TRI_FAN_PROVOKE_VRTX(x) ((x)<<3)
|
||||
#define TRI_STRIP_PROVOKE_VRTX(x) (x)
|
||||
|
||||
/* _3DSTATE_SCISSOR_ENABLE, p200 */
|
||||
#define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D|(0x1c<<24)|(0x10<<19))
|
||||
#define ENABLE_SCISSOR_RECT ((1<<1) | 1)
|
||||
#define DISABLE_SCISSOR_RECT (1<<1)
|
||||
|
||||
/* _3DSTATE_SCISSOR_RECTANGLE_0, p201 */
|
||||
#define _3DSTATE_SCISSOR_RECT_0_CMD (CMD_3D|(0x1d<<24)|(0x81<<16)|1)
|
||||
/* Dword 1 */
|
||||
#define SCISSOR_RECT_0_YMIN(x) ((x)<<16)
|
||||
#define SCISSOR_RECT_0_XMIN(x) (x)
|
||||
/* Dword 2 */
|
||||
#define SCISSOR_RECT_0_YMAX(x) ((x)<<16)
|
||||
#define SCISSOR_RECT_0_XMAX(x) (x)
|
||||
|
||||
/* _3DSTATE_STENCIL_TEST, p202 */
|
||||
#define _3DSTATE_STENCIL_TEST_CMD (CMD_3D|(0x09<<24))
|
||||
#define ENABLE_STENCIL_PARMS (1<<23)
|
||||
#define STENCIL_OPS_MASK (0xffc000)
|
||||
#define STENCIL_FAIL_OP(x) ((x)<<20)
|
||||
#define STENCIL_PASS_DEPTH_FAIL_OP(x) ((x)<<17)
|
||||
#define STENCIL_PASS_DEPTH_PASS_OP(x) ((x)<<14)
|
||||
|
||||
#define ENABLE_STENCIL_TEST_FUNC_MASK ((1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9))
|
||||
#define ENABLE_STENCIL_TEST_FUNC (1<<13)
|
||||
/* Uses COMPAREFUNC */
|
||||
#define STENCIL_TEST_FUNC(x) ((x)<<9)
|
||||
#define STENCIL_REF_VALUE_MASK ((1<<8)|0xff)
|
||||
#define ENABLE_STENCIL_REF_VALUE (1<<8)
|
||||
#define STENCIL_REF_VALUE(x) (x)
|
||||
|
||||
/* _3DSTATE_VERTEX_FORMAT, p204 */
|
||||
#define _3DSTATE_VFT0_CMD (CMD_3D|(0x05<<24))
|
||||
#define VFT0_POINT_WIDTH (1<<12)
|
||||
#define VFT0_TEX_COUNT_MASK (7<<8)
|
||||
#define VFT0_TEX_COUNT_SHIFT 8
|
||||
#define VFT0_TEX_COUNT(x) ((x)<<8)
|
||||
#define VFT0_SPEC (1<<7)
|
||||
#define VFT0_DIFFUSE (1<<6)
|
||||
#define VFT0_DEPTH_OFFSET (1<<5)
|
||||
#define VFT0_XYZ (1<<1)
|
||||
#define VFT0_XYZW (2<<1)
|
||||
#define VFT0_XY (3<<1)
|
||||
#define VFT0_XYW (4<<1)
|
||||
#define VFT0_XYZW_MASK (7<<1)
|
||||
|
||||
/* _3DSTATE_VERTEX_FORMAT_2, p206 */
|
||||
#define _3DSTATE_VFT1_CMD (CMD_3D|(0x0a<<24))
|
||||
#define VFT1_TEX7_FMT(x) ((x)<<14)
|
||||
#define VFT1_TEX6_FMT(x) ((x)<<12)
|
||||
#define VFT1_TEX5_FMT(x) ((x)<<10)
|
||||
#define VFT1_TEX4_FMT(x) ((x)<<8)
|
||||
#define VFT1_TEX3_FMT(x) ((x)<<6)
|
||||
#define VFT1_TEX2_FMT(x) ((x)<<4)
|
||||
#define VFT1_TEX1_FMT(x) ((x)<<2)
|
||||
#define VFT1_TEX0_FMT(x) (x)
|
||||
#define VFT1_TEX0_MASK 3
|
||||
#define VFT1_TEX1_SHIFT 2
|
||||
#define TEXCOORDFMT_2D 0
|
||||
#define TEXCOORDFMT_3D 1
|
||||
#define TEXCOORDFMT_4D 2
|
||||
#define TEXCOORDFMT_1D 3
|
||||
|
||||
/*New stuff picked up along the way */
|
||||
|
||||
#define MLC_LOD_BIAS_MASK ((1<<7)-1)
|
||||
|
||||
|
||||
/* _3DSTATE_VERTEX_TRANSFORM, p207 */
|
||||
#define _3DSTATE_VERTEX_TRANS_CMD (CMD_3D|(0x1d<<24)|(0x8b<<16)|0)
|
||||
#define _3DSTATE_VERTEX_TRANS_MTX_CMD (CMD_3D|(0x1d<<24)|(0x8b<<16)|6)
|
||||
/* Dword 1 */
|
||||
#define ENABLE_VIEWPORT_TRANSFORM ((1<<31)|(1<<30))
|
||||
#define DISABLE_VIEWPORT_TRANSFORM (1<<31)
|
||||
#define ENABLE_PERSP_DIVIDE ((1<<29)|(1<<28))
|
||||
#define DISABLE_PERSP_DIVIDE (1<<29)
|
||||
#define VRTX_TRANS_LOAD_MATRICES 0x7421
|
||||
#define VRTX_TRANS_NO_LOAD_MATRICES 0x0000
|
||||
/* Dword 2 -> 7 are matrix elements */
|
||||
|
||||
/* _3DSTATE_W_STATE, p209 */
|
||||
#define _3DSTATE_W_STATE_CMD (CMD_3D|(0x1d<<24)|(0x8d<<16)|1)
|
||||
/* Dword 1 */
|
||||
#define MAGIC_W_STATE_DWORD1 0x00000008
|
||||
/* Dword 2 */
|
||||
#define WFAR_VALUE(x) (x)
|
||||
|
||||
|
||||
/* Stipple command, carried over from the i810, apparently:
|
||||
*/
|
||||
#define _3DSTATE_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16))
|
||||
#define ST1_ENABLE (1<<16)
|
||||
#define ST1_MASK (0xffff)
|
||||
|
||||
|
||||
|
||||
#define _3DSTATE_LOAD_STATE_IMMEDIATE_2 ((0x3<<29)|(0x1d<<24)|(0x03<<16))
|
||||
#define LOAD_TEXTURE_MAP0 (1<<11)
|
||||
#define LOAD_GLOBAL_COLOR_FACTOR (1<<6)
|
||||
|
||||
#define TM0S0_ADDRESS_MASK 0xfffffffc
|
||||
#define TM0S0_USE_FENCE (1<<1)
|
||||
|
||||
#define TM0S1_HEIGHT_SHIFT 21
|
||||
#define TM0S1_WIDTH_SHIFT 10
|
||||
#define TM0S1_PALETTE_SELECT (1<<9)
|
||||
#define TM0S1_MAPSURF_FORMAT_MASK (0x7 << 6)
|
||||
#define TM0S1_MAPSURF_FORMAT_SHIFT 6
|
||||
#define MAPSURF_8BIT_INDEXED (0<<6)
|
||||
#define MAPSURF_8BIT (1<<6)
|
||||
#define MAPSURF_16BIT (2<<6)
|
||||
#define MAPSURF_32BIT (3<<6)
|
||||
#define MAPSURF_411 (4<<6)
|
||||
#define MAPSURF_422 (5<<6)
|
||||
#define MAPSURF_COMPRESSED (6<<6)
|
||||
#define MAPSURF_4BIT_INDEXED (7<<6)
|
||||
#define TM0S1_MT_FORMAT_MASK (0x7 << 3)
|
||||
#define TM0S1_MT_FORMAT_SHIFT 3
|
||||
#define MT_4BIT_IDX_ARGB8888 (7<<3) /* SURFACE_4BIT_INDEXED */
|
||||
#define MT_8BIT_IDX_RGB565 (0<<3) /* SURFACE_8BIT_INDEXED */
|
||||
#define MT_8BIT_IDX_ARGB1555 (1<<3)
|
||||
#define MT_8BIT_IDX_ARGB4444 (2<<3)
|
||||
#define MT_8BIT_IDX_AY88 (3<<3)
|
||||
#define MT_8BIT_IDX_ABGR8888 (4<<3)
|
||||
#define MT_8BIT_IDX_BUMP_88DVDU (5<<3)
|
||||
#define MT_8BIT_IDX_BUMP_655LDVDU (6<<3)
|
||||
#define MT_8BIT_IDX_ARGB8888 (7<<3)
|
||||
#define MT_8BIT_I8 (0<<3) /* SURFACE_8BIT */
|
||||
#define MT_8BIT_L8 (1<<3)
|
||||
#define MT_16BIT_RGB565 (0<<3) /* SURFACE_16BIT */
|
||||
#define MT_16BIT_ARGB1555 (1<<3)
|
||||
#define MT_16BIT_ARGB4444 (2<<3)
|
||||
#define MT_16BIT_AY88 (3<<3)
|
||||
#define MT_16BIT_DIB_ARGB1555_8888 (4<<3)
|
||||
#define MT_16BIT_BUMP_88DVDU (5<<3)
|
||||
#define MT_16BIT_BUMP_655LDVDU (6<<3)
|
||||
#define MT_16BIT_DIB_RGB565_8888 (7<<3)
|
||||
#define MT_32BIT_ARGB8888 (0<<3) /* SURFACE_32BIT */
|
||||
#define MT_32BIT_ABGR8888 (1<<3)
|
||||
#define MT_32BIT_BUMP_XLDVDU_8888 (6<<3)
|
||||
#define MT_32BIT_DIB_8888 (7<<3)
|
||||
#define MT_411_YUV411 (0<<3) /* SURFACE_411 */
|
||||
#define MT_422_YCRCB_SWAPY (0<<3) /* SURFACE_422 */
|
||||
#define MT_422_YCRCB_NORMAL (1<<3)
|
||||
#define MT_422_YCRCB_SWAPUV (2<<3)
|
||||
#define MT_422_YCRCB_SWAPUVY (3<<3)
|
||||
#define MT_COMPRESS_DXT1 (0<<3) /* SURFACE_COMPRESSED */
|
||||
#define MT_COMPRESS_DXT2_3 (1<<3)
|
||||
#define MT_COMPRESS_DXT4_5 (2<<3)
|
||||
#define MT_COMPRESS_FXT1 (3<<3)
|
||||
#define TM0S1_COLORSPACE_CONVERSION (1 << 2)
|
||||
#define TM0S1_TILED_SURFACE (1 << 1)
|
||||
#define TM0S1_TILE_WALK (1 << 0)
|
||||
|
||||
#define TM0S2_PITCH_SHIFT 21
|
||||
#define TM0S2_CUBE_FACE_ENA_SHIFT 15
|
||||
#define TM0S2_CUBE_FACE_ENA_MASK (1<<15)
|
||||
#define TM0S2_MAP_FORMAT (1<<14)
|
||||
#define TM0S2_VERTICAL_LINE_STRIDE (1<<13)
|
||||
#define TM0S2_VERITCAL_LINE_STRIDE_OFF (1<<12)
|
||||
#define TM0S2_OUTPUT_CHAN_SHIFT 10
|
||||
#define TM0S2_OUTPUT_CHAN_MASK (3<<10)
|
||||
|
||||
#define TM0S3_MIP_FILTER_MASK (0x3<<30)
|
||||
#define TM0S3_MIP_FILTER_SHIFT 30
|
||||
#define MIPFILTER_NONE 0
|
||||
#define MIPFILTER_NEAREST 1
|
||||
#define MIPFILTER_LINEAR 3
|
||||
#define TM0S3_MAG_FILTER_MASK (0x3<<28)
|
||||
#define TM0S3_MAG_FILTER_SHIFT 28
|
||||
#define TM0S3_MIN_FILTER_MASK (0x3<<26)
|
||||
#define TM0S3_MIN_FILTER_SHIFT 26
|
||||
#define FILTER_NEAREST 0
|
||||
#define FILTER_LINEAR 1
|
||||
#define FILTER_ANISOTROPIC 2
|
||||
|
||||
#define TM0S3_LOD_BIAS_SHIFT 17
|
||||
#define TM0S3_LOD_BIAS_MASK (0x1ff<<17)
|
||||
#define TM0S3_MAX_MIP_SHIFT 9
|
||||
#define TM0S3_MAX_MIP_MASK (0xff<<9)
|
||||
#define TM0S3_MIN_MIP_SHIFT 3
|
||||
#define TM0S3_MIN_MIP_MASK (0x3f<<3)
|
||||
#define TM0S3_KILL_PIXEL (1<<2)
|
||||
#define TM0S3_KEYED_FILTER (1<<1)
|
||||
#define TM0S3_CHROMA_KEY (1<<0)
|
||||
|
||||
|
||||
/* _3DSTATE_MAP_TEXEL_STREAM, p188 */
|
||||
#define _3DSTATE_MAP_TEX_STREAM_CMD (CMD_3D|(0x1c<<24)|(0x05<<19))
|
||||
#define DISABLE_TEX_STREAM_BUMP (1<<12)
|
||||
#define ENABLE_TEX_STREAM_BUMP ((1<<12)|(1<<11))
|
||||
#define TEX_MODIFY_UNIT_0 0
|
||||
#define TEX_MODIFY_UNIT_1 (1<<8)
|
||||
#define ENABLE_TEX_STREAM_COORD_SET (1<<7)
|
||||
#define TEX_STREAM_COORD_SET(x) ((x)<<4)
|
||||
#define ENABLE_TEX_STREAM_MAP_IDX (1<<3)
|
||||
#define TEX_STREAM_MAP_IDX(x) (x)
|
||||
|
||||
|
||||
#define FLUSH_MAP_CACHE (1<<0)
|
||||
|
||||
#endif
|
||||
|
|
@ -574,9 +574,9 @@ I830UpdateRotate (ScreenPtr pScreen,
|
|||
OUT_RING(pI8301->RotatedMem2.Start | use_fence);
|
||||
|
||||
if (pI830->cpp == 1)
|
||||
OUT_RING(0x00 | (pScreen->height - 1) << 21 | (pScreen->width - 1) << 10);
|
||||
else if (pI830->cpp == 2)
|
||||
OUT_RING(0x40 | (pScreen->height - 1) << 21 | (pScreen->width - 1) << 10);
|
||||
else if (pI830->cpp == 2)
|
||||
OUT_RING(0x80 | (pScreen->height - 1) << 21 | (pScreen->width - 1) << 10);
|
||||
else
|
||||
OUT_RING(0xc0 | (pScreen->height - 1) << 21 | (pScreen->width - 1) << 10);
|
||||
|
||||
|
|
|
|||
|
|
@ -592,18 +592,53 @@ I830SetOneLineModeRatio(ScrnInfoPtr pScrn)
|
|||
pPriv->oneLineMode = FALSE;
|
||||
}
|
||||
|
||||
static CARD32 I830BoundGammaElt (CARD32 elt, CARD32 eltPrev)
|
||||
{
|
||||
elt &= 0xff;
|
||||
eltPrev &= 0xff;
|
||||
if (elt < eltPrev)
|
||||
elt = eltPrev;
|
||||
else if ((elt - eltPrev) > 0x7e)
|
||||
elt = eltPrev + 0x7e;
|
||||
return elt;
|
||||
}
|
||||
|
||||
static CARD32 I830BoundGamma (CARD32 gamma, CARD32 gammaPrev)
|
||||
{
|
||||
return (I830BoundGammaElt (gamma >> 24, gammaPrev >> 24) << 24 |
|
||||
I830BoundGammaElt (gamma >> 16, gammaPrev >> 16) << 16 |
|
||||
I830BoundGammaElt (gamma >> 8, gammaPrev >> 8) << 8 |
|
||||
I830BoundGammaElt (gamma , gammaPrev ));
|
||||
}
|
||||
|
||||
static void
|
||||
I830UpdateGamma(ScrnInfoPtr pScrn)
|
||||
{
|
||||
I830Ptr pI830 = I830PTR(pScrn);
|
||||
I830PortPrivPtr pPriv = pI830->adaptor->pPortPrivates[0].ptr;
|
||||
CARD32 gamma0 = pPriv->gamma0;
|
||||
CARD32 gamma1 = pPriv->gamma1;
|
||||
CARD32 gamma2 = pPriv->gamma2;
|
||||
CARD32 gamma3 = pPriv->gamma3;
|
||||
CARD32 gamma4 = pPriv->gamma4;
|
||||
CARD32 gamma5 = pPriv->gamma5;
|
||||
|
||||
OUTREG(OGAMC5, pPriv->gamma5);
|
||||
OUTREG(OGAMC4, pPriv->gamma4);
|
||||
OUTREG(OGAMC3, pPriv->gamma3);
|
||||
OUTREG(OGAMC2, pPriv->gamma2);
|
||||
OUTREG(OGAMC1, pPriv->gamma1);
|
||||
OUTREG(OGAMC0, pPriv->gamma0);
|
||||
ErrorF ("Original gamma: 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx\n",
|
||||
gamma0, gamma1, gamma2, gamma3, gamma4, gamma5);
|
||||
gamma1 = I830BoundGamma (gamma1, gamma0);
|
||||
gamma2 = I830BoundGamma (gamma2, gamma1);
|
||||
gamma3 = I830BoundGamma (gamma3, gamma2);
|
||||
gamma4 = I830BoundGamma (gamma4, gamma3);
|
||||
gamma5 = I830BoundGamma (gamma5, gamma4);
|
||||
ErrorF ("Bounded gamma: 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx\n",
|
||||
gamma0, gamma1, gamma2, gamma3, gamma4, gamma5);
|
||||
|
||||
OUTREG(OGAMC5, gamma5);
|
||||
OUTREG(OGAMC4, gamma4);
|
||||
OUTREG(OGAMC3, gamma3);
|
||||
OUTREG(OGAMC2, gamma2);
|
||||
OUTREG(OGAMC1, gamma1);
|
||||
OUTREG(OGAMC0, gamma0);
|
||||
}
|
||||
|
||||
static XF86VideoAdaptorPtr
|
||||
|
|
@ -849,28 +884,16 @@ I830SetPortAttribute(ScrnInfoPtr pScrn,
|
|||
#endif
|
||||
} else if (attribute == xvGamma0 && (IS_I9XX(pI830))) {
|
||||
pPriv->gamma0 = value;
|
||||
if (pPriv->gamma1 - pPriv->gamma0 > 0x7d)
|
||||
pPriv->gamma1 = pPriv->gamma0 + 0x7d;
|
||||
} else if (attribute == xvGamma1 && (IS_I9XX(pI830))) {
|
||||
pPriv->gamma1 = value;
|
||||
if (pPriv->gamma1 - pPriv->gamma0 > 0x7d)
|
||||
pPriv->gamma0 = pPriv->gamma1 - 0x7d;
|
||||
} else if (attribute == xvGamma2 && (IS_I9XX(pI830))) {
|
||||
pPriv->gamma2 = value;
|
||||
if (pPriv->gamma3 - pPriv->gamma2 > 0x7d)
|
||||
pPriv->gamma3 = pPriv->gamma2 + 0x7d;
|
||||
} else if (attribute == xvGamma3 && (IS_I9XX(pI830))) {
|
||||
pPriv->gamma3 = value;
|
||||
if (pPriv->gamma3 - pPriv->gamma2 > 0x7d)
|
||||
pPriv->gamma2 = pPriv->gamma3 - 0x7d;
|
||||
} else if (attribute == xvGamma4 && (IS_I9XX(pI830))) {
|
||||
pPriv->gamma4 = value;
|
||||
if (pPriv->gamma5 - pPriv->gamma4 > 0x7d)
|
||||
pPriv->gamma5 = pPriv->gamma4 + 0x7d;
|
||||
} else if (attribute == xvGamma5 && (IS_I9XX(pI830))) {
|
||||
pPriv->gamma5 = value;
|
||||
if (pPriv->gamma5 - pPriv->gamma4 > 0x7d)
|
||||
pPriv->gamma4 = pPriv->gamma5 - 0x7d;
|
||||
} else if (attribute == xvColorKey) {
|
||||
pPriv->colorKey = value;
|
||||
switch (pScrn->depth) {
|
||||
|
|
|
|||
|
|
@ -0,0 +1,107 @@
|
|||
/**************************************************************************
|
||||
*
|
||||
* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
|
||||
* All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the
|
||||
* "Software"), to deal in the Software without restriction, including
|
||||
* without limitation the rights to use, copy, modify, merge, publish,
|
||||
* distribute, sub license, and/or sell copies of the Software, and to
|
||||
* permit persons to whom the Software is furnished to do so, subject to
|
||||
* the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the
|
||||
* next paragraph) shall be included in all copies or substantial portions
|
||||
* of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
|
||||
* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
|
||||
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
||||
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
||||
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
**************************************************************************/
|
||||
|
||||
#ifdef HAVE_CONFIG_H
|
||||
#include "config.h"
|
||||
#endif
|
||||
|
||||
#include "i830.h"
|
||||
#include "i830_dri.h"
|
||||
|
||||
#include "i915_reg.h"
|
||||
|
||||
void I915EmitInvarientState( ScrnInfoPtr pScrn )
|
||||
{
|
||||
I830Ptr pI830 = I830PTR(pScrn);
|
||||
|
||||
BEGIN_LP_RING(20);
|
||||
|
||||
OUT_RING(_3DSTATE_AA_CMD |
|
||||
AA_LINE_ECAAR_WIDTH_ENABLE |
|
||||
AA_LINE_ECAAR_WIDTH_1_0 |
|
||||
AA_LINE_REGION_WIDTH_ENABLE |
|
||||
AA_LINE_REGION_WIDTH_1_0);
|
||||
|
||||
OUT_RING(_3DSTATE_DFLT_DIFFUSE_CMD);
|
||||
OUT_RING(0);
|
||||
|
||||
OUT_RING(_3DSTATE_DFLT_SPEC_CMD);
|
||||
OUT_RING(0);
|
||||
|
||||
OUT_RING(_3DSTATE_DFLT_Z_CMD);
|
||||
OUT_RING(0);
|
||||
|
||||
/* Don't support texture crossbar yet */
|
||||
OUT_RING(_3DSTATE_COORD_SET_BINDINGS |
|
||||
CSB_TCB(0, 0) |
|
||||
CSB_TCB(1, 1) |
|
||||
CSB_TCB(2, 2) |
|
||||
CSB_TCB(3, 3) |
|
||||
CSB_TCB(4, 4) |
|
||||
CSB_TCB(5, 5) |
|
||||
CSB_TCB(6, 6) |
|
||||
CSB_TCB(7, 7));
|
||||
|
||||
OUT_RING(_3DSTATE_RASTER_RULES_CMD |
|
||||
ENABLE_POINT_RASTER_RULE |
|
||||
OGL_POINT_RASTER_RULE |
|
||||
ENABLE_LINE_STRIP_PROVOKE_VRTX |
|
||||
ENABLE_TRI_FAN_PROVOKE_VRTX |
|
||||
LINE_STRIP_PROVOKE_VRTX(1) |
|
||||
TRI_FAN_PROVOKE_VRTX(2) |
|
||||
ENABLE_TEXKILL_3D_4D |
|
||||
TEXKILL_4D);
|
||||
|
||||
/* Need to initialize this to zero.
|
||||
*/
|
||||
OUT_RING(_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
|
||||
I1_LOAD_S(3) |
|
||||
(1));
|
||||
OUT_RING(0);
|
||||
|
||||
/* XXX: Use this */
|
||||
OUT_RING(_3DSTATE_SCISSOR_ENABLE_CMD |
|
||||
DISABLE_SCISSOR_RECT);
|
||||
|
||||
OUT_RING(_3DSTATE_SCISSOR_RECT_0_CMD);
|
||||
OUT_RING(0);
|
||||
OUT_RING(0);
|
||||
|
||||
OUT_RING(_3DSTATE_DEPTH_SUBRECT_DISABLE);
|
||||
|
||||
OUT_RING(_3DSTATE_LOAD_INDIRECT | 0); /* disable indirect state */
|
||||
OUT_RING(0);
|
||||
|
||||
/* Don't support twosided stencil yet */
|
||||
OUT_RING(_3DSTATE_BACKFACE_STENCIL_OPS |
|
||||
BFO_ENABLE_STENCIL_TWO_SIDE |
|
||||
0 );
|
||||
|
||||
OUT_RING(0);
|
||||
|
||||
ADVANCE_LP_RING();
|
||||
}
|
||||
|
|
@ -0,0 +1,831 @@
|
|||
/**************************************************************************
|
||||
*
|
||||
* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
|
||||
* All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the
|
||||
* "Software"), to deal in the Software without restriction, including
|
||||
* without limitation the rights to use, copy, modify, merge, publish,
|
||||
* distribute, sub license, and/or sell copies of the Software, and to
|
||||
* permit persons to whom the Software is furnished to do so, subject to
|
||||
* the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the
|
||||
* next paragraph) shall be included in all copies or substantial portions
|
||||
* of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
|
||||
* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
|
||||
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
||||
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
||||
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
**************************************************************************/
|
||||
|
||||
|
||||
#ifndef _I915_REG_H_
|
||||
#define _I915_REG_H_
|
||||
|
||||
#define I915_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value)
|
||||
|
||||
#define CMD_3D (0x3<<29)
|
||||
|
||||
#define PRIM3D_INLINE (CMD_3D | (0x1f<<24))
|
||||
#define PRIM3D_TRILIST (0x0<<18)
|
||||
#define PRIM3D_TRISTRIP (0x1<<18)
|
||||
#define PRIM3D_TRISTRIP_RVRSE (0x2<<18)
|
||||
#define PRIM3D_TRIFAN (0x3<<18)
|
||||
#define PRIM3D_POLY (0x4<<18)
|
||||
#define PRIM3D_LINELIST (0x5<<18)
|
||||
#define PRIM3D_LINESTRIP (0x6<<18)
|
||||
#define PRIM3D_RECTLIST (0x7<<18)
|
||||
#define PRIM3D_POINTLIST (0x8<<18)
|
||||
#define PRIM3D_DIB (0x9<<18)
|
||||
#define PRIM3D_CLEAR_RECT (0xa<<18)
|
||||
#define PRIM3D_ZONE_INIT (0xd<<18)
|
||||
#define PRIM3D_MASK (0x1f<<18)
|
||||
|
||||
/* p137 */
|
||||
#define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
|
||||
#define AA_LINE_ECAAR_WIDTH_ENABLE (1<<16)
|
||||
#define AA_LINE_ECAAR_WIDTH_0_5 0
|
||||
#define AA_LINE_ECAAR_WIDTH_1_0 (1<<14)
|
||||
#define AA_LINE_ECAAR_WIDTH_2_0 (2<<14)
|
||||
#define AA_LINE_ECAAR_WIDTH_4_0 (3<<14)
|
||||
#define AA_LINE_REGION_WIDTH_ENABLE (1<<8)
|
||||
#define AA_LINE_REGION_WIDTH_0_5 0
|
||||
#define AA_LINE_REGION_WIDTH_1_0 (1<<6)
|
||||
#define AA_LINE_REGION_WIDTH_2_0 (2<<6)
|
||||
#define AA_LINE_REGION_WIDTH_4_0 (3<<6)
|
||||
|
||||
/* 3DSTATE_BACKFACE_STENCIL_OPS, p138*/
|
||||
#define _3DSTATE_BACKFACE_STENCIL_OPS (CMD_3D | (0x8<<24))
|
||||
#define BFO_ENABLE_STENCIL_REF (1<<23)
|
||||
#define BFO_STENCIL_REF_SHIFT 15
|
||||
#define BFO_STENCIL_REF_MASK (0xff<<15)
|
||||
#define BFO_ENABLE_STENCIL_FUNCS (1<<14)
|
||||
#define BFO_STENCIL_TEST_SHIFT 11
|
||||
#define BFO_STENCIL_TEST_MASK (0x7<<11)
|
||||
#define BFO_STENCIL_FAIL_SHIFT 8
|
||||
#define BFO_STENCIL_FAIL_MASK (0x7<<8)
|
||||
#define BFO_STENCIL_PASS_Z_FAIL_SHIFT 5
|
||||
#define BFO_STENCIL_PASS_Z_FAIL_MASK (0x7<<5)
|
||||
#define BFO_STENCIL_PASS_Z_PASS_SHIFT 2
|
||||
#define BFO_STENCIL_PASS_Z_PASS_MASK (0x7<<2)
|
||||
#define BFO_ENABLE_STENCIL_TWO_SIDE (1<<1)
|
||||
#define BFO_STENCIL_TWO_SIDE (1<<0)
|
||||
|
||||
|
||||
/* 3DSTATE_BACKFACE_STENCIL_MASKS, p140 */
|
||||
#define _3DSTATE_BACKFACE_STENCIL_MASKS (CMD_3D | (0x9<<24))
|
||||
#define BFM_ENABLE_STENCIL_TEST_MASK (1<<17)
|
||||
#define BFM_ENABLE_STENCIL_WRITE_MASK (1<<16)
|
||||
#define BFM_STENCIL_TEST_MASK_SHIFT 8
|
||||
#define BFM_STENCIL_TEST_MASK_MASK (0xff<<8)
|
||||
#define BFM_STENCIL_WRITE_MASK_SHIFT 0
|
||||
#define BFM_STENCIL_WRITE_MASK_MASK (0xff<<0)
|
||||
|
||||
|
||||
|
||||
/* 3DSTATE_BIN_CONTROL p141 */
|
||||
|
||||
/* p143 */
|
||||
#define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
|
||||
/* Dword 1 */
|
||||
#define BUF_3D_ID_COLOR_BACK (0x3<<24)
|
||||
#define BUF_3D_ID_DEPTH (0x7<<24)
|
||||
#define BUF_3D_USE_FENCE (1<<23)
|
||||
#define BUF_3D_TILED_SURFACE (1<<22)
|
||||
#define BUF_3D_TILE_WALK_X 0
|
||||
#define BUF_3D_TILE_WALK_Y (1<<21)
|
||||
#define BUF_3D_PITCH(x) (((x)/4)<<2)
|
||||
/* Dword 2 */
|
||||
#define BUF_3D_ADDR(x) ((x) & ~0x3)
|
||||
|
||||
|
||||
/* 3DSTATE_CHROMA_KEY */
|
||||
|
||||
/* 3DSTATE_CLEAR_PARAMETERS, p150 */
|
||||
|
||||
/* 3DSTATE_CONSTANT_BLEND_COLOR, p153 */
|
||||
#define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
|
||||
|
||||
|
||||
|
||||
/* 3DSTATE_COORD_SET_BINDINGS, p154 */
|
||||
#define _3DSTATE_COORD_SET_BINDINGS (CMD_3D | (0x16<<24))
|
||||
#define CSB_TCB(iunit, eunit) ((eunit)<<(iunit*3))
|
||||
|
||||
/* p156 */
|
||||
#define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16))
|
||||
|
||||
/* p157 */
|
||||
#define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16))
|
||||
|
||||
/* p158 */
|
||||
#define _3DSTATE_DFLT_Z_CMD (CMD_3D | (0x1d<<24) | (0x98<<16))
|
||||
|
||||
|
||||
/* 3DSTATE_DEPTH_OFFSET_SCALE, p159 */
|
||||
#define _3DSTATE_DEPTH_OFFSET_SCALE (CMD_3D | (0x1d<<24) | (0x97<<16))
|
||||
/* scale in dword 1 */
|
||||
|
||||
|
||||
/* 3DSTATE_DEPTH_SUBRECT_DISABLE, p160 */
|
||||
#define _3DSTATE_DEPTH_SUBRECT_DISABLE (CMD_3D | (0x1c<<24) | (0x11<19) | 0x2)
|
||||
|
||||
/* p161 */
|
||||
#define _3DSTATE_DST_BUF_VARS_CMD (CMD_3D | (0x1d<<24) | (0x85<<16))
|
||||
/* Dword 1 */
|
||||
#define TEX_DEFAULT_COLOR_OGL (0<<30)
|
||||
#define TEX_DEFAULT_COLOR_D3D (1<<30)
|
||||
#define ZR_EARLY_DEPTH (1<<29)
|
||||
#define LOD_PRECLAMP_OGL (1<<28)
|
||||
#define LOD_PRECLAMP_D3D (0<<28)
|
||||
#define DITHER_FULL_ALWAYS (0<<26)
|
||||
#define DITHER_FULL_ON_FB_BLEND (1<<26)
|
||||
#define DITHER_CLAMPED_ALWAYS (2<<26)
|
||||
#define LINEAR_GAMMA_BLEND_32BPP (1<<25)
|
||||
#define DEBUG_DISABLE_ENH_DITHER (1<<24)
|
||||
#define DSTORG_HORT_BIAS(x) ((x)<<20)
|
||||
#define DSTORG_VERT_BIAS(x) ((x)<<16)
|
||||
#define COLOR_4_2_2_CHNL_WRT_ALL 0
|
||||
#define COLOR_4_2_2_CHNL_WRT_Y (1<<12)
|
||||
#define COLOR_4_2_2_CHNL_WRT_CR (2<<12)
|
||||
#define COLOR_4_2_2_CHNL_WRT_CB (3<<12)
|
||||
#define COLOR_4_2_2_CHNL_WRT_CRCB (4<<12)
|
||||
#define COLR_BUF_8BIT 0
|
||||
#define COLR_BUF_RGB555 (1<<8)
|
||||
#define COLR_BUF_RGB565 (2<<8)
|
||||
#define COLR_BUF_ARGB8888 (3<<8)
|
||||
#define DEPTH_FRMT_16_FIXED 0
|
||||
#define DEPTH_FRMT_16_FLOAT (1<<2)
|
||||
#define DEPTH_FRMT_24_FIXED_8_OTHER (2<<2)
|
||||
#define VERT_LINE_STRIDE_1 (1<<1)
|
||||
#define VERT_LINE_STRIDE_0 (0<<1)
|
||||
#define VERT_LINE_STRIDE_OFS_1 1
|
||||
#define VERT_LINE_STRIDE_OFS_0 0
|
||||
|
||||
/* p166 */
|
||||
#define _3DSTATE_DRAW_RECT_CMD (CMD_3D|(0x1d<<24)|(0x80<<16)|3)
|
||||
/* Dword 1 */
|
||||
#define DRAW_RECT_DIS_DEPTH_OFS (1<<30)
|
||||
#define DRAW_DITHER_OFS_X(x) ((x)<<26)
|
||||
#define DRAW_DITHER_OFS_Y(x) ((x)<<24)
|
||||
/* Dword 2 */
|
||||
#define DRAW_YMIN(x) ((x)<<16)
|
||||
#define DRAW_XMIN(x) (x)
|
||||
/* Dword 3 */
|
||||
#define DRAW_YMAX(x) ((x)<<16)
|
||||
#define DRAW_XMAX(x) (x)
|
||||
/* Dword 4 */
|
||||
#define DRAW_YORG(x) ((x)<<16)
|
||||
#define DRAW_XORG(x) (x)
|
||||
|
||||
|
||||
/* 3DSTATE_FILTER_COEFFICIENTS_4X4, p170 */
|
||||
|
||||
/* 3DSTATE_FILTER_COEFFICIENTS_6X5, p172 */
|
||||
|
||||
|
||||
/* _3DSTATE_FOG_COLOR, p173 */
|
||||
#define _3DSTATE_FOG_COLOR_CMD (CMD_3D|(0x15<<24))
|
||||
#define FOG_COLOR_RED(x) ((x)<<16)
|
||||
#define FOG_COLOR_GREEN(x) ((x)<<8)
|
||||
#define FOG_COLOR_BLUE(x) (x)
|
||||
|
||||
/* _3DSTATE_FOG_MODE, p174 */
|
||||
#define _3DSTATE_FOG_MODE_CMD (CMD_3D|(0x1d<<24)|(0x89<<16)|2)
|
||||
/* Dword 1 */
|
||||
#define FMC1_FOGFUNC_MODIFY_ENABLE (1<<31)
|
||||
#define FMC1_FOGFUNC_VERTEX (0<<28)
|
||||
#define FMC1_FOGFUNC_PIXEL_EXP (1<<28)
|
||||
#define FMC1_FOGFUNC_PIXEL_EXP2 (2<<28)
|
||||
#define FMC1_FOGFUNC_PIXEL_LINEAR (3<<28)
|
||||
#define FMC1_FOGFUNC_MASK (3<<28)
|
||||
#define FMC1_FOGINDEX_MODIFY_ENABLE (1<<27)
|
||||
#define FMC1_FOGINDEX_Z (0<<25)
|
||||
#define FMC1_FOGINDEX_W (1<<25)
|
||||
#define FMC1_C1_C2_MODIFY_ENABLE (1<<24)
|
||||
#define FMC1_DENSITY_MODIFY_ENABLE (1<<23)
|
||||
#define FMC1_C1_ONE (1<<13)
|
||||
#define FMC1_C1_MASK (0xffff<<4)
|
||||
/* Dword 2 */
|
||||
#define FMC2_C2_ONE (1<<16)
|
||||
/* Dword 3 */
|
||||
#define FMC3_D_ONE (1<<16)
|
||||
|
||||
|
||||
|
||||
/* _3DSTATE_INDEPENDENT_ALPHA_BLEND, p177 */
|
||||
#define _3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD (CMD_3D|(0x0b<<24))
|
||||
#define IAB_MODIFY_ENABLE (1<<23)
|
||||
#define IAB_ENABLE (1<<22)
|
||||
#define IAB_MODIFY_FUNC (1<<21)
|
||||
#define IAB_FUNC_SHIFT 16
|
||||
#define IAB_MODIFY_SRC_FACTOR (1<<11)
|
||||
#define IAB_SRC_FACTOR_SHIFT 6
|
||||
#define IAB_SRC_FACTOR_MASK (BLENDFACT_MASK<<6)
|
||||
#define IAB_MODIFY_DST_FACTOR (1<<5)
|
||||
#define IAB_DST_FACTOR_SHIFT 0
|
||||
#define IAB_DST_FACTOR_MASK (BLENDFACT_MASK<<0)
|
||||
|
||||
|
||||
#define BLENDFUNC_ADD 0x0
|
||||
#define BLENDFUNC_SUBTRACT 0x1
|
||||
#define BLENDFUNC_REVERSE_SUBTRACT 0x2
|
||||
#define BLENDFUNC_MIN 0x3
|
||||
#define BLENDFUNC_MAX 0x4
|
||||
#define BLENDFUNC_MASK 0x7
|
||||
|
||||
/* 3DSTATE_LOAD_INDIRECT, p180 */
|
||||
|
||||
#define _3DSTATE_LOAD_INDIRECT (CMD_3D|(0x1d<<24)|(0x7<<16))
|
||||
#define LI0_STATE_STATIC_INDIRECT (0x01<<8)
|
||||
#define LI0_STATE_DYNAMIC_INDIRECT (0x02<<8)
|
||||
#define LI0_STATE_SAMPLER (0x04<<8)
|
||||
#define LI0_STATE_MAP (0x08<<8)
|
||||
#define LI0_STATE_PROGRAM (0x10<<8)
|
||||
#define LI0_STATE_CONSTANTS (0x20<<8)
|
||||
|
||||
#define SIS0_BUFFER_ADDRESS(x) ((x)&~0x3)
|
||||
#define SIS0_FORCE_LOAD (1<<1)
|
||||
#define SIS0_BUFFER_VALID (1<<0)
|
||||
#define SIS1_BUFFER_LENGTH(x) ((x)&0xff)
|
||||
|
||||
#define DIS0_BUFFER_ADDRESS(x) ((x)&~0x3)
|
||||
#define DIS0_BUFFER_RESET (1<<1)
|
||||
#define DIS0_BUFFER_VALID (1<<0)
|
||||
|
||||
#define SSB0_BUFFER_ADDRESS(x) ((x)&~0x3)
|
||||
#define SSB0_FORCE_LOAD (1<<1)
|
||||
#define SSB0_BUFFER_VALID (1<<0)
|
||||
#define SSB1_BUFFER_LENGTH(x) ((x)&0xff)
|
||||
|
||||
#define MSB0_BUFFER_ADDRESS(x) ((x)&~0x3)
|
||||
#define MSB0_FORCE_LOAD (1<<1)
|
||||
#define MSB0_BUFFER_VALID (1<<0)
|
||||
#define MSB1_BUFFER_LENGTH(x) ((x)&0xff)
|
||||
|
||||
#define PSP0_BUFFER_ADDRESS(x) ((x)&~0x3)
|
||||
#define PSP0_FORCE_LOAD (1<<1)
|
||||
#define PSP0_BUFFER_VALID (1<<0)
|
||||
#define PSP1_BUFFER_LENGTH(x) ((x)&0xff)
|
||||
|
||||
#define PSC0_BUFFER_ADDRESS(x) ((x)&~0x3)
|
||||
#define PSC0_FORCE_LOAD (1<<1)
|
||||
#define PSC0_BUFFER_VALID (1<<0)
|
||||
#define PSC1_BUFFER_LENGTH(x) ((x)&0xff)
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* _3DSTATE_RASTERIZATION_RULES */
|
||||
#define _3DSTATE_RASTER_RULES_CMD (CMD_3D|(0x07<<24))
|
||||
#define ENABLE_POINT_RASTER_RULE (1<<15)
|
||||
#define OGL_POINT_RASTER_RULE (1<<13)
|
||||
#define ENABLE_TEXKILL_3D_4D (1<<10)
|
||||
#define TEXKILL_3D (0<<9)
|
||||
#define TEXKILL_4D (1<<9)
|
||||
#define ENABLE_LINE_STRIP_PROVOKE_VRTX (1<<8)
|
||||
#define ENABLE_TRI_FAN_PROVOKE_VRTX (1<<5)
|
||||
#define LINE_STRIP_PROVOKE_VRTX(x) ((x)<<6)
|
||||
#define TRI_FAN_PROVOKE_VRTX(x) ((x)<<3)
|
||||
|
||||
/* _3DSTATE_SCISSOR_ENABLE, p256 */
|
||||
#define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D|(0x1c<<24)|(0x10<<19))
|
||||
#define ENABLE_SCISSOR_RECT ((1<<1) | 1)
|
||||
#define DISABLE_SCISSOR_RECT (1<<1)
|
||||
|
||||
/* _3DSTATE_SCISSOR_RECTANGLE_0, p257 */
|
||||
#define _3DSTATE_SCISSOR_RECT_0_CMD (CMD_3D|(0x1d<<24)|(0x81<<16)|1)
|
||||
/* Dword 1 */
|
||||
#define SCISSOR_RECT_0_YMIN(x) ((x)<<16)
|
||||
#define SCISSOR_RECT_0_XMIN(x) (x)
|
||||
/* Dword 2 */
|
||||
#define SCISSOR_RECT_0_YMAX(x) ((x)<<16)
|
||||
#define SCISSOR_RECT_0_XMAX(x) (x)
|
||||
|
||||
/* p189 */
|
||||
#define _3DSTATE_LOAD_STATE_IMMEDIATE_1 ((0x3<<29)|(0x1d<<24)|(0x04<<16))
|
||||
#define I1_LOAD_S(n) (1<<(4+n))
|
||||
|
||||
#define S0_VB_OFFSET_MASK 0xffffffc
|
||||
#define S0_AUTO_CACHE_INV_DISABLE (1<<0)
|
||||
|
||||
#define S1_VERTEX_WIDTH_SHIFT 24
|
||||
#define S1_VERTEX_WIDTH_MASK (0x3f<<24)
|
||||
#define S1_VERTEX_PITCH_SHIFT 16
|
||||
#define S1_VERTEX_PITCH_MASK (0x3f<<16)
|
||||
|
||||
#define TEXCOORDFMT_2D 0x0
|
||||
#define TEXCOORDFMT_3D 0x1
|
||||
#define TEXCOORDFMT_4D 0x2
|
||||
#define TEXCOORDFMT_1D 0x3
|
||||
#define TEXCOORDFMT_2D_16 0x4
|
||||
#define TEXCOORDFMT_4D_16 0x5
|
||||
#define TEXCOORDFMT_NOT_PRESENT 0xf
|
||||
#define S2_TEXCOORD_FMT0_MASK 0xf
|
||||
#define S2_TEXCOORD_FMT1_SHIFT 4
|
||||
#define S2_TEXCOORD_FMT(unit, type) ((type)<<(unit*4))
|
||||
#define S2_TEXCOORD_NONE (~0)
|
||||
|
||||
/* S3 not interesting */
|
||||
|
||||
#define S4_POINT_WIDTH_SHIFT 23
|
||||
#define S4_POINT_WIDTH_MASK (0x1ff<<23)
|
||||
#define S4_LINE_WIDTH_SHIFT 19
|
||||
#define S4_LINE_WIDTH_ONE (0x2<<19)
|
||||
#define S4_LINE_WIDTH_MASK (0xf<<19)
|
||||
#define S4_FLATSHADE_ALPHA (1<<18)
|
||||
#define S4_FLATSHADE_FOG (1<<17)
|
||||
#define S4_FLATSHADE_SPECULAR (1<<16)
|
||||
#define S4_FLATSHADE_COLOR (1<<15)
|
||||
#define S4_CULLMODE_BOTH (0<<13)
|
||||
#define S4_CULLMODE_NONE (1<<13)
|
||||
#define S4_CULLMODE_CW (2<<13)
|
||||
#define S4_CULLMODE_CCW (3<<13)
|
||||
#define S4_CULLMODE_MASK (3<<13)
|
||||
#define S4_VFMT_POINT_WIDTH (1<<12)
|
||||
#define S4_VFMT_SPEC_FOG (1<<11)
|
||||
#define S4_VFMT_COLOR (1<<10)
|
||||
#define S4_VFMT_DEPTH_OFFSET (1<<9)
|
||||
#define S4_VFMT_XYZ (1<<6)
|
||||
#define S4_VFMT_XYZW (2<<6)
|
||||
#define S4_VFMT_XY (3<<6)
|
||||
#define S4_VFMT_XYW (4<<6)
|
||||
#define S4_VFMT_XYZW_MASK (7<<6)
|
||||
#define S4_FORCE_DEFAULT_DIFFUSE (1<<5)
|
||||
#define S4_FORCE_DEFAULT_SPECULAR (1<<4)
|
||||
#define S4_LOCAL_DEPTH_OFFSET_ENABLE (1<<3)
|
||||
#define S4_VFMT_FOG_PARAM (1<<2)
|
||||
#define S4_SPRITE_POINT_ENABLE (1<<1)
|
||||
#define S4_LINE_ANTIALIAS_ENABLE (1<<0)
|
||||
|
||||
#define S4_VFMT_MASK (S4_VFMT_POINT_WIDTH | \
|
||||
S4_VFMT_SPEC_FOG | \
|
||||
S4_VFMT_COLOR | \
|
||||
S4_VFMT_DEPTH_OFFSET | \
|
||||
S4_VFMT_XYZW_MASK | \
|
||||
S4_VFMT_FOG_PARAM)
|
||||
|
||||
|
||||
#define S5_WRITEDISABLE_ALPHA (1<<31)
|
||||
#define S5_WRITEDISABLE_RED (1<<30)
|
||||
#define S5_WRITEDISABLE_GREEN (1<<29)
|
||||
#define S5_WRITEDISABLE_BLUE (1<<28)
|
||||
#define S5_WRITEDISABLE_MASK (0xf<<28)
|
||||
#define S5_FORCE_DEFAULT_POINT_SIZE (1<<27)
|
||||
#define S5_LAST_PIXEL_ENABLE (1<<26)
|
||||
#define S5_GLOBAL_DEPTH_OFFSET_ENABLE (1<<25)
|
||||
#define S5_FOG_ENABLE (1<<24)
|
||||
#define S5_STENCIL_REF_SHIFT 16
|
||||
#define S5_STENCIL_REF_MASK (0xff<<16)
|
||||
#define S5_STENCIL_TEST_FUNC_SHIFT 13
|
||||
#define S5_STENCIL_TEST_FUNC_MASK (0x7<<13)
|
||||
#define S5_STENCIL_FAIL_SHIFT 10
|
||||
#define S5_STENCIL_FAIL_MASK (0x7<<10)
|
||||
#define S5_STENCIL_PASS_Z_FAIL_SHIFT 7
|
||||
#define S5_STENCIL_PASS_Z_FAIL_MASK (0x7<<7)
|
||||
#define S5_STENCIL_PASS_Z_PASS_SHIFT 4
|
||||
#define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4)
|
||||
#define S5_STENCIL_WRITE_ENABLE (1<<3)
|
||||
#define S5_STENCIL_TEST_ENABLE (1<<2)
|
||||
#define S5_COLOR_DITHER_ENABLE (1<<1)
|
||||
#define S5_LOGICOP_ENABLE (1<<0)
|
||||
|
||||
|
||||
#define S6_ALPHA_TEST_ENABLE (1<<31)
|
||||
#define S6_ALPHA_TEST_FUNC_SHIFT 28
|
||||
#define S6_ALPHA_TEST_FUNC_MASK (0x7<<28)
|
||||
#define S6_ALPHA_REF_SHIFT 20
|
||||
#define S6_ALPHA_REF_MASK (0xff<<20)
|
||||
#define S6_DEPTH_TEST_ENABLE (1<<19)
|
||||
#define S6_DEPTH_TEST_FUNC_SHIFT 16
|
||||
#define S6_DEPTH_TEST_FUNC_MASK (0x7<<16)
|
||||
#define S6_CBUF_BLEND_ENABLE (1<<15)
|
||||
#define S6_CBUF_BLEND_FUNC_SHIFT 12
|
||||
#define S6_CBUF_BLEND_FUNC_MASK (0x7<<12)
|
||||
#define S6_CBUF_SRC_BLEND_FACT_SHIFT 8
|
||||
#define S6_CBUF_SRC_BLEND_FACT_MASK (0xf<<8)
|
||||
#define S6_CBUF_DST_BLEND_FACT_SHIFT 4
|
||||
#define S6_CBUF_DST_BLEND_FACT_MASK (0xf<<4)
|
||||
#define S6_DEPTH_WRITE_ENABLE (1<<3)
|
||||
#define S6_COLOR_WRITE_ENABLE (1<<2)
|
||||
#define S6_TRISTRIP_PV_SHIFT 0
|
||||
#define S6_TRISTRIP_PV_MASK (0x3<<0)
|
||||
|
||||
#define S7_DEPTH_OFFSET_CONST_MASK ~0
|
||||
|
||||
/* 3DSTATE_MAP_DEINTERLACER_PARAMETERS */
|
||||
/* 3DSTATE_MAP_PALETTE_LOAD_32, p206 */
|
||||
|
||||
|
||||
/* _3DSTATE_MODES_4, p218 */
|
||||
#define _3DSTATE_MODES_4_CMD (CMD_3D|(0x0d<<24))
|
||||
#define ENABLE_LOGIC_OP_FUNC (1<<23)
|
||||
#define LOGIC_OP_FUNC(x) ((x)<<18)
|
||||
#define LOGICOP_MASK (0xf<<18)
|
||||
#define MODE4_ENABLE_STENCIL_TEST_MASK ((1<<17)|(0xff00))
|
||||
#define ENABLE_STENCIL_TEST_MASK (1<<17)
|
||||
#define STENCIL_TEST_MASK(x) ((x)<<8)
|
||||
#define MODE4_ENABLE_STENCIL_WRITE_MASK ((1<<16)|(0x00ff))
|
||||
#define ENABLE_STENCIL_WRITE_MASK (1<<16)
|
||||
#define STENCIL_WRITE_MASK(x) ((x)&0xff)
|
||||
|
||||
/* _3DSTATE_MODES_5, p220 */
|
||||
#define _3DSTATE_MODES_5_CMD (CMD_3D|(0x0c<<24))
|
||||
#define PIPELINE_FLUSH_RENDER_CACHE (1<<18)
|
||||
#define PIPELINE_FLUSH_TEXTURE_CACHE (1<<16)
|
||||
|
||||
|
||||
/* p221 */
|
||||
#define _3DSTATE_PIXEL_SHADER_CONSTANTS (CMD_3D|(0x1d<<24)|(0x6<<16))
|
||||
#define PS1_REG(n) (1<<(n))
|
||||
#define PS2_CONST_X(n) (n)
|
||||
#define PS3_CONST_Y(n) (n)
|
||||
#define PS4_CONST_Z(n) (n)
|
||||
#define PS5_CONST_W(n) (n)
|
||||
|
||||
/* p222 */
|
||||
|
||||
|
||||
#define I915_MAX_TEX_INDIRECT 4
|
||||
#define I915_MAX_TEX_INSN 32
|
||||
#define I915_MAX_ALU_INSN 64
|
||||
#define I915_MAX_DECL_INSN 27
|
||||
#define I915_MAX_TEMPORARY 16
|
||||
|
||||
|
||||
/* Each instruction is 3 dwords long, though most don't require all
|
||||
* this space. Maximum of 123 instructions. Smaller maxes per insn
|
||||
* type.
|
||||
*/
|
||||
#define _3DSTATE_PIXEL_SHADER_PROGRAM (CMD_3D|(0x1d<<24)|(0x5<<16))
|
||||
|
||||
#define REG_TYPE_R 0 /* temporary regs, no need to
|
||||
* dcl, must be written before
|
||||
* read -- Preserved between
|
||||
* phases.
|
||||
*/
|
||||
#define REG_TYPE_T 1 /* Interpolated values, must be
|
||||
* dcl'ed before use.
|
||||
*
|
||||
* 0..7: texture coord,
|
||||
* 8: diffuse spec,
|
||||
* 9: specular color,
|
||||
* 10: fog parameter in w.
|
||||
*/
|
||||
#define REG_TYPE_CONST 2 /* Restriction: only one const
|
||||
* can be referenced per
|
||||
* instruction, though it may be
|
||||
* selected for multiple inputs.
|
||||
* Constants not initialized
|
||||
* default to zero.
|
||||
*/
|
||||
#define REG_TYPE_S 3 /* sampler */
|
||||
#define REG_TYPE_OC 4 /* output color (rgba) */
|
||||
#define REG_TYPE_OD 5 /* output depth (w), xyz are
|
||||
* temporaries. If not written,
|
||||
* interpolated depth is used?
|
||||
*/
|
||||
#define REG_TYPE_U 6 /* unpreserved temporaries */
|
||||
#define REG_TYPE_MASK 0x7
|
||||
#define REG_NR_MASK 0xf
|
||||
|
||||
|
||||
/* REG_TYPE_T:
|
||||
*/
|
||||
#define T_TEX0 0
|
||||
#define T_TEX1 1
|
||||
#define T_TEX2 2
|
||||
#define T_TEX3 3
|
||||
#define T_TEX4 4
|
||||
#define T_TEX5 5
|
||||
#define T_TEX6 6
|
||||
#define T_TEX7 7
|
||||
#define T_DIFFUSE 8
|
||||
#define T_SPECULAR 9
|
||||
#define T_FOG_W 10 /* interpolated fog is in W coord */
|
||||
|
||||
/* Arithmetic instructions */
|
||||
|
||||
/* .replicate_swizzle == selection and replication of a particular
|
||||
* scalar channel, ie., .xxxx, .yyyy, .zzzz or .wwww
|
||||
*/
|
||||
#define A0_NOP (0x0<<24) /* no operation */
|
||||
#define A0_ADD (0x1<<24) /* dst = src0 + src1 */
|
||||
#define A0_MOV (0x2<<24) /* dst = src0 */
|
||||
#define A0_MUL (0x3<<24) /* dst = src0 * src1 */
|
||||
#define A0_MAD (0x4<<24) /* dst = src0 * src1 + src2 */
|
||||
#define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */
|
||||
#define A0_DP3 (0x6<<24) /* dst.xyzw = src0.xyz dot src1.xyz */
|
||||
#define A0_DP4 (0x7<<24) /* dst.xyzw = src0.xyzw dot src1.xyzw */
|
||||
#define A0_FRC (0x8<<24) /* dst = src0 - floor(src0) */
|
||||
#define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */
|
||||
#define A0_RSQ (0xa<<24) /* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */
|
||||
#define A0_EXP (0xb<<24) /* dst.xyzw = exp2(src0.replicate_swizzle) */
|
||||
#define A0_LOG (0xc<<24) /* dst.xyzw = log2(abs(src0.replicate_swizzle)) */
|
||||
#define A0_CMP (0xd<<24) /* dst = (src0 >= 0.0) ? src1 : src2 */
|
||||
#define A0_MIN (0xe<<24) /* dst = (src0 < src1) ? src0 : src1 */
|
||||
#define A0_MAX (0xf<<24) /* dst = (src0 >= src1) ? src0 : src1 */
|
||||
#define A0_FLR (0x10<<24) /* dst = floor(src0) */
|
||||
#define A0_MOD (0x11<<24) /* dst = src0 fmod 1.0 */
|
||||
#define A0_TRC (0x12<<24) /* dst = int(src0) */
|
||||
#define A0_SGE (0x13<<24) /* dst = src0 >= src1 ? 1.0 : 0.0 */
|
||||
#define A0_SLT (0x14<<24) /* dst = src0 < src1 ? 1.0 : 0.0 */
|
||||
#define A0_DEST_SATURATE (1<<22)
|
||||
#define A0_DEST_TYPE_SHIFT 19
|
||||
/* Allow: R, OC, OD, U */
|
||||
#define A0_DEST_NR_SHIFT 14
|
||||
/* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */
|
||||
#define A0_DEST_CHANNEL_X (1<<10)
|
||||
#define A0_DEST_CHANNEL_Y (2<<10)
|
||||
#define A0_DEST_CHANNEL_Z (4<<10)
|
||||
#define A0_DEST_CHANNEL_W (8<<10)
|
||||
#define A0_DEST_CHANNEL_ALL (0xf<<10)
|
||||
#define A0_DEST_CHANNEL_SHIFT 10
|
||||
#define A0_SRC0_TYPE_SHIFT 7
|
||||
#define A0_SRC0_NR_SHIFT 2
|
||||
|
||||
#define A0_DEST_CHANNEL_XY (A0_DEST_CHANNEL_X|A0_DEST_CHANNEL_Y)
|
||||
#define A0_DEST_CHANNEL_XYZ (A0_DEST_CHANNEL_XY|A0_DEST_CHANNEL_Z)
|
||||
|
||||
|
||||
#define SRC_X 0
|
||||
#define SRC_Y 1
|
||||
#define SRC_Z 2
|
||||
#define SRC_W 3
|
||||
#define SRC_ZERO 4
|
||||
#define SRC_ONE 5
|
||||
|
||||
#define A1_SRC0_CHANNEL_X_NEGATE (1<<31)
|
||||
#define A1_SRC0_CHANNEL_X_SHIFT 28
|
||||
#define A1_SRC0_CHANNEL_Y_NEGATE (1<<27)
|
||||
#define A1_SRC0_CHANNEL_Y_SHIFT 24
|
||||
#define A1_SRC0_CHANNEL_Z_NEGATE (1<<23)
|
||||
#define A1_SRC0_CHANNEL_Z_SHIFT 20
|
||||
#define A1_SRC0_CHANNEL_W_NEGATE (1<<19)
|
||||
#define A1_SRC0_CHANNEL_W_SHIFT 16
|
||||
#define A1_SRC1_TYPE_SHIFT 13
|
||||
#define A1_SRC1_NR_SHIFT 8
|
||||
#define A1_SRC1_CHANNEL_X_NEGATE (1<<7)
|
||||
#define A1_SRC1_CHANNEL_X_SHIFT 4
|
||||
#define A1_SRC1_CHANNEL_Y_NEGATE (1<<3)
|
||||
#define A1_SRC1_CHANNEL_Y_SHIFT 0
|
||||
|
||||
#define A2_SRC1_CHANNEL_Z_NEGATE (1<<31)
|
||||
#define A2_SRC1_CHANNEL_Z_SHIFT 28
|
||||
#define A2_SRC1_CHANNEL_W_NEGATE (1<<27)
|
||||
#define A2_SRC1_CHANNEL_W_SHIFT 24
|
||||
#define A2_SRC2_TYPE_SHIFT 21
|
||||
#define A2_SRC2_NR_SHIFT 16
|
||||
#define A2_SRC2_CHANNEL_X_NEGATE (1<<15)
|
||||
#define A2_SRC2_CHANNEL_X_SHIFT 12
|
||||
#define A2_SRC2_CHANNEL_Y_NEGATE (1<<11)
|
||||
#define A2_SRC2_CHANNEL_Y_SHIFT 8
|
||||
#define A2_SRC2_CHANNEL_Z_NEGATE (1<<7)
|
||||
#define A2_SRC2_CHANNEL_Z_SHIFT 4
|
||||
#define A2_SRC2_CHANNEL_W_NEGATE (1<<3)
|
||||
#define A2_SRC2_CHANNEL_W_SHIFT 0
|
||||
|
||||
|
||||
|
||||
/* Texture instructions */
|
||||
#define T0_TEXLD (0x15<<24) /* Sample texture using predeclared
|
||||
* sampler and address, and output
|
||||
* filtered texel data to destination
|
||||
* register */
|
||||
#define T0_TEXLDP (0x16<<24) /* Same as texld but performs a
|
||||
* perspective divide of the texture
|
||||
* coordinate .xyz values by .w before
|
||||
* sampling. */
|
||||
#define T0_TEXLDB (0x17<<24) /* Same as texld but biases the
|
||||
* computed LOD by w. Only S4.6 two's
|
||||
* comp is used. This implies that a
|
||||
* float to fixed conversion is
|
||||
* done. */
|
||||
#define T0_TEXKILL (0x18<<24) /* Does not perform a sampling
|
||||
* operation. Simply kills the pixel
|
||||
* if any channel of the address
|
||||
* register is < 0.0. */
|
||||
#define T0_DEST_TYPE_SHIFT 19
|
||||
/* Allow: R, OC, OD, U */
|
||||
/* Note: U (unpreserved) regs do not retain their values between
|
||||
* phases (cannot be used for feedback)
|
||||
*
|
||||
* Note: oC and OD registers can only be used as the destination of a
|
||||
* texture instruction once per phase (this is an implementation
|
||||
* restriction).
|
||||
*/
|
||||
#define T0_DEST_NR_SHIFT 14
|
||||
/* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */
|
||||
#define T0_SAMPLER_NR_SHIFT 0 /* This field ignored for TEXKILL */
|
||||
#define T0_SAMPLER_NR_MASK (0xf<<0)
|
||||
|
||||
#define T1_ADDRESS_REG_TYPE_SHIFT 24 /* Reg to use as texture coord */
|
||||
/* Allow R, T, OC, OD -- R, OC, OD are 'dependent' reads, new program phase */
|
||||
#define T1_ADDRESS_REG_NR_SHIFT 17
|
||||
#define T2_MBZ 0
|
||||
|
||||
/* Declaration instructions */
|
||||
#define D0_DCL (0x19<<24) /* Declare a t (interpolated attrib)
|
||||
* register or an s (sampler)
|
||||
* register. */
|
||||
#define D0_SAMPLE_TYPE_SHIFT 22
|
||||
#define D0_SAMPLE_TYPE_2D (0x0<<22)
|
||||
#define D0_SAMPLE_TYPE_CUBE (0x1<<22)
|
||||
#define D0_SAMPLE_TYPE_VOLUME (0x2<<22)
|
||||
#define D0_SAMPLE_TYPE_MASK (0x3<<22)
|
||||
|
||||
#define D0_TYPE_SHIFT 19
|
||||
/* Allow: T, S */
|
||||
#define D0_NR_SHIFT 14
|
||||
/* Allow T: 0..10, S: 0..15 */
|
||||
#define D0_CHANNEL_X (1<<10)
|
||||
#define D0_CHANNEL_Y (2<<10)
|
||||
#define D0_CHANNEL_Z (4<<10)
|
||||
#define D0_CHANNEL_W (8<<10)
|
||||
#define D0_CHANNEL_ALL (0xf<<10)
|
||||
#define D0_CHANNEL_NONE (0<<10)
|
||||
|
||||
#define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y)
|
||||
#define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z)
|
||||
|
||||
/* I915 Errata: Do not allow (xz), (xw), (xzw) combinations for diffuse
|
||||
* or specular declarations.
|
||||
*
|
||||
* For T dcls, only allow: (x), (xy), (xyz), (w), (xyzw)
|
||||
*
|
||||
* Must be zero for S (sampler) dcls
|
||||
*/
|
||||
#define D1_MBZ 0
|
||||
#define D2_MBZ 0
|
||||
|
||||
|
||||
|
||||
/* p207 */
|
||||
#define _3DSTATE_MAP_STATE (CMD_3D|(0x1d<<24)|(0x0<<16))
|
||||
|
||||
#define MS1_MAPMASK_SHIFT 0
|
||||
#define MS1_MAPMASK_MASK (0x8fff<<0)
|
||||
|
||||
#define MS2_UNTRUSTED_SURFACE (1<<31)
|
||||
#define MS2_ADDRESS_MASK 0xfffffffc
|
||||
#define MS2_VERTICAL_LINE_STRIDE (1<<1)
|
||||
#define MS2_VERTICAL_OFFSET (1<<1)
|
||||
|
||||
#define MS3_HEIGHT_SHIFT 21
|
||||
#define MS3_WIDTH_SHIFT 10
|
||||
#define MS3_PALETTE_SELECT (1<<9)
|
||||
#define MS3_MAPSURF_FORMAT_SHIFT 7
|
||||
#define MS3_MAPSURF_FORMAT_MASK (0x7<<7)
|
||||
#define MAPSURF_8BIT (1<<7)
|
||||
#define MAPSURF_16BIT (2<<7)
|
||||
#define MAPSURF_32BIT (3<<7)
|
||||
#define MAPSURF_422 (5<<7)
|
||||
#define MAPSURF_COMPRESSED (6<<7)
|
||||
#define MAPSURF_4BIT_INDEXED (7<<7)
|
||||
#define MS3_MT_FORMAT_MASK (0x7 << 3)
|
||||
#define MS3_MT_FORMAT_SHIFT 3
|
||||
#define MT_4BIT_IDX_ARGB8888 (7<<3) /* SURFACE_4BIT_INDEXED */
|
||||
#define MT_8BIT_I8 (0<<3) /* SURFACE_8BIT */
|
||||
#define MT_8BIT_L8 (1<<3)
|
||||
#define MT_8BIT_A8 (4<<3)
|
||||
#define MT_8BIT_MONO8 (5<<3)
|
||||
#define MT_16BIT_RGB565 (0<<3) /* SURFACE_16BIT */
|
||||
#define MT_16BIT_ARGB1555 (1<<3)
|
||||
#define MT_16BIT_ARGB4444 (2<<3)
|
||||
#define MT_16BIT_AY88 (3<<3)
|
||||
#define MT_16BIT_88DVDU (5<<3)
|
||||
#define MT_16BIT_BUMP_655LDVDU (6<<3)
|
||||
#define MT_16BIT_I16 (7<<3)
|
||||
#define MT_16BIT_L16 (8<<3)
|
||||
#define MT_16BIT_A16 (9<<3)
|
||||
#define MT_32BIT_ARGB8888 (0<<3) /* SURFACE_32BIT */
|
||||
#define MT_32BIT_ABGR8888 (1<<3)
|
||||
#define MT_32BIT_XRGB8888 (2<<3)
|
||||
#define MT_32BIT_XBGR8888 (3<<3)
|
||||
#define MT_32BIT_QWVU8888 (4<<3)
|
||||
#define MT_32BIT_AXVU8888 (5<<3)
|
||||
#define MT_32BIT_LXVU8888 (6<<3)
|
||||
#define MT_32BIT_XLVU8888 (7<<3)
|
||||
#define MT_32BIT_ARGB2101010 (8<<3)
|
||||
#define MT_32BIT_ABGR2101010 (9<<3)
|
||||
#define MT_32BIT_AWVU2101010 (0xA<<3)
|
||||
#define MT_32BIT_GR1616 (0xB<<3)
|
||||
#define MT_32BIT_VU1616 (0xC<<3)
|
||||
#define MT_32BIT_xI824 (0xD<<3)
|
||||
#define MT_32BIT_xA824 (0xE<<3)
|
||||
#define MT_32BIT_xL824 (0xF<<3)
|
||||
#define MT_422_YCRCB_SWAPY (0<<3) /* SURFACE_422 */
|
||||
#define MT_422_YCRCB_NORMAL (1<<3)
|
||||
#define MT_422_YCRCB_SWAPUV (2<<3)
|
||||
#define MT_422_YCRCB_SWAPUVY (3<<3)
|
||||
#define MT_COMPRESS_DXT1 (0<<3) /* SURFACE_COMPRESSED */
|
||||
#define MT_COMPRESS_DXT2_3 (1<<3)
|
||||
#define MT_COMPRESS_DXT4_5 (2<<3)
|
||||
#define MT_COMPRESS_FXT1 (3<<3)
|
||||
#define MT_COMPRESS_DXT1_RGB (4<<3)
|
||||
#define MS3_USE_FENCE_REGS (1<<2)
|
||||
#define MS3_TILED_SURFACE (1<<1)
|
||||
#define MS3_TILE_WALK (1<<0)
|
||||
|
||||
#define MS4_PITCH_SHIFT 21
|
||||
#define MS4_CUBE_FACE_ENA_NEGX (1<<20)
|
||||
#define MS4_CUBE_FACE_ENA_POSX (1<<19)
|
||||
#define MS4_CUBE_FACE_ENA_NEGY (1<<18)
|
||||
#define MS4_CUBE_FACE_ENA_POSY (1<<17)
|
||||
#define MS4_CUBE_FACE_ENA_NEGZ (1<<16)
|
||||
#define MS4_CUBE_FACE_ENA_POSZ (1<<15)
|
||||
#define MS4_CUBE_FACE_ENA_MASK (0x3f<<15)
|
||||
#define MS4_MAX_LOD_SHIFT 9
|
||||
#define MS4_MAX_LOD_MASK (0x3f<<9)
|
||||
#define MS4_MIP_LAYOUT_LEGACY (0<<8)
|
||||
#define MS4_MIP_LAYOUT_BELOW_LPT (0<<8)
|
||||
#define MS4_MIP_LAYOUT_RIGHT_LPT (1<<8)
|
||||
#define MS4_VOLUME_DEPTH_SHIFT 0
|
||||
#define MS4_VOLUME_DEPTH_MASK (0xff<<0)
|
||||
|
||||
/* p244 */
|
||||
#define _3DSTATE_SAMPLER_STATE (CMD_3D|(0x1d<<24)|(0x1<<16))
|
||||
|
||||
#define SS1_MAPMASK_SHIFT 0
|
||||
#define SS1_MAPMASK_MASK (0x8fff<<0)
|
||||
|
||||
#define SS2_REVERSE_GAMMA_ENABLE (1<<31)
|
||||
#define SS2_PACKED_TO_PLANAR_ENABLE (1<<30)
|
||||
#define SS2_COLORSPACE_CONVERSION (1<<29)
|
||||
#define SS2_CHROMAKEY_SHIFT 27
|
||||
#define SS2_BASE_MIP_LEVEL_SHIFT 22
|
||||
#define SS2_BASE_MIP_LEVEL_MASK (0x1f<<22)
|
||||
#define SS2_MIP_FILTER_SHIFT 20
|
||||
#define SS2_MIP_FILTER_MASK (0x3<<20)
|
||||
#define MIPFILTER_NONE 0
|
||||
#define MIPFILTER_NEAREST 1
|
||||
#define MIPFILTER_LINEAR 3
|
||||
#define SS2_MAG_FILTER_SHIFT 17
|
||||
#define SS2_MAG_FILTER_MASK (0x7<<17)
|
||||
#define FILTER_NEAREST 0
|
||||
#define FILTER_LINEAR 1
|
||||
#define FILTER_ANISOTROPIC 2
|
||||
#define FILTER_4X4_1 3
|
||||
#define FILTER_4X4_2 4
|
||||
#define FILTER_4X4_FLAT 5
|
||||
#define FILTER_6X5_MONO 6 /* XXX - check */
|
||||
#define SS2_MIN_FILTER_SHIFT 14
|
||||
#define SS2_MIN_FILTER_MASK (0x7<<14)
|
||||
#define SS2_LOD_BIAS_SHIFT 5
|
||||
#define SS2_LOD_BIAS_ONE (0x10<<5)
|
||||
#define SS2_LOD_BIAS_MASK (0x1ff<<5)
|
||||
/* Shadow requires:
|
||||
* MT_X8{I,L,A}24 or MT_{I,L,A}16 texture format
|
||||
* FILTER_4X4_x MIN and MAG filters
|
||||
*/
|
||||
#define SS2_SHADOW_ENABLE (1<<4)
|
||||
#define SS2_MAX_ANISO_MASK (1<<3)
|
||||
#define SS2_MAX_ANISO_2 (0<<3)
|
||||
#define SS2_MAX_ANISO_4 (1<<3)
|
||||
#define SS2_SHADOW_FUNC_SHIFT 0
|
||||
#define SS2_SHADOW_FUNC_MASK (0x7<<0)
|
||||
/* SS2_SHADOW_FUNC values: see COMPAREFUNC_* */
|
||||
|
||||
#define SS3_MIN_LOD_SHIFT 24
|
||||
#define SS3_MIN_LOD_ONE (0x10<<24)
|
||||
#define SS3_MIN_LOD_MASK (0xff<<24)
|
||||
#define SS3_KILL_PIXEL_ENABLE (1<<17)
|
||||
#define SS3_TCX_ADDR_MODE_SHIFT 12
|
||||
#define SS3_TCX_ADDR_MODE_MASK (0x7<<12)
|
||||
#define TEXCOORDMODE_WRAP 0
|
||||
#define TEXCOORDMODE_MIRROR 1
|
||||
#define TEXCOORDMODE_CLAMP_EDGE 2
|
||||
#define TEXCOORDMODE_CUBE 3
|
||||
#define TEXCOORDMODE_CLAMP_BORDER 4
|
||||
#define TEXCOORDMODE_MIRROR_ONCE 5
|
||||
#define SS3_TCY_ADDR_MODE_SHIFT 9
|
||||
#define SS3_TCY_ADDR_MODE_MASK (0x7<<9)
|
||||
#define SS3_TCZ_ADDR_MODE_SHIFT 6
|
||||
#define SS3_TCZ_ADDR_MODE_MASK (0x7<<6)
|
||||
#define SS3_NORMALIZED_COORDS (1<<5)
|
||||
#define SS3_TEXTUREMAP_INDEX_SHIFT 1
|
||||
#define SS3_TEXTUREMAP_INDEX_MASK (0xf<<1)
|
||||
#define SS3_DEINTERLACER_ENABLE (1<<0)
|
||||
|
||||
#define SS4_BORDER_COLOR_MASK (~0)
|
||||
|
||||
/* 3DSTATE_SPAN_STIPPLE, p258
|
||||
*/
|
||||
#define _3DSTATE_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16))
|
||||
#define ST1_ENABLE (1<<16)
|
||||
#define ST1_MASK (0xffff)
|
||||
|
||||
|
||||
#define FLUSH_MAP_CACHE (1<<0)
|
||||
#define FLUSH_RENDER_CACHE (1<<1)
|
||||
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue