Add register defines for hw binning
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@ -346,19 +346,33 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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#define IPEIR 0x2088
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#define IPEHR 0x208C
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#define INST_DONE 0x2090
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#define SCPD0 0x209c /* debug */
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#define INST_PS 0x20c4
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#define IPEIR_I965 0x2064 /* i965 */
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#define IPEHR_I965 0x2068 /* i965 */
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#define INST_DONE_I965 0x206c
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#define INST_PS_I965 0x2070
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/* Current active ring head address:
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*/
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#define ACTHD 0x2074
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/* Current primary/secondary DMA fetch addresses:
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*/
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#define DMA_FADD_P 0x2078
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#define DMA_FADD_S 0x20d4
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#define INST_DONE_1 0x207c
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#define CACHE_MODE_0 0x2120
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#define CACHE_MODE_1 0x2124
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#define MI_ARB_STATE 0x20e4
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/* Start addresses for each of the primary rings:
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*/
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#define PR0_STR 0x20f0
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#define PR1_STR 0x20f4
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#define PR2_STR 0x20f8
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#define WIZ_CTL 0x7c00
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#define WIZ_CTL_SINGLE_SUBSPAN (1<<6)
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#define WIZ_CTL_IGNORE_STALLS (1<<5)
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