Aurelien
/
xf86-video-intel
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Merge branch 'master' into xvmc 

Conflicts:

	src/i830_driver.c
This commit is contained in:
Zhenyu Wang 2007-10-08 22:45:11 +08:00
parent 84d7b2b955 9e770bf69e
commit e0fb228401
23 changed files with 866 additions and 476 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
configure.ac
View File

@ -116,9 +116,15 @@ CFLAGS="$save_CFLAGS"
if test x$XSERVER_LIBPCIACCESS = xyes; then
PKG_CHECK_MODULES([PCIACCESS], [pciaccess >= 0.8.0])
else
PKG_CHECK_MODULES([PCIACCESS], [pciaccess >= 0.5.0],
have_libpciaccess=yes,
have_libpciaccess=no)
fi
have_libpciaccess=no
AM_CONDITIONAL(XSERVER_LIBPCIACCESS, test "x$XSERVER_LIBPCIACCESS" = xyes)
AM_CONDITIONAL(LIBPCIACCESS,
test "x$XSERVER_LIBPCIACCESS" = xyes -o "x$have_libpciaccess" = xyes)
AM_CONDITIONAL(XMODES, test "x$XMODES" = xno)
if test "x$XSERVER_SOURCE" = x; then

5
man/intel.man
View File

@ -128,9 +128,8 @@ Default: XVideo is enabled for configurations where it is supported.
Enable support for the legacy i915_dri.so 3D driver.
This will, among other things, make the 2D driver tell libGL to
load the 3D driver i915_dri.so instead of the newer i915tex_dri.so.
This option is only used for chipsets in the range i830-i945.
Default for i830-i945 series: Enabled for i915 drm versions < 1.7.0. Otherwise
disabled.
This option is only used for chipsets in the range i830-i945.
Default for i830-i945 series: Enabled.
Default for i810: The option is not used.
Default for i965: The option is always true.
.TP

2
src/Makefile.am
View File

@ -18,7 +18,7 @@
# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
if XSERVER_LIBPCIACCESS
if LIBPCIACCESS
REGDUMPER = reg_dumper
endif

2
src/bios_reader/Makefile.am
View File

@ -2,7 +2,7 @@ AM_CFLAGS = @WARN_CFLAGS@ @XORG_CFLAGS@ @XMODES_CFLAGS@
noinst_PROGRAMS = bios_reader $(BIOS_DUMPER)
if XSERVER_LIBPCIACCESS
if LIBPCIACCESS
BIOS_DUMPER = bios_dumper
bios_dumper_SOURCES = bios_dumper.c

67
src/ch7017/ch7017.c
View File

@ -50,11 +50,13 @@ struct ch7017_priv {
CARD8 save_hapi;
CARD8 save_vali;
CARD8 save_valo;
CARD8 save_ailo;
CARD8 save_lvds_pll_vco;
CARD8 save_feedback_div;
CARD8 save_lvds_control_2;
CARD8 save_outputs_enable;
CARD8 save_lvds_power_down;
CARD8 save_power_management;
};
static void
@ -93,8 +95,6 @@ ch7017_init(I2CBusPtr b, I2CSlaveAddr addr)
struct ch7017_priv *priv;
CARD8 val;
xf86DrvMsg(b->scrnIndex, X_INFO, "detecting ch7017\n");
priv = xcalloc(1, sizeof(struct ch7017_priv));
if (priv == NULL)
return NULL;
@ -158,31 +158,34 @@ ch7017_mode_set(I2CDevPtr d, DisplayModePtr mode, DisplayModePtr adjusted_mode)
ch7017_dump_regs(d);
/* LVDS PLL settings from page 75 of 7017-7017ds.pdf*/
if (mode->Clock < 50000) {
lvds_pll_feedback_div = 45;
lvds_pll_vco_control = (2 << 4) | (3 << 0);
outputs_enable = (0 << 0); /* XXX: enables */
if (mode->Clock < 100000) {
outputs_enable = CH7017_LVDS_CHANNEL_A | CH7017_CHARGE_PUMP_LOW;
lvds_pll_feedback_div = CH7017_LVDS_PLL_FEEDBACK_DEFAULT_RESERVED |
(2 << CH7017_LVDS_PLL_FEED_BACK_DIVIDER_SHIFT) |
(13 << CH7017_LVDS_PLL_FEED_FORWARD_DIVIDER_SHIFT);
lvds_pll_vco_control = CH7017_LVDS_PLL_VCO_DEFAULT_RESERVED |
(2 << CH7017_LVDS_PLL_VCO_SHIFT) |
(3 << CH7017_LVDS_PLL_POST_SCALE_DIV_SHIFT);
lvds_control_2 = (1 << CH7017_LOOP_FILTER_SHIFT) |
(0 << CH7017_PHASE_DETECTOR_SHIFT);
} else if (mode->Clock < 100000) {
lvds_pll_feedback_div = 45;
lvds_pll_vco_control = (2 << 4) | (3 << 0);
outputs_enable = (0 << 0); /* XXX: enables */
lvds_control_2 = (1 << CH7017_LOOP_FILTER_SHIFT) |
(0 << CH7017_PHASE_DETECTOR_SHIFT);
} else if (mode->Clock < 160000) {
} else {
outputs_enable = CH7017_LVDS_CHANNEL_A | CH7017_CHARGE_PUMP_HIGH;
lvds_pll_feedback_div = CH7017_LVDS_PLL_FEEDBACK_DEFAULT_RESERVED |
(2 << CH7017_LVDS_PLL_FEED_BACK_DIVIDER_SHIFT) |
(3 << CH7017_LVDS_PLL_FEED_FORWARD_DIVIDER_SHIFT);
lvds_pll_feedback_div = 35;
outputs_enable = (3 << 0); /* XXX: enables */
lvds_control_2 = (3 << CH7017_LOOP_FILTER_SHIFT) |
(0 << CH7017_PHASE_DETECTOR_SHIFT);
if (1) { /* XXX: dual panel */
lvds_pll_vco_control = (2 << 4) | (13 << 0);
if (1) { /* XXX: dual channel panel detection. Assume yes for now. */
outputs_enable |= CH7017_LVDS_CHANNEL_B;
lvds_pll_vco_control = CH7017_LVDS_PLL_VCO_DEFAULT_RESERVED |
(2 << CH7017_LVDS_PLL_VCO_SHIFT) |
(13 << CH7017_LVDS_PLL_POST_SCALE_DIV_SHIFT);
} else {
lvds_pll_vco_control = (1 << 4) | (13 << 0);
lvds_pll_vco_control = CH7017_LVDS_PLL_VCO_DEFAULT_RESERVED |
(1 << CH7017_LVDS_PLL_VCO_SHIFT) |
(13 << CH7017_LVDS_PLL_POST_SCALE_DIV_SHIFT);
}
} else {
FatalError("Invalid mode clock (%.1fMHz)\n",
(float)mode->Clock / 1000.0);
}
horizontal_active_pixel_input = mode->HDisplay & 0x00ff;
@ -190,10 +193,11 @@ ch7017_mode_set(I2CDevPtr d, DisplayModePtr mode, DisplayModePtr adjusted_mode)
vertical_active_line_output = mode->VDisplay & 0x00ff;
horizontal_active_pixel_output = mode->HDisplay & 0x00ff;
active_input_line_output = ((mode->HDisplay & 0x0700) >> 9) |
((mode->VDisplay & 0x0700) >> 8);
active_input_line_output = ((mode->HDisplay & 0x0700) >> 8) |
(((mode->VDisplay & 0x0700) >> 8) << 3);
lvds_power_down = (mode->HDisplay & 0x0f00) >> 8;
lvds_power_down = CH7017_LVDS_POWER_DOWN_DEFAULT_RESERVED |
(mode->HDisplay & 0x0700) >> 8;
ch7017_dpms(d, DPMSModeOff);
ch7017_write(priv, CH7017_HORIZONTAL_ACTIVE_PIXEL_INPUT,
@ -202,6 +206,8 @@ ch7017_mode_set(I2CDevPtr d, DisplayModePtr mode, DisplayModePtr adjusted_mode)
horizontal_active_pixel_output);
ch7017_write(priv, CH7017_VERTICAL_ACTIVE_LINE_OUTPUT,
vertical_active_line_output);
ch7017_write(priv, CH7017_ACTIVE_INPUT_LINE_OUTPUT,
active_input_line_output);
ch7017_write(priv, CH7017_LVDS_PLL_VCO_CONTROL, lvds_pll_vco_control);
ch7017_write(priv, CH7017_LVDS_PLL_FEEDBACK_DIV, lvds_pll_feedback_div);
ch7017_write(priv, CH7017_LVDS_CONTROL_2, lvds_control_2);
@ -224,12 +230,20 @@ ch7017_dpms(I2CDevPtr d, int mode)
ch7017_read(priv, CH7017_LVDS_POWER_DOWN, &val);
/* Turn off TV/VGA, and never turn it on since we don't support it. */
ch7017_write(priv, CH7017_POWER_MANAGEMENT,
CH7017_DAC0_POWER_DOWN |
CH7017_DAC1_POWER_DOWN |
CH7017_DAC2_POWER_DOWN |
CH7017_DAC3_POWER_DOWN |
CH7017_TV_POWER_DOWN_EN);
if (mode == DPMSModeOn) {
/* Turn on the LVDS */
ch7017_write(priv, CH7017_LVDS_POWER_DOWN,
val & ~CH7017_LVDS_POWER_DOWN_EN);
} else {
/* Turn on the LVDS */
/* Turn off the LVDS */
ch7017_write(priv, CH7017_LVDS_POWER_DOWN,
val | CH7017_LVDS_POWER_DOWN_EN);
}
@ -254,6 +268,7 @@ do { \
DUMP(CH7017_HORIZONTAL_ACTIVE_PIXEL_INPUT);
DUMP(CH7017_HORIZONTAL_ACTIVE_PIXEL_OUTPUT);
DUMP(CH7017_VERTICAL_ACTIVE_LINE_OUTPUT);
DUMP(CH7017_ACTIVE_INPUT_LINE_OUTPUT);
DUMP(CH7017_LVDS_PLL_VCO_CONTROL);
DUMP(CH7017_LVDS_PLL_FEEDBACK_DIV);
DUMP(CH7017_LVDS_CONTROL_2);
@ -268,11 +283,13 @@ ch7017_save(I2CDevPtr d)
ch7017_read(priv, CH7017_HORIZONTAL_ACTIVE_PIXEL_INPUT, &priv->save_hapi);
ch7017_read(priv, CH7017_VERTICAL_ACTIVE_LINE_OUTPUT, &priv->save_valo);
ch7017_read(priv, CH7017_ACTIVE_INPUT_LINE_OUTPUT, &priv->save_ailo);
ch7017_read(priv, CH7017_LVDS_PLL_VCO_CONTROL, &priv->save_lvds_pll_vco);
ch7017_read(priv, CH7017_LVDS_PLL_FEEDBACK_DIV, &priv->save_feedback_div);
ch7017_read(priv, CH7017_LVDS_CONTROL_2, &priv->save_lvds_control_2);
ch7017_read(priv, CH7017_OUTPUTS_ENABLE, &priv->save_outputs_enable);
ch7017_read(priv, CH7017_LVDS_POWER_DOWN, &priv->save_lvds_power_down);
ch7017_read(priv, CH7017_POWER_MANAGEMENT, &priv->save_power_management);
}
static void
@ -285,11 +302,13 @@ ch7017_restore(I2CDevPtr d)
ch7017_write(priv, CH7017_HORIZONTAL_ACTIVE_PIXEL_INPUT, priv->save_hapi);
ch7017_write(priv, CH7017_VERTICAL_ACTIVE_LINE_OUTPUT, priv->save_valo);
ch7017_write(priv, CH7017_ACTIVE_INPUT_LINE_OUTPUT, priv->save_ailo);
ch7017_write(priv, CH7017_LVDS_PLL_VCO_CONTROL, priv->save_lvds_pll_vco);
ch7017_write(priv, CH7017_LVDS_PLL_FEEDBACK_DIV, priv->save_feedback_div);
ch7017_write(priv, CH7017_LVDS_CONTROL_2, priv->save_lvds_control_2);
ch7017_write(priv, CH7017_OUTPUTS_ENABLE, priv->save_outputs_enable);
ch7017_write(priv, CH7017_LVDS_POWER_DOWN, priv->save_lvds_power_down);
ch7017_write(priv, CH7017_POWER_MANAGEMENT, priv->save_power_management);
}
I830I2CVidOutputRec ch7017_methods = {

13
src/ch7017/ch7017_reg.h
View File

@ -99,11 +99,12 @@
#define CH7017_LVDS_POWER_DOWN 0x63
/** High bits of horizontal active pixel output */
#define CH7017_LVDS_HAP_HIGH_MASK (0xf << 0)
#define CH7017_LVDS_HAP_HIGH_MASK (0x7 << 0)
/** Enables the LVDS power down state transition */
#define CH7017_LVDS_POWER_DOWN_EN (1 << 6)
/** Enables the LVDS upscaler */
#define CH7017_LVDS_UPSCALER_EN (1 << 7)
#define CH7017_LVDS_POWER_DOWN_DEFAULT_RESERVED 0x08
#define CH7017_LVDS_ENCODING 0x64
#define CH7017_LVDS_DITHER_2D (1 << 2)
@ -127,10 +128,20 @@
#define CH7017_GPIO_DRIVER_TYPE 0x6c
#define CH7017_GPIO_DATA 0x6d
#define CH7017_GPIO_DIRECTION_CONTROL 0x6e
#define CH7017_LVDS_PLL_FEEDBACK_DIV 0x71
# define CH7017_LVDS_PLL_FEED_BACK_DIVIDER_SHIFT 4
# define CH7017_LVDS_PLL_FEED_FORWARD_DIVIDER_SHIFT 0
# define CH7017_LVDS_PLL_FEEDBACK_DEFAULT_RESERVED 0x80
#define CH7017_LVDS_PLL_VCO_CONTROL 0x72
# define CH7017_LVDS_PLL_VCO_DEFAULT_RESERVED 0x80
# define CH7017_LVDS_PLL_VCO_SHIFT 4
# define CH7017_LVDS_PLL_POST_SCALE_DIV_SHIFT 0
#define CH7017_OUTPUTS_ENABLE 0x73
# define CH7017_CHARGE_PUMP_LOW 0x0
# define CH7017_CHARGE_PUMP_HIGH 0x3
# define CH7017_LVDS_CHANNEL_A (1 << 3)
# define CH7017_LVDS_CHANNEL_B (1 << 4)
# define CH7017_TV_DAC_A (1 << 5)

27
src/ch7xxx/ch7xxx.c
View File

@ -67,6 +67,8 @@ struct ch7xxx_reg_state {
struct ch7xxx_priv {
I2CDevRec d;
Bool quiet;
struct ch7xxx_reg_state SavedReg;
struct ch7xxx_reg_state ModeReg;
CARD8 save_TCTL, save_TPCP, save_TPD, save_TPVT;
@ -92,9 +94,11 @@ static Bool
ch7xxx_read(struct ch7xxx_priv *dev_priv, int addr, unsigned char *ch)
{
if (!xf86I2CReadByte(&dev_priv->d, addr, ch)) {
xf86DrvMsg(dev_priv->d.pI2CBus->scrnIndex,
X_ERROR, "Unable to read from %s Slave %d.\n",
dev_priv->d.pI2CBus->BusName, dev_priv->d.SlaveAddr);
if (!dev_priv->quiet) {
xf86DrvMsg(dev_priv->d.pI2CBus->scrnIndex,
X_ERROR, "Unable to read from %s Slave %d.\n",
dev_priv->d.pI2CBus->BusName, dev_priv->d.SlaveAddr);
}
return FALSE;
}
@ -106,9 +110,11 @@ static Bool
ch7xxx_write(struct ch7xxx_priv *dev_priv, int addr, unsigned char ch)
{
if (!xf86I2CWriteByte(&dev_priv->d, addr, ch)) {
xf86DrvMsg(dev_priv->d.pI2CBus->scrnIndex, X_ERROR,
"Unable to write to %s Slave %d.\n",
dev_priv->d.pI2CBus->BusName, dev_priv->d.SlaveAddr);
if (!dev_priv->quiet) {
xf86DrvMsg(dev_priv->d.pI2CBus->scrnIndex, X_ERROR,
"Unable to write to %s Slave %d.\n",
dev_priv->d.pI2CBus->BusName, dev_priv->d.SlaveAddr);
}
return FALSE;
}
@ -136,6 +142,7 @@ ch7xxx_init(I2CBusPtr b, I2CSlaveAddr addr)
dev_priv->d.ByteTimeout = b->ByteTimeout;
dev_priv->d.DriverPrivate.ptr = dev_priv;
dev_priv->quiet = TRUE;
if (!ch7xxx_read(dev_priv, CH7xxx_REG_VID, &vendor))
goto out;
@ -159,9 +166,11 @@ ch7xxx_init(I2CBusPtr b, I2CSlaveAddr addr)
dev_priv->d.SlaveAddr);
goto out;
}
xf86DrvMsg(dev_priv->d.pI2CBus->scrnIndex, X_INFO,
"Detected %s chipset, vendor/device ID 0x%02x/0x%02x\n",
name, vendor, device);
dev_priv->quiet = FALSE;
xf86DrvMsg(dev_priv->d.pI2CBus->scrnIndex, X_INFO,
"Detected %s chipset, vendor/device ID 0x%02x/0x%02x\n",
name, vendor, device);
if (!xf86I2CDevInit(&dev_priv->d)) {
goto out;

21
src/i830.h
View File

@ -171,6 +171,10 @@ struct _i830_memory {
i830_memory *prev;
/** @} */
#ifdef XF86DRI_MM
drmBO bo;
Bool lifetime_fixed_offset;
#endif
};
typedef struct {
@ -217,6 +221,7 @@ struct _I830DVODriver {
char *modulename;
char *fntablename;
unsigned int dvo_reg;
uint32_t gpio;
int address;
const char **symbols;
I830I2CVidOutputRec *vid_rec;
@ -293,7 +298,13 @@ typedef struct _I830Rec {
long FbMapSize;
long GTTMapSize;
i830_memory *memory_list; /**< Linked list of video memory allocations */
/**
* Linked list of video memory allocations. The head and tail are
* dummy entries that bound the allocation area.
*/
i830_memory *memory_list;
/** Linked list of buffer object memory allocations */
i830_memory *bo_list;
long stolen_size; /**< bytes of pre-bound stolen memory */
int gtt_acquired; /**< whether we currently own the AGP */
@ -342,8 +353,7 @@ typedef struct _I830Rec {
int TexGranularity;
int drmMinor;
int mmModeFlags;
int mmSize;
Bool allocate_classic_textures;
Bool want_vblank_interrupts;
#ifdef DAMAGE
@ -579,6 +589,7 @@ extern void IntelEmitInvarientState(ScrnInfoPtr pScrn);
extern void I830EmitInvarientState(ScrnInfoPtr pScrn);
extern void I915EmitInvarientState(ScrnInfoPtr pScrn);
extern void I830SelectBuffer(ScrnInfoPtr pScrn, int buffer);
void i830_update_cursor_offsets(ScrnInfoPtr pScrn);
/* CRTC-based cursor functions */
void
@ -652,6 +663,7 @@ extern void I830SubsequentSolidFillRect(ScrnInfoPtr pScrn, int x, int y,
Bool i830_allocator_init(ScrnInfoPtr pScrn, unsigned long offset,
unsigned long size);
void i830_allocator_fini(ScrnInfoPtr pScrn);
i830_memory * i830_allocate_memory(ScrnInfoPtr pScrn, const char *name,
unsigned long size, unsigned long alignment,
int flags);
@ -758,6 +770,9 @@ extern const int I830CopyROP[16];
/* Flags for memory allocation function */
#define NEED_PHYSICAL_ADDR 0x00000001
#define ALIGN_BOTH_ENDS 0x00000002
#define NEED_NON_STOLEN 0x00000004
#define NEED_LIFETIME_FIXED 0x00000008
#define ALLOW_SHARING 0x00000010
/* Chipset registers for VIDEO BIOS memory RW access */
#define _855_DRAM_RW_CONTROL 0x58

6
src/i830_accel.c
View File

@ -254,6 +254,12 @@ I830RefreshRing(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
/* If we're reaching RefreshRing as a result of grabbing the DRI lock
* before we've set up the ringbuffer, don't bother.
*/
if (pI830->LpRing->mem == NULL)
return;
pI830->LpRing->head = INREG(LP_RING + RING_HEAD) & I830_HEAD_MASK;
pI830->LpRing->tail = INREG(LP_RING + RING_TAIL);
pI830->LpRing->space = pI830->LpRing->head - (pI830->LpRing->tail + 8);

9
src/i830_common.h
View File

@ -138,6 +138,15 @@ typedef struct {
int third_offset;
int third_size;
unsigned int third_tiled;
/* buffer object handles for the static buffers. May change
* over the lifetime of the client, though it doesn't in our current
* implementation.
*/
unsigned int front_bo_handle;
unsigned int back_bo_handle;
unsigned int third_bo_handle;
unsigned int depth_bo_handle;
} drmI830Sarea;
/* Flags for perf_boxes

58
src/i830_cursor.c
View File

@ -1,4 +1,4 @@
/* -*- c-basic-offset: 3 -*- */
/* -*- c-basic-offset: 4 -*- */
/**************************************************************************
Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas.
@ -275,3 +275,59 @@ i830_crtc_set_cursor_colors (xf86CrtcPtr crtc, int bg, int fg)
OUTREG(pal0 + 8, fg & 0x00ffffff);
OUTREG(pal0 + 12, bg & 0x00ffffff);
}
void
i830_update_cursor_offsets (ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
int i;
if (pI830->cursor_mem) {
unsigned long cursor_offset_base = pI830->cursor_mem->offset;
unsigned long cursor_addr_base, offset = 0;
/* Single memory buffer for cursors */
if (pI830->CursorNeedsPhysical) {
/* On any hardware that requires physical addresses for cursors,
* the PTEs don't support memory above 4GB, so we can safely
* ignore the top 32 bits of cursor_mem->bus_addr.
*/
cursor_addr_base = (unsigned long)pI830->cursor_mem->bus_addr;
} else
cursor_addr_base = pI830->cursor_mem->offset;
for (i = 0; i < xf86_config->num_crtc; i++) {
xf86CrtcPtr crtc = xf86_config->crtc[i];
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
intel_crtc->cursor_argb_addr = cursor_addr_base + offset;
intel_crtc->cursor_argb_offset = cursor_offset_base + offset;
offset += HWCURSOR_SIZE_ARGB;
intel_crtc->cursor_addr = cursor_addr_base + offset;
intel_crtc->cursor_offset = cursor_offset_base + offset;
offset += HWCURSOR_SIZE;
}
} else {
/* Separate allocations per cursor */
for (i = 0; i < xf86_config->num_crtc; i++) {
xf86CrtcPtr crtc = xf86_config->crtc[i];
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
if (pI830->CursorNeedsPhysical) {
intel_crtc->cursor_addr =
pI830->cursor_mem_classic[i]->bus_addr;
intel_crtc->cursor_argb_addr =
pI830->cursor_mem_argb[i]->bus_addr;
} else {
intel_crtc->cursor_addr =
pI830->cursor_mem_classic[i]->offset;
intel_crtc->cursor_argb_addr =
pI830->cursor_mem_argb[i]->offset;
}
intel_crtc->cursor_offset = pI830->cursor_mem_classic[i]->offset;
intel_crtc->cursor_argb_offset = pI830->cursor_mem_argb[i]->offset;
}
}
}

234
src/i830_dri.c
View File

@ -91,7 +91,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#define DRM_VBLANK_FLIP 0x8000000
typedef struct drm_i915_flip {
int planes;
int pipes;
} drm_i915_flip_t;
#undef DRM_IOCTL_I915_FLIP
@ -102,11 +102,6 @@ typedef struct drm_i915_flip {
#include "dristruct.h"
static char I830KernelDriverName[] = "i915";
static char I830ClientDriverName[] = "i915tex";
static char I965ClientDriverName[] = "i965";
static char I830LegacyClientDriverName[] = "i915";
static Bool I830InitVisualConfigs(ScreenPtr pScreen);
static Bool I830CreateContext(ScreenPtr pScreen, VisualPtr visual,
drm_context_t hwContext, void *pVisualConfigPriv,
@ -124,11 +119,20 @@ static void I830DRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg,
static void I830DRITransitionTo2d(ScreenPtr pScreen);
static void I830DRITransitionTo3d(ScreenPtr pScreen);
static void I830DRITransitionMultiToSingle3d(ScreenPtr pScreen);
static void I830DRITransitionSingleToMulti3d(ScreenPtr pScreen);
#if defined(DAMAGE) && (DRIINFO_MAJOR_VERSION > 5 || \
(DRIINFO_MAJOR_VERSION == 5 && DRIINFO_MINOR_VERSION >= 1))
#define DRI_SUPPORTS_CLIP_NOTIFY 1
#else
#define DRI_SUPPORTS_CLIP_NOTIFY 0
static void I830DRITransitionMultiToSingle3d(ScreenPtr pScreen);
static void I830DRITransitionSingleToMulti3d(ScreenPtr pScreen);
#endif
#if (DRIINFO_MAJOR_VERSION > 5 || \
(DRIINFO_MAJOR_VERSION == 5 && DRIINFO_MINOR_VERSION >= 4))
#define DRI_DRIVER_FRAMEBUFFER_MAP 1
#else
#define DRI_DRIVER_FRAMEBUFFER_MAP 0
#endif
#ifdef DRI_SUPPORTS_CLIP_NOTIFY
@ -491,7 +495,8 @@ I830CheckDRIAvailable(ScrnInfoPtr pScrn)
int major, minor, patch;
DRIQueryVersion(&major, &minor, &patch);
if (major != DRIINFO_MAJOR_VERSION || minor < DRIINFO_MINOR_VERSION) {
if (major != DRIINFO_MAJOR_VERSION || minor < DRIINFO_MINOR_VERSION ||
major < 5) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"[dri] %s failed because of a version mismatch.\n"
"[dri] libDRI version is %d.%d.%d but version %d.%d.x is needed.\n"
@ -528,11 +533,11 @@ I830DRIScreenInit(ScreenPtr pScreen)
pI830->pDRIInfo = pDRIInfo;
pI830->LockHeld = 0;
pDRIInfo->drmDriverName = I830KernelDriverName;
pDRIInfo->drmDriverName = "i915";
if (IS_I965G(pI830))
pDRIInfo->clientDriverName = I965ClientDriverName;
else
pDRIInfo->clientDriverName = I830ClientDriverName;
pDRIInfo->clientDriverName = "i965";
else
pDRIInfo->clientDriverName = "i915";
if (xf86LoaderCheckSymbol("DRICreatePCIBusID")) {
pDRIInfo->busIdString = DRICreatePCIBusID(pI830->PciInfo);
@ -552,16 +557,6 @@ I830DRIScreenInit(ScreenPtr pScreen)
pDRIInfo->ddxDriverMajorVersion = I830_MAJOR_VERSION;
pDRIInfo->ddxDriverMinorVersion = I830_MINOR_VERSION;
pDRIInfo->ddxDriverPatchVersion = I830_PATCHLEVEL;
#if 1 /* Remove this soon - see bug 5714 */
pDRIInfo->frameBufferPhysicalAddress = (char *) pI830->LinearAddr +
pI830->front_buffer->offset;
pDRIInfo->frameBufferSize = ROUND_TO_PAGE(pScrn->displayWidth *
pScrn->virtualY * pI830->cpp);
#else
/* For rotation we map a 0 length framebuffer as we remap ourselves later */
pDRIInfo->frameBufferSize = 0;
#endif
pDRIInfo->frameBufferStride = pScrn->displayWidth * pI830->cpp;
pDRIInfo->ddxDrawableTableEntry = I830_MAX_DRAWABLES;
if (SAREA_MAX_DRAWABLES < I830_MAX_DRAWABLES)
@ -597,41 +592,39 @@ I830DRIScreenInit(ScreenPtr pScreen)
pDRIInfo->MoveBuffers = I830DRIMoveBuffers;
pDRIInfo->bufferRequests = DRI_ALL_WINDOWS;
{
#if DRIINFO_MAJOR_VERSION == 5 && DRIINFO_MINOR_VERSION >= 1
int major, minor, patch;
DRIQueryVersion(&major, &minor, &patch);
#if DRIINFO_MAJOR_VERSION == 5 && DRIINFO_MINOR_VERSION >= 3
if (minor >= 3)
#endif
#if DRIINFO_MAJOR_VERSION > 5 || \
(DRIINFO_MAJOR_VERSION == 5 && DRIINFO_MINOR_VERSION >= 3)
if (pI830->useEXA)
pDRIInfo->texOffsetStart = I830TexOffsetStart;
#endif
#if DRI_SUPPORTS_CLIP_NOTIFY && DRIINFO_MAJOR_VERSION == 5
if (minor >= 1)
#endif
#if DRI_SUPPORTS_CLIP_NOTIFY
pDRIInfo->ClipNotify = I830DRIClipNotify;
pDRIInfo->ClipNotify = I830DRIClipNotify;
#endif
#if DRI_DRIVER_FRAMEBUFFER_MAP
/* DRI version is high enough that we can get the DRI code to not
* try to manage the framebuffer.
*/
pDRIInfo->frameBufferPhysicalAddress = 0;
pDRIInfo->frameBufferSize = 0;
pDRIInfo->frameBufferStride = 0;
pDRIInfo->dontMapFrameBuffer = TRUE;
#else
/* Supply a dummy mapping info required by DRI setup.
*/
pDRIInfo->frameBufferPhysicalAddress = (char *) pI830->LinearAddr;
pDRIInfo->frameBufferSize = GTT_PAGE_SIZE;
pDRIInfo->frameBufferStride = 1;
#endif
#endif /* DRIINFO_MAJOR_VERSION == 5 && DRIINFO_MINOR_VERSION >= 1 */
}
pDRIInfo->TransitionTo2d = I830DRITransitionTo2d;
pDRIInfo->TransitionTo3d = I830DRITransitionTo3d;
#if DRIINFO_MAJOR_VERSION > 5 || \
(DRIINFO_MAJOR_VERSION == 5 && DRIINFO_MINOR_VERSION >= 1)
if (!pDRIInfo->ClipNotify)
#if !DRI_SUPPORTS_CLIP_NOTIFY
pDRIInfo->TransitionSingleToMulti3D = I830DRITransitionSingleToMulti3d;
pDRIInfo->TransitionMultiToSingle3D = I830DRITransitionMultiToSingle3d;
#endif
{
pDRIInfo->TransitionSingleToMulti3D = I830DRITransitionSingleToMulti3d;
pDRIInfo->TransitionMultiToSingle3D = I830DRITransitionMultiToSingle3d;
}
/* do driver-independent DRI screen initialization here */
if (!DRIScreenInit(pScreen, pDRIInfo, &pI830->drmSubFD)) {
@ -644,26 +637,24 @@ I830DRIScreenInit(ScreenPtr pScreen)
return FALSE;
}
#if 0 /* disabled now, see frameBufferSize above being set to 0 */
/* for this driver, get rid of the front buffer mapping now */
if (xf86LoaderCheckSymbol("DRIGetScreenPrivate")) {
DRIScreenPrivPtr pDRIPriv
= (DRIScreenPrivPtr) DRIGetScreenPrivate(pScreen);
/* Now, nuke dri.c's dummy frontbuffer map setup if we did that. */
if (pDRIInfo->frameBufferSize != 0) {
int tmp;
unsigned int fb_handle;
void *ptmp;
if (pDRIPriv && pDRIPriv->drmFD && pDRIPriv->hFrameBuffer) {
xf86DrvMsg(pScreen->myNum, X_ERROR,
"[intel] removing original screen mapping\n");
drmRmMap(pDRIPriv->drmFD, pDRIPriv->hFrameBuffer);
pDRIPriv->hFrameBuffer = 0;
xf86DrvMsg(pScreen->myNum, X_ERROR,
"[intel] done removing original screen mapping\n");
}
/* With the compat method, it will continue to report
* the wrong map out of GetDeviceInfo, which will break AIGLX.
*/
DRIGetDeviceInfo(pScreen, &fb_handle, &tmp, &tmp, &tmp, &tmp, &ptmp);
drmRmMap(pI830->drmSubFD, fb_handle);
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Removed DRI frontbuffer mapping in compatibility mode.\n");
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"DRIGetDeviceInfo will report incorrect frontbuffer "
"handle.\n");
}
else {
xf86DrvMsg(pScreen->myNum, X_ERROR,
"[intel] DRIGetScreenPrivate not found!!!!\n");
}
#endif
/* Check the i915 DRM versioning */
{
@ -723,35 +714,20 @@ I830DRIScreenInit(ScreenPtr pScreen)
drmFreeVersion(version);
return FALSE;
}
if (strncmp(version->name, I830KernelDriverName, strlen(I830KernelDriverName))) {
xf86DrvMsg(pScreen->myNum, X_WARNING,
"i830 Kernel module detected, Use the i915 Kernel module instead, aborting DRI init.\n");
/* Check whether the kernel module attached to the device isn't the
* one we expected (meaning it's the old i830 module).
*/
if (strncmp(version->name, pDRIInfo->drmDriverName,
strlen(pDRIInfo->drmDriverName)))
{
xf86DrvMsg(pScreen->myNum, X_WARNING,
"Detected i830 kernel module. The i915 kernel module "
"is required for DRI. Aborting.\n");
I830DRICloseScreen(pScreen);
drmFreeVersion(version);
return FALSE;
}
pI830->drmMinor = version->version_minor;
if (version->version_minor < 7) {
if (pI830->mmModeFlags & I830_KERNEL_MM) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Unable to use TTM-based memory manager with DRM version %d.%d\n",
version->version_major, version->version_minor);
pI830->mmModeFlags &= ~I830_KERNEL_MM;
i830_free_memory(pScrn, pI830->memory_manager);
pI830->memory_manager = NULL;
if (!(pI830->mmModeFlags & I830_KERNEL_TEX)) {
pI830->mmModeFlags |= I830_KERNEL_TEX;
if (!i830_allocate_texture_memory(pScrn)) {
I830DRICloseScreen(pScreen);
drmFreeVersion(version);
return FALSE;
}
}
}
}
#ifdef DAMAGE
if (pI830->allowPageFlip && pI830->drmMinor < 9) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
@ -764,15 +740,6 @@ I830DRIScreenInit(ScreenPtr pScreen)
}
}
/*
* Backwards compatibility
*/
if ((pDRIInfo->clientDriverName == I830ClientDriverName) &&
(pI830->mmModeFlags & I830_KERNEL_TEX)) {
pDRIInfo->clientDriverName = I830LegacyClientDriverName;
}
return TRUE;
}
@ -781,32 +748,33 @@ I830DRIMapScreenRegions(ScrnInfoPtr pScrn, drmI830Sarea *sarea)
{
ScreenPtr pScreen = pScrn->pScreen;
I830Ptr pI830 = I830PTR(pScrn);
drm_handle_t front_handle;
#if 1 /* Remove this soon - see bug 5714 */
pI830->pDRIInfo->frameBufferSize = ROUND_TO_PAGE(pScrn->displayWidth *
pScrn->virtualY * pI830->cpp);
pI830->pDRIInfo->frameBufferPhysicalAddress = (char *) pI830->LinearAddr;
pI830->pDRIInfo->frameBufferStride = pScrn->displayWidth * pI830->cpp;
pI830->pDRIInfo->frameBufferSize =
ROUND_TO_PAGE(pI830->pDRIInfo->frameBufferStride * pScrn->virtualY);
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"[drm] Mapping front buffer\n");
if (drmAddMap(pI830->drmSubFD,
(drm_handle_t)(sarea->front_offset + pI830->LinearAddr),
sarea->front_size,
DRM_AGP,
0,
&front_handle) < 0) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"[drm] drmAddMap(front_handle) failed. Disabling DRI\n");
DRICloseScreen(pScreen);
return FALSE;
}
sarea->front_handle = front_handle;
#if DRI_DRIVER_FRAMEBUFFER_MAP
pI830->pDRIInfo->hFrameBuffer = front_handle;
#endif
/* The I965G isn't ready for the front buffer mapping to be moved around,
* because of issues with rmmap, it seems.
*/
if (!IS_I965G(pI830)) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"[drm] Mapping front buffer\n");
if (drmAddMap(pI830->drmSubFD,
(drm_handle_t)(sarea->front_offset + pI830->LinearAddr),
sarea->front_size,
DRM_AGP,
0,
(drmAddress) &sarea->front_handle) < 0) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"[drm] drmAddMap(front_handle) failed. Disabling DRI\n");
DRICloseScreen(pScreen);
return FALSE;
}
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[drm] Front Buffer = 0x%08x\n",
(int)sarea->front_handle);
}
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[drm] Front Buffer = 0x%08x\n",
(int)sarea->front_handle);
if (drmAddMap(pI830->drmSubFD,
(drm_handle_t)(sarea->back_offset + pI830->LinearAddr),
@ -848,7 +816,7 @@ I830DRIMapScreenRegions(ScrnInfoPtr pScrn, drmI830Sarea *sarea)
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[drm] Depth Buffer = 0x%08x\n",
(int)sarea->depth_handle);
if (pI830->mmModeFlags & I830_KERNEL_TEX) {
if (pI830->allocate_classic_textures) {
if (drmAddMap(pI830->drmSubFD,
(drm_handle_t)sarea->tex_offset + pI830->LinearAddr,
sarea->tex_size, DRM_AGP, 0,
@ -1288,20 +1256,20 @@ I830DRISwapContext(ScreenPtr pScreen, DRISyncType syncType,
#ifdef DAMAGE
/* Try flipping back to the front page if necessary */
if (sPriv && !sPriv->pf_enabled && sPriv->pf_current_page != 0) {
drm_i915_flip_t flip = { .planes = 0 };
drm_i915_flip_t flip = { .pipes = 0 };
if (sPriv->pf_current_page & (0x3 << 2)) {
sPriv->pf_current_page = sPriv->pf_current_page & 0x3;
sPriv->pf_current_page |= (sPriv->third_handle ? 2 : 1) << 2;
flip.planes |= 0x2;
flip.pipes |= 0x2;
}
if (sPriv->pf_current_page & 0x3) {
sPriv->pf_current_page = sPriv->pf_current_page & (0x3 << 2);
sPriv->pf_current_page |= sPriv->third_handle ? 2 : 1;
flip.planes |= 0x1;
flip.pipes |= 0x1;
}
drmCommandWrite(pI830->drmSubFD, DRM_I915_FLIP, &flip, sizeof(flip));
@ -1569,6 +1537,7 @@ I830DRISetPfMask(ScreenPtr pScreen, int pfMask)
pSAREAPriv->pf_active = 0;
}
#if !DRI_SUPPORTS_CLIP_NOTIFY
static void
I830DRITransitionSingleToMulti3d(ScreenPtr pScreen)
{
@ -1589,6 +1558,7 @@ I830DRITransitionMultiToSingle3d(ScreenPtr pScreen)
*/
I830DRISetPfMask(pScreen, pI830->allowPageFlip ? 0x3 : 0);
}
#endif /* !DRI_SUPPORTS_CLIP_NOTIFY */
static void
I830DRITransitionTo3d(ScreenPtr pScreen)
@ -1712,6 +1682,7 @@ I830UpdateDRIBuffers(ScrnInfoPtr pScrn, drmI830Sarea *sarea)
sarea->third_offset = 0;
sarea->third_size = 0;
}
sarea->depth_offset = pI830->depth_buffer->offset;
sarea->depth_size = pI830->depth_buffer->size;
if (pI830->textures != NULL) {
@ -1726,6 +1697,21 @@ I830UpdateDRIBuffers(ScrnInfoPtr pScrn, drmI830Sarea *sarea)
sarea->virtualX = pScrn->virtualX;
sarea->virtualY = pScrn->virtualY;
sarea->front_bo_handle = -1;
sarea->back_bo_handle = -1;
sarea->third_bo_handle = -1;
sarea->depth_bo_handle = -1;
#ifdef XF86DRI_MM
if (pI830->front_buffer->bo.size)
sarea->front_bo_handle = pI830->front_buffer->bo.handle;
if (pI830->back_buffer->bo.size)
sarea->back_bo_handle = pI830->back_buffer->bo.handle;
if (pI830->third_buffer != NULL && pI830->third_buffer->bo.size)
sarea->third_bo_handle = pI830->third_buffer->bo.handle;
if (pI830->depth_buffer->bo.size)
sarea->depth_bo_handle = pI830->depth_buffer->bo.handle;
#endif
/* The rotation is now handled entirely by the X Server, so just leave the
* DRI unaware.
*/
@ -1736,7 +1722,7 @@ I830UpdateDRIBuffers(ScrnInfoPtr pScrn, drmI830Sarea *sarea)
success = I830DRIMapScreenRegions(pScrn, sarea);
if (success && (pI830->mmModeFlags & I830_KERNEL_TEX))
if (success && pI830->allocate_classic_textures)
I830InitTextureHeap(pScrn, sarea);
return success;

2
src/i830_dri.h
View File

@ -9,7 +9,7 @@
#define I830_MAX_DRAWABLES 256
#define I830_MAJOR_VERSION 1
#define I830_MINOR_VERSION 8
#define I830_MINOR_VERSION 9
#define I830_PATCHLEVEL 0
#define I830_REG_SIZE 0x80000

286
src/i830_driver.c
View File

@ -297,7 +297,6 @@ typedef enum {
OPTION_TILING,
#ifdef XF86DRI_MM
OPTION_INTELTEXPOOL,
OPTION_INTELMMSIZE,
#endif
OPTION_TRIPLEBUFFER,
} I830Opts;
@ -320,7 +319,6 @@ static OptionInfoRec I830Options[] = {
{OPTION_TILING, "Tiling", OPTV_BOOLEAN, {0}, TRUE},
#ifdef XF86DRI_MM
{OPTION_INTELTEXPOOL,"Legacy3D", OPTV_BOOLEAN, {0}, FALSE},
{OPTION_INTELMMSIZE, "AperTexSize", OPTV_INTEGER, {0}, FALSE},
#endif
{OPTION_TRIPLEBUFFER, "TripleBuffer", OPTV_BOOLEAN, {0}, FALSE},
{-1, NULL, OPTV_NONE, {0}, FALSE}
@ -786,6 +784,55 @@ I830LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices,
}
}
#if 0
/* This code ended up unused, but will be at least a reference when we let the
* front buffer move.
*/
static void
i830UpdateFrontOffset(ScrnInfoPtr pScrn)
{
ScreenPtr pScreen = pScrn->pScreen;
I830Ptr pI830 = I830PTR(pScrn);
/* If we are still in ScreenInit, there is no screen pixmap to be updated
* yet. We'll fix it up at CreateScreenResources.
*/
if (pI830->starting)
return;
/* Update buffer locations, which may have changed as a result of
* i830_bind_all_memory().
*/
pScrn->fbOffset = pI830->front_buffer->offset;
if (!pScreen->ModifyPixmapHeader(pScreen->GetScreenPixmap(pScreen),
-1, -1, -1, -1, -1,
(pointer)(pI830->FbBase +
pScrn->fbOffset)))
FatalError("Couldn't adjust screen pixmap\n");
}
/**
* Adjust the screen pixmap for the current location of the front buffer.
* This is done at EnterVT when buffers are bound as long as the resources
* have already been created, but the first EnterVT happens before
* CreateScreenResources.
*/
static Bool
i830CreateScreenResources(ScreenPtr pScreen)
{
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
I830Ptr pI830 = I830PTR(pScrn);
pScreen->CreateScreenResources = pI830->CreateScreenResources;
if (!(*pScreen->CreateScreenResources)(pScreen))
return FALSE;
i830UpdateFrontOffset(pScrn);
return TRUE;
}
#endif
int
i830_output_clones (ScrnInfoPtr pScrn, int type_mask)
{
@ -1433,50 +1480,22 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
pI830->directRenderingDisabled = TRUE;
}
pI830->mmModeFlags = 0;
if (!pI830->directRenderingDisabled) {
pI830->mmModeFlags = I830_KERNEL_TEX;
#ifdef XF86DRI_MM
Bool tmp = FALSE;
if (!IS_I965G(pI830))
pI830->mmModeFlags |= I830_KERNEL_MM;
#endif
pI830->allocate_classic_textures = TRUE;
from = X_PROBED;
#ifdef XF86DRI_MM
if (xf86GetOptValBool(pI830->Options,
OPTION_INTELTEXPOOL, &tmp)) {
from = X_CONFIG;
if (tmp) {
pI830->mmModeFlags |= I830_KERNEL_TEX;
pI830->mmModeFlags &= ~I830_KERNEL_MM;
} else {
pI830->mmModeFlags &= ~I830_KERNEL_TEX;
pI830->mmModeFlags |= I830_KERNEL_MM;
}
}
#endif
if (!IS_I965G(pI830)) {
Bool tmp;
xf86DrvMsg(pScrn->scrnIndex, from,
"Will %stry to allocate texture pool "
"for old Mesa 3D driver.\n",
(pI830->mmModeFlags & I830_KERNEL_TEX) ?
"" : "not ");
#ifdef XF86DRI_MM
pI830->mmSize = I830_MM_MAXSIZE;
from = X_INFO;
if (xf86GetOptValInteger(pI830->Options, OPTION_INTELMMSIZE,
&(pI830->mmSize))) {
from = X_CONFIG;
if (xf86GetOptValBool(pI830->Options,
OPTION_INTELTEXPOOL, &tmp)) {
from = X_CONFIG;
if (!tmp)
pI830->allocate_classic_textures = FALSE;
}
}
xf86DrvMsg(pScrn->scrnIndex, from,
"Will try to reserve %d kiB of AGP aperture space\n"
"\tfor the DRM memory manager.\n",
pI830->mmSize);
#endif
}
}
@ -2255,11 +2274,7 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
Bool allocation_done = FALSE;
MessageType from;
#ifdef XF86DRI
Bool driDisabled;
xf86CrtcConfigPtr config;
#ifdef XF86DRI_MM
unsigned long savedMMSize;
#endif
#endif
pScrn = xf86Screens[pScreen->myNum];
@ -2354,6 +2369,23 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
pScrn->videoRam &= ~3;
}
#ifdef XF86DRI
/* Check for appropriate bpp and module support to initialize DRI. */
if (!I830CheckDRIAvailable(pScrn)) {
pI830->directRenderingDisabled = TRUE;
}
/* If DRI hasn't been explicitly disabled, try to initialize it.
* It will be used by the memory allocator.
*/
if (!pI830->directRenderingDisabled)
pI830->directRenderingEnabled = I830DRIScreenInit(pScreen);
else
pI830->directRenderingEnabled = FALSE;
#else
pI830->directRenderingEnabled = FALSE;
#endif
/* Set up our video memory allocator for the chosen videoRam */
if (!i830_allocator_init(pScrn, 0, pScrn->videoRam * KB(1))) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
@ -2439,12 +2471,6 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
* for it, and if there's also enough to allow tiling to be enabled.
*/
if (!I830CheckDRIAvailable(pScrn)) {
pI830->directRenderingDisabled = TRUE;
#ifdef XF86DRI_MM
pI830->mmSize = 0;
#endif
}
#ifdef I830_XV
/*
@ -2454,7 +2480,7 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
pI830->XvEnabled = !pI830->XvDisabled;
#endif
if (!pI830->directRenderingDisabled) {
if (pI830->directRenderingEnabled) {
int savedDisplayWidth = pScrn->displayWidth;
Bool tiled = FALSE;
@ -2484,25 +2510,18 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
}
}
/* Attempt several rounds of allocation to get 2d and 3d memory to fit:
/* Attempt two rounds of allocation to get 2d and 3d memory to fit:
*
* 0: tiled, large memory manager
* 1: tiled, small memory manager
* 2: untiled, large
* 3: untiled, small
* 0: untiled
* 1: tiled
*/
#ifdef XF86DRI_MM
savedMMSize = pI830->mmSize;
#define MM_TURNS 4
#else
#define MM_TURNS 2
#endif
for (i = 0; i < MM_TURNS; i++) {
if (!tiled && i < 2)
if (!tiled && i == 0)
continue;
if (i >= MM_TURNS/2) {
if (i >= 1) {
/* For further allocations, disable tiling */
pI830->tiling = FALSE;
pScrn->displayWidth = savedDisplayWidth;
@ -2513,26 +2532,9 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
pI830->allowPageFlip = FALSE;
}
#ifdef XF86DRI_MM
if (i & 1) {
/* For this allocation, switch to a smaller DRI memory manager
* size.
*/
pI830->mmSize = I830_MM_MINPAGES * GTT_PAGE_SIZE / KB(1);
} else {
pI830->mmSize = savedMMSize;
}
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Attempting memory allocation with %s buffers and \n"
"\t %s DRI memory manager reservation:\n",
(i & 2) ? "untiled" : "tiled",
(i & 1) ? "small" : "large");
#else
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Attempting memory allocation with %s buffers:\n",
"Attempting memory allocation with %s buffers.\n",
(i & 1) ? "untiled" : "tiled");
#endif
if (i830_allocate_2d_memory(pScrn) &&
i830_allocate_3d_memory(pScrn))
@ -2554,10 +2556,7 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
if (i == MM_TURNS) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Not enough video memory. Disabling DRI.\n");
#ifdef XF86DRI_MM
pI830->mmSize = 0;
#endif
pI830->directRenderingDisabled = TRUE;
pI830->directRenderingEnabled = FALSE;
}
}
#endif
@ -2573,13 +2572,11 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
I830UnmapMMIO(pScrn);
i830_describe_allocations(pScrn, 1, "");
if (!IS_I965G(pI830) && pScrn->displayWidth > 2048) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Cannot support DRI with frame buffer width > 2048.\n");
pI830->tiling = FALSE;
pI830->directRenderingDisabled = TRUE;
pI830->directRenderingEnabled = FALSE;
}
pScrn->displayWidth = pScrn->displayWidth;
@ -2680,11 +2677,6 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
#endif
#ifdef XF86DRI
/*
* pI830->directRenderingDisabled is set once in PreInit. Reinitialise
* pI830->directRenderingEnabled based on it each generation.
*/
pI830->directRenderingEnabled = !pI830->directRenderingDisabled;
/*
* Setup DRI after visuals have been established, but before fbScreenInit
* is called. fbScreenInit will eventually call into the drivers
@ -2696,18 +2688,15 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "DRI is disabled because it "
"needs HW cursor, 2D accel and AGPGART.\n");
pI830->directRenderingEnabled = FALSE;
i830_free_3d_memory(pScrn);
}
}
driDisabled = !pI830->directRenderingEnabled;
if (pI830->directRenderingEnabled)
pI830->directRenderingEnabled = I830DRIScreenInit(pScreen);
pI830->directRenderingEnabled = I830DRIDoMappings(pScreen);
if (!pI830->directRenderingEnabled) {
/* If we failed for any reason, free DRI memory. */
if (!pI830->directRenderingEnabled)
i830_free_3d_memory(pScrn);
}
config = XF86_CRTC_CONFIG_PTR(pScrn);
@ -2739,8 +2728,6 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
#endif
#ifdef XF86DRI
if (pI830->directRenderingEnabled)
pI830->directRenderingEnabled = I830DRIDoMappings(pScreen);
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Page Flipping %sabled\n",
pI830->allowPageFlip ? "en" : "dis");
@ -2837,6 +2824,14 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
} else
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Initializing SW Cursor!\n");
#ifdef XF86DRI
/* Must be called before EnterVT, so we can acquire the DRI lock when
* binding our memory.
*/
if (pI830->directRenderingEnabled)
pI830->directRenderingEnabled = I830DRIFinishScreenInit(pScreen);
#endif
if (!I830EnterVT(scrnIndex, 0))
return FALSE;
@ -2859,13 +2854,6 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
I830InitVideo(pScreen);
#endif
#ifdef XF86DRI
if (pI830->directRenderingEnabled) {
pI830->directRenderingEnabled = I830DRIFinishScreenInit(pScreen);
}
#endif
/* Setup 3D engine, needed for rotation too */
IntelEmitInvarientState(pScrn);
@ -2874,7 +2862,7 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
pI830->directRenderingOpen = TRUE;
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "direct rendering: Enabled\n");
} else {
if (driDisabled)
if (pI830->directRenderingDisabled)
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "direct rendering: Disabled\n");
else
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "direct rendering: Failed\n");
@ -2886,6 +2874,10 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
pScreen->SaveScreen = xf86SaveScreen;
pI830->CloseScreen = pScreen->CloseScreen;
pScreen->CloseScreen = I830CloseScreen;
#if 0
pI830->CreateScreenResources = pScreen->CreateScreenResources;
pScreen->CreateScreenResources = i830CreateScreenResources;
#endif
if (!xf86CrtcScreenInit (pScreen))
return FALSE;
@ -2915,37 +2907,6 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
pI830->closing = FALSE;
pI830->suspended = FALSE;
#ifdef XF86DRI_MM
if (pI830->directRenderingEnabled && (pI830->mmModeFlags & I830_KERNEL_MM))
{
if (pI830->memory_manager == NULL) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Too little AGP aperture space for DRM memory manager.\n"
"\tPlease increase AGP aperture size from BIOS configuration screen.\n"
"\tDisabling DRI.\n");
pI830->directRenderingOpen = FALSE;
I830DRICloseScreen(pScreen);
pI830->directRenderingEnabled = FALSE;
} else {
unsigned long aperEnd = ROUND_DOWN_TO(pI830->memory_manager->offset +
pI830->memory_manager->size,
GTT_PAGE_SIZE) / GTT_PAGE_SIZE;
unsigned long aperStart = ROUND_TO(pI830->memory_manager->offset,
GTT_PAGE_SIZE) / GTT_PAGE_SIZE;
if (drmMMInit(pI830->drmSubFD, aperStart, aperEnd - aperStart,
DRM_BO_MEM_TT)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Could not initialize the DRM memory manager.\n");
pI830->directRenderingOpen = FALSE;
I830DRICloseScreen(pScreen);
pI830->directRenderingEnabled = FALSE;
}
}
}
#endif /* XF86DRI_MM */
return TRUE;
}
@ -3012,7 +2973,7 @@ I830LeaveVT(int scrnIndex, int flags)
if (pI830->directRenderingOpen) {
DRILock(screenInfo.screens[pScrn->scrnIndex], 0);
#ifdef XF86DRI_MM
if (pI830->mmModeFlags & I830_KERNEL_MM) {
if (pI830->memory_manager != NULL) {
drmMMLock(pI830->drmSubFD, DRM_BO_MEM_TT);
}
#endif /* XF86DRI_MM */
@ -3067,6 +3028,12 @@ I830EnterVT(int scrnIndex, int flags)
if (!i830_bind_all_memory(pScrn))
return FALSE;
i830_describe_allocations(pScrn, 1, "");
#if 0
i830UpdateFrontOffset(pScrn);
#endif
if (i830_check_error_state(pScrn)) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Existing errors found in hardware state.\n");
@ -3117,7 +3084,7 @@ I830EnterVT(int scrnIndex, int flags)
sarea->texList[i].age = sarea->texAge;
#ifdef XF86DRI_MM
if (pI830->mmModeFlags & I830_KERNEL_MM) {
if (pI830->memory_manager != NULL) {
drmMMUnlock(pI830->drmSubFD, DRM_BO_MEM_TT);
}
#endif /* XF86DRI_MM */
@ -3164,26 +3131,6 @@ I830CloseScreen(int scrnIndex, ScreenPtr pScreen)
#endif
pI830->closing = TRUE;
#ifdef XF86DRI
if (pI830->directRenderingOpen) {
#ifdef DAMAGE
if (pI830->pDamage) {
PixmapPtr pPix = pScreen->GetScreenPixmap(pScreen);
DamageUnregister(&pPix->drawable, pI830->pDamage);
DamageDestroy(pI830->pDamage);
pI830->pDamage = NULL;
}
#endif
#ifdef XF86DRI_MM
if (pI830->mmModeFlags & I830_KERNEL_MM) {
drmMMTakedown(pI830->drmSubFD, DRM_BO_MEM_TT);
}
#endif /* XF86DRI_MM */
pI830->directRenderingOpen = FALSE;
I830DRICloseScreen(pScreen);
}
#endif
if (pScrn->vtSema == TRUE) {
I830LeaveVT(scrnIndex, 0);
@ -3218,7 +3165,22 @@ I830CloseScreen(int scrnIndex, ScreenPtr pScreen)
#endif
xf86_cursors_fini (pScreen);
i830_reset_allocations(pScrn);
i830_allocator_fini(pScrn);
#ifdef XF86DRI
if (pI830->directRenderingOpen) {
#ifdef DAMAGE
if (pI830->pDamage) {
PixmapPtr pPix = pScreen->GetScreenPixmap(pScreen);
DamageUnregister(&pPix->drawable, pI830->pDamage);
DamageDestroy(pI830->pDamage);
pI830->pDamage = NULL;
}
#endif
pI830->directRenderingOpen = FALSE;
I830DRICloseScreen(pScreen);
}
#endif
if (I830IsPrimary(pScrn)) {
xf86GARTCloseScreen(scrnIndex);

22
src/i830_dvo.c
View File

@ -55,12 +55,10 @@ static const char *ivch_symbols[] = {
NULL
};
#if 0
static const char *ch7017_symbols[] = {
"ch7017_methods",
NULL
};
#endif
/* driver list */
struct _I830DVODriver i830_dvo_drivers[] =
@ -97,10 +95,15 @@ struct _I830DVODriver i830_dvo_drivers[] =
.address = (TFP410_ADDR_1<<1),
.symbols = TFP410Symbols
},
/*
{ I830_OUTPUT_DVO_LVDS, "ch7017", "ch7017_methods",
0xea, ch7017_symbols, NULL, NULL, NULL }
*/
{
.type = I830_OUTPUT_DVO_LVDS,
.modulename = "ch7017",
.fntablename = "ch7017_methods",
.dvo_reg = DVOC,
.address = 0xea,
.symbols = ch7017_symbols,
.gpio = GPIOE,
}
};
#define I830_NUM_DVO_DRIVERS (sizeof(i830_dvo_drivers)/sizeof(struct _I830DVODriver))
@ -428,7 +431,12 @@ i830_dvo_init(ScrnInfoPtr pScrn)
ret_ptr = NULL;
drv->vid_rec = LoaderSymbol(drv->fntablename);
if (drv->type == I830_OUTPUT_DVO_LVDS)
/* Allow the I2C driver info to specify the GPIO to be used in
* special cases, but otherwise default to what's defined in the spec.
*/
if (drv->gpio != 0)
gpio = drv->gpio;
else if (drv->type == I830_OUTPUT_DVO_LVDS)
gpio = GPIOB;
else
gpio = GPIOE;

9
src/i830_exa.c
View File

@ -482,9 +482,14 @@ I830EXAInit(ScreenPtr pScreen)
"performance may suffer\n");
#endif
pI830->EXADriverPtr->memoryBase = pI830->FbBase;
pI830->EXADriverPtr->offScreenBase = pI830->exa_offscreen->offset;
pI830->EXADriverPtr->memorySize = pI830->exa_offscreen->offset +
if (pI830->exa_offscreen) {
pI830->EXADriverPtr->offScreenBase = pI830->exa_offscreen->offset;
pI830->EXADriverPtr->memorySize = pI830->exa_offscreen->offset +
pI830->exa_offscreen->size;
} else {
pI830->EXADriverPtr->offScreenBase = pI830->FbMapSize;
pI830->EXADriverPtr->memorySize = pI830->FbMapSize;
}
pI830->EXADriverPtr->flags = EXA_OFFSCREEN_PIXMAPS;
DPRINTF(PFX, "EXA Mem: memoryBase 0x%x, end 0x%x, offscreen base 0x%x, "

496
src/i830_memory.c
View File

@ -108,6 +108,13 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define ALIGN(i,m) (((i) + (m) - 1) & ~((m) - 1))
/* Our hardware status area is just a single page */
#define HWSTATUS_PAGE_SIZE GTT_PAGE_SIZE
static i830_memory *
i830_allocate_aperture(ScrnInfoPtr pScrn, const char *name,
long size, unsigned long alignment, int flags);
static void i830_set_fence(ScrnInfoPtr pScrn, int nr, unsigned int offset,
unsigned int pitch, unsigned int size,
enum tile_format tile_format);
@ -146,10 +153,31 @@ i830_bind_memory(ScrnInfoPtr pScrn, i830_memory *mem)
{
I830Ptr pI830 = I830PTR(pScrn);
if (mem == NULL || mem->key == -1 || mem->bound || !pI830->gtt_acquired)
if (mem == NULL || mem->bound)
return TRUE;
if (xf86BindGARTMemory(pScrn->scrnIndex, mem->key, mem->agp_offset)) {
#ifdef XF86DRI_MM
if (mem->bo.size != 0) {
I830Ptr pI830 = I830PTR(pScrn);
int ret;
ret = drmBOSetPin(pI830->drmSubFD, &mem->bo, 1);
if (ret == 0) {
mem->bound = TRUE;
mem->offset = mem->bo.offset;
mem->end = mem->bo.offset + mem->size;
return TRUE;
} else {
return FALSE;
}
}
#endif
if (!pI830->gtt_acquired)
return TRUE;
if (mem->key == -1 ||
xf86BindGARTMemory(pScrn->scrnIndex, mem->key, mem->agp_offset)) {
mem->bound = TRUE;
return TRUE;
} else {
@ -162,10 +190,28 @@ i830_bind_memory(ScrnInfoPtr pScrn, i830_memory *mem)
static Bool
i830_unbind_memory(ScrnInfoPtr pScrn, i830_memory *mem)
{
if (mem == NULL || mem->key == -1 || !mem->bound)
if (mem == NULL || !mem->bound)
return TRUE;
if (xf86UnbindGARTMemory(pScrn->scrnIndex, mem->key)) {
#ifdef XF86DRI_MM
if (mem->bo.size != 0) {
I830Ptr pI830 = I830PTR(pScrn);
int ret;
ret = drmBOSetPin(pI830->drmSubFD, &mem->bo, 0);
if (ret == 0) {
mem->bound = FALSE;
/* Give buffer obviously wrong offset/end until it's re-pinned. */
mem->offset = -1;
mem->end = -1;
return TRUE;
} else {
return FALSE;
}
}
#endif
if (mem->key == -1 || xf86UnbindGARTMemory(pScrn->scrnIndex, mem->key)) {
mem->bound = FALSE;
return TRUE;
} else {
@ -179,15 +225,31 @@ i830_free_memory(ScrnInfoPtr pScrn, i830_memory *mem)
if (mem == NULL)
return;
/* Disconnect from the list of allocations */
/* Free any AGP memory. */
i830_unbind_memory(pScrn, mem);
#ifdef XF86DRI_MM
if (mem->bo.size != 0) {
I830Ptr pI830 = I830PTR(pScrn);
drmBOUnReference(pI830->drmSubFD, &mem->bo);
if (pI830->bo_list == mem)
pI830->bo_list = mem->next;
if (mem->next)
mem->next->prev = NULL;
if (mem->prev)
mem->prev->next = NULL;
xfree(mem->name);
xfree(mem);
return;
}
#endif
/* Disconnect from the list of allocations */
if (mem->prev != NULL)
mem->prev->next = mem->next;
if (mem->next != NULL)
mem->next->prev = mem->prev;
/* Free any AGP memory. */
i830_unbind_memory(pScrn, mem);
if (mem->key != -1) {
xf86DeallocateGARTMemory(pScrn->scrnIndex, mem->key);
mem->key = -1;
@ -210,6 +272,14 @@ i830_reset_allocations(ScrnInfoPtr pScrn)
while (pI830->memory_list->next->next != NULL)
i830_free_memory(pScrn, pI830->memory_list->next);
/* Free any allocations in buffer objects */
#ifdef XF86DRI_MM
if (pI830->memory_manager) {
while (pI830->bo_list != NULL)
i830_free_memory(pScrn, pI830->bo_list);
}
#endif
/* Null out the pointers for all the allocations we just freed. This is
* kind of gross, but at least it's just one place now.
*/
@ -231,7 +301,6 @@ i830_reset_allocations(ScrnInfoPtr pScrn)
pI830->third_buffer = NULL;
pI830->depth_buffer = NULL;
pI830->textures = NULL;
pI830->memory_manager = NULL;
#endif
pI830->LpRing->mem = NULL;
@ -254,21 +323,27 @@ i830_free_3d_memory(ScrnInfoPtr pScrn)
pI830->depth_buffer = NULL;
i830_free_memory(pScrn, pI830->textures);
pI830->textures = NULL;
i830_free_memory(pScrn, pI830->memory_manager);
pI830->memory_manager = NULL;
#endif
}
/**
* Initialize's the driver's video memory allocator to allocate in the
* given range.
*
* This sets up the kernel memory manager to manage as much of the memory
* as we think it can, while leaving enough to us to fulfill our non-TTM
* static allocations. Some of these exist because of the need for physical
* addresses to reference.
*/
Bool
i830_allocator_init(ScrnInfoPtr pScrn, unsigned long offset,
unsigned long size)
i830_allocator_init(ScrnInfoPtr pScrn, unsigned long offset, unsigned long size)
{
I830Ptr pI830 = I830PTR(pScrn);
i830_memory *start, *end;
int ret;
#ifdef XF86DRI_MM
int dri_major, dri_minor, dri_patch;
#endif
start = xcalloc(1, sizeof(*start));
if (start == NULL)
@ -305,9 +380,89 @@ i830_allocator_init(ScrnInfoPtr pScrn, unsigned long offset,
pI830->memory_list = start;
#ifdef XF86DRI_MM
DRIQueryVersion(&dri_major, &dri_minor, &dri_patch);
/* Now that we have our manager set up, initialize the kernel MM if
* possible, covering almost all of the aperture. We need libdri interface
* 5.4 or newer so we can rely on the lock being held after DRIScreenInit,
* rather than after DRIFinishScreenInit.
*/
if (pI830->directRenderingEnabled && pI830->drmMinor >= 7 &&
(dri_major > 5 || (dri_major == 5 && dri_minor >= 4)))
{
int mmsize;
/* Take over all of the graphics aperture minus enough to for
* physical-address allocations of cursor/overlay registers.
*/
mmsize = size;
/* Overlay is always set up as fixed, currently. */
if (!OVERLAY_NOPHYSICAL(pI830) && !IS_I965G(pI830)) {
mmsize -= ROUND_TO(OVERLAY_SIZE, GTT_PAGE_SIZE);
}
if (pI830->CursorNeedsPhysical) {
mmsize -= 2 * (ROUND_TO(HWCURSOR_SIZE, GTT_PAGE_SIZE) +
ROUND_TO(HWCURSOR_SIZE_ARGB, GTT_PAGE_SIZE));
}
if (pI830->fb_compression)
mmsize -= MB(6);
/* Can't do TTM on stolen memory */
mmsize -= pI830->stolen_size;
/* Create the aperture allocation */
pI830->memory_manager =
i830_allocate_aperture(pScrn, "DRI memory manager",
mmsize, GTT_PAGE_SIZE,
ALIGN_BOTH_ENDS | NEED_NON_STOLEN);
if (pI830->memory_manager != NULL) {
/* Tell the kernel to manage it */
ret = drmMMInit(pI830->drmSubFD,
pI830->memory_manager->offset / GTT_PAGE_SIZE,
pI830->memory_manager->size / GTT_PAGE_SIZE,
DRM_BO_MEM_TT);
if (ret != 0) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Failed to initialize kernel memory manager\n");
i830_free_memory(pScrn, pI830->memory_manager);
pI830->memory_manager = NULL;
}
} else {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Failed to allocate space for kernel memory manager\n");
i830_free_memory(pScrn, pI830->memory_manager);
pI830->memory_manager = NULL;
}
}
#endif /* XF86DRI_MM */
return TRUE;
}
void
i830_allocator_fini(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
/* Free most of the allocations */
i830_reset_allocations(pScrn);
#ifdef XF86DRI_MM
/* The memory manager is more special */
if (pI830->memory_manager) {
drmMMTakedown(pI830->drmSubFD, DRM_BO_MEM_TT);
i830_free_memory(pScrn, pI830->memory_manager);
pI830->memory_manager = NULL;
}
#endif /* XF86DRI_MM */
/* Free the start/end markers */
free(pI830->memory_list->next);
free(pI830->memory_list);
pI830->memory_list = NULL;
}
/**
* Reads a GTT entry for the memory at the given offset and returns the
* physical address.
@ -441,6 +596,9 @@ i830_allocate_aperture(ScrnInfoPtr pScrn, const char *name,
mem->offset = ROUND_TO(pI830->stolen_size, alignment);
}
}
if ((flags & NEED_NON_STOLEN) && mem->offset < pI830->stolen_size) {
mem->offset = ROUND_TO(pI830->stolen_size, alignment);
}
mem->end = mem->offset + size;
if (flags & ALIGN_BOTH_ENDS)
@ -509,25 +667,105 @@ i830_allocate_agp_memory(ScrnInfoPtr pScrn, i830_memory *mem, int flags)
return TRUE;
}
#ifdef XF86DRI_MM
static i830_memory *
i830_allocate_memory_bo(ScrnInfoPtr pScrn, const char *name,
unsigned long size, unsigned long align, int flags)
{
I830Ptr pI830 = I830PTR(pScrn);
i830_memory *mem;
unsigned long mask;
int ret;
assert((flags & NEED_PHYSICAL_ADDR) == 0);
/* Only allocate page-sized increments. */
size = ALIGN(size, GTT_PAGE_SIZE);
align = ROUND_TO(align, GTT_PAGE_SIZE);
mem = xcalloc(1, sizeof(*mem));
if (mem == NULL)
return NULL;
mem->name = xstrdup(name);
if (name == NULL) {
xfree(mem);
return NULL;
}
mask = DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE | DRM_BO_FLAG_MAPPABLE |
DRM_BO_FLAG_MEM_TT;
if (flags & ALLOW_SHARING)
mask |= DRM_BO_FLAG_SHAREABLE;
ret = drmBOCreate(pI830->drmSubFD, 0, size, align / GTT_PAGE_SIZE, NULL,
drm_bo_type_dc, mask, 0, &mem->bo);
if (ret) {
xfree(mem->name);
xfree(mem);
return NULL;
}
/* Give buffer obviously wrong offset/end until it's pinned. */
mem->offset = -1;
mem->end = -1;
mem->size = size;
if (flags & NEED_LIFETIME_FIXED) {
if (!i830_bind_memory(pScrn, mem)) {
drmBOUnReference(pI830->drmSubFD, &mem->bo);
xfree(mem->name);
xfree(mem);
return NULL;
}
mem->lifetime_fixed_offset = TRUE;
}
/* Insert new allocation into the list */
mem->prev = NULL;
mem->next = pI830->bo_list;
if (pI830->bo_list != NULL)
pI830->bo_list->prev = mem;
pI830->bo_list = mem;
return mem;
}
#endif /* XF86DRI_MM */
/* Allocates video memory at the given size and alignment.
*
* The memory will be bound automatically when the driver is in control of the
* VT.
* VT. When the kernel memory manager is available and compatible with flags
* (that is, flags doesn't say that the allocation must include a physical
* address), that will be used for the allocation.
*
* flags:
* - NEED_PHYSICAL_ADDR: Allocates the memory physically contiguous, and return
* the bus address for that memory.
* - ALIGN_BOTH_ENDS: after choosing the alignment, align the end offset to
* @alignment as well.
* - NEED_NON-STOLEN: don't allow any part of the memory allocation to lie
* within stolen memory
* - NEED_LIFETIME_FIXED: don't allow the buffer object to move throughout
* the entire Screen lifetime. This means not using buffer objects, which
* get their offsets chosen at each EnterVT time.
*/
i830_memory *
i830_allocate_memory(ScrnInfoPtr pScrn, const char *name,
unsigned long size, unsigned long alignment, int flags)
{
I830Ptr pI830 = I830PTR(pScrn);
i830_memory *mem;
mem = i830_allocate_aperture(pScrn, name, size, alignment, flags);
if (mem == NULL)
return NULL;
if (pI830->memory_manager && !(flags & NEED_PHYSICAL_ADDR)) {
return i830_allocate_memory_bo(pScrn, name, size, alignment, flags);
} else {
mem = i830_allocate_aperture(pScrn, name, size, alignment, flags);
if (mem == NULL)
return NULL;
if (!i830_allocate_agp_memory(pScrn, mem, flags)) {
i830_free_memory(pScrn, mem);
return NULL;
if (!i830_allocate_agp_memory(pScrn, mem, flags)) {
i830_free_memory(pScrn, mem);
return NULL;
}
}
mem->tiling = TILE_NONE;
@ -559,6 +797,12 @@ i830_allocate_memory_tiled(ScrnInfoPtr pScrn, const char *name,
if (tile_format == TILE_NONE)
return i830_allocate_memory(pScrn, name, size, alignment, flags);
/* XXX: for now, refuse to tile with movable buffer object allocations,
* until we can move the set_fence (and failure recovery) into bind time.
*/
if (pI830->memory_manager != NULL && !(flags & NEED_LIFETIME_FIXED))
return NULL;
/* Only allocate page-sized increments. */
size = ALIGN(size, GTT_PAGE_SIZE);
@ -584,7 +828,7 @@ i830_allocate_memory_tiled(ScrnInfoPtr pScrn, const char *name,
aper_align = alignment;
fence_divide = 1;
mem = i830_allocate_aperture(pScrn, name, aper_size, aper_align, flags);
mem = i830_allocate_memory(pScrn, name, aper_size, aper_align, flags);
if (mem == NULL && !IS_I965G(pI830)) {
/* For the older hardware with stricter fencing limits, if we
* couldn't allocate with the large alignment, try relaxing the
@ -600,8 +844,8 @@ i830_allocate_memory_tiled(ScrnInfoPtr pScrn, const char *name,
break;
}
mem = i830_allocate_aperture(pScrn, name, aper_size,
aper_align / fence_divide, flags);
mem = i830_allocate_memory(pScrn, name, aper_size,
aper_align / fence_divide, flags);
}
}
@ -619,12 +863,6 @@ i830_allocate_memory_tiled(ScrnInfoPtr pScrn, const char *name,
return NULL;
}
/* Allocate any necessary AGP memory to back this allocation */
if (!i830_allocate_agp_memory(pScrn, mem, flags)) {
i830_free_memory(pScrn, mem);
return NULL;
}
/* Set up the fence registers. */
for (i = 0; i < fence_divide; i++) {
i830_set_fence(pScrn, pI830->next_fence++,
@ -657,7 +895,7 @@ i830_describe_allocations(ScrnInfoPtr pScrn, int verbosity, const char *prefix)
}
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
"%sMemory allocation layout:\n", prefix);
"%sFixed memory allocation layout:\n", prefix);
for (mem = pI830->memory_list->next; mem->next != NULL; mem = mem->next) {
char phys_suffix[32] = "";
@ -687,6 +925,38 @@ i830_describe_allocations(ScrnInfoPtr pScrn, int verbosity, const char *prefix)
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
"%s0x%08lx: end of aperture\n",
prefix, pI830->FbMapSize);
#ifdef XF86DRI_MM
if (pI830->memory_manager) {
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
"%sBO memory allocation layout:\n", prefix);
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
"%s0x%08lx: start of memory manager\n",
prefix, pI830->memory_manager->offset);
for (mem = pI830->bo_list; mem != NULL; mem = mem->next) {
char *tile_suffix = "";
if (mem->tiling == TILE_XMAJOR)
tile_suffix = " X tiled";
else if (mem->tiling == TILE_YMAJOR)
tile_suffix = " Y tiled";
if (mem->bound) {
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
"%s0x%08lx-0x%08lx: %s (%ld kB)%s\n", prefix,
mem->offset, mem->end - 1, mem->name,
mem->size / 1024, tile_suffix);
} else {
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
"%sunpinned : %s (%ld kB)%s\n", prefix,
mem->name, mem->size / 1024, tile_suffix);
}
}
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
"%s0x%08lx: end of memory manager\n",
prefix, pI830->memory_manager->end);
}
#endif /* XF86DRI_MM */
}
static Bool
@ -697,9 +967,13 @@ i830_allocate_ringbuffer(ScrnInfoPtr pScrn)
if (pI830->noAccel || pI830->LpRing->mem != NULL)
return TRUE;
/* We don't have any mechanism in the DRM yet to alert it that we've moved
* the ringbuffer since init time, so allocate it fixed for its lifetime.
*/
pI830->LpRing->mem = i830_allocate_memory(pScrn, "ring buffer",
PRIMARY_RINGBUFFER_SIZE,
GTT_PAGE_SIZE, 0);
GTT_PAGE_SIZE,
NEED_LIFETIME_FIXED);
if (pI830->LpRing->mem == NULL) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Failed to allocate Ring Buffer space\n");
@ -719,14 +993,14 @@ static Bool
i830_allocate_overlay(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
int flags = NEED_PHYSICAL_ADDR;
int flags = 0;
/* Only allocate if overlay is going to be enabled. */
if (!pI830->XvEnabled)
return TRUE;
if (OVERLAY_NOPHYSICAL(pI830))
flags = 0;
if (!OVERLAY_NOPHYSICAL(pI830))
flags |= NEED_PHYSICAL_ADDR;
if (!IS_I965G(pI830)) {
pI830->overlay_regs = i830_allocate_memory(pScrn, "overlay registers",
@ -796,7 +1070,7 @@ IsTileable(ScrnInfoPtr pScrn, int pitch)
*/
static i830_memory *
i830_allocate_framebuffer(ScrnInfoPtr pScrn, I830Ptr pI830, BoxPtr FbMemBox,
Bool secondary, int flags)
Bool secondary)
{
unsigned int pitch = pScrn->displayWidth * pI830->cpp;
unsigned long minspace, avail;
@ -804,9 +1078,16 @@ i830_allocate_framebuffer(ScrnInfoPtr pScrn, I830Ptr pI830, BoxPtr FbMemBox,
int align;
long size, fb_height;
char *name;
int flags;
i830_memory *front_buffer = NULL;
Bool tiling;
/* The front buffer is currently marked as NEED_LIFETIME_FIXED because
* DRIDoMappings is the only caller of the rm/add map functions,
* and it's only called at startup. This should be easily fixable.
*/
flags = NEED_LIFETIME_FIXED | ALLOW_SHARING;
/* Clear everything first. */
memset(FbMemBox, 0, sizeof(*FbMemBox));
@ -890,8 +1171,8 @@ i830_allocate_framebuffer(ScrnInfoPtr pScrn, I830Ptr pI830, BoxPtr FbMemBox,
else
align = KB(512);
front_buffer = i830_allocate_memory_tiled(pScrn, name, size,
pitch, align,
0, TILE_XMAJOR);
pitch, align, flags,
TILE_XMAJOR);
}
/* If not, attempt it linear */
@ -922,7 +1203,7 @@ i830_allocate_cursor_buffers(ScrnInfoPtr pScrn)
/* Try to allocate one big blob for our cursor memory. This works
* around a limitation in the FreeBSD AGP driver that allows only one
* physical allocation larger than a page, and could allos us
* physical allocation larger than a page, and could allow us
* to pack the cursors smaller.
*/
size = xf86_config->num_crtc * (HWCURSOR_SIZE + HWCURSOR_SIZE_ARGB);
@ -930,35 +1211,8 @@ i830_allocate_cursor_buffers(ScrnInfoPtr pScrn)
pI830->cursor_mem = i830_allocate_memory(pScrn, "HW cursors",
size, GTT_PAGE_SIZE,
flags);
if (pI830->cursor_mem != NULL) {
unsigned long cursor_offset_base = pI830->cursor_mem->offset;
unsigned long cursor_addr_base, offset = 0;
if (pI830->CursorNeedsPhysical) {
/* On any hardware that requires physical addresses for cursors,
* the PTEs don't support memory above 4GB, so we can safely
* ignore the top 32 bits of cursor_mem->bus_addr.
*/
cursor_addr_base = (unsigned long)pI830->cursor_mem->bus_addr;
} else
cursor_addr_base = pI830->cursor_mem->offset;
/* Set up the offsets for our cursors in each CRTC. */
for (i = 0; i < xf86_config->num_crtc; i++) {
xf86CrtcPtr crtc = xf86_config->crtc[i];
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
intel_crtc->cursor_argb_addr = cursor_addr_base + offset;
intel_crtc->cursor_argb_offset = cursor_offset_base + offset;
offset += HWCURSOR_SIZE_ARGB;
intel_crtc->cursor_addr = cursor_addr_base + offset;
intel_crtc->cursor_offset = cursor_offset_base + offset;
offset += HWCURSOR_SIZE;
}
if (pI830->cursor_mem != NULL)
return TRUE;
}
/*
* Allocate four separate buffers when the kernel doesn't support
@ -984,21 +1238,6 @@ i830_allocate_cursor_buffers(ScrnInfoPtr pScrn)
if (!pI830->cursor_mem_argb[i])
return FALSE;
/*
* Set up the pointers into the allocations
*/
if (pI830->CursorNeedsPhysical)
{
intel_crtc->cursor_addr = pI830->cursor_mem_classic[i]->bus_addr;
intel_crtc->cursor_argb_addr = pI830->cursor_mem_argb[i]->bus_addr;
}
else
{
intel_crtc->cursor_addr = pI830->cursor_mem_classic[i]->offset;
intel_crtc->cursor_argb_addr = pI830->cursor_mem_argb[i]->offset;
}
intel_crtc->cursor_offset = pI830->cursor_mem_classic[i]->offset;
intel_crtc->cursor_argb_offset = pI830->cursor_mem_argb[i]->offset;
}
return TRUE;
}
@ -1126,12 +1365,12 @@ i830_allocate_2d_memory(ScrnInfoPtr pScrn)
pI830->front_buffer_2 =
i830_allocate_framebuffer(pI830Ent->pScrn_2, pI8302,
&pI830->FbMemBox2, TRUE, 0);
&pI830->FbMemBox2, TRUE);
if (pI830->front_buffer_2 == NULL)
return FALSE;
}
pI830->front_buffer =
i830_allocate_framebuffer(pScrn, pI830, &pI830->FbMemBox, FALSE, 0);
i830_allocate_framebuffer(pScrn, pI830, &pI830->FbMemBox, FALSE);
if (pI830->front_buffer == NULL)
return FALSE;
@ -1148,11 +1387,16 @@ i830_allocate_2d_memory(ScrnInfoPtr pScrn)
size = 3 * pitch * pScrn->virtualY;
size = ROUND_TO_PAGE(size);
pI830->exa_offscreen = i830_allocate_memory(pScrn, "exa offscreen",
size, 1, 0);
/* EXA has no way to tell it that the offscreen memory manager has
* moved its base and all the contents with it, so we have to have
* it locked in place for the whole driver instance.
*/
pI830->exa_offscreen =
i830_allocate_memory(pScrn, "exa offscreen",
size, 1, NEED_LIFETIME_FIXED);
if (pI830->exa_offscreen == NULL) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Failed to allocate EXA offscreen memory.");
"Failed to allocate EXA offscreen memory.\n");
return FALSE;
}
}
@ -1160,14 +1404,18 @@ i830_allocate_2d_memory(ScrnInfoPtr pScrn)
#endif /* I830_USE_EXA */
if (!pI830->noAccel && !pI830->useEXA) {
/* The lifetime fixed offset of xaa scratch is probably not required,
* but we do some setup using it at XAAInit() time. And XAA may not
* end up being supported with TTM anyway.
*/
pI830->xaa_scratch =
i830_allocate_memory(pScrn, "xaa scratch", MAX_SCRATCH_BUFFER_SIZE,
GTT_PAGE_SIZE, 0);
GTT_PAGE_SIZE, NEED_LIFETIME_FIXED);
if (pI830->xaa_scratch == NULL) {
pI830->xaa_scratch =
i830_allocate_memory(pScrn, "xaa scratch",
MIN_SCRATCH_BUFFER_SIZE, GTT_PAGE_SIZE,
0);
NEED_LIFETIME_FIXED);
if (pI830->xaa_scratch == NULL) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Failed to allocate scratch buffer space\n");
@ -1182,12 +1430,12 @@ i830_allocate_2d_memory(ScrnInfoPtr pScrn)
pI830->xaa_scratch_2 =
i830_allocate_memory(pScrn, "xaa scratch 2",
MAX_SCRATCH_BUFFER_SIZE, GTT_PAGE_SIZE,
0);
NEED_LIFETIME_FIXED);
if (pI830->xaa_scratch_2 == NULL) {
pI830->xaa_scratch_2 =
i830_allocate_memory(pScrn, "xaa scratch 2",
MIN_SCRATCH_BUFFER_SIZE,
GTT_PAGE_SIZE, 0);
GTT_PAGE_SIZE, NEED_LIFETIME_FIXED);
if (pI830->xaa_scratch_2 == NULL) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Failed to allocate secondary scratch "
@ -1233,15 +1481,22 @@ i830_allocate_backbuffer(ScrnInfoPtr pScrn, i830_memory **buffer,
{
size = ROUND_TO_PAGE(pitch * ALIGN(height, 16));
*buffer = i830_allocate_memory_tiled(pScrn, name, size, pitch,
GTT_PAGE_SIZE, ALIGN_BOTH_ENDS,
GTT_PAGE_SIZE,
ALIGN_BOTH_ENDS |
NEED_LIFETIME_FIXED |
ALLOW_SHARING,
TILE_XMAJOR);
}
/* Otherwise, just allocate it linear */
/* Otherwise, just allocate it linear. The offset must stay constant
* currently because we don't ever update the DRI maps after screen init.
*/
if (*buffer == NULL) {
size = ROUND_TO_PAGE(pitch * height);
*buffer = i830_allocate_memory(pScrn, name, size, GTT_PAGE_SIZE,
ALIGN_BOTH_ENDS);
ALIGN_BOTH_ENDS |
NEED_LIFETIME_FIXED |
ALLOW_SHARING);
}
if (*buffer == NULL) {
@ -1281,16 +1536,21 @@ i830_allocate_depthbuffer(ScrnInfoPtr pScrn)
pI830->depth_buffer =
i830_allocate_memory_tiled(pScrn, "depth buffer", size, pitch,
GTT_PAGE_SIZE, ALIGN_BOTH_ENDS,
GTT_PAGE_SIZE,
ALIGN_BOTH_ENDS |
NEED_LIFETIME_FIXED |
ALLOW_SHARING,
tile_format);
}
/* Otherwise, allocate it linear. */
/* Otherwise, allocate it linear. The offset must stay constant
* currently because we don't ever update the DRI maps after screen init.
*/
if (pI830->depth_buffer == NULL) {
size = ROUND_TO_PAGE(pitch * height);
pI830->depth_buffer =
i830_allocate_memory(pScrn, "depth buffer", size, GTT_PAGE_SIZE,
0);
ALLOW_SHARING | NEED_LIFETIME_FIXED);
}
if (pI830->depth_buffer == NULL) {
@ -1309,17 +1569,7 @@ i830_allocate_texture_memory(ScrnInfoPtr pScrn)
unsigned long size;
int i;
if (pI830->mmModeFlags & I830_KERNEL_MM) {
pI830->memory_manager =
i830_allocate_aperture(pScrn, "DRI memory manager",
pI830->mmSize * KB(1), GTT_PAGE_SIZE,
ALIGN_BOTH_ENDS);
/* XXX: try memory manager size backoff here? */
if (pI830->memory_manager == NULL)
return FALSE;
}
if (pI830->mmModeFlags & I830_KERNEL_TEX) {
if (pI830->allocate_classic_textures) {
/* XXX: auto-sizing */
size = MB(32);
i = myLog2(size / I830_NR_TEX_REGIONS);
@ -1336,8 +1586,13 @@ i830_allocate_texture_memory(ScrnInfoPtr pScrn)
size / 1024);
return FALSE;
}
pI830->textures = i830_allocate_memory(pScrn, "textures", size,
GTT_PAGE_SIZE, 0);
/* The offset must stay constant currently because we don't ever update
* the DRI maps after screen init.
*/
pI830->textures = i830_allocate_memory(pScrn, "classic textures", size,
GTT_PAGE_SIZE,
ALLOW_SHARING |
NEED_LIFETIME_FIXED);
if (pI830->textures == NULL) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Failed to allocate texture space.\n");
@ -1351,11 +1606,14 @@ i830_allocate_texture_memory(ScrnInfoPtr pScrn)
static Bool
i830_allocate_hwstatus(ScrnInfoPtr pScrn)
{
#define HWSTATUS_PAGE_SIZE (4*1024)
I830Ptr pI830 = I830PTR(pScrn);
/* The current DRM will leak the HWS mapping if we update the address
* after init (at best), so allocate it fixed for its lifetime
* (i.e. not through buffer objects).
*/
pI830->hw_status = i830_allocate_memory(pScrn, "G33 hw status",
HWSTATUS_PAGE_SIZE, GTT_PAGE_SIZE, 0);
HWSTATUS_PAGE_SIZE, GTT_PAGE_SIZE, NEED_LIFETIME_FIXED);
if (pI830->hw_status == NULL) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Failed to allocate hw status page for G33.\n");
@ -1628,7 +1886,14 @@ i830_bind_all_memory(ScrnInfoPtr pScrn)
FatalError("Couldn't bind memory for %s\n", mem->name);
}
}
#ifdef XF86DRI_MM
for (mem = pI830->bo_list; mem != NULL; mem = mem->next) {
if (!mem->lifetime_fixed_offset && !i830_bind_memory(pScrn, mem))
FatalError("Couldn't bind memory for BO %s\n", mem->name);
}
#endif
}
i830_update_cursor_offsets(pScrn);
return TRUE;
}
@ -1650,6 +1915,15 @@ i830_unbind_all_memory(ScrnInfoPtr pScrn)
{
i830_unbind_memory(pScrn, mem);
}
#ifdef XF86DRI_MM
for (mem = pI830->bo_list; mem != NULL; mem = mem->next) {
/* Don't unpin objects which require that their offsets never
* change.
*/
if (!mem->lifetime_fixed_offset)
i830_unbind_memory(pScrn, mem);
}
#endif
pI830->gtt_acquired = FALSE;

4
src/i830_quirks.c
View File

@ -64,6 +64,8 @@ static i830_quirk i830_quirk_list[] = {
/* Dell Latitude X1 */
{ PCI_CHIP_I945_GM, 0x1028, 0x01a3, quirk_ignore_tv },
/* Dell XPS 1330 */
{ PCI_CHIP_I965_GM, 0x1028, 0x0209, quirk_ignore_tv },
/* Lenovo X60s has no TV output */
{ PCI_CHIP_I945_GM, 0x17aa, 0x201a, quirk_ignore_tv },
@ -74,6 +76,8 @@ static i830_quirk i830_quirk_list[] = {
/* Panasonic Toughbook CF-Y4 has no TV output */
{ PCI_CHIP_I915_GM, 0x10f7, 0x8338, quirk_ignore_tv },
/* Panasonic Toughbook CF-Y7 has no TV output */
{ PCI_CHIP_I965_GM, 0x10f7, 0x8338, quirk_ignore_tv },
{ 0, 0, 0, NULL },
};

20
src/ivch/ivch.c
View File

@ -48,6 +48,7 @@ struct ivch_priv {
I2CDevRec d;
xf86OutputPtr output;
Bool quiet;
CARD16 width;
CARD16 height;
@ -105,9 +106,11 @@ ivch_read(struct ivch_priv *priv, int addr, CARD16 *data)
return TRUE;
fail:
xf86DrvMsg(priv->d.pI2CBus->scrnIndex, X_ERROR,
"ivch: Unable to read register 0x%02x from %s:%02x.\n",
addr, priv->d.pI2CBus->BusName, priv->d.SlaveAddr);
if (!priv->quiet) {
xf86DrvMsg(priv->d.pI2CBus->scrnIndex, X_ERROR,
"ivch: Unable to read register 0x%02x from %s:%02x.\n",
addr, priv->d.pI2CBus->BusName, priv->d.SlaveAddr);
}
b->I2CStop(&priv->d);
return FALSE;
@ -140,9 +143,12 @@ ivch_write(struct ivch_priv *priv, int addr, CARD16 data)
fail:
b->I2CStop(&priv->d);
xf86DrvMsg(priv->d.pI2CBus->scrnIndex, X_ERROR,
"Unable to write register 0x%02x to %s:%d.\n",
addr, priv->d.pI2CBus->BusName, priv->d.SlaveAddr);
if (!priv->quiet) {
xf86DrvMsg(priv->d.pI2CBus->scrnIndex, X_ERROR,
"Unable to write register 0x%02x to %s:%d.\n",
addr, priv->d.pI2CBus->BusName, priv->d.SlaveAddr);
}
return FALSE;
}
@ -167,9 +173,11 @@ ivch_init(I2CBusPtr b, I2CSlaveAddr addr)
priv->d.AcknTimeout = b->AcknTimeout;
priv->d.ByteTimeout = b->ByteTimeout;
priv->d.DriverPrivate.ptr = priv;
priv->quiet = TRUE;
if (!ivch_read(priv, VR00, &temp))
goto out;
priv->quiet = FALSE;
/* Since the identification bits are probably zeroes, which doesn't seem
* very unique, check that the value in the base address field matches

20
src/sil164/sil164.c
View File

@ -49,9 +49,11 @@ static Bool
sil164ReadByte(SIL164Ptr sil, int addr, CARD8 *ch)
{
if (!xf86I2CReadByte(&(sil->d), addr, ch)) {
xf86DrvMsg(sil->d.pI2CBus->scrnIndex, X_ERROR,
"Unable to read from %s Slave %d.\n",
sil->d.pI2CBus->BusName, sil->d.SlaveAddr);
if (!sil->quiet) {
xf86DrvMsg(sil->d.pI2CBus->scrnIndex, X_ERROR,
"Unable to read from %s Slave %d.\n",
sil->d.pI2CBus->BusName, sil->d.SlaveAddr);
}
return FALSE;
}
return TRUE;
@ -61,9 +63,11 @@ static Bool
sil164WriteByte(SIL164Ptr sil, int addr, CARD8 ch)
{
if (!xf86I2CWriteByte(&(sil->d), addr, ch)) {
xf86DrvMsg(sil->d.pI2CBus->scrnIndex, X_ERROR,
"Unable to write to %s Slave %d.\n",
sil->d.pI2CBus->BusName, sil->d.SlaveAddr);
if (!sil->quiet) {
xf86DrvMsg(sil->d.pI2CBus->scrnIndex, X_ERROR,
"Unable to write to %s Slave %d.\n",
sil->d.pI2CBus->BusName, sil->d.SlaveAddr);
}
return FALSE;
}
return TRUE;
@ -77,8 +81,6 @@ sil164_init(I2CBusPtr b, I2CSlaveAddr addr)
SIL164Ptr sil;
unsigned char ch;
xf86DrvMsg(b->scrnIndex, X_ERROR, "detecting sil164\n");
sil = xcalloc(1, sizeof(SIL164Rec));
if (sil == NULL)
return NULL;
@ -91,6 +93,7 @@ sil164_init(I2CBusPtr b, I2CSlaveAddr addr)
sil->d.AcknTimeout = b->AcknTimeout;
sil->d.ByteTimeout = b->ByteTimeout;
sil->d.DriverPrivate.ptr = sil;
sil->quiet = TRUE;
if (!sil164ReadByte(sil, SIL164_VID_LO, &ch))
goto out;
@ -111,6 +114,7 @@ sil164_init(I2CBusPtr b, I2CSlaveAddr addr)
ch, sil->d.pI2CBus->BusName, sil->d.SlaveAddr);
goto out;
}
sil->quiet = FALSE;
if (!xf86I2CDevInit(&(sil->d))) {
goto out;

1
src/sil164/sil164_reg.h
View File

@ -65,6 +65,7 @@ typedef struct _Sil164SaveRec {
typedef struct {
I2CDevRec d;
Bool quiet;
SIL164SaveRec SavedReg;
SIL164SaveRec ModeReg;
} SIL164Rec, *SIL164Ptr;

28
src/tfp410/tfp410.c
View File

@ -48,9 +48,11 @@ static Bool
tfp410ReadByte(TFP410Ptr tfp, int addr, CARD8 *ch)
{
if (!xf86I2CReadByte(&(tfp->d), addr, ch)) {
xf86DrvMsg(tfp->d.pI2CBus->scrnIndex, X_ERROR,
"Unable to read from %s Slave %d.\n",
tfp->d.pI2CBus->BusName, tfp->d.SlaveAddr);
if (!tfp->quiet) {
xf86DrvMsg(tfp->d.pI2CBus->scrnIndex, X_ERROR,
"Unable to read from %s Slave %d.\n",
tfp->d.pI2CBus->BusName, tfp->d.SlaveAddr);
}
return FALSE;
}
return TRUE;
@ -60,9 +62,11 @@ static Bool
tfp410WriteByte(TFP410Ptr tfp, int addr, CARD8 ch)
{
if (!xf86I2CWriteByte(&(tfp->d), addr, ch)) {
xf86DrvMsg(tfp->d.pI2CBus->scrnIndex, X_ERROR,
"Unable to write to %s Slave %d.\n",
tfp->d.pI2CBus->BusName, tfp->d.SlaveAddr);
if (!tfp->quiet) {
xf86DrvMsg(tfp->d.pI2CBus->scrnIndex, X_ERROR,
"Unable to write to %s Slave %d.\n",
tfp->d.pI2CBus->BusName, tfp->d.SlaveAddr);
}
return FALSE;
}
return TRUE;
@ -89,8 +93,6 @@ tfp410_init(I2CBusPtr b, I2CSlaveAddr addr)
TFP410Ptr tfp;
int id;
xf86DrvMsg(b->scrnIndex, X_INFO, "detecting tfp410\n");
tfp = xcalloc(1, sizeof(TFP410Rec));
if (tfp == NULL)
return NULL;
@ -103,11 +105,14 @@ tfp410_init(I2CBusPtr b, I2CSlaveAddr addr)
tfp->d.AcknTimeout = b->AcknTimeout;
tfp->d.ByteTimeout = b->ByteTimeout;
tfp->d.DriverPrivate.ptr = tfp;
tfp->quiet = TRUE;
if ((id = tfp410GetID(tfp, TFP410_VID_LO)) != TFP410_VID) {
xf86DrvMsg(tfp->d.pI2CBus->scrnIndex, X_ERROR,
"tfp410 not detected got VID %X: from %s Slave %d.\n",
id, tfp->d.pI2CBus->BusName, tfp->d.SlaveAddr);
if (id != 0xffffffff) {
xf86DrvMsg(tfp->d.pI2CBus->scrnIndex, X_ERROR,
"tfp410 not detected got VID %X: from %s Slave %d.\n",
id, tfp->d.pI2CBus->BusName, tfp->d.SlaveAddr);
}
goto out;
}
@ -117,6 +122,7 @@ tfp410_init(I2CBusPtr b, I2CSlaveAddr addr)
id, tfp->d.pI2CBus->BusName, tfp->d.SlaveAddr);
goto out;
}
tfp->quiet = FALSE;
if (!xf86I2CDevInit(&(tfp->d))) {
goto out;

2
src/tfp410/tfp410_reg.h
View File

@ -95,6 +95,8 @@ typedef struct _TFP410SaveRec {
typedef struct {
I2CDevRec d;
Bool quiet;
TFP410SaveRec SavedReg;
TFP410SaveRec ModeReg;
} TFP410Rec, *TFP410Ptr;