Remove dead assignments noticed by clang.
This commit is contained in:
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a4180eabfa
commit
ec5deb2bcb
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@ -1322,7 +1322,7 @@ drmmode_xf86crtc_resize (ScrnInfoPtr scrn, int width, int height)
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drmmode_ptr drmmode = drmmode_crtc->drmmode;
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intel_screen_private *intel = intel_get_screen_private(scrn);
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i830_memory *old_front = NULL;
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Bool tiled, ret;
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Bool ret;
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ScreenPtr screen = screenInfo.screens[scrn->scrnIndex];
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uint32_t old_fb_id;
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int i, pitch, old_width, old_height, old_pitch;
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@ -1331,7 +1331,6 @@ drmmode_xf86crtc_resize (ScrnInfoPtr scrn, int width, int height)
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return TRUE;
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pitch = i830_pad_drawable_width(width, intel->cpp);
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tiled = i830_tiled_width(intel, &pitch, intel->cpp);
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xf86DrvMsg(scrn->scrnIndex, X_INFO,
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"Allocate new frame buffer %dx%d stride %d\n",
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width, height, pitch);
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@ -1498,7 +1497,6 @@ drm_wakeup_handler(pointer data, int err, pointer p)
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Bool drmmode_pre_init(ScrnInfoPtr scrn, int fd, int cpp)
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{
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intel_screen_private *intel = intel_get_screen_private(scrn);
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xf86CrtcConfigPtr xf86_config;
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struct drm_i915_getparam gp;
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drmmode_ptr drmmode;
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unsigned int i;
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@ -1509,7 +1507,6 @@ Bool drmmode_pre_init(ScrnInfoPtr scrn, int fd, int cpp)
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drmmode->fb_id = 0;
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xf86CrtcConfigInit(scrn, &drmmode_xf86crtc_config_funcs);
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xf86_config = XF86_CRTC_CONFIG_PTR(scrn);
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drmmode->cpp = cpp;
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drmmode->mode_res = drmModeGetResources(drmmode->fd);
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@ -445,7 +445,6 @@ static Bool intel_pci_probe (DriverPtr driver,
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intptr_t match_data)
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{
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ScrnInfoPtr scrn = NULL;
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EntityInfoPtr entity;
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scrn = xf86ConfigPciEntity (scrn, 0, entity_num, I810PciChipsets,
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NULL,
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@ -457,8 +456,6 @@ static Bool intel_pci_probe (DriverPtr driver,
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scrn->name = I810_NAME;
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scrn->Probe = NULL;
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entity = xf86GetEntityInfo (entity_num);
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switch (DEVICE_ID(device)) {
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#ifndef I830_ONLY
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case PCI_CHIP_I810:
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@ -825,7 +822,6 @@ I810PreInit(ScrnInfoPtr pScrn, int flags)
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}
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if (!pI810->MaxClock)
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pI810->MaxClock = pI810->pEnt->device->dacSpeeds[0];
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from = X_CONFIG;
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} else {
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switch (pScrn->bitsPerPixel) {
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case 8:
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@ -961,17 +957,10 @@ I810PreInit(ScrnInfoPtr pScrn, int flags)
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static Bool
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I810MapMMIO(ScrnInfoPtr pScrn)
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{
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int mmioFlags;
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I810Ptr pI810 = I810PTR(pScrn);
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struct pci_device *const device = pI810->PciInfo;
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int err;
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#if !defined(__alpha__)
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mmioFlags = VIDMEM_MMIO | VIDMEM_READSIDEEFFECT;
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#else
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mmioFlags = VIDMEM_MMIO | VIDMEM_READSIDEEFFECT | VIDMEM_SPARSE;
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#endif
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err = pci_device_map_range (device,
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pI810->MMIOAddr,
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I810_REG_SIZE,
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@ -1456,7 +1445,7 @@ I810CalcVCLK(ScrnInfoPtr pScrn, double freq)
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I810Ptr pI810 = I810PTR(pScrn);
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I810RegPtr i810Reg = &pI810->ModeReg;
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int m, n, p;
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double f_out, f_best;
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double f_out;
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double f_err;
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double f_vco;
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int m_best = 0, n_best = 0, p_best = 0;
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@ -1484,7 +1473,6 @@ I810CalcVCLK(ScrnInfoPtr pScrn, double freq)
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if (fabs(f_err) < err_max) {
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m_best = m;
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n_best = n;
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f_best = f_out;
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err_best = f_err;
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}
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} while ((fabs(f_err) >= err_target) &&
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@ -1685,12 +1673,10 @@ static void
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I810LoadPalette15(ScrnInfoPtr pScrn, int numColors, int *indices,
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LOCO * colors, VisualPtr pVisual)
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{
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I810Ptr pI810;
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vgaHWPtr hwp;
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int i, j, index;
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unsigned char r, g, b;
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pI810 = I810PTR(pScrn);
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hwp = VGAHWPTR(pScrn);
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for (i = 0; i < numColors; i++) {
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@ -1711,12 +1697,10 @@ static void
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I810LoadPalette16(ScrnInfoPtr pScrn, int numColors, int *indices,
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LOCO * colors, VisualPtr pVisual)
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{
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I810Ptr pI810;
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vgaHWPtr hwp;
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int i, index;
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unsigned char r, g, b;
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pI810 = I810PTR(pScrn);
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hwp = VGAHWPTR(pScrn);
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/* Load all four entries in each of the 64 color ranges. -jens */
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@ -1777,12 +1761,10 @@ static void
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I810LoadPalette24(ScrnInfoPtr pScrn, int numColors, int *indices,
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LOCO * colors, VisualPtr pVisual)
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{
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I810Ptr pI810;
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vgaHWPtr hwp;
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int i, index;
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unsigned char r, g, b;
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pI810 = I810PTR(pScrn);
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hwp = VGAHWPTR(pScrn);
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for (i = 0; i < numColors; i++) {
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@ -1908,7 +1890,6 @@ I810ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
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vgaHWPtr hwp;
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I810Ptr pI810;
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VisualPtr visual;
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MessageType driFrom = X_DEFAULT;
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pScrn = xf86Screens[pScreen->myNum];
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pI810 = I810PTR(pScrn);
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@ -1957,8 +1938,6 @@ I810ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
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if (pI810->directRenderingEnabled==TRUE)
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pI810->directRenderingEnabled = I810DRIScreenInit(pScreen);
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else
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driFrom = X_CONFIG;
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#else
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pI810->directRenderingEnabled = FALSE;
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@ -2014,7 +1993,6 @@ I810ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
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#ifdef XF86DRI
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if (pI810->LpRing->mem.Start == 0 && pI810->directRenderingEnabled) {
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pI810->directRenderingEnabled = FALSE;
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driFrom = X_PROBED;
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I810DRICloseScreen(pScreen);
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}
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@ -1206,7 +1206,7 @@ I810AllocateSurface(
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XF86SurfacePtr surface
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){
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FBLinearPtr linear;
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int pitch, fbpitch, size, bpp;
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int pitch, size, bpp;
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OffscreenPrivPtr pPriv;
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I810Ptr pI810 = I810PTR(pScrn);
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@ -1216,7 +1216,6 @@ I810AllocateSurface(
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w = (w + 1) & ~1;
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pitch = ((w << 1) + 15) & ~15;
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bpp = pScrn->bitsPerPixel >> 3;
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fbpitch = bpp * pScrn->displayWidth;
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size = ((pitch * h) + bpp - 1) / bpp;
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if(!(linear = I810AllocateMemory(pScrn, NULL, size)))
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@ -232,25 +232,20 @@ const OptionInfoRec *I830AvailableOptions(int chipid, int busid)
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static Bool I830GetRec(ScrnInfoPtr scrn)
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{
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intel_screen_private *intel;
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if (scrn->driverPrivate)
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return TRUE;
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intel = scrn->driverPrivate = xnfcalloc(sizeof(intel_screen_private), 1);
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scrn->driverPrivate = xnfcalloc(sizeof(intel_screen_private), 1);
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return TRUE;
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}
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static void I830FreeRec(ScrnInfoPtr scrn)
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{
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intel_screen_private *intel;
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if (!scrn)
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return;
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if (!scrn->driverPrivate)
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return;
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intel = intel_get_screen_private(scrn);
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xfree(scrn->driverPrivate);
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scrn->driverPrivate = NULL;
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}
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@ -480,7 +480,6 @@ i830_memory *i830_allocate_framebuffer(ScrnInfoPtr scrn)
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{
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intel_screen_private *intel = intel_get_screen_private(scrn);
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unsigned int pitch = scrn->displayWidth * intel->cpp;
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unsigned long minspace;
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long size, fb_height;
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int flags;
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i830_memory *front_buffer = NULL;
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@ -493,12 +492,6 @@ i830_memory *i830_allocate_framebuffer(ScrnInfoPtr scrn)
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*/
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fb_height = scrn->virtualY;
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/* Calculate how much framebuffer memory to allocate. For the
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* initial allocation, calculate a reasonable minimum. This is
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* enough for the virtual screen size.
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*/
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minspace = pitch * scrn->virtualY;
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size = ROUND_TO_PAGE(pitch * fb_height);
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if (intel->tiling && IsTileable(scrn, pitch))
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@ -326,7 +326,6 @@ static void i830_texture_setup(PicturePtr picture, PixmapPtr pixmap, int unit)
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(FILTER_LINEAR << TM0S3_MIN_FILTER_SHIFT));
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break;
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default:
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filter = 0;
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FatalError("Bad filter 0x%x\n", picture->filter);
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}
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filter |= (MIPFILTER_NONE << TM0S3_MIP_FILTER_SHIFT);
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@ -156,7 +156,7 @@ i830_uxa_pixmap_compute_size(PixmapPtr pixmap,
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*/
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size = *stride * ALIGN(h, 2);
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} else {
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int aligned_h = h;
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int aligned_h;
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if (*tiling == I915_TILING_X)
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aligned_h = ALIGN(h, 8);
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else
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@ -189,7 +189,6 @@ i830_uxa_prepare_solid(PixmapPtr pixmap, int alu, Pixel planemask, Pixel fg)
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{
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ScrnInfoPtr scrn = xf86Screens[pixmap->drawable.pScreen->myNum];
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intel_screen_private *intel = intel_get_screen_private(scrn);
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unsigned long pitch;
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drm_intel_bo *bo_table[] = {
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NULL, /* batch_bo */
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i830_get_pixmap_bo(pixmap),
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@ -213,8 +212,6 @@ i830_uxa_prepare_solid(PixmapPtr pixmap, int alu, Pixel planemask, Pixel fg)
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if (!intel_check_pitch_2d(pixmap))
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return FALSE;
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pitch = i830_pixmap_pitch(pixmap);
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if (!i830_pixmap_pitch_is_aligned(pixmap)) {
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intel_debug_fallback(scrn, "pixmap pitch not aligned");
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return FALSE;
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@ -122,7 +122,7 @@ uxa_do_put_image(DrawablePtr pDrawable, GCPtr pGC, int depth, int x, int y,
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int w, int h, int format, char *bits, int src_stride)
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{
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uxa_screen_t *uxa_screen = uxa_get_screen(pDrawable->pScreen);
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PixmapPtr pPix = uxa_get_drawable_pixmap(pDrawable);
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PixmapPtr pPix;
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RegionPtr pClip;
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BoxPtr pbox;
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int nbox;
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@ -743,7 +743,6 @@ uxa_glyphs(CARD8 op,
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INT16 xSrc,
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INT16 ySrc, int nlist, GlyphListPtr list, GlyphPtr * glyphs)
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{
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PicturePtr pPicture;
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PixmapPtr pMaskPixmap = 0;
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PicturePtr pMask;
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ScreenPtr pScreen = pDst->pDrawable->pScreen;
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@ -837,7 +836,6 @@ uxa_glyphs(CARD8 op,
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n = list->len;
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while (n--) {
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glyph = *glyphs++;
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pPicture = GlyphPicture(glyph)[pScreen->myNum];
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if (glyph->info.width > 0 && glyph->info.height > 0 &&
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uxa_buffer_glyph(pScreen, &buffer, glyph, x,
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