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Merge branch 'master' into modesetting-gem 

Conflicts:

	src/i830_driver.c
This commit is contained in:
Jesse Barnes 2008-08-19 15:53:18 -07:00
parent 67ab546252 7a1cc48276
commit f26bcb9cb8
12 changed files with 315 additions and 76 deletions
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8
src/bios_reader/Makefile.am
View File

@ -1,6 +1,6 @@
AM_CFLAGS = @WARN_CFLAGS@ @XORG_CFLAGS@ @XMODES_CFLAGS@ @PCIACCESS_CFLAGS@
noinst_PROGRAMS = bios_reader $(BIOS_DUMPER)
noinst_PROGRAMS = bios_reader $(BIOS_DUMPER) $(SWF_DUMPER)
if LIBPCIACCESS
BIOS_DUMPER = bios_dumper
@ -9,4 +9,10 @@ bios_dumper_SOURCES = bios_dumper.c
bios_dumper_LDADD = $(PCIACCESS_LIBS)
SWF_DUMPER = swf_dumper
swf_dumper_SOURCES = swf_dumper.c
swf_dumper_LDADD = $(PCIACCESS_LIBS)
endif

108
src/bios_reader/swf_dumper.c Normal file
View File

@ -0,0 +1,108 @@
/*
* Copyright © 2008 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
* Authors:
* Eric Anholt <eric@anholt.net>
* Jesse Barnes <jesse.barnes@intel.com>
*
*/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdarg.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <unistd.h>
#include <errno.h>
#include <pciaccess.h>
#include <err.h>
#include "../i810_reg.h"
#include "../i830_bios.h"
#ifndef DEFFILEMODE
#define DEFFILEMODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP|S_IROTH|S_IWOTH) /* 0666*/
#endif
static uint32_t read32(void *base, int reg)
{
uint32_t *addr = (uint32_t *)((unsigned char *)(base) + reg);
return *addr;
}
static void write32(void *base, int reg, uint32_t val)
{
uint32_t *addr = (uint32_t *)((unsigned char *)(base) + reg);
*addr = val;
}
static void usage(void)
{
fprintf(stderr, "usage: swf_dumper\n");
exit(1);
}
int main(int argc, char **argv)
{
struct pci_device *dev;
int err;
void *addr;
if (argc != 1)
usage();
err = pci_system_init();
if (err != 0) {
fprintf(stderr, "Couldn't initialize PCI system: %s\n", strerror(err));
exit(1);
}
/* Grab the graphics card */
dev = pci_device_find_by_slot(0, 0, 2, 0);
if (dev == NULL)
errx(1, "Couldn't find graphics card");
err = pci_device_probe(dev);
if (err != 0) {
fprintf(stderr, "Couldn't probe graphics card: %s\n", strerror(err));
exit(1);
}
if (dev->vendor_id != 0x8086)
errx(1, "Graphics card is non-intel");
err = pci_device_map_range(dev, dev->regions[0].base_addr,
dev->regions[0].size,
PCI_DEV_MAP_FLAG_WRITABLE, &addr);
if (err) {
fprintf(stderr, "Couldn't map MMIO space: %s\n", strerror(err));
exit(1);
}
printf("SWF14: 0x%08x\n", read32(addr, SWF14));
pci_system_cleanup();
return 0;
}

2
src/i810_driver.c
View File

@ -1064,7 +1064,7 @@ I810PreInit(ScrnInfoPtr pScrn, int flags)
/* after xf86ProcessOptions,
* because it is controlled by options [no]vbe and [no]ddc
*/
pScrn->monitor->DDC = I810DoDDC(pScrn, pI810->pEnt->index);
I810DoDDC(pScrn, pI810->pEnt->index);
/* We have to use PIO to probe, because we haven't mapped yet */
I810SetPIOAccess(pI810);

2
src/i810_reg.h
View File

@ -2822,4 +2822,6 @@ typedef enum {
#define DPFC_STATUS2 0x3214
#define DPFC_FENCE_YOFF 0x3218
#define PEG_BAND_GAP_DATA 0x14d68
#endif /* _I810_REG_H */

145
src/i830_bios.h
View File

@ -138,27 +138,19 @@ struct bdb_general_definitions {
unsigned char dev3[33];
unsigned char dev4[33];
/* may be another device block here on some platforms */
};
#define LVDS_CAP_EDID (1 << 6)
#define LVDS_CAP_DITHER (1 << 5)
#define LVDS_CAP_PFIT_AUTO_RATIO (1 << 4)
#define LVDS_CAP_PFIT_GRAPHICS_MODE (1 << 3)
#define LVDS_CAP_PFIT_TEXT_MODE (1 << 2)
#define LVDS_CAP_PFIT_GRAPHICS (1 << 1)
#define LVDS_CAP_PFIT_TEXT (1 << 0)
} __attribute__((packed));
struct bdb_lvds_options {
uint8_t panel_type;
uint8_t rsvd1;
/* LVDS capabilities, stored in a dword */
uint8_t rsvd2:1;
uint8_t lvds_edid:1;
uint8_t pixel_dither:1;
uint8_t pfit_ratio_auto:1;
uint8_t pfit_gfx_mode_enhanced:1;
uint8_t pfit_text_mode_enhanced:1;
uint8_t pfit_mode:2;
uint8_t pfit_text_mode_enhanced:1;
uint8_t pfit_gfx_mode_enhanced:1;
uint8_t pfit_ratio_auto:1;
uint8_t pixel_dither:1;
uint8_t lvds_edid:1;
uint8_t rsvd2:1;
uint8_t rsvd4;
} __attribute__((packed));
@ -196,8 +188,6 @@ struct lvds_dvo_timing {
uint8_t h_border;
uint8_t v_border;
uint8_t flags;
#define FP_EDID_FLAG_VSYNC_POSITIVE (1 << 2)
#define FP_EDID_FLAG_HSYNC_POSITIVE (1 << 1)
} __attribute__((packed));
struct lvds_pnp_id {
@ -264,4 +254,125 @@ struct vch_bdb_22 {
int i830_bios_init(ScrnInfoPtr pScrn);
/*
* Driver<->VBIOS interaction occurs through scratch bits in
* GR18 & SWF*.
*/
/* GR18 bits are set on display switch and hotkey events */
#define GR18_DRIVER_SWITCH_EN (1<<7) /* 0: VBIOS control, 1: driver control */
#define GR18_HOTKEY_MASK 0x78 /* See also SWF4 15:0 */
#define GR18_HK_NONE (0x0<<3)
#define GR18_HK_LFP_STRETCH (0x1<<3)
#define GR18_HK_TOGGLE_DISP (0x2<<3)
#define GR18_HK_DISP_SWITCH (0x4<<3) /* see SWF14 15:0 for what to enable */
#define GR18_HK_POPUP_DISABLED (0x6<<3)
#define GR18_HK_POPUP_ENABLED (0x7<<3)
#define GR18_HK_PFIT (0x8<<3)
#define GR18_HK_APM_CHANGE (0xa<<3)
#define GR18_HK_MULTIPLE (0xc<<3)
#define GR18_USER_INT_EN (1<<2)
#define GR18_A0000_FLUSH_EN (1<<1)
#define GR18_SMM_EN (1<<0)
/* Set by driver, cleared by VBIOS */
#define SWF00_YRES_SHIFT 16
#define SWF00_XRES_SHIFT 0
#define SWF00_RES_MASK 0xffff
/* Set by VBIOS at boot time and driver at runtime */
#define SWF01_TV2_FORMAT_SHIFT 8
#define SWF01_TV1_FORMAT_SHIFT 0
#define SWF01_TV_FORMAT_MASK 0xffff
#define SWF10_VBIOS_BLC_I2C_EN (1<<29)
#define SWF10_GTT_OVERRIDE_EN (1<<28)
#define SWF10_LFP_DPMS_OVR (1<<27) /* override DPMS on display switch */
#define SWF10_ACTIVE_TOGGLE_LIST_MASK (7<<24)
#define SWF10_OLD_TOGGLE 0x0
#define SWF10_TOGGLE_LIST_1 0x1
#define SWF10_TOGGLE_LIST_2 0x2
#define SWF10_TOGGLE_LIST_3 0x3
#define SWF10_TOGGLE_LIST_4 0x4
#define SWF10_PANNING_EN (1<<23)
#define SWF10_DRIVER_LOADED (1<<22)
#define SWF10_EXTENDED_DESKTOP (1<<21)
#define SWF10_EXCLUSIVE_MODE (1<<20)
#define SWF10_OVERLAY_EN (1<<19)
#define SWF10_PLANEB_HOLDOFF (1<<18)
#define SWF10_PLANEA_HOLDOFF (1<<17)
#define SWF10_VGA_HOLDOFF (1<<16)
#define SWF10_ACTIVE_DISP_MASK 0xffff
#define SWF10_PIPEB_LFP2 (1<<15)
#define SWF10_PIPEB_EFP2 (1<<14)
#define SWF10_PIPEB_TV2 (1<<13)
#define SWF10_PIPEB_CRT2 (1<<12)
#define SWF10_PIPEB_LFP (1<<11)
#define SWF10_PIPEB_EFP (1<<10)
#define SWF10_PIPEB_TV (1<<9)
#define SWF10_PIPEB_CRT (1<<8)
#define SWF10_PIPEA_LFP2 (1<<7)
#define SWF10_PIPEA_EFP2 (1<<6)
#define SWF10_PIPEA_TV2 (1<<5)
#define SWF10_PIPEA_CRT2 (1<<4)
#define SWF10_PIPEA_LFP (1<<3)
#define SWF10_PIPEA_EFP (1<<2)
#define SWF10_PIPEA_TV (1<<1)
#define SWF10_PIPEA_CRT (1<<0)
#define SWF11_MEMORY_SIZE_SHIFT 16
#define SWF11_SV_TEST_EN (1<<15)
#define SWF11_IS_AGP (1<<14)
#define SWF11_DISPLAY_HOLDOFF (1<<13)
#define SWF11_DPMS_REDUCED (1<<12)
#define SWF11_IS_VBE_MODE (1<<11)
#define SWF11_PIPEB_ACCESS (1<<10) /* 0 here means pipe a */
#define SWF11_DPMS_MASK 0x07
#define SWF11_DPMS_OFF (1<<2)
#define SWF11_DPMS_SUSPEND (1<<1)
#define SWF11_DPMS_STANDBY (1<<0)
#define SWF11_DPMS_ON 0
#define SWF14_GFX_PFIT_EN (1<<31)
#define SWF14_TEXT_PFIT_EN (1<<30)
#define SWF14_LID_STATUS_CLOSED (1<<29) /* 0 here means open */
#define SWF14_POPUP_EN (1<<28)
#define SWF14_DISPLAY_HOLDOFF (1<<27)
#define SWF14_DISP_DETECT_EN (1<<26)
#define SWF14_DOCKING_STATUS_DOCKED (1<<25) /* 0 here means undocked */
#define SWF14_DRIVER_STATUS (1<<24)
#define SWF14_OS_TYPE_WIN9X (1<<23)
#define SWF14_OS_TYPE_WINNT (1<<22)
/* 21:19 rsvd */
#define SWF14_PM_TYPE_MASK 0x00070000
#define SWF14_PM_ACPI_VIDEO (0x4 << 16)
#define SWF14_PM_ACPI (0x3 << 16)
#define SWF14_PM_APM_12 (0x2 << 16)
#define SWF14_PM_APM_11 (0x1 << 16)
#define SWF14_HK_REQUEST_MASK 0x0000ffff /* see GR18 6:3 for event type */
/* if GR18 indicates a display switch */
#define SWF14_DS_PIPEB_LFP2_EN (1<<15)
#define SWF14_DS_PIPEB_EFP2_EN (1<<14)
#define SWF14_DS_PIPEB_TV2_EN (1<<13)
#define SWF14_DS_PIPEB_CRT2_EN (1<<12)
#define SWF14_DS_PIPEB_LFP_EN (1<<11)
#define SWF14_DS_PIPEB_EFP_EN (1<<10)
#define SWF14_DS_PIPEB_TV_EN (1<<9)
#define SWF14_DS_PIPEB_CRT_EN (1<<8)
#define SWF14_DS_PIPEA_LFP2_EN (1<<7)
#define SWF14_DS_PIPEA_EFP2_EN (1<<6)
#define SWF14_DS_PIPEA_TV2_EN (1<<5)
#define SWF14_DS_PIPEA_CRT2_EN (1<<4)
#define SWF14_DS_PIPEA_LFP_EN (1<<3)
#define SWF14_DS_PIPEA_EFP_EN (1<<2)
#define SWF14_DS_PIPEA_TV_EN (1<<1)
#define SWF14_DS_PIPEA_CRT_EN (1<<0)
/* if GR18 indicates a panel fitting request */
#define SWF14_PFIT_EN (1<<0) /* 0 means disable */
/* if GR18 indicates an APM change request */
#define SWF14_APM_HIBERNATE 0x4
#define SWF14_APM_SUSPEND 0x3
#define SWF14_APM_STANDBY 0x1
#define SWF14_APM_RESTORE 0x0
#endif /* _I830_BIOS_H_ */

65
src/i830_display.c
View File

@ -854,44 +854,43 @@ i830_crtc_dpms(xf86CrtcPtr crtc, int mode)
/* Give the overlay scaler a chance to disable if it's on this pipe */
i830_crtc_dpms_video(crtc, FALSE);
/* May need to leave pipe A on */
if ((pipe == 0) && (pI830->quirk_flag & QUIRK_PIPEA_FORCE))
return;
/* Disable the VGA plane that we never use */
OUTREG(VGACNTRL, VGA_DISP_DISABLE);
/* Disable display plane */
temp = INREG(dspcntr_reg);
if ((temp & DISPLAY_PLANE_ENABLE) != 0)
/* May need to leave pipe A on */
if ((pipe != 0) || !(pI830->quirk_flag & QUIRK_PIPEA_FORCE))
{
OUTREG(dspcntr_reg, temp & ~DISPLAY_PLANE_ENABLE);
/* Flush the plane changes */
OUTREG(dspbase_reg, INREG(dspbase_reg));
POSTING_READ(dspbase_reg);
/* Disable display plane */
temp = INREG(dspcntr_reg);
if ((temp & DISPLAY_PLANE_ENABLE) != 0)
{
OUTREG(dspcntr_reg, temp & ~DISPLAY_PLANE_ENABLE);
/* Flush the plane changes */
OUTREG(dspbase_reg, INREG(dspbase_reg));
POSTING_READ(dspbase_reg);
}
if (!IS_I9XX(pI830)) {
/* Wait for vblank for the disable to take effect */
i830WaitForVblank(pScrn);
}
/* Next, disable display pipes */
temp = INREG(pipeconf_reg);
if ((temp & PIPEACONF_ENABLE) != 0) {
OUTREG(pipeconf_reg, temp & ~PIPEACONF_ENABLE);
POSTING_READ(pipeconf_reg);
}
/* Wait for vblank for the disable to take effect. */
i830WaitForVblank(pScrn);
temp = INREG(dpll_reg);
if ((temp & DPLL_VCO_ENABLE) != 0) {
OUTREG(dpll_reg, temp & ~DPLL_VCO_ENABLE);
POSTING_READ(dpll_reg);
}
}
if (!IS_I9XX(pI830)) {
/* Wait for vblank for the disable to take effect */
i830WaitForVblank(pScrn);
}
/* Next, disable display pipes */
temp = INREG(pipeconf_reg);
if ((temp & PIPEACONF_ENABLE) != 0) {
OUTREG(pipeconf_reg, temp & ~PIPEACONF_ENABLE);
POSTING_READ(pipeconf_reg);
}
/* Wait for vblank for the disable to take effect. */
i830WaitForVblank(pScrn);
temp = INREG(dpll_reg);
if ((temp & DPLL_VCO_ENABLE) != 0) {
OUTREG(dpll_reg, temp & ~DPLL_VCO_ENABLE);
POSTING_READ(dpll_reg);
}
/* Wait for the clocks to turn off. */
usleep(150);
break;

6
src/i830_driver.c
View File

@ -962,7 +962,7 @@ i830_init_clock_gating(ScrnInfoPtr pScrn)
/* Disable clock gating reported to work incorrectly according to the specs.
*/
if (IS_GM45(pI830)) {
if (IS_GM45(pI830) || IS_G4X(pI830)) {
OUTREG(RENCLK_GATE_D1, 0);
OUTREG(RENCLK_GATE_D2, 0);
OUTREG(RAMCLK_GATE_D, 0);
@ -1445,9 +1445,9 @@ I830GetEarlyOptions(ScrnInfoPtr pScrn)
}
if (xf86ReturnOptValBool(pI830->Options, OPTION_LVDSFIXEDMODE, TRUE)) {
pI830->skip_panel_detect = TRUE;
} else {
pI830->skip_panel_detect = FALSE;
} else {
pI830->skip_panel_detect = TRUE;
}
if (xf86ReturnOptValBool(pI830->Options, OPTION_FORCEENABLEPIPEA, FALSE))

9
src/i830_hdmi.c
View File

@ -140,6 +140,15 @@ i830_hdmi_detect(xf86OutputPtr output)
I830Ptr pI830 = I830PTR(pScrn);
uint32_t temp, bit;
/* For G4X, PEG_BAND_GAP_DATA 3:0 must first be written 0xd.
* Failure to do so will result in spurious interrupts being
* generated on the port when a cable is not attached.
*/
if (IS_G4X(pI830)) {
temp = INREG(PEG_BAND_GAP_DATA);
OUTREG(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);
}
temp = INREG(PORT_HOTPLUG_EN);
OUTREG(PORT_HOTPLUG_EN,

13
src/i830_lvds.c
View File

@ -824,11 +824,9 @@ i830_lvds_destroy (xf86OutputPtr output)
I830Ptr pI830 = I830PTR(pScrn);
I830OutputPrivatePtr intel_output = output->driver_private;
if (pI830->lvds_fixed_mode)
{
xf86DeleteMode (&pI830->lvds_fixed_mode, pI830->lvds_fixed_mode);
xf86DeleteMode (&pI830->lvds_fixed_mode, pI830->lvds_fixed_mode);
if (intel_output)
xfree (intel_output);
}
}
#ifdef RANDR_12_INTERFACE
@ -1117,6 +1115,9 @@ i830_lvds_set_property(xf86OutputPtr output, Atom property,
if (ret < 0)
return FALSE;
if (dev_priv->fitting_mode == ret)
return TRUE;
dev_priv->fitting_mode = ret;
if (output->crtc) {
@ -1213,7 +1214,7 @@ i830_lvds_init(ScrnInfoPtr pScrn)
xf86OutputPtr output;
I830OutputPrivatePtr intel_output;
DisplayModePtr modes, scan;
DisplayModePtr lvds_ddc_mode;
DisplayModePtr lvds_ddc_mode = NULL;
struct i830_lvds_priv *dev_priv;
if (pI830->quirk_flag & QUIRK_IGNORE_LVDS)
@ -1255,7 +1256,7 @@ i830_lvds_init(ScrnInfoPtr pScrn)
*/
I830I2CInit(pScrn, &intel_output->pDDCBus, GPIOC, "LVDSDDC_C");
if (!pI830->skip_panel_detect) {
if (pI830->skip_panel_detect) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Skipping any attempt to determine panel fixed mode.\n");
goto found_mode;

1
src/i830_quirks.c
View File

@ -315,6 +315,7 @@ static i830_quirk i830_quirk_list[] = {
/* 855 & before need to leave pipe A & dpll A up */
{ PCI_CHIP_I855_GM, SUBSYS_ANY, SUBSYS_ANY, quirk_pipea_force },
{ PCI_CHIP_845_G, SUBSYS_ANY, SUBSYS_ANY, quirk_pipea_force },
{ 0, 0, 0, NULL },
};

28
src/reg_dumper/idle.c
View File

@ -39,17 +39,16 @@
struct idle_flags {
uint32_t instdone_flag;
char *name;
int ignore;
unsigned int count;
};
struct idle_flags i915_idle_flags[] = {
#if 0
{IDCT_DONE, "IDCT"},
{IQ_DONE, "IQ"},
{PR_DONE, "PR"},
{VLD_DONE, "VLD"},
{IP_DONE, "IP"},
#endif
{IDCT_DONE, "IDCT", 1},
{IQ_DONE, "IQ", 1},
{PR_DONE, "PR", 1},
{VLD_DONE, "VLD", 1},
{IP_DONE, "IP", 1},
{FBC_DONE, "FBC"},
{BINNER_DONE, "BINNER"},
{SF_DONE, "SF"},
@ -68,10 +67,8 @@ struct idle_flags i915_idle_flags[] = {
{PS_DONE, "PS"},
{CC_DONE, "CC"},
{MAP_FILTER_DONE, "map filter"},
#if 0
{MAP_L2_IDLE, "map L2"},
#endif
{MAP_L2_IDLE, "map L2", 1},
{0x80000038, "reserved bits", 1},
{0, "total"},
{0, "other"},
};
@ -107,7 +104,8 @@ setup_other_flags(I830Ptr pI830,
for (i = 0; i < idle_flag_count - 2; i++) {
other_idle_flags &= ~idle_flags[i].instdone_flag;
total_idle_flags |= idle_flags[i].instdone_flag;
if (!idle_flags[i].ignore)
total_idle_flags |= idle_flags[i].instdone_flag;
}
idle_flags[idle_flag_count - 2].instdone_flag = total_idle_flags;
idle_flags[idle_flag_count - 1].instdone_flag = other_idle_flags;
@ -197,7 +195,11 @@ int main(int argc, char **argv)
}
for (j = 0; j < idle_flag_count; j++) {
printf("%25s: %3d\n", idle_flags[j].name, idle_flags[j].count);
if (!idle_flags[j].ignore)
printf("%25s: %3d\n", idle_flags[j].name, idle_flags[j].count);
else
printf("%25s: %3d (unreliable)\n",
idle_flags[j].name, idle_flags[j].count);
idle_flags[j].count = 0;
}
printf("\n");

4
src/xvmc/intel_xvmc.c
View File

@ -458,11 +458,11 @@ Status XvMCCreateContext(Display *display, XvPortID port,
Status XvMCDestroyContext(Display *display, XvMCContext *context)
{
Status ret;
int screen = DefaultScreen(display);
int screen;
if (!display || !context)
return XvMCBadContext;
screen = DefaultScreen(display);
ret = (xvmc_driver->destroy_context)(display, context);
if (ret) {
XVMC_ERR("destroy context fail\n");