Move batch and 965 render state setup/teardown to screen init/close.
Whether we're VT switched or not shouldn't impact rendering.
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74e2b69a31
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faecd155c4
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@ -1182,6 +1182,11 @@ I830ScreenInit(int scrnIndex, ScreenPtr screen, int argc, char **argv)
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i830_fixup_mtrrs(scrn);
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intel_batch_init(scrn);
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if (IS_I965G(intel))
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gen4_render_state_init(scrn);
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miClearVisualTypes();
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if (!miSetVisualTypes(scrn->depth,
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miGetDefaultVisualMask(scrn->depth),
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@ -1366,13 +1371,6 @@ static void I830LeaveVT(int scrnIndex, int flags)
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xf86_hide_cursors(scrn);
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intel_sync(scrn);
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intel_batch_teardown(scrn);
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if (IS_I965G(intel))
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gen4_render_state_cleanup(scrn);
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ret = drmDropMaster(intel->drmSubFD);
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if (ret)
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xf86DrvMsg(scrn->scrnIndex, X_WARNING,
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@ -1406,11 +1404,6 @@ static Bool I830EnterVT(int scrnIndex, int flags)
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if (!i830_reinit_memory(scrn))
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return FALSE;
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intel_batch_init(scrn);
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if (IS_I965G(intel))
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gen4_render_state_init(scrn);
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if (!xf86SetDesiredModes(scrn))
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return FALSE;
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@ -1448,6 +1441,13 @@ static Bool I830CloseScreen(int scrnIndex, ScreenPtr screen)
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intel->front_buffer = NULL;
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}
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intel_sync(scrn);
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intel_batch_teardown(scrn);
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if (IS_I965G(intel))
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gen4_render_state_cleanup(scrn);
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xf86_cursors_fini(screen);
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/* Free most of the allocations */
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