sna/gen4: Flush every vertex for the magic CA pass

gen4 dies hard if it has two rectangles in the pipeline, and despite the
stringent and crippling efforts to prevent us from efficiently using the
GPU, I missed a flush before submitting the CA rectangle.

Reported-and-tested-by: Fryderyk Dziarmagowski <fdziarmagowski@gmail.com>
References: https://bugs.freedesktop.org/show_bug.cgi?id=28768
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Chris Wilson 2011-06-04 18:11:54 +01:00
parent bcef98af56
commit fcbe2d9ee7
1 changed files with 8 additions and 0 deletions

View File

@ -56,11 +56,16 @@
* the BLT engine.
*/
#define PREFER_BLT 1
#define FLUSH_EVERY_VERTEX 1
#if FLUSH_EVERY_VERTEX
#define FLUSH() do { \
gen4_vertex_flush(sna); \
OUT_BATCH(MI_FLUSH | MI_INHIBIT_RENDER_CACHE_FLUSH); \
} while (0)
#else
#define FLUSH()
#endif
#define GEN4_GRF_BLOCKS(nreg) ((nreg + 15) / 16 - 1)
@ -309,6 +314,9 @@ static void gen4_magic_ca_pass(struct sna *sna,
DBG(("%s: CA fixup\n", __FUNCTION__));
if (FLUSH_EVERY_VERTEX)
OUT_BATCH(MI_FLUSH | MI_INHIBIT_RENDER_CACHE_FLUSH);
gen4_emit_pipelined_pointers
(sna, op, PictOpAdd,
gen4_choose_composite_kernel(PictOpAdd,