Aurelien
/
xf86-video-intel
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Add DP link and GMCH M and N registers 

Signed-off-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Keith Packard 2009-05-07 14:58:01 -07:00 committed by Eric Anholt
parent e54a23bff0
commit ff7494b4c4
2 changed files with 50 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

42
src/i810_reg.h
View File

@ -2214,6 +2214,43 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define PIPE_PIXEL_MASK 0x00ffffff
#define PIPE_PIXEL_SHIFT 0
/*
* Computing GMCH M and N values.
*
* GMCH M/N = dot clock * bytes per pixel / ls_clk * # of lanes
*
* ls_clk (we assume) is the DP link clock (1.62 or 2.7 GHz)
*
* The GMCH value is used internally
*/
#define PIPEA_GMCH_DATA_M 0x70050
/* Transfer unit size for display port - 1, default is 0x3f (for TU size 64) */
#define PIPE_GMCH_DATA_M_TU_SIZE_MASK (0x3f << 25)
#define PIPE_GMCH_DATA_M_TU_SIZE_SHIFT 25
#define PIPE_GMCH_DATA_M_MASK (0xffffff)
#define PIPEA_GMCH_DATA_N 0x70054
#define PIPE_GMCH_DATA_N_MASK (0xffffff)
/*
* Computing Link M and N values.
*
* Link M / N = pixel_clock / ls_clk
*
* (the DP spec calls pixel_clock the 'strm_clk')
*
* The Link value is transmitted in the Main Stream
* Attributes and VB-ID.
*/
#define PIPEA_DP_LINK_M 0x70060
#define PIPEA_DP_LINK_M_MASK (0xffffff)
#define PIPEA_DP_LINK_N 0x70064
#define PIPEA_DP_LINK_N_MASK (0xffffff)
#define PIPEB_DSL 0x71000
#define PIPEBCONF 0x71008
@ -2231,6 +2268,11 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define PIPEBFRAMEHIGH 0x71040
#define PIPEBFRAMEPIXEL 0x71044
#define PIPEB_GMCH_DATA_M 0x71050
#define PIPEB_GMCH_DATA_N 0x71054
#define PIPEB_DP_LINK_M 0x71060
#define PIPEB_DP_LINK_N 0x71064
#define DSPACNTR 0x70180
#define DSPBCNTR 0x71180
#define DISPLAY_PLANE_ENABLE (1<<31)

8
src/i830_debug.c
View File

@ -652,6 +652,10 @@ static struct i830SnapshotRec {
DEFINEREG2(PIPEACONF, i830_debug_pipeconf),
DEFINEREG2(PIPEASRC, i830_debug_yxminus1),
DEFINEREG2(PIPEASTAT, i830_debug_pipestat),
DEFINEREG(PIPEA_GMCH_DATA_M),
DEFINEREG(PIPEA_GMCH_DATA_N),
DEFINEREG(PIPEA_DP_LINK_M),
DEFINEREG(PIPEA_DP_LINK_N),
DEFINEREG2(FPA0, i830_debug_fp),
DEFINEREG2(FPA1, i830_debug_fp),
@ -676,6 +680,10 @@ static struct i830SnapshotRec {
DEFINEREG2(PIPEBCONF, i830_debug_pipeconf),
DEFINEREG2(PIPEBSRC, i830_debug_yxminus1),
DEFINEREG2(PIPEBSTAT, i830_debug_pipestat),
DEFINEREG(PIPEB_GMCH_DATA_M),
DEFINEREG(PIPEB_GMCH_DATA_N),
DEFINEREG(PIPEB_DP_LINK_M),
DEFINEREG(PIPEB_DP_LINK_N),
DEFINEREG2(FPB0, i830_debug_fp),
DEFINEREG2(FPB1, i830_debug_fp),