Commit Graph

3217 Commits

Author SHA1 Message Date
Chris Wilson 7446b39f04 sna: Disable XVideo using the TexturedAdapter if the GPU is wedged
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-27 15:26:49 +01:00
Chris Wilson 44cd6ebf43 sna: Typo in debug assertion.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-26 18:41:20 +01:00
Chris Wilson 5cd7f5b598 sna/dri: Mark the GPU bo as damaged upon a page-flip
...so that CPU pixmap is correctly invalidated for the next readback.
For instance, if you were to take a screenshot on a composited destkop.

Reported-by: Sitosfe Wheeler <sitsofe@yahoo.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-26 18:41:01 +01:00
Chris Wilson c4f7959266 sna: Only create bo up to half the size of the mappable aperture
As we use GTT mappings if writing directly into the tiled buffer and the
available aperture is reported by the kernel as the total GTT and not
limited to the fenceable/mappable region, we need to manually probe this
value and ensure that our creation and fenced routines observe this
distinct limit.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-26 16:56:55 +01:00
Chris Wilson 1303501117 sna/dri: Reorganise schedule_swap to not confuse immediate and wait paths
Eeek, the wait-for-target-msc was using the immediate swap path, meaning
that for copy-swaps the copy was submitting immediately but the client
throttled waiting upon the target vblank. What is actually intended is
for the presentation to be delayed until the target_msc.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-26 12:09:31 +01:00
Chris Wilson b460b96454 sna/dri: Fix composited copy-swaps
The secret is not to cheat and render directly to the front buffer, but
remember to mark the Window as damaged.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-25 16:34:15 +01:00
Chris Wilson 28fffbd1d0 sna/display: Protect against drmModeGetCrtc returning NULL
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-25 16:33:31 +01:00
Chris Wilson 2c73b4651a sna/gen4+: Use the drawable rectangle offset for copy boxes
Saves a little bit of work whilst emitting the rectangles.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-25 16:32:30 +01:00
Chris Wilson 3833ff9677 sna: Correct typo in computing damage of PolyPoint
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=38614
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-25 14:04:37 +01:00
Chris Wilson 471115a980 sna: Also allow BLT copies to discard the alpha channel
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-24 13:35:22 +01:00
Chris Wilson c3b1a0d704 sna/dri: Copy to real front upon swap
The front-buffer of a DRI2 drawable, may not in fact be pointing to the
scanout pixmap. So override the destination for swapbuffers to update
the scanout.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-24 12:48:48 +01:00
Chris Wilson 669378cd8d sna: Wrap the fbcon in a scratch pixmap for render-copy across depth changes
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-24 11:53:17 +01:00
Chris Wilson 33b2ea0392 sna: Avoid using the BLT to copy between mismatching depths
We either conflated bpp (which fails given a mixture of depth-24 and
depth-30 pixmaps) or neglected to check at all.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-24 11:46:36 +01:00
Chris Wilson 28f6dc24d3 sna: Support depth-30 and some more logging to show the depth
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-24 11:24:59 +01:00
Xiang, Haihao 312460ea69 Xv: set up pipeline for Xv on Ivybridge
The configuration is same as that on Sandybridge, but
many state commands are changed

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-06-24 09:42:19 +08:00
Xiang, Haihao 90a0800588 Xv: upload new shaders to GEM objects for Xv on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-06-24 09:42:16 +08:00
Xiang, Haihao 00614f712b Xv: update SURFACE_STATE & SAMPLER_STATE for Xv on Ivybridge
SURFACE_STATE & SAMPLER_STATE are changed since Ivybridge

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-06-24 09:42:13 +08:00
Xiang, Haihao 70f884772a Xv: New shaders for Xv on Ivybridge
Redefine some M4 macros, also update the check for
intel-gen4asm to support Ivybridge

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-06-24 09:42:10 +08:00
Xiang, Haihao 3cf423bd3a Xv: separate fragments from M4 macros
It is to prepare for Xv on Ivybridge. The difference from Sandybridge
is that all message payload must be in GRF registers instead of MRF registers
on Ivybridge. We will only redefine some M4 macros for Ivybridge

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2011-06-24 09:42:07 +08:00
Chris Wilson 58d7a89b93 sna: Don't render to invalid surfaces
Fixes a regression from d0362a. In bypassing the is_wedged checked, we
also ended up bypassing the checks that we could indeed render to the
target bo. With the result that we were creating GPU buffers for SHM
surfaces, something that requires Xserver fixes before we can actually
enable...

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-24 00:35:30 +01:00
Chris Wilson 3c1d5bc35e sna: Clip the fbcon to the frontbuffer
...both to correct the placement of the fbcon into the smaller scanout and
to ensure that we correctly clip the boxes to be copied.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-24 00:34:11 +01:00
Chris Wilson e3b4c10f23 sna: Relent and workaround the lack of O_NONBLOCK on /dev/dri/card0
So in order not to block server shutdown, check that the fd is readable
before attempting to read from it.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-23 20:56:03 +01:00
Chris Wilson 33d3077266 sna: Debug compile fix, and some extra comments
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-23 15:55:47 +01:00
Chris Wilson 03e6aee8fd sna: For an unbounded op, we need to convert the whole surface
Otherwise if we fail to check, then we create a 0x0 surface to sample
with the operation -- net result is that we end up using a clear source
instead of the desired mask.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-23 15:55:47 +01:00
Adam Jackson 356ded1308 Don't include xf86Priv.h
I'd like it to not be in the SDK anymore, and we're not using anything
from it.

Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-22 22:39:37 +01:00
Chris Wilson ea71133da7 sna/video: Use pwrite for upload of unclipped, unrotated frames
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-22 11:04:56 +01:00
Chris Wilson 2f6afb5b1f sna: Only reduce gpu damage after migration
Otherwise we end up doing work for no reason, ala the regression in
grads-heat-map. However, it is important that the damage is reduced at
some point or else it may grow unbounded. Hopefully normal usage will
never hit the pathologocial case...

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-20 17:31:23 +01:00
Chris Wilson 88d840b53d sna/gen4: Check for sufficient batch space before emitting pipelined pointers
For the broken shader workaround, we need to reset the pipeline state
before every blt as the state is changed by the magic CA pass. So we
need to check that we actually have sufficient space to emit the
pipelined pointers before doing so.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-20 15:42:55 +01:00
Chris Wilson 84bd6e5119 sna/gen4: Correct the number of dwods required to emit the ca pass
We need 7 for pipelined pointers, 6 for the primitive and 1 for the
flush.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-20 15:22:00 +01:00
Chris Wilson 22255335e4 sna: Don't perform a GPU copy of the scanout if it is wedged.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-20 13:51:23 +01:00
Chris Wilson e2684498a4 sna: Add some debugging asserts for handling wedged GPUs
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-20 13:51:22 +01:00
Chris Wilson d0362a20bb sna: Bypass the gpu-is-wedged? check for forced bo creation
In order to attach a scanout (and use swrast) on a wedged GPU, we need to
bypass the safety checks for normal pixmap creation.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-20 13:49:16 +01:00
Chris Wilson de0286ed9f sna/display: After copying the fbcon, tell the server that we have a background
... so that the core knows to skip the clear.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-17 09:44:06 +01:00
Chris Wilson f3869d60cc sna/display: Apply damage for the fbcon copy
... so that any immediate shadow usage will read back the fbcon
contents.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-17 09:37:15 +01:00
Chris Wilson 39f0b0ae17 sna: Copy the fbcon contents onto the front buffer upon X startup
This patch has been carried by the distributions every since they
started doing graphical boot splashes. Time to integrate it and give it
some TLC.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-17 09:20:33 +01:00
Chris Wilson 37ba33f502 sna: Fix kgem_create_from_name error paths and to mark the bo as non-reusable
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-17 07:03:25 +01:00
Chris Wilson 665bc17357 sna/display: Remove the caching of the drmModeCrtc
We only use it for the id. Everything else stored on it, like the
buffer_id, is not permanent and we need to query the current status as
required.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-17 07:03:05 +01:00
Chris Wilson ad6235cfb1 sna/accel: convert BOX_ADD_RECT to an inline function
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-16 19:25:41 +01:00
Chris Wilson a86f43988c sna/accel: convert BOX_ADD_PT to an inline function
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-16 19:21:47 +01:00
Chris Wilson f67a26590a sna/accel: convert TRIM_AND_TRANSLATE_BOX to an inline function
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-16 19:21:47 +01:00
Chris Wilson df1b117ded sna/accel: convert TRANSLATE_BOX to an inline function
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-16 19:21:47 +01:00
Chris Wilson 76ff3c715c sna/accel: convert TRIM_BOX to an inline
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-16 19:21:47 +01:00
Chris Wilson e4a66368e7 sna/accel: convert CLIP_BOX to an inline function
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-16 19:21:46 +01:00
Chris Wilson d7b51cc5d6 sna/accel: convert BOX_EMPTY macro to an inline function
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-16 19:18:19 +01:00
Chris Wilson 1c3c08e80f sna: Fix the typo in BOX_EMPTY
BOX_EMPTY(&box) surprisingly compiles and generates interesting code that
evaluates to if (0). Oops.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-16 18:38:51 +01:00
Chris Wilson 17bf0019b6 sna: Only retire requests after IO if the bo was active
We only want to process retirements if we know we caused a stall waiting
for the GPU to release the bo before performing IO.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-16 14:26:06 +01:00
Chris Wilson b707f18d17 sna: Purge the bo cache only if we detect aperture thrashing
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-16 14:16:06 +01:00
Chris Wilson dd4ad11e0d sna: compile fix.
A pox on all those who write trivial patches, attempt to compile on a
system not having dri2proto and just assume that all is good.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-16 12:53:22 +01:00
Chris Wilson 2ff36af7e1 sna/accel: Prevent initialising a region with an invalid box
pixman complains if you attempt to use a region created with an invalid
box, so don't do that.

Reported-by: Reinhard Karcher <reinhard.karcher@gmx.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-16 11:24:39 +01:00
Chris Wilson 3c02110052 sna/dri: Add some comments to explain the choice of flags upon the bo
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-06-16 10:30:58 +01:00