984 lines
28 KiB
C
984 lines
28 KiB
C
/**************************************************************************
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Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas.
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Copyright © 2002 David Dawes
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All Rights Reserved.
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the
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"Software"), to deal in the Software without restriction, including
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without limitation the rights to use, copy, modify, merge, publish,
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distribute, sub license, and/or sell copies of the Software, and to
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permit persons to whom the Software is furnished to do so, subject to
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the following conditions:
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The above copyright notice and this permission notice (including the
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next paragraph) shall be included in all copies or substantial portions
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of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
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IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
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ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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**************************************************************************/
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/*
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* Authors:
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* Keith Whitwell <keith@tungstengraphics.com>
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* David Dawes <dawes@xfree86.org>
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*
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*/
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#if 0
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#define I830DEBUG
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#endif
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#include <stdint.h>
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#ifndef REMAP_RESERVED
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#define REMAP_RESERVED 0
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#endif
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#ifndef _I830_H_
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#define _I830_H_
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#include "xf86_OSproc.h"
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#include "compiler.h"
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#include "xf86PciInfo.h"
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#include "xf86Pci.h"
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#include "i810_reg.h"
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#include "xf86Cursor.h"
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#include "xf86xv.h"
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#include "vgaHW.h"
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#include "xf86Crtc.h"
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#include "xf86RandR12.h"
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#include "xorg-server.h"
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#include <pciaccess.h>
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#include "xf86drm.h"
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#include "sarea.h"
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#define _XF86DRI_SERVER_
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#include "dri.h"
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#include "GL/glxint.h"
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#include "i830_dri.h"
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#include "intel_bufmgr.h"
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#include "i915_drm.h"
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#include "uxa.h"
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Bool i830_uxa_init(ScreenPtr pScreen);
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void i830_uxa_create_screen_resources(ScreenPtr pScreen);
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void i830_uxa_block_handler (ScreenPtr pScreen);
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Bool i830_get_aperture_space(ScrnInfoPtr pScrn, drm_intel_bo **bo_table,
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int num_bos);
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dri_bo *i830_get_pixmap_bo (PixmapPtr pixmap);
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void i830_set_pixmap_bo(PixmapPtr pixmap, dri_bo *bo);
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typedef struct _I830OutputRec I830OutputRec, *I830OutputPtr;
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#include "common.h"
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#include "i830_sdvo.h"
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#include "i2c_vid.h"
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#ifdef XvMCExtension
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#ifdef ENABLE_XVMC
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#define INTEL_XVMC 1
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#endif
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#endif
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#define ALWAYS_SYNC 0
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#define ALWAYS_FLUSH 0
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typedef struct _I830Rec *I830Ptr;
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typedef void (*I830WriteIndexedByteFunc)(I830Ptr pI830, IOADDRESS addr,
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uint8_t index, uint8_t value);
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typedef uint8_t(*I830ReadIndexedByteFunc)(I830Ptr pI830, IOADDRESS addr,
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uint8_t index);
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typedef void (*I830WriteByteFunc)(I830Ptr pI830, IOADDRESS addr,
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uint8_t value);
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typedef uint8_t(*I830ReadByteFunc)(I830Ptr pI830, IOADDRESS addr);
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enum tile_format {
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TILE_NONE,
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TILE_XMAJOR,
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TILE_YMAJOR
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};
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#define PITCH_NONE 0
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/** Record of a linear allocation in the aperture. */
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typedef struct _i830_memory i830_memory;
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struct _i830_memory {
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/** Offset of the allocation in card VM */
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unsigned long offset;
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/** End of the allocation in card VM */
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unsigned long end;
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/**
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* Requested size of the allocation: doesn't count padding.
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*
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* Any bound memory will cover offset to (offset + size).
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*/
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unsigned long size;
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/**
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* Allocated aperture size, taking into account padding to allow for
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* tiling.
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*/
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unsigned long allocated_size;
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/**
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* Physical (or more properly, bus) address of the allocation.
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* Only set if requested during allocation.
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*/
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uint64_t bus_addr;
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/** AGP memory handle */
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int key;
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/**
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* Whether or not the AGP memory (if any) is currently bound.
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*/
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Bool bound;
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/**
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* Offset that the AGP-allocated memory (if any) is to be bound to.
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*
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* This is either @offset or pI830->stolen_size
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*/
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unsigned long agp_offset;
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enum tile_format tiling;
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/**
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* Index of the fence register representing the tiled surface, when
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* bound.
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*/
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int fence_nr;
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/** Pitch value in bytes for tiled surfaces */
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unsigned int pitch;
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/** Description of the allocation, for logging */
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char *name;
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/** @{
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* Memory allocator linked list pointers
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*/
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i830_memory *next;
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i830_memory *prev;
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/** @} */
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dri_bo *bo;
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uint32_t alignment;
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uint32_t gem_name;
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Bool lifetime_fixed_offset;
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};
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typedef struct {
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int tail_mask;
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i830_memory *mem;
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unsigned char *virtual_start;
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int head;
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int tail;
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int space;
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} I830RingBuffer;
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/* store information about an Ixxx DVO */
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/* The i830->i865 use multiple DVOs with multiple i2cs */
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/* the i915, i945 have a single sDVO i2c bus - which is different */
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#define MAX_OUTPUTS 6
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#define I830_I2C_BUS_DVO 1
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#define I830_I2C_BUS_SDVO 2
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/* these are outputs from the chip - integrated only
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external chips are via DVO or SDVO output */
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#define I830_OUTPUT_UNUSED 0
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#define I830_OUTPUT_ANALOG 1
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#define I830_OUTPUT_DVO_TMDS 2
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#define I830_OUTPUT_DVO_LVDS 3
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#define I830_OUTPUT_DVO_TVOUT 4
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#define I830_OUTPUT_SDVO 5
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#define I830_OUTPUT_LVDS 6
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#define I830_OUTPUT_TVOUT 7
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#define I830_OUTPUT_HDMI 8
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struct _I830DVODriver {
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int type;
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char *modulename;
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char *fntablename;
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unsigned int dvo_reg;
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uint32_t gpio;
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int address;
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I830I2CVidOutputRec *vid_rec;
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void *dev_priv;
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pointer modhandle;
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};
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typedef struct _I830CrtcPrivateRec {
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int pipe;
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int plane;
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Bool enabled;
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int dpms_mode;
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int x, y;
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/* Lookup table values to be set when the CRTC is enabled */
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uint8_t lut_r[256], lut_g[256], lut_b[256];
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i830_memory *rotate_mem;
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/* Card virtual address of the cursor */
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unsigned long cursor_offset;
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unsigned long cursor_argb_offset;
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/* Physical or virtual addresses of the cursor for setting in the cursor
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* registers.
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*/
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uint64_t cursor_addr;
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unsigned long cursor_argb_addr;
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Bool cursor_is_argb;
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} I830CrtcPrivateRec, *I830CrtcPrivatePtr;
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#define I830CrtcPrivate(c) ((I830CrtcPrivatePtr) (c)->driver_private)
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typedef struct _I830OutputPrivateRec {
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int type;
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I2CBusPtr pI2CBus;
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I2CBusPtr pDDCBus;
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struct _I830DVODriver *i2c_drv;
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Bool load_detect_temp;
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Bool needs_tv_clock;
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uint32_t lvds_bits;
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int pipe_mask;
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int clone_mask;
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/** Output-private structure. Should replace i2c_drv */
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void *dev_priv;
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} I830OutputPrivateRec, *I830OutputPrivatePtr;
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#define I830OutputPrivate(o) ((I830OutputPrivatePtr) (o)->driver_private)
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/** enumeration of 3d consumers so some can maintain invariant state. */
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enum last_3d {
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LAST_3D_OTHER,
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LAST_3D_VIDEO,
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LAST_3D_RENDER,
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LAST_3D_ROTATION
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};
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/*
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* Backlight control has some unfortunate properties:
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* - many machines won't give us brightness change notifications
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* o brightness hotkeys
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* o events like AC plug/unplug (can be controlled via _DOS setting)
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* o ambient light sensor triggered changes
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* - some machines use the so-called "legacy" backlight interface
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* o resulting brightness is a combo of LBB and PWM values
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* o LBB sits in config space
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* - some machines have ACPI methods for changing brightness
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* o one of the few ways the X server and firmware can stay in sync
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* - new machines have the IGD OpRegion interface available
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* o a reliable way of keeping the firmware and X in sync
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*
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* So the real problem is on machines where ACPI or OpRegion methods aren't
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* available. In that case, problems can occur:
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* 1) the BIOS and X will have different ideas of what the brightness is,
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* leading to unexpected results when the brightness is increased or
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* decreased via hotkey or X protocol
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* 2) unless X takes the legacy register into account, machines using it
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* may prevent X from raising the brightness above 0 if the firmware
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* set LBB to 0
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* Given these problems, we provide the user with a selection of methods,
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* so they can choose an ideal one for their platform (assuming our quirk
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* code picks the wrong one).
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*
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* Four different backlight control methods are available:
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* BCM_NATIVE: only ever touch the native backlight control registers
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* This method may be susceptible to problem (2) above if the firmware
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* modifies the legacy registers.
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* BCM_LEGACY: only ever touch the legacy backlight control registers
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* This method may be susceptible to problem (1) above if the firmware
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* also modifies the legacy registers.
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* BCM_COMBO: try to use both sets
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* In this case, the driver will try to modify both sets of registers
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* if needed. To avoid problem (2) above it may set the LBB register
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* to a non-zero value if the brightness is to be increased. It's still
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* susceptible to problem (1), but to a lesser extent than the LEGACY only
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* method.
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* BCM_KERNEL: use kernel methods for controlling the backlight
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* This is only available on some platforms, but where present this can
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* provide the best user experience.
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*/
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enum backlight_control {
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BCM_NATIVE = 0,
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BCM_LEGACY,
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BCM_COMBO,
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BCM_KERNEL,
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};
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enum dri_type {
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DRI_DISABLED,
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DRI_NONE,
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DRI_DRI2
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};
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struct sdvo_device_mapping {
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uint8_t dvo_port;
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uint8_t slave_addr;
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uint8_t dvo_wiring;
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uint8_t initialized;
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};
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typedef struct _I830Rec {
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unsigned char *MMIOBase;
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unsigned char *GTTBase;
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unsigned char *FbBase;
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int cpp;
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unsigned int bufferOffset; /* for I830SelectBuffer */
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/* These are set in PreInit and never changed. */
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long FbMapSize;
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long GTTMapSize;
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/**
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* Linked list of video memory allocations. The head and tail are
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* dummy entries that bound the allocation area.
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*/
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i830_memory *memory_list;
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/** Linked list of buffer object memory allocations */
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i830_memory *bo_list;
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long stolen_size; /**< bytes of pre-bound stolen memory */
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int gtt_acquired; /**< whether we currently own the AGP */
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i830_memory *front_buffer;
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i830_memory *compressed_front_buffer;
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i830_memory *compressed_ll_buffer;
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/* One big buffer for all cursors for kernels that support this */
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i830_memory *cursor_mem;
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/* separate small buffers for kernels that support this */
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i830_memory *cursor_mem_classic[2];
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i830_memory *cursor_mem_argb[2];
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i830_memory *fake_bufmgr_mem;
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/* Regions allocated either from the above pools, or from agpgart. */
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I830RingBuffer ring;
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/** Number of bytes being emitted in the current BEGIN_LP_RING */
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unsigned int ring_emitting;
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/** Number of bytes that have been emitted in the current BEGIN_LP_RING */
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unsigned int ring_used;
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/** Offset in the ring for the next DWORD emit */
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uint32_t ring_next;
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dri_bufmgr *bufmgr;
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uint8_t *batch_ptr;
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/** Byte offset in batch_ptr for the next dword to be emitted. */
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unsigned int batch_used;
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/** Position in batch_ptr at the start of the current BEGIN_BATCH */
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unsigned int batch_emit_start;
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/** Number of bytes to be emitted in the current BEGIN_BATCH. */
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uint32_t batch_emitting;
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dri_bo *batch_bo;
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dri_bo *last_batch_bo;
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/** Whether we're in a section of code that can't tolerate flushing */
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Bool in_batch_atomic;
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/** Ending batch_used that was verified by i830_start_batch_atomic() */
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int batch_atomic_limit;
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/* For Xvideo */
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i830_memory *overlay_regs;
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void *offscreenImages; /**< remembered memory block for release */
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#ifdef INTEL_XVMC
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/* For XvMC */
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Bool XvMCEnabled;
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#endif
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XF86ModReqInfo shadowReq; /* to test for later libshadow */
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Rotation rotation;
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void (*PointerMoved)(int, int, int);
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CreateScreenResourcesProcPtr CreateScreenResources;
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i830_memory *power_context;
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i830_memory *memory_manager; /**< DRI memory manager aperture */
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Bool have_gem;
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Bool need_mi_flush;
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Bool tiling;
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Bool fb_compression;
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Bool swapbuffers_wait;
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Bool CursorNeedsPhysical;
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int Chipset;
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unsigned long LinearAddr;
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unsigned long MMIOAddr;
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unsigned int MMIOSize;
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IOADDRESS ioBase;
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EntityInfoPtr pEnt;
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struct pci_device *PciInfo;
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uint8_t variant;
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unsigned int BR[20];
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Bool fence_used[FENCE_NEW_NR];
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CloseScreenProcPtr CloseScreen;
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void (*batch_flush_notify)(ScrnInfoPtr pScrn);
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uxa_driver_t *uxa_driver;
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Bool need_flush;
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PixmapPtr pSrcPixmap;
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int accel_pixmap_pitch_alignment;
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int accel_pixmap_offset_alignment;
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int accel_max_x;
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int accel_max_y;
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int max_gtt_map_size;
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I830WriteIndexedByteFunc writeControl;
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I830ReadIndexedByteFunc readControl;
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I830WriteByteFunc writeStandard;
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I830ReadByteFunc readStandard;
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Bool XvDisabled; /* Xv disabled in PreInit. */
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Bool XvEnabled; /* Xv enabled for this generation. */
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Bool XvPreferOverlay;
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int colorKey;
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XF86VideoAdaptorPtr adaptor;
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ScreenBlockHandlerProcPtr BlockHandler;
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Bool overlayOn;
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struct {
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drm_intel_bo *gen4_vs_bo;
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drm_intel_bo *gen4_sf_bo;
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drm_intel_bo *gen4_wm_packed_bo;
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drm_intel_bo *gen4_wm_planar_bo;
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drm_intel_bo *gen4_cc_bo;
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drm_intel_bo *gen4_cc_vp_bo;
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drm_intel_bo *gen4_sampler_bo;
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drm_intel_bo *gen4_sip_kernel_bo;
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} video;
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/* Render accel state */
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float scale_units[2][2];
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/** Transform pointers for src/mask, or NULL if identity */
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PictTransform *transform[2];
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float coord_adjust;
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/* i830 render accel state */
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PixmapPtr render_src, render_mask, render_dst;
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PicturePtr render_src_picture, render_mask_picture, render_dst_picture;
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uint32_t render_dst_format;
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Bool needs_render_state_emit;
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uint32_t cblend, ablend, s8_blendctl;
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/* i915 render accel state */
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uint32_t mapstate[6];
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uint32_t samplerstate[6];
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struct {
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int op;
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uint32_t dst_format;
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Bool is_nearest;
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Bool needs_emit;
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} i915_render_state;
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/* 965 render acceleration state */
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struct gen4_render_state *gen4_render_state;
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enum dri_type directRenderingType; /* DRI enabled this generation. */
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Bool directRenderingOpen;
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int drmSubFD;
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char deviceName[64];
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/* Broken-out options. */
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OptionInfoPtr Options;
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Bool lvds_24_bit_mode;
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Bool lvds_use_ssc;
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int lvds_ssc_freq; /* in MHz */
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Bool lvds_dither;
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DisplayModePtr lvds_fixed_mode;
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DisplayModePtr sdvo_lvds_fixed_mode;
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Bool skip_panel_detect;
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Bool integrated_lvds; /* LVDS config from driver feature BDB */
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Bool tv_present; /* TV connector present (from VBIOS) */
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/* Driver phase/state information */
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Bool preinit;
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Bool starting;
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Bool closing;
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Bool suspended;
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Bool leaving;
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unsigned int SaveGeneration;
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OsTimerPtr devicesTimer;
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int ddc2;
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enum backlight_control backlight_control_method;
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uint32_t saveDSPARB;
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uint32_t saveDSPACNTR;
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uint32_t saveDSPBCNTR;
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uint32_t savePIPEACONF;
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uint32_t savePIPEBCONF;
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uint32_t savePIPEASRC;
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uint32_t savePIPEBSRC;
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uint32_t saveFPA0;
|
|
uint32_t saveFPA1;
|
|
uint32_t saveDPLL_A;
|
|
uint32_t saveDPLL_A_MD;
|
|
uint32_t saveHTOTAL_A;
|
|
uint32_t saveHBLANK_A;
|
|
uint32_t saveHSYNC_A;
|
|
uint32_t saveVTOTAL_A;
|
|
uint32_t saveVBLANK_A;
|
|
uint32_t saveVSYNC_A;
|
|
uint32_t saveBCLRPAT_A;
|
|
uint32_t saveDSPASTRIDE;
|
|
uint32_t saveDSPASIZE;
|
|
uint32_t saveDSPAPOS;
|
|
uint32_t saveDSPABASE;
|
|
uint32_t saveDSPASURF;
|
|
uint32_t saveDSPATILEOFF;
|
|
uint32_t saveFPB0;
|
|
uint32_t saveFPB1;
|
|
uint32_t saveDPLL_B;
|
|
uint32_t saveDPLL_B_MD;
|
|
uint32_t saveHTOTAL_B;
|
|
uint32_t saveHBLANK_B;
|
|
uint32_t saveHSYNC_B;
|
|
uint32_t saveVTOTAL_B;
|
|
uint32_t saveVBLANK_B;
|
|
uint32_t saveVSYNC_B;
|
|
uint32_t saveBCLRPAT_B;
|
|
uint32_t saveDSPBSTRIDE;
|
|
uint32_t saveDSPBSIZE;
|
|
uint32_t saveDSPBPOS;
|
|
uint32_t saveDSPBBASE;
|
|
uint32_t saveDSPBSURF;
|
|
uint32_t saveDSPBTILEOFF;
|
|
uint32_t saveVCLK_DIVISOR_VGA0;
|
|
uint32_t saveVCLK_DIVISOR_VGA1;
|
|
uint32_t saveVCLK_POST_DIV;
|
|
uint32_t saveVGACNTRL;
|
|
uint32_t saveCURSOR_A_CONTROL;
|
|
uint32_t saveCURSOR_A_BASE;
|
|
uint32_t saveCURSOR_A_POSITION;
|
|
uint32_t saveCURSOR_B_CONTROL;
|
|
uint32_t saveCURSOR_B_BASE;
|
|
uint32_t saveCURSOR_B_POSITION;
|
|
uint32_t saveADPA;
|
|
uint32_t saveLVDS;
|
|
uint32_t saveDVOA;
|
|
uint32_t saveDVOB;
|
|
uint32_t saveDVOC;
|
|
uint32_t savePP_ON;
|
|
uint32_t savePP_OFF;
|
|
uint32_t savePP_CONTROL;
|
|
uint32_t savePP_DIVISOR;
|
|
uint32_t savePFIT_CONTROL;
|
|
uint32_t savePaletteA[256];
|
|
uint32_t savePaletteB[256];
|
|
uint32_t saveSWF[17];
|
|
uint32_t saveBLC_PWM_CTL;
|
|
uint32_t saveBLC_PWM_CTL2;
|
|
uint32_t saveFBC_CFB_BASE;
|
|
uint32_t saveFBC_LL_BASE;
|
|
uint32_t saveFBC_CONTROL2;
|
|
uint32_t saveFBC_CONTROL;
|
|
uint32_t saveFBC_FENCE_OFF;
|
|
uint32_t saveRENCLK_GATE_D1;
|
|
uint32_t saveRENCLK_GATE_D2;
|
|
uint32_t saveDSPCLK_GATE_D;
|
|
uint32_t saveRAMCLK_GATE_D;
|
|
uint32_t savePWRCTXA;
|
|
|
|
enum last_3d last_3d;
|
|
|
|
Bool use_drm_mode;
|
|
Bool kernel_exec_fencing;
|
|
|
|
/** Enables logging of debug output related to mode switching. */
|
|
Bool debug_modes;
|
|
unsigned int quirk_flag;
|
|
|
|
/** User option to print acceleration fallback info to the server log. */
|
|
Bool fallback_debug;
|
|
struct sdvo_device_mapping sdvo_mappings[2];
|
|
} I830Rec;
|
|
|
|
#define I830PTR(p) ((I830Ptr)((p)->driverPrivate))
|
|
|
|
#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
|
|
|
|
#define I830_SELECT_FRONT 0
|
|
#define I830_SELECT_BACK 1
|
|
#define I830_SELECT_DEPTH 2
|
|
#define I830_SELECT_THIRD 3
|
|
|
|
unsigned long intel_get_pixmap_offset(PixmapPtr pPix);
|
|
unsigned long intel_get_pixmap_pitch(PixmapPtr pPix);
|
|
|
|
/* Batchbuffer support macros and functions */
|
|
#include "i830_batchbuffer.h"
|
|
|
|
/* I830 specific functions */
|
|
extern int I830WaitLpRing(ScrnInfoPtr pScrn, int n, int timeout_millis);
|
|
extern void I830SetPIOAccess(I830Ptr pI830);
|
|
extern void I830SetMMIOAccess(I830Ptr pI830);
|
|
extern void I830Sync(ScrnInfoPtr pScrn);
|
|
extern void I830InitHWCursor(ScrnInfoPtr pScrn);
|
|
extern void I830SetPipeCursor (xf86CrtcPtr crtc, Bool force);
|
|
extern Bool I830CursorInit(ScreenPtr pScreen);
|
|
extern void IntelEmitInvarientState(ScrnInfoPtr pScrn);
|
|
extern void I830EmitInvarientState(ScrnInfoPtr pScrn);
|
|
extern void I915EmitInvarientState(ScrnInfoPtr pScrn);
|
|
extern Bool I830SelectBuffer(ScrnInfoPtr pScrn, int buffer);
|
|
void i830_update_cursor_offsets(ScrnInfoPtr pScrn);
|
|
|
|
/* CRTC-based cursor functions */
|
|
void
|
|
i830_crtc_load_cursor_image (xf86CrtcPtr crtc, unsigned char *src);
|
|
|
|
#ifdef ARGB_CURSOR
|
|
void
|
|
i830_crtc_load_cursor_argb (xf86CrtcPtr crtc, CARD32 *image);
|
|
#endif
|
|
|
|
void
|
|
i830_crtc_set_cursor_position (xf86CrtcPtr crtc, int x, int y);
|
|
|
|
void
|
|
i830_crtc_show_cursor (xf86CrtcPtr crtc);
|
|
|
|
void
|
|
i830_crtc_hide_cursor (xf86CrtcPtr crtc);
|
|
|
|
void
|
|
i830_crtc_set_cursor_colors (xf86CrtcPtr crtc, int bg, int fg);
|
|
|
|
extern void i830_refresh_ring(ScrnInfoPtr pScrn);
|
|
extern void I830EmitFlush(ScrnInfoPtr pScrn);
|
|
|
|
extern void I830InitVideo(ScreenPtr pScreen);
|
|
extern void i830_crtc_dpms_video(xf86CrtcPtr crtc, Bool on);
|
|
extern xf86CrtcPtr i830_covering_crtc (ScrnInfoPtr pScrn, BoxPtr box,
|
|
xf86CrtcPtr desired,
|
|
BoxPtr crtc_box_ret);
|
|
int
|
|
i830_crtc_pipe (xf86CrtcPtr crtc);
|
|
|
|
extern xf86CrtcPtr i830_pipe_to_crtc(ScrnInfoPtr pScrn, int pipe);
|
|
|
|
Bool
|
|
i830_pipe_a_require_activate (ScrnInfoPtr scrn);
|
|
|
|
void
|
|
i830_pipe_a_require_deactivate (ScrnInfoPtr scrn);
|
|
|
|
Bool I830DRI2ScreenInit(ScreenPtr pScreen);
|
|
void I830DRI2CloseScreen(ScreenPtr pScreen);
|
|
|
|
extern Bool drmmode_pre_init(ScrnInfoPtr pScrn, int fd, int cpp);
|
|
extern int drmmode_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, xf86CrtcPtr crtc);
|
|
extern int drmmode_output_dpms_status(xf86OutputPtr output);
|
|
|
|
extern Bool i830_crtc_on(xf86CrtcPtr crtc);
|
|
extern int i830_crtc_to_pipe(xf86CrtcPtr crtc);
|
|
extern Bool I830AccelInit(ScreenPtr pScreen);
|
|
extern void I830SetupForScreenToScreenCopy(ScrnInfoPtr pScrn, int xdir,
|
|
int ydir, int rop,
|
|
unsigned int planemask,
|
|
int trans_color);
|
|
extern void I830SubsequentScreenToScreenCopy(ScrnInfoPtr pScrn, int srcX,
|
|
int srcY, int dstX, int dstY,
|
|
int w, int h);
|
|
extern void I830SetupForSolidFill(ScrnInfoPtr pScrn, int color, int rop,
|
|
unsigned int planemask);
|
|
extern void I830SubsequentSolidFillRect(ScrnInfoPtr pScrn, int x, int y,
|
|
int w, int h);
|
|
|
|
Bool i830_allocator_init(ScrnInfoPtr pScrn, unsigned long size);
|
|
void i830_allocator_fini(ScrnInfoPtr pScrn);
|
|
i830_memory * i830_allocate_memory(ScrnInfoPtr pScrn, const char *name,
|
|
unsigned long size, unsigned long pitch,
|
|
unsigned long alignment, int flags,
|
|
enum tile_format tile_format);
|
|
void i830_describe_allocations(ScrnInfoPtr pScrn, int verbosity,
|
|
const char *prefix);
|
|
void i830_reset_allocations(ScrnInfoPtr pScrn);
|
|
void i830_free_3d_memory(ScrnInfoPtr pScrn);
|
|
void i830_free_memory(ScrnInfoPtr pScrn, i830_memory *mem);
|
|
extern long I830CheckAvailableMemory(ScrnInfoPtr pScrn);
|
|
Bool i830_allocate_2d_memory(ScrnInfoPtr pScrn);
|
|
Bool i830_allocate_pwrctx(ScrnInfoPtr pScrn);
|
|
Bool i830_allocate_3d_memory(ScrnInfoPtr pScrn);
|
|
void i830_init_bufmgr(ScrnInfoPtr pScrn);
|
|
#ifdef INTEL_XVMC
|
|
Bool i830_allocate_xvmc_buffer(ScrnInfoPtr pScrn, const char *name,
|
|
i830_memory **buffer, unsigned long size, int flags);
|
|
void i830_free_xvmc_buffer(ScrnInfoPtr pScrn, i830_memory *buffer);
|
|
#endif
|
|
extern uint32_t i830_create_new_fb(ScrnInfoPtr pScrn, int width, int height,
|
|
int *pitch);
|
|
|
|
Bool
|
|
i830_tiled_width(I830Ptr i830, int *width, int cpp);
|
|
|
|
int
|
|
i830_pad_drawable_width(int width, int cpp);
|
|
|
|
|
|
extern Bool I830I2CInit(ScrnInfoPtr pScrn, I2CBusPtr *bus_ptr, int i2c_reg,
|
|
char *name);
|
|
|
|
/* i830_display.c */
|
|
Bool
|
|
i830PipeHasType (xf86CrtcPtr crtc, int type);
|
|
|
|
/* i830_crt.c */
|
|
void i830_crt_init(ScrnInfoPtr pScrn);
|
|
|
|
/* i830_dvo.c */
|
|
void i830_dvo_init(ScrnInfoPtr pScrn);
|
|
|
|
/* i830_hdmi.c */
|
|
void i830_hdmi_init(ScrnInfoPtr pScrn, int output_reg);
|
|
|
|
/* i830_lvds.c */
|
|
void i830_lvds_init(ScrnInfoPtr pScrn);
|
|
|
|
/* i830_memory.c */
|
|
Bool i830_bind_all_memory(ScrnInfoPtr pScrn);
|
|
Bool i830_unbind_all_memory(ScrnInfoPtr pScrn);
|
|
unsigned long i830_get_fence_size(I830Ptr pI830, unsigned long size);
|
|
unsigned long i830_get_fence_pitch(I830Ptr pI830, unsigned long pitch, int format);
|
|
void i830_set_max_gtt_map_size(ScrnInfoPtr pScrn);
|
|
|
|
Bool I830BindAGPMemory(ScrnInfoPtr pScrn);
|
|
Bool I830UnbindAGPMemory(ScrnInfoPtr pScrn);
|
|
|
|
i830_memory *
|
|
i830_allocate_framebuffer(ScrnInfoPtr pScrn);
|
|
|
|
/* i830_modes.c */
|
|
DisplayModePtr i830_ddc_get_modes(xf86OutputPtr output);
|
|
|
|
/* i830_tv.c */
|
|
void i830_tv_init(ScrnInfoPtr pScrn);
|
|
|
|
/* i830_render.c */
|
|
Bool i830_check_composite(int op, PicturePtr pSrc, PicturePtr pMask,
|
|
PicturePtr pDst);
|
|
Bool i830_prepare_composite(int op, PicturePtr pSrc, PicturePtr pMask,
|
|
PicturePtr pDst, PixmapPtr pSrcPixmap,
|
|
PixmapPtr pMaskPixmap, PixmapPtr pDstPixmap);
|
|
Bool
|
|
i830_transform_is_affine (PictTransformPtr t);
|
|
|
|
void i830_composite(PixmapPtr pDst, int srcX, int srcY,
|
|
int maskX, int maskY, int dstX, int dstY, int w, int h);
|
|
void i830_emit_composite_primitive(PixmapPtr pDst, int srcX, int srcY,
|
|
int maskX, int maskY, int dstX, int dstY,
|
|
int w, int h);
|
|
void i830_done_composite(PixmapPtr pDst);
|
|
/* i915_render.c */
|
|
Bool i915_check_composite(int op, PicturePtr pSrc, PicturePtr pMask,
|
|
PicturePtr pDst);
|
|
Bool i915_prepare_composite(int op, PicturePtr pSrc, PicturePtr pMask,
|
|
PicturePtr pDst, PixmapPtr pSrcPixmap,
|
|
PixmapPtr pMaskPixmap, PixmapPtr pDstPixmap);
|
|
void i915_composite(PixmapPtr pDst, int srcX, int srcY,
|
|
int maskX, int maskY, int dstX, int dstY, int w, int h);
|
|
void i915_batch_flush_notify(ScrnInfoPtr pScrn);
|
|
void i830_batch_flush_notify(ScrnInfoPtr scrn);
|
|
/* i965_render.c */
|
|
unsigned int gen4_render_state_size(ScrnInfoPtr pScrn);
|
|
void gen4_render_state_init(ScrnInfoPtr pScrn);
|
|
void gen4_render_state_cleanup(ScrnInfoPtr pScrn);
|
|
Bool i965_check_composite(int op, PicturePtr pSrc, PicturePtr pMask,
|
|
PicturePtr pDst);
|
|
Bool i965_prepare_composite(int op, PicturePtr pSrc, PicturePtr pMask,
|
|
PicturePtr pDst, PixmapPtr pSrcPixmap,
|
|
PixmapPtr pMaskPixmap, PixmapPtr pDstPixmap);
|
|
void i965_composite(PixmapPtr pDst, int srcX, int srcY,
|
|
int maskX, int maskY, int dstX, int dstY, int w, int h);
|
|
|
|
void
|
|
i965_batch_flush_notify(ScrnInfoPtr pScrn);
|
|
|
|
Bool
|
|
i830_get_transformed_coordinates(int x, int y, PictTransformPtr transform,
|
|
float *x_out, float *y_out);
|
|
|
|
Bool
|
|
i830_get_transformed_coordinates_3d(int x, int y, PictTransformPtr transform,
|
|
float *x_out, float *y_out, float *z_out);
|
|
|
|
void i830_enter_render(ScrnInfoPtr);
|
|
|
|
static inline void
|
|
i830_wait_ring_idle(ScrnInfoPtr pScrn)
|
|
{
|
|
I830Ptr pI830 = I830PTR(pScrn);
|
|
|
|
I830WaitLpRing(pScrn, pI830->ring.mem->size - 8, 0);
|
|
}
|
|
|
|
static inline int i830_fb_compression_supported(I830Ptr pI830)
|
|
{
|
|
if (!IS_MOBILE(pI830))
|
|
return FALSE;
|
|
if (IS_I810(pI830) || IS_I815(pI830) || IS_I830(pI830))
|
|
return FALSE;
|
|
if (IS_IGD(pI830))
|
|
return FALSE;
|
|
if (IS_IGDNG(pI830))
|
|
return FALSE;
|
|
/* fbc depends on tiled surface.
|
|
*/
|
|
if (!pI830->tiling)
|
|
return FALSE;
|
|
/* We have not gotten FBC to work consistently on 965GM. Our best
|
|
* working theory right now is that FBC simply isn't reliable on
|
|
* that device. See this bug report for more details:
|
|
* https://bugs.freedesktop.org/show_bug.cgi?id=16257
|
|
*/
|
|
if (IS_I965GM(pI830))
|
|
return FALSE;
|
|
return TRUE;
|
|
}
|
|
|
|
#define I830FALLBACK(s, arg...) \
|
|
do { \
|
|
if (I830PTR(pScrn)->fallback_debug) { \
|
|
xf86DrvMsg(pScrn->scrnIndex, X_INFO, \
|
|
"fallback: " s "\n", ##arg); \
|
|
} \
|
|
return FALSE; \
|
|
} while(0)
|
|
|
|
Bool i830_pixmap_tiled(PixmapPtr p);
|
|
|
|
#define i830_exa_check_pitch_2d(p) do {\
|
|
uint32_t pitch = intel_get_pixmap_pitch(p);\
|
|
if (pitch > KB(32)) I830FALLBACK("pitch exceeds 2d limit 32K\n");\
|
|
} while(0)
|
|
|
|
/* For pre-965 chip only, as they have 8KB limit for 3D */
|
|
#define i830_exa_check_pitch_3d(p) do {\
|
|
uint32_t pitch = intel_get_pixmap_pitch(p);\
|
|
if (pitch > KB(8)) I830FALLBACK("pitch exceeds 3d limit 8K\n");\
|
|
} while(0)
|
|
|
|
/**
|
|
* Little wrapper around drm_intel_bo_reloc to return the initial value you
|
|
* should stuff into the relocation entry.
|
|
*
|
|
* If only we'd done this before settling on the library API.
|
|
*/
|
|
static inline uint32_t
|
|
intel_emit_reloc(drm_intel_bo *bo, uint32_t offset,
|
|
drm_intel_bo *target_bo, uint32_t target_offset,
|
|
uint32_t read_domains, uint32_t write_domain)
|
|
{
|
|
drm_intel_bo_emit_reloc(bo, offset, target_bo, target_offset,
|
|
read_domains, write_domain);
|
|
|
|
return target_bo->offset + target_offset;
|
|
}
|
|
|
|
static inline drm_intel_bo *
|
|
intel_bo_alloc_for_data(ScrnInfoPtr scrn, void *data, unsigned int size,
|
|
char *name)
|
|
{
|
|
I830Ptr pI830 = I830PTR(scrn);
|
|
drm_intel_bo *bo;
|
|
|
|
bo = drm_intel_bo_alloc(pI830->bufmgr, name, size, 4096);
|
|
if (!bo)
|
|
return NULL;
|
|
drm_intel_bo_subdata(bo, 0, size, data);
|
|
|
|
return bo;
|
|
}
|
|
|
|
extern const int I830PatternROP[16];
|
|
extern const int I830CopyROP[16];
|
|
|
|
/* Flags for memory allocation function */
|
|
#define NEED_PHYSICAL_ADDR 0x00000001
|
|
#define ALIGN_BOTH_ENDS 0x00000002
|
|
#define NEED_NON_STOLEN 0x00000004
|
|
#define NEED_LIFETIME_FIXED 0x00000008
|
|
#define ALLOW_SHARING 0x00000010
|
|
#define DISABLE_REUSE 0x00000020
|
|
|
|
/* Chipset registers for VIDEO BIOS memory RW access */
|
|
#define _855_DRAM_RW_CONTROL 0x58
|
|
#define _845_DRAM_RW_CONTROL 0x90
|
|
#define DRAM_WRITE 0x33330000
|
|
|
|
/* quirk flag definition */
|
|
#define QUIRK_IGNORE_TV 0x00000001
|
|
#define QUIRK_IGNORE_LVDS 0x00000002
|
|
#define QUIRK_IGNORE_MACMINI_LVDS 0x00000004
|
|
#define QUIRK_PIPEA_FORCE 0x00000008
|
|
#define QUIRK_IVCH_NEED_DVOB 0x00000010
|
|
#define QUIRK_RESET_MODES 0x00000020
|
|
#define QUIRK_PFIT_SAFE 0x00000040
|
|
#define QUIRK_IGNORE_CRT 0x00000080
|
|
#define QUIRK_BROKEN_ACPI_LID 0x00000100
|
|
extern void i830_fixup_devices(ScrnInfoPtr);
|
|
|
|
/**
|
|
* Hints to CreatePixmap to tell the driver how the pixmap is going to be
|
|
* used.
|
|
*
|
|
* Compare to CREATE_PIXMAP_USAGE_* in the server.
|
|
*/
|
|
enum {
|
|
INTEL_CREATE_PIXMAP_TILING_X = 0x10000000,
|
|
INTEL_CREATE_PIXMAP_TILING_Y,
|
|
};
|
|
|
|
#if (ALWAYS_FLUSH | ALWAYS_SYNC)
|
|
void
|
|
i830_debug_sync(ScrnInfoPtr scrn);
|
|
#else
|
|
static inline void
|
|
i830_debug_sync(ScrnInfoPtr scrn)
|
|
{
|
|
}
|
|
#endif
|
|
|
|
static inline PixmapPtr
|
|
get_drawable_pixmap(DrawablePtr drawable)
|
|
{
|
|
ScreenPtr screen = drawable->pScreen;
|
|
|
|
if (drawable->type == DRAWABLE_PIXMAP)
|
|
return (PixmapPtr)drawable;
|
|
else
|
|
return screen->GetWindowPixmap((WindowPtr)drawable);
|
|
}
|
|
|
|
static inline Bool
|
|
pixmap_is_scanout(PixmapPtr pixmap)
|
|
{
|
|
ScreenPtr screen = pixmap->drawable.pScreen;
|
|
|
|
return pixmap == screen->GetScreenPixmap(screen);
|
|
}
|
|
|
|
#endif /* _I830_H_ */
|