Commit Graph

3029 Commits

Author SHA1 Message Date
Chris Wilson 00a2aee38d Remove unused I830Output
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-08 19:46:36 +00:00
Chris Wilson a851879695 Remove bitrotted, but fortunately unused, I830CrtcPrivate
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-08 19:46:36 +00:00
Chris Wilson f8a5d7737e Delete some dead code
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-08 19:46:36 +00:00
Chris Wilson 968151898b Remove unused GTT/Map sizes and addresses
These have been made obsolete by KMS and GEM.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-08 19:46:36 +00:00
Chris Wilson 19b5817a54 Remove unused struct _intel_memory definition
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-08 19:46:36 +00:00
Chris Wilson 22d7b61791 i965: Fix off-by-one in assert
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-04 12:32:01 +00:00
Chris Wilson 6d50f5a140 If the crtc is not enabled, then it can't be on
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-03 23:06:14 +00:00
Adam Jackson 145c42a101 dri2: Fix interlace computation
scrn->currentMode is a hack for xf86vidmode and in general is wrong for
RANDRful drivers.  Use the mode on the associated CRTC instead.

Signed-off-by: Adam Jackson <ajax@redhat.com>
[ickle: crtc->mode is a ModeRec not Ptr]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-03 23:04:13 +00:00
Adam Jackson b0d10ff04a xv: Fix interlace computation
scrn->currentMode is a hack for xf86vidmode and in general is wrong for
RANDRful drivers.  Use the mode on the associated CRTC instead.

Signed-off-by: Adam Jackson <ajax@redhat.com>
[ickle: crtc->mode is a ModeRec]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-03 23:02:49 +00:00
Chris Wilson 0ad6d6e1a6 dri: Only issue a warning for an "impossible" flip return 5 times
As it appears that some kernels do indeed return the "wrong" value,
issuing a warning 60 times a second is a cruel and unusual punishment.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=32680
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-03 16:54:31 +00:00
Chris Wilson d729ef02f2 dri: Don't wait upon a NULL current mode
There is a race condition between the dri swapbuffers code and
hotplugging whereby we might attempt to execute a wait upon a
non-existent output. This causes a NULL dereference and a loud crash.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=32770
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-02 09:11:10 +00:00
Chris Wilson 537fa55ed2 dri: Fix the use of the uninitialised bo for flink
Reported-by: Jeff Chua <jeff.chua.linux@gmail.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-02 09:06:28 +00:00
Chris Wilson dbc542b9d3 dri: Protect against using dri with an non-gem pixmap
Reported-by: Jeff Chua <jeff.chua.linux@gmail.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-31 23:29:31 +00:00
Chris Wilson 53fbc9f176 Don't replace the scanout bo through PutImage
As the bo may be pinned for either use by the scanout or through sharing
with another application, under those circumstances we cannot replace
the bo itself but must force the blit for PutImage.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31367
Reported-and-tested-by: Bjørn Mork <bjorn@mork.no>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-30 16:48:52 +00:00
Chris Wilson 7667ad8432 dri: Differentiate identical "get vblank failed" messages with line no
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-24 09:42:29 +00:00
Chris Wilson 875d482835 i830: amalgamate consecutive composites into a single primitive
Improve aa10text on i845 from 218kglyphs/s to 234kglyphs/s

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-23 19:42:19 +00:00
Chris Wilson 58d9912e44 Remove the deprecated function 'XNFprintf'
As we know the maximum length of the string, we can replace our single
usage of XNFprintf with snprintf.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-22 13:50:53 +00:00
Chris Wilson 1ac2e04023 Undo: Disable BLT for i830 and 845G
Reported-by: György Balló  <ballogy@freestart.hu>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=32482
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-20 10:59:28 +00:00
Chris Wilson 6f21405454 G35 is gen4 and not gen3
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=32478
Reported-and-tested-by: Michal Marek <mmarek@suse.cz>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-20 10:49:42 +00:00
Mario Kleiner 5743c22387 Check consistency of pageflip completion vblank count.
Implements a consistency check on returned vblank
count values of pageflip completion. Impossible
values are detected, a x-warning is logged and
returned (msc,ust) values are marked invalid,
so clients could perform error handling. Such
a warning would indicate bugs in the pageflip
completion routine of future kms drivers or the
ddx and thereby aid driver debugging.

Signed-off-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-16 11:42:43 +00:00
Mario Kleiner 2177e60321 Fix reporting of pageflip completion events on multi-head.
When a drawable is page-flipped on multiple crtc's (fullscreen
drawable on mirror-mode or multi-head x-screen), only one pageflip
event is finally delivered, after the last participating crtc signals
flip completion, this to avoid visual corruption.

Old code returned vblank count and timestamps of flip completion
of this last crtc, instead of the values of the "master crtc", the
one that was used for initially scheduling/triggering the pagflip
via vblank events. (master = I830DRI2DrawablePipe(drawable))

This patch makes sure that the pageflip completion values of the
"master" crtc are returned, otherwise client applications will
get confused by the random (msc, ust) values returned by whichever
crtc was the last to complete its flip. Without this, the returned
values change randomly and jump forward and backward in time and
count.

Signed-off-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-16 11:42:43 +00:00
Chris Wilson 9b967807c2 Revert "i965: The RenderCache flush after every glyph is required for compiz"
This reverts commit 03e8351179.

* sigh.

This was only meant to be a temporary debugging hack, not for public
consumption (or embarrassment).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-07 20:47:17 +00:00
Chris Wilson 27e33928f8 i965: Mark sure we mark reused render targets as dirty
... or else we may forget to flush them again.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-07 20:43:22 +00:00
Chris Wilson 03e8351179 i965: The RenderCache flush after every glyph is required for compiz
... now who can explain why.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-07 19:27:57 +00:00
Chris Wilson d90c8f4d0b i965: Invalidate pixmap binding location on reuse.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-07 19:22:30 +00:00
Chris Wilson 4a186a6123 Always flush the batch before blocking for new X requests
This should prevent any lag when waiting upon user input, for example
whilst logging in with gdm.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-07 16:56:57 +00:00
Chris Wilson 00c204a7b2 snb: Only emit CC and DepthStencil bos once per batch
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-06 16:34:52 +00:00
Chris Wilson 084ae43110 snb: Restore drawrect, we need the implicit flush
Something is wrong, we should be tracking when to invalidate the caches
as appropriate, yet I can not finding the missing flush to replace the
implicit one of DRAW_RECTANGLE.

Fixes cacomposite.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-06 15:59:29 +00:00
Chris Wilson f3a47d7f23 snb: Cache pixmap binding locations
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-06 14:21:06 +00:00
Chris Wilson 4d48fed9aa snb: Cache state between composite ops
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-06 14:21:06 +00:00
Chris Wilson a58e5a1bdf snb: Emit more invariants only once
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-06 14:21:05 +00:00
Chris Wilson e8f41c3710 uxa: Prevent reading past the last byte on upload/download
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=29752
Reported-by: Sergey Samokhin <prikrutil@gmail.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05 22:36:21 +00:00
Matthias Hopf c2fac6ca10 Don't use hardware acceleration on Sandybridge rev 07 hardware or earlier.
This is known to lock up the GPU even with the workaround in place.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31773
Signed-off-by: Matthias Hopf <mhopf@suse.de>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05 11:42:33 +00:00
Chris Wilson 8abade8a21 display: Flush any pending batches before changing modes.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05 09:57:52 +00:00
Chris Wilson 8450aba6c7 i965: Also flush the vertex buffer when restarting the array.
As a corollary to filling one vertex array and beginning a new one is
remembering to emit the old one before overwriting...

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05 01:08:51 +00:00
Chris Wilson f40f8bcf07 i965: Check for potential vertex array overflow every time
There was a reason why we need to check at the start of every composite
operation to see if we have enough space in the array to fit the
vertices, which I promptly forgot when moving the code around to make
it look pretty.

* sigh.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05 00:28:11 +00:00
Chris Wilson 55c5f1876e Wait on the current buffer to complete when running synchronously.
And remove the vestigal wait upon changing crtc as this is more properly
done in the kernel.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-03 14:05:30 +00:00
Chris Wilson 3cc74044ce i965: Amalgamate surface binding tables
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-03 14:05:30 +00:00
Chris Wilson a1fa0dbfda i965: Upload an entire vbo in a single pwrite, rather than per-rectangle
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-03 14:05:30 +00:00
Chris Wilson 23437fe676 i965: Use reciprocal scale factors to avoid the divide per-vertex-element
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-03 01:16:16 +00:00
Chris Wilson 0bb135c40e Disable BLT for i830 and 845G
This pair of chipsets seem broken beyond repair, specifically the
erratum that causes the wrong PTE entry to be invalidated, so disable
our incorrect attempts to use the BLT on those devices.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23 22:29:52 +00:00
Keith Packard 33c08882c0 Mark outputs as DPMSModeOn and restore backlight at mode set
The kernel always turns monitors on when doing mode setting, and so no
further DPMS action is required. Note this in the mode setting code by
marking the updated DPMS mode and restoring any saved backlight level.

Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2010-11-17 16:40:47 +08:00
Chris Wilson cc930a3761 uxa: Relax fencing some more for gen3
Allow fenced allocations even for small pixmaps if the kernel supports
relaxing fencing (where only the used pages are allocated).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-14 19:47:00 +00:00
Chris Wilson 3c5b1399e2 i915: Disable maximum state addresses
As the kernel controls the relocation of state buffers, we should not
hard code the maximum permissible value for them.

Fixes an eventual hang with full-gtt.

Reported-by: Peter Clifton <pcjc2@cam.ac.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-09 20:20:06 +00:00
Chris Wilson a44a63d2ff Wait for any pending rendering before switching modes.
A perennial problem we have is the accursed WAIT_FOR_EVENT hangs, which
occur when we switch the framebuffer before the WAIT_FOR_EVENT completes
and upsets the GPU.

We have tried more subtle approaches to detected these and fix them up in
the kernel, to no avail. What we need to do is to delay the framebuffer
flip until the WAIT completes, which is quite tricky in the kernel
without new ioctls and round-trips. Instead, apply the big hammer from
userspace and synchronise all rendering before changing the framebuffer.
I expect this not to cause noticeable latency on switching modes (far
less than the actual modeswitch) and should stop these hangs once and
for all.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31401 (...)
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-05 10:07:46 +00:00
Chris Wilson 52b32436b9 Downgrade tiling allocation failure to a warning
We emitted this message as an error even though we fallback and attempt
to allocate a non-tiled framebuffer before failing (with an appropriate
error message).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-03 19:46:11 +00:00
Chris Wilson 18839aaec5 Fallback to shadow for Sandybridge if we don't have access to the BLT
If we attempt to emit BLT batches without kernel support, we just end up
with EINVAL and no rendering. Prevent this, and avoid uncached
rendering, by restoring the shadow fallback paths if there is no BLT
support.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-03 18:17:17 +00:00
Eric Anholt 8ff37667bf Remove the intermittent GEM_THROTTLE call.
This is a holdover from early GEM work when we weren't syncing on the
DRI client side.  It would keep clients from getting too far ahead and
killing their interactivity, by bringing everyone to a halt when
anyone was too far ahead.

Now, GL clients throttle themselves to avoid the problem, and it turns
out that in the case that they don't (long rendering to buffers with
no swap), this actually reduces X Server interactivity: instead of
lagging of X rendering behind input, you get no response for seconds
at a time, then a burst of rendering, then nothing again.

Reported by ajax.  Tested with moving a window while running
cairo-perf-trace on the GL backend (improvement) and X backend (no
significant change in responsiveness).
2010-11-02 10:58:46 -07:00
Xiang, Haihao 540c574218 render: use headerless render target write
It is weird that some rendercheck cases only work fine with headerless write.
Need to update intel-gen4asm to support headerless write

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-11-02 14:28:55 +08:00
Xiang, Haihao 7a3109312e render: acceleration for composite on Sandybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-11-02 14:28:55 +08:00