Fixes regression from commit c51aaa731e
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Thu Oct 11 11:36:00 2012 +0100
sna/gen7: Replace bogus state tracking assertion
The assumption being that we only used the encoded flags for determining
the composite state is false for the magic CA pass.
Reported-by: Oleksij Rempel <bug-track@fisher-privat.net>
Reported-by: Eyal Lotem <eyal.lotem@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=56037
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
The only path where this is correct already handles it as the special
case that it is, everywhere else it just nonsense.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
As the maximum reported image sizes are for the source image, we should
be careful not to recommend the application use an output Window larger
than can be handled by the overlay hardware. So shrink it to fit, whilst
preserving the aspect ratio.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Libdrm's possible_clones is a mask of encoders. Xorg's possible_clones
is a mask of outputs, so we just can't do the following:
output->possible_clones = kencoder->possible_clones;
This is a problem on Haswell because, at least with the current
patches floating on the mailing list, there is more than one connector
per encoder.
This patch writes the code to properly translate libdrm's encoder mask
into Xorg's output mask.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
If we are forced to use the GPU bo as the target because the CPU bo is
busy, the priv->cpu flag is likely to remain set, so we need to clear it
rather than fail the assertion that is false.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Since pre-g33 chipsets impose massive alignment restrictions on objects
within the aperture we need to further restrict the amount of available
space to be sure we have sufficient room to accommodate the alignment.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This helps with fitting larger operations into the small apertures of
gen2, which due to the lax accounting could trigger ENOSPC.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
While playing with MPX and sw cursor I noticed page flips won't
end up misrendering some bits, so the sw cursor was replacing the
bits on the wrong pixmap.
Fix the damage handling to be correct and append damage before swapping
the pointers and process damage after.
This fixes misrendering with MPX cursors under a fullscreen compositor,
that pageflips.
Signed-off-by: Dave Airlie <airlied@redhat.com>
[ickle: The secret is that damage is sometimes reported before the
rendering in DamageRegionAppend, and sometimes afterwards in
DamageRegionProcessPending. For instance, the software cursor operates
prior to being rendered over.]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
In case we need to redirect the rendering for a large render target, we
need to initialize the damage pointer.
Reported-by: Clemens Eisserer <linuxhippy@gmail.com>
Bugzilla: ttps://bugs.freedesktop.org/show_bug.cgi?id=55812
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reported-by: Clemens Eisserer <linuxhippy@gmail.com>
Bugzilla: ttps://bugs.freedesktop.org/show_bug.cgi?id=55812
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
When is a pipelined operation, not pipelined? That is the mystery posed
by our hardware!
Reported-by: Clemens Eisserer <linuxhippy@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=51422
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
As we use pkg-config to determine whether to use intel-gen4asm, we
should also use it to locate the right version of intel-gen4asm to use.
This allows the user to install the assembler in a non-standard path for
cross-builds and similar.
Reported-by: Josh Tripplet <josh@freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55646
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Otherwise we notice that we have a CPU mmap during read synchronized and
presume that we need not take any further action. However...
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
The make rules to compile shaders with intel-gen4asm referenced the .g4a
source files without using $(srcdir), which broke out-of-tree builds.
Reference .g4a source files via $(srcdir), and add $(srcdir) to m4's
include path, fixing out-of-tree builds.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55645
Signed-off-by: Josh Triplett <josh@joshtriplett.org>
Revert back to basics, and clear the CPU flag everytime we use the GPU,
rather than try to avoid clearing it along some paths.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
I thought these were completely specified via the LOAD_STATE_IMMEDIATE
commands we used whilst seting up the render pipeline. I was wrong.
Reported-by: Timo Kamph <timo@kamph.org>
References: https://bugs.freedesktop.org/show_bug.cgi?id=55455
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
So that we keep the assertion checks that without CPU damage we can not
be on the cpu.
Reported-by: Clemens Eisserer <linuxhippy@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55591
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
As we need to clflush the scanout buffer as we return it to the bo cache
on SNB+, it is costly to terminate the pageflipping as soon as we drop a
frame as mesa often fails to keep up to the vrefresh rate.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson
Paulo Zanoni
Dave Airlie
Josh Triplett