63bf48481d
Correct typo in mac mini hack, and return modes when the hack is unnecessary.
2006-12-12 22:42:41 -08:00
41444183b5
Replace custom, partially broken DPMS implementation with a generic one.
2006-12-12 18:08:57 -08:00
7ed1b05922
Fix mac mini SDVO output: write the SDVO[BC] enabled register state twice.
2006-12-12 16:03:52 -08:00
9776f6c68b
Flush the plane changes in i830_crtc_dpms()
...
Otherwise, the changes may not have taken effect.
2006-12-12 16:02:47 -08:00
54823ac39c
Move the SDVO sync detection to after we've turned the port on.
2006-12-12 14:55:10 -08:00
ec45d72743
Extend the error state reporting to cover ESR and decode PGTBL_ERR for 945.
2006-12-12 14:55:10 -08:00
838af10b85
Move PrintErrorState and CheckInheritedErrors code to i830_debug.c.
2006-12-12 14:55:10 -08:00
668ae6ce3c
Set the SDVO port to on before sending the SDVO output on command.
2006-12-12 14:55:10 -08:00
91a538bead
More debugging output for SDVO.
2006-12-12 14:55:10 -08:00
ce54538b90
Add a hack for DDC on my Mac Mini.
2006-12-12 14:55:10 -08:00
c8c1fb64cc
Move the overlay mode switch status updates to when we enable/disable crtcs.
...
This should help if we mode switch with randr during video playback, and also
simplifies the code by moving the protection all to one place.
2006-12-11 16:02:29 -08:00
3f3791ba2e
Remove remnants of old savedCurrentMode hack. Man, that was gross.
2006-12-11 15:20:15 -08:00
c21baa5a30
Remove dead remnants of old clone mode support.
2006-12-11 15:15:01 -08:00
b3865f3466
Include i830.h to get M_T_* compat defines for older X Servers.
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Not duplicating the defines ensures that we won't let the compat bits slip
into the X Server when we move this code over there.
2006-12-11 14:46:56 -08:00
24d9521c7a
Add error messages for previous silent DRI initialization failures.
2006-12-11 14:46:55 -08:00
fde52de870
Merge branch 'modesetting-origin' into modesetting
2006-12-06 23:40:13 -08:00
7dbe6c378d
Move vga restore to end of RestoreHWState.
...
I was having consistent system lockups when the vga restore
was first. Moving it to the end has reduced them to an infrequent
occurrence (but, alas, it has happened once since). This does not
make me happy.
2006-12-06 23:39:14 -08:00
28c7002b1c
Use DOUBLE_WIDE mode on all hardware.
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DOUBLE_WIDE mode is needed when the pixel clock is > 90% of the core
clock rate. The code guesses what the core clock rate is based on
the bus (AGP -> 133MHz, PCI-E -> 200MHz).
2006-12-06 23:35:15 -08:00
85de8a0580
Include render.h to get SubPixelUnknown define.
2006-12-06 20:26:53 -08:00
182d2f503a
Merge branch 'modesetting-origin' into modesetting
2006-12-06 17:18:58 -08:00
6777d8044d
Harmless warning fix.
2006-12-06 17:10:06 -08:00
c6ce8a3c33
Reduce dumpregs to X startup, after a mode set, and LeaveVT.
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While here, remove some other register dumping that is better done by
i830DumpRegs().
2006-12-06 17:08:30 -08:00
b23dec37b2
Save/restore registers around calls in PreInit with register side-effects.
2006-12-06 17:08:30 -08:00
d3c21c09e3
Remove stale i830_tv_pre_set_mode. Replaced by generic dpms hook call.
...
Also replaced by not spamming unrelated ADPA register. At least, it had sure
better not be related.
2006-12-06 17:08:30 -08:00
9c3e733aaa
Save/restore more TV registers.
2006-12-06 17:08:30 -08:00
d5ec9d2160
Cannot modify DPLL register in output mode_set function.
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DPLL register contains clock setup, so it cannot be written
from the output mode_set function or 'bad things' happen.
2006-12-06 14:44:40 -08:00
5d345c13a9
Clean up SDVO multiplier debug output
2006-12-06 13:19:58 -08:00
6ee63364f5
Merge branch 'modesetting' into nonrandr-setup
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Also, fix buffer overflow in i830_debug.c
2006-12-06 12:53:22 -08:00
b75ecdb483
Merge branch 'generic-mode-set' into modesetting
2006-12-06 11:59:33 -08:00
b3bb10e33e
Fix LVDS: Don't change bits in LVDS other than port enable/pipe select.
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This behavior matches what we did before when LVDS worked.
2006-12-06 11:53:40 -08:00
47d07b1073
More LVDS fixed mode fixing: use the EDID DTD's blank length.
2006-12-06 10:56:38 -08:00
727bf1cbf7
Add missing newlines to new debug output.
2006-12-06 10:12:49 -08:00
236c53be5d
Fix LVDS fixed mode code after generic-mode-set.
2006-12-06 10:10:27 -08:00
1cb6311c11
fix typo in checking xf86CrtcScreenInit return
2006-12-06 16:31:00 +08:00
56f7119415
Use xf86 structures for default config instead of RandR.
...
To avoid requiring RandR 1.2 in the X server, use the
xf86 Crtc and Output structures as the basis for the default configuration
computation (and, eventually, the config-file based configuration as well).
2006-12-06 00:13:57 -08:00
ffd8aacbe7
new server APIs are not in server-1.2 (version 7.1.99.2)
2006-12-05 19:48:39 -08:00
a736496114
Capture VGA registers sooner so checks are more informative
2006-12-05 19:47:04 -08:00
62fba80d3e
fix up misleading comment in i830_crt.c about border register
2006-12-05 19:43:41 -08:00
1d94ec7de3
Fix ordering of PIPE[AB]SRC debug output to be (x, y).
2006-12-05 18:22:59 -08:00
eee23fdd0d
Fix copy'n'paste-o of the ordering of h/v fields in DSP[AB]SIZE.
2006-12-05 18:19:49 -08:00
58c247c6de
Merge branch 'modesetting-origin' into modesetting
...
Conflicts:
src/i830_display.c
2006-12-05 15:28:21 -08:00
0b4c3e7bff
Add a bunch of per-register debug code to i830DumpRegs().
2006-12-05 15:03:48 -08:00
7844e576e7
Move reg dump from i830PipeSetMode to after we set up the modes with RandR.
2006-12-05 14:39:24 -08:00
e777d38ce9
WIP code to move mode set sequencing to XFree86 handlers.
...
It compiles. It definitely doesn't run.
2006-12-05 12:15:34 -08:00
2e8c927f93
Re-create RandR Crtc/output structures on server regen.
...
RandR structures must be re-created when the server reinitializes,
but the driver PreInit function is not re-invoked. Recreate them
manually in this case during ScreenInit.
2006-12-04 14:02:30 -08:00
677c454469
Merge branch 'modesetting-origin' into modesetting
2006-12-02 23:28:38 -08:00
8fcf9a8117
DOUBLE_WIDE mode for high pixel clock 8xx. Rewrite PLL search.
...
High pixel clock modes on pipe A of an 8xx chip require
DOUBLE_WIDE mode. It's supposed to be modes > 180MHz or so,
but the board I have requires DOUBLE_WIDE mode for clocks > 108MHz
or so. The limit is related to the core clock speed of the chip, which
can be found indirectly through PCI config space. None of the possible
values explain why this board needs this mode for these relatively low
clock rates though.
Also, create tables of data for the PLL computation and use them
instead of code. I think it's cleaner looking. It is also untested on
9xx. It'll work. Really.
2006-12-02 22:58:31 -08:00
81dde11d41
Fix copy'n'paste-o from restructure-outputs that resulted in crashes.
...
Our driver private is stored in the bus that we set up, not the DDC device
that xf86 code does.
2006-12-01 13:29:08 -08:00
a504e31f0f
Don't try to write the read-only PP_STATUS register.
...
Also, don't bother reading the PP_CONTROL register to try to get LVDS status --
that's what PP_STATUS is for.
2006-12-01 12:50:09 -08:00
f21230d3e1
Add the [ax]4r4g4b4 source picture formats.
2006-12-01 12:50:09 -08:00
Eric Anholt
Joshua J. Berry
Keith Packard
Keith Packard
Keith Packard
Wang Zhenyu
Keith Packard
Keith Packard