Open the "actual_brightness" file as read only, since we only read from it.
Also set an initial backlight_duty_cycle at init time so we don't set the
brightness to 0 at startup.
Several people have reported that they see frequent FBC related display
corruption on 965GM, so disable it for now. Users wanting to enable it can use
the driver option "Framebuffercompression" to override the default.
We need to look at "actual_brightness" rather than "brightness". The former
contains the brightness value the kernel driver has actually set, while the
latter is merely what the user requested.
Some of the hw state restoration callbacks may want to use the ring for various
things like stopping video playback, so leave the ring enabled until we get
back from RestoreHWState. Also rename the functions so that their purpose is
clearer and remove a couple of redundant lines.
This slightly reworks my last fbc patch. We don't
support tiled front buffer with XAA now, so also
disable fbc on it. If tiled alloc failed, disable
fbc too.
The PLL spreadsheet makes the precise register ranges allowed for each mode
quite clear, and shows a few inaccuracies in the b-spec. In particular, the
N register value may range from 1 to 6 instead of 3 to 8. This should close
the gap we've seen in the reachable frequencies.
This really isn't an error in general. If vblank pipe setup really fails for
some reason, it'll be obvious enough when the user tries to use vblank events
for something.
Patch from Hong Liu.
This commit fixes backlight support for several platforms.
Except on recent machines supporting the IGD OpRegion specification,
backlight control is rather platform specific. In some cases, we can
program the native backlight control regsiters directly without any
trouble. On others, we need to use the legacy backlight control
register. On still others, we need a combination of the two. And on
some platforms, none of the above will work, so we go through the
kernel backlight interface, which provides a platform specific driver
for backlight control.
When calling the video DPMS off function, make sure we zero out the current
crtc so that it will be properly re-set up next time video is turned on.
Fix from Peter Clifton with changes by Keith Packard.
In the absence of full suspend/resume support in the kernel, we have to
save/restore state in Enter/LeaveVT. For 8xx chips, 3D state may be lost
during suspend/resume, so re-emit the basic setup at EnterVT time.
Patch from Peter Clifton.
If the DPLL isn't enabled or is in VGA mode, writing the PIPEnCONF registers
may cause a hang or crash. So ensure the DPLL is in the proper state before
writing them.
Another excellent fix from Peter Clifton.
Fix a long standing bug in the framebuffer compression code (thanks to
Pierre Willenbrock!) that prevented FBC from working correctly if the front
buffer was anywhere but fence register 0.
Zhenyu Wang
Jesse Barnes
Jesse Barnes
Keith Packard
Jesse Barnes
Jesse Barnes
Eric Anholt
Alan Coopersmith