As we use pkg-config to determine whether to use intel-gen4asm, we
should also use it to locate the right version of intel-gen4asm to use.
This allows the user to install the assembler in a non-standard path for
cross-builds and similar.
Reported-by: Josh Tripplet <josh@freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55646
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Otherwise we notice that we have a CPU mmap during read synchronized and
presume that we need not take any further action. However...
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
The make rules to compile shaders with intel-gen4asm referenced the .g4a
source files without using $(srcdir), which broke out-of-tree builds.
Reference .g4a source files via $(srcdir), and add $(srcdir) to m4's
include path, fixing out-of-tree builds.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55645
Signed-off-by: Josh Triplett <josh@joshtriplett.org>
Revert back to basics, and clear the CPU flag everytime we use the GPU,
rather than try to avoid clearing it along some paths.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
I thought these were completely specified via the LOAD_STATE_IMMEDIATE
commands we used whilst seting up the render pipeline. I was wrong.
Reported-by: Timo Kamph <timo@kamph.org>
References: https://bugs.freedesktop.org/show_bug.cgi?id=55455
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
So that we keep the assertion checks that without CPU damage we can not
be on the cpu.
Reported-by: Clemens Eisserer <linuxhippy@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55591
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
As we need to clflush the scanout buffer as we return it to the bo cache
on SNB+, it is costly to terminate the pageflipping as soon as we drop a
frame as mesa often fails to keep up to the vrefresh rate.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
In an interesting twist during teardown, the driver info structure is
freed long before the caches. However, the glyph cache teardown was
checking to see if glamor was enabled to see if it could skip the
teardown. In fact, since we won't have created the glyph caches in that
circumstances it was safe any way.
Reported-by: Maarten Lankhorst <m.b.lankhorst@gmail.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Just ignore the error return from WaitVBlank and make up a value for
last MSC/SBC similar to an unattached Drawable.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55395
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
If we delay the dropping of DRM master we may complete a VT switch
before we are ready and so prevent a second X server from reacquiring
master, and dying.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55446
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
If we attempt to power up the pipe through a DPMS request, but it was
previously disabled due to an error, first try re-enabling.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
As intel_crtc_on() depends upon the current value for determining if the
pipe is active, we can only change the value afterwards.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
If we schedule a flip to happen on a far distant vblank, it is possible
for us to disable the pipes with a modeset, whilst maintaining the fb
size, or with a DPMS command. If the pipe is disabled and we still try
to flip, then we trigger an EINVAL error from the kernel.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson
Josh Triplett