Commit Graph

7243 Commits

Author SHA1 Message Date
Chris Wilson bee26a8e2e sna/dri: Sanitize the backbuffer flip cache
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-23 10:49:46 +01:00
Chris Wilson c4f5da7ab9 sna/dri: Report saner target_msc values for vblank_mode=0
If desired target_msc is 0 report 0 rather than (CARD64)-1.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-23 10:48:53 +01:00
Chris Wilson f296872f37 sna/dri: Fix SwapbufferWait
A regression from

commit f99e49f764
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Tue Sep 17 09:15:40 2013 +0100

    intel: Make the option to control VSync and PageFlip explict

which used the inverse meaning of the option to disable waiting on
swapbuffers.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-23 10:48:52 +01:00
Chris Wilson 42330fbae8 sna: Track CPU/GTT maps independently
Now that we use CPU mmaps to read/write to tiled X surfaces, we find
ourselves frequently switching between CPU and GTT mmaps and so wish to
cache both.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-23 10:48:52 +01:00
Chris Wilson dd130d1b06 intel-virtual-overlay: Grab the server around mode manipulations
Prevent other clients from seeing the intermediate states.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-23 10:48:52 +01:00
Chris Wilson 8478e9c444 sna: Both clear PolyGlyph and ImageGlyph are no-ops
For ImageGlyphs, we pre-clear the area hence the bg is always set.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-22 10:38:57 +01:00
Chris Wilson 395f07b1fe sna: Undo region translation after failing to begin ImageGlyphs
If we fail the initial tests, we need to undo our translation to the
region before returning and starting the fallback paths.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-22 10:38:57 +01:00
Chris Wilson 2851b7747b sna: ImageGlyphs completely overwrite the destination
So we can use the usual rules for discarding unused reads.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-22 10:31:01 +01:00
Chris Wilson 27f87a56e9 sna: Don't set the mapped hint for inplace tiled accesses
The mapped hint is only useful for coherent mappings where it is
preferable to guide placement of regular operations.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-21 08:44:59 +01:00
Chris Wilson 799f1e2355 sna: Prevent invalid use of set-write-domain on scanouts when debugging
One debugging option forces the use of the write domain when
synchronising to force a full synchronisation. This trips up an
assertion to catch when we try to move the scanout into the CPU write
domain. So don't.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-21 08:37:40 +01:00
Chris Wilson 011636d25b intel-virtual-output: Hide the remote cursor on initial connection
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-20 18:57:11 +01:00
Chris Wilson 4497212307 uxa: Do not change DPMS mode on unconnected outputs
The operation is in theory redundant, and in the case of Haswell where
we have multiple outputs aliasing to the same encoder, actually harmful.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68030
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Tested-by: Stefan Dirsch <sndirsch@suse.de>
2013-09-20 11:45:47 +01:00
Chris Wilson 63a070a31a sna: Do not change DPMS mode on unconnected outputs
The operation is in theory redundant, and in the case of Haswell where
we have multiple outputs aliasing to the same encoder, actually harmful.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68030
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-19 15:35:34 +01:00
Chris Wilson 011e567e84 sna: Add output names to DBG dpms changes
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-19 15:35:22 +01:00
Chris Wilson 0e1abe3cd0 sna/gen4: Remove long dead code for forced batch emission between CA passes
Forcing the batch emission on virtually every glyph eats a lot of CPU
time sending very short commands to the GPU, and is totally unnecessary.

Reported-by: Arkadiusz Miskiewicz <a.miskiewicz@gmail.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-19 13:00:36 +01:00
Chris Wilson 6316905983 intel: Fix includes for intel_options
In commit dcf9b5ae18
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Tue Sep 17 22:27:45 2013 +0100

    intel: Compile fixes for base install of SLED11.sp3

the includes were juggled around to avoid pulling in xorg-server.h
outside of the driver. However, missing xorg-server.h leads to subtle
bugs in the layout of structures, in this case breaking xf86Options.

Reported-by: FBrown <francisbrwn9@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69555
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-19 11:28:30 +01:00
Chris Wilson afad7dd43d sna: Pushed dixPrivateKeyRegistered wrapper into compat-api.h
Move the wrapping out of the main code body and hide it with the others
in our compatability header.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-18 15:37:09 +01:00
Chris Wilson 53574e4f4f sna: Wrap use of dixPrivateKeyRegistered for uevents
SLED11 also requires us to poke around in the privates as it does not
provide the more recent privates API.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-18 15:28:09 +01:00
Chris Wilson dcf9b5ae18 intel: Compile fixes for base install of SLED11.sp3
Highlights of that distribution include xorg-xserver-1.6.5, kernel
3.0.76 and gcc-4.3.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-18 12:49:41 +01:00
Chris Wilson 97b443f589 sna: Fix off-by-one in computation of valid CRTC mask
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-18 11:44:53 +01:00
Chris Wilson efffc42f22 sna: Disable same-edid detection
The kernel is quite able to return the same id for new edid. :(

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-18 11:43:24 +01:00
Chris Wilson 825557ce44 sna: Clamp the possible-crtc mask to the real CRTCs
A minor bit of sanitizing of the kernel output.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-17 10:12:13 +01:00
Chris Wilson f99e49f764 intel: Make the option to control VSync and PageFlip explict
Too often our implementation of vsync or pageflip is buggy, or for some
other reason it is desired by the user to disable those code paths. Make
it possible once again by restoring the Options for the user to control.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-17 09:29:42 +01:00
Chris Wilson 76790db4e6 test: Exercise flips/blit swaps on each pipe
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-12 15:25:19 +01:00
Chris Wilson bf4be323e3 sna: Fix declaration of write intent for can_map__cpu in PutImage
We always are going to write to the image, despite the flag set in

commit fa961ec99a
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Sun Jul 21 18:00:22 2013 +0100

    sna: Allow linear inplace uploads along the tiled X PutImage blt paths

which was accidentally conditional on the image not being too large.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-12 13:58:32 +01:00
Ross Burton 4fb651cb5f test: only build DRI2 tests if DRI2 is enabled
Signed-off-by: Ross Burton <ross.burton@intel.com>
2013-09-11 21:45:27 +01:00
Chris Wilson 815caa9fc6 sna/gen4+: Rebalance creation of vbo during batch flushing
We need to be careful not to copy too much data during the vertex flush
or else that becomes the rate-limiting step. The goal here is to do the
early flush to warm up the GPU, then transition to larger batches.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-11 10:20:30 +01:00
Chris Wilson 0d05a69bd7 sna/gen4: Always try the BLT composite routines first
Given how fragile the render operations are, taking the hit from
transitioning from the slow render operations to the comparatively fast
BLT (when possible) is always worth it.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-11 10:20:28 +01:00
Chris Wilson 9a66d77efa sna: Disable use of Y-tiling for gen4
This problematic GPU still seems to like to fallover when faced with
Y-tiling. It was reserved only for use with glyphs, but even that
occasionally runs into trouble, so disable all selection of Y-tiling for
our own use.

Bugzilla: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1222203
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-10 12:29:24 +01:00
Chris Wilson 8ff8eb2b38 sna/hsw: Scanline waits require both DERRMR and forcewake
Oh my, bspec is missing a few details on how to perform a scanline wait
on Haswell. But by using the extra steps required for Ivybridge, we can
successfully send events from the scanout to the BCS ring. Sadly this
again means that to use vsync on Haswell requires preventing the GPU
from sleeping whilst it waits for the scanout to advance.

Reported-by: Dan Doel <dan.doel@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69119
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-09 16:23:04 +01:00
Chris Wilson dbe7598245 sna/hsw: Fix the event selection for scanline waits on pipe A
Hmm, this should have meant that we never actually waited for a
scan-line on pipe A. I wonder if it even works...

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-09 15:42:06 +01:00
Chris Wilson 144d970461 sna/gen6+: Only apply the BLT copy w/a for self-copies
A missing check along the copy_boxes() path to bring the w/a into line
with the other paths.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-09 15:42:06 +01:00
Chris Wilson af4215dd7f sna: Call the new __offset functions in the last commit
Sigh. I added the new functions for the asserts, updated the parameters,
but forgot to change the actual function themselves.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-09 15:03:30 +01:00
Chris Wilson 6d5df67b3e sna: Remember to offset the box before asserting damage
When using sna_copy_boxes__inplace(), we need to remember that the
region is in destination space, so we need to offset the boxes when
comparing against the source. The assertion forgot to do so, and so
failed as soon as it met a little complexity.

Reported-by: Jiri Slaby <jirislaby@gmail.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-09 11:19:19 +01:00
Chris Wilson 634748486f sna/gen4+: Flush batch if idle on filling vbo
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-08 23:02:29 +01:00
Chris Wilson 77d74ec777 sna/gen6: Prefer the RCS on large GT systems
For SNB, the different between RCS and BCS is more marginal but it is
slightly in favour of using rendercopy on GT2.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-08 22:34:09 +01:00
Chris Wilson 287727ee22 sna/gen7: Prefer the BLT for gt1 systems
On gt1, the BCS is faster than the RCS for all equivalent operations,
unlike gt2+ where the RCS is faster (but at greater power draw).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-08 22:34:03 +01:00
Chris Wilson f25235a854 configure: Only assert DRI2 requirements not met if the DRI2 package is missing
The new error message was added in
commit ea30967245 [2.99.902]
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Fri Sep 6 22:54:48 2013 +0000

    configure: Disable UXA build without DRI2

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-08 16:38:58 +01:00
Chris Wilson 0ceba64821 intel-virtual-output: Debug option for forcing full redraws
References: https://bugs.freedesktop.org/show_bug.cgi?id=68987
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-08 13:51:14 +01:00
Chris Wilson 6a6517c748 sna: Only update the CRTCs after a resize if master
It appears possible to race the framebuffer resize with a VT switch and
so end up attempting to update the CRTCs whilst master. The code
complains, but in reality we can just ignore the requested change until
we VT switch back and then apply the updates upon restoration of master.

Reported-by: Jiri Slaby <jirislaby@gmail.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-07 22:07:04 +01:00
Chris Wilson 7ee7e373f2 sna: Split get_drawable_deltas()
In some cases we know we only have a window, and so may skip a
conditional.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-07 17:28:33 +01:00
Chris Wilson 218c9901e5 NEWS: Fix release dates, missed the transition to September 2013-09-07 15:16:51 +01:00
Chris Wilson 58a7611ccf 2.99.902 snapshot 2013-09-07 08:48:34 +01:00
Chris Wilson 0c697aee9b Revert "sna: Add XMir support"
This reverts commit 42d94356f6.

Ordered-by: The Management.
2013-09-07 08:42:26 +01:00
Chris Wilson ea30967245 configure: Disable UXA build without DRI2
DRI2 is interwoven into the UXA structs, so simply disable building UXA
if DRI2 is not available.

Reported-by: Ross Burton <ross@burtonini.com>
Bugzilla:  https://bugs.freedesktop.org/show_bug.cgi?id=69056
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-06 23:58:17 +01:00
Chris Wilson 9fdaeec8f2 sna: Search /sys/class/power_state for the AC adapter
The adapter names are not uniform, so we need to scan the directory and
find the entry that corresponds to the Mains power supply. However, the
acpid does continue to report generic ac_adapter events.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-06 23:55:56 +01:00
Chris Wilson 0485cdfb6d sna/dri: Only the BackLeft merits special allocation flags
As the BackLeft is the only that couled be flipped, it is the only one
that may end up as the scanout and so is the only one that should be
allocated from the scanout cache.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-06 23:55:55 +01:00
Chris Wilson 489a93e4cc sna/gen6+: Switch to using the BLT more often when off AC
The BLT is more power-efficient for the operations it can handle, so use
it when possible (following the usual caveats) if we know we only have
battery power.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-06 16:06:06 +01:00
Chris Wilson f2ed1ac7b9 sna: Listen to ACPI events for power state notifications
When on-battery, we would prefer to use more power efficient operations.
For example, the BCS is far more economical to more data around with, but
it doesn't have quite the same throughput as the hungry RCS. (Not that
there is any reason why, the BCS is supposed to run at full memory
speed, unfortunately that is main memory speed and not the caches...)

Note: that X already listens to acpid for video switch notifications, it
would be useful if we could extend that interface to emit power
notifications as well.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-06 16:06:06 +01:00
Chris Wilson 56f532db2c sna: Prefer to reuse CPU bo if it was last active rather than inplace uploads
This helps short-circuit writes followed by immediate reads.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-06 13:06:48 +01:00