| .. |
|
legacy
|
i810: kill mmio vga access helpers
|
2011-10-30 17:46:07 +01:00 |
|
render_program
|
render: New Ivybridge assembly programs for render acceleration.
|
2011-07-28 15:00:17 -07:00 |
|
scripts
|
Review PLL spreadsheet and update register ranges.
|
2007-11-13 22:28:22 -08:00 |
|
sna
|
sna: Add some error messages to explain why we failed to create the screen
|
2011-11-08 10:24:34 +00:00 |
|
xvmc
|
Use malloc/calloc/realloc/free directly
|
2011-10-29 20:15:11 -07:00 |
|
Makefile.am
|
Xv: Refactor out pipeline setup functions for future reuse in render.
|
2011-07-28 15:00:56 -07:00 |
|
brw_defines.h
|
Document and use 'legacy' border color mode
|
2008-10-06 13:22:08 -07:00 |
|
brw_structs.h
|
Xv: update SURFACE_STATE & SAMPLER_STATE for Xv on Ivybridge
|
2011-06-24 09:42:13 +08:00 |
|
common.h
|
sna: Quieten a fewer compiler sign compare warnings
|
2011-11-02 10:03:45 +00:00 |
|
i830_3d.c
|
Rename common infrastructure to the intel namespace.
|
2010-06-25 13:18:01 +01:00 |
|
i830_reg.h
|
add BLT ring support
|
2010-11-01 10:37:51 +00:00 |
|
i830_render.c
|
i830: amalgamate consecutive composites into a single primitive
|
2010-12-23 19:42:19 +00:00 |
|
i915_3d.c
|
Rename common infrastructure to the intel namespace.
|
2010-06-25 13:18:01 +01:00 |
|
i915_3d.h
|
Revert "xp:trapezoids"
|
2010-06-09 10:03:29 +01:00 |
|
i915_reg.h
|
i915: Move vertices into a vertex buffer object.
|
2010-05-24 09:36:23 +01:00 |
|
i915_render.c
|
i965: Avoid transform overheads for vertex emit where possible
|
2011-04-07 15:09:21 +01:00 |
|
i915_video.c
|
i915/video: Clip indirect Xv output
|
2011-03-16 08:40:08 +00:00 |
|
i965_3d.c
|
render: Refactor to use newly shared pipeline setup code in i965_3d.c.
|
2011-07-28 15:01:03 -07:00 |
|
i965_reg.h
|
snb: implement PIPE_CONTROL workaround
|
2011-10-11 09:54:17 +02:00 |
|
i965_render.c
|
uxa: Remove caching of surface binding location
|
2011-11-03 20:41:31 +00:00 |
|
i965_video.c
|
render: Refactor to use newly shared pipeline setup code in i965_3d.c.
|
2011-07-28 15:01:03 -07:00 |
|
intel.h
|
uxa: Remove caching of surface binding location
|
2011-11-03 20:41:31 +00:00 |
|
intel_batchbuffer.c
|
snb: implement PIPE_CONTROL workaround
|
2011-10-11 09:54:17 +02:00 |
|
intel_batchbuffer.h
|
Ensure that the partial batch is flushed upon the blockhandler
|
2011-05-07 20:04:18 +01:00 |
|
intel_display.c
|
Disable adding normal RTF modes for an eDP
|
2011-07-13 21:11:14 +01:00 |
|
intel_dri.c
|
dri: Build fix for xserver-1.7.7
|
2011-08-01 13:37:31 +01:00 |
|
intel_driver.c
|
snb: implement PIPE_CONTROL workaround
|
2011-10-11 09:54:17 +02:00 |
|
intel_driver.h
|
Add support for Ivybridge chipset.
|
2011-05-09 22:56:42 -07:00 |
|
intel_hwmc.c
|
Include a chipset generation number to clarify device specific paths.
|
2010-10-07 13:26:07 +01:00 |
|
intel_hwmc.h
|
Rename common infrastructure to the intel namespace.
|
2010-06-25 13:18:01 +01:00 |
|
intel_memory.c
|
Turn relaxed-fencing off by default for older (pre-G33) chipsets
|
2011-04-12 09:03:01 +01:00 |
|
intel_module.c
|
sna: Quieten a fewer compiler sign compare warnings
|
2011-11-02 10:03:45 +00:00 |
|
intel_shadow.c
|
Disable BLT for i830 and 845G
|
2010-11-23 22:29:52 +00:00 |
|
intel_uxa.c
|
uxa: Remove caching of surface binding location
|
2011-11-03 20:41:31 +00:00 |
|
intel_video.c
|
Remove a couple of trivial compile warnings for unused variables
|
2011-10-14 12:01:34 +01:00 |
|
intel_video.h
|
Xv: setup pipeline for Xv on Sandybridge
|
2010-11-01 08:51:13 +08:00 |
7577d6ea45