As we assume that Suspend, Standby alias to Off and disable the crtc
when switching to any mode other than On, we need to also perform the
backlight updates for Suspend,Standby prior to passing the DPMS value
onto the kernel.
Suggested-by: Alexander Monakov <amonakov@gmail.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
As the code current assumes that pixmaps are located at screen origin
(0,0), it assumes that they are all on the first CRTC. However, since
they are offscreen, this leads to such complications as attempting to
emit vsync swapbuffers, and even worse attempting to swap a GLXPixmap
onto the scanout following a DRI2SwapBuffers.
Reported-by: Alexander Monakov <amonakov@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73282
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Fixes regression from
commit c79cb18407 [2.99.907]
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Wed Nov 20 11:17:20 2013 +0000
sna/gen7: Try to reduce flushes between primitive continuations
Reported-by: Simon Munton <simon.j.munton@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73208
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
The long running saga of trying to find an acceptable workaround for the
gen4 rendering corruption (seems to be a read-write hazard failure inside
the gpu) is failing, the only w/a found so far is to send a single
rectangle through the GPU at a time.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Now that we do not remove the move-to-gpu for a plain read from the
TearFree buffer, it is viable to use that buffer as source for cloning.
So we need to kill the stale assertion.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Otherwise the build breaks on *BSD.
Reported-by: Yuta SATOH <nigoro.gentoo@0x100.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72707
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
During TearFree, if we have to wait for the shadow flip to complete, we
run the event handler for the device. This can then cause us to evaluate
pending completed vblank events, which may in turn then attempt to use
the shadow bo and recurse into the TearFree handler. Try to prevent this
and requeue the vblank event.
Reported-by: Pascal de Bruijn <pmjdebruijn@pcode.nl>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72690
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
A full vbo might not be discarded and so upon first use in the following
batch we decided to finish the old vbo and allocate a new. This can
happen before we even emit any relocations and so the assert is bogus.
Reported-by: Jiri Slaby <jirislaby@gmail.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
sna_display.c: In function 'sna_crtc_redisplay__fallback':
sna_display.c:4104:19: warning: unused variable 'sna_crtc' [-Wunused-variable]
struct sna_crtc *sna_crtc = to_sna_crtc(crtc);
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Pulling in changes from:
kernel commit 4d4dead67a4ab1d5de393f15ed5e4e2aa63d3bcf
Author: Ben Widawsky <benjamin.widawsky@intel.com>
Date: Sun Nov 3 16:47:33 2013 -0800
drm/i915/bdw: Add device IDs
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
The surface creation routines should ensure that the minimum pitch
alignments are met. However, when rendering to a CPU bo, the pitch is
not under our control so we need to be more careful.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This prevents render corruption on gen3 and should not adversely affect
BLT pitch requirements or other GPUs.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Remembering that the target window may be smaller than its backing
pixmap.
Reported-by: Andreas Klauer <Andreas.Klauer@metamorpher.de>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72430
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
When fixing up a pending shadow pageflip for TearFree, we must tell it
that it needs to flush the damage for a partial move-to-gpu. Even though
the current area does not read from the destination, the move-to-gpu
callback is a global pass, and we need to assume the worst for the
region outside of the target.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72343
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
My current best guess at the glaring hole in the spec that is
synchronisation to vertical refresh.
Note that this leaves VSync disabled for BYT for now as it is
ineffective - but at least it now doesn't hang!
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69869
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Split the identification strings between the older integrated graphic
chipsets and the more recent integrated processor graphics. This helps
to emphasis the recent branding and should reduce confusion about which
processors are supported by the driver.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
commit 3fd116782b
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Mon Sep 23 21:03:07 2013 +0100
sna/dri: Clear the clear hint upon applying DRI damage
missed the short-circuit path for an already all-damaged pixmap - which
is quite common for the clear pixmaps...
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72194
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
When creating the object, we need to take account that fenced regions
in the aperture are in power-of-two sizes and so can be much larger than
the actual object. This includes Pineview, which although is more
relaxed with regards to fence alignment of GPU operations, still imposes
the same restrictions on the fence registers.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Some linear GPU bo that we create must be naturally aligned, and the
extra alignment imposed for pure paranoia is counter productive.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
In particular, it was offseting the read from the source image, but not
correcting the length to read - causing a read from beyond the end of
the source and a segfault.
Reported-by: Jan Engelhardt <jengelh@inai.de>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson